sched: make early bootup sched_clock() use safer
[wrt350n-kernel.git] / include / asm-blackfin / mach-common / cdef_LPBlackfin.h
blobede210eca4ec1f6c202601dd77a94abfa52b432f
1 /*
2 * File: include/asm-blackfin/mach-common/cdef_LPBlackfin.h
3 * Based on:
4 * Author: unknown
5 * COPYRIGHT 2005 Analog Devices
6 * Created: ?
7 * Description:
9 * Modified:
11 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; see the file COPYING.
25 * If not, write to the Free Software Foundation,
26 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 #ifndef _CDEF_LPBLACKFIN_H
30 #define _CDEF_LPBLACKFIN_H
32 /*#if !defined(__ADSPLPBLACKFIN__)
33 #warning cdef_LPBlackfin.h should only be included for 532 compatible chips.
34 #endif
36 #include <asm/mach-common/def_LPBlackfin.h>
38 /*Cache & SRAM Memory*/
39 #define bfin_read_SRAM_BASE_ADDRESS() bfin_read32(SRAM_BASE_ADDRESS)
40 #define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val)
41 #define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL)
42 #if ANOMALY_05000125
43 extern void bfin_write_DMEM_CONTROL(unsigned int val);
44 #else
45 #define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val)
46 #endif
47 #define bfin_read_DCPLB_STATUS() bfin_read32(DCPLB_STATUS)
48 #define bfin_write_DCPLB_STATUS(val) bfin_write32(DCPLB_STATUS,val)
49 #define bfin_read_DCPLB_FAULT_ADDR() bfin_read32(DCPLB_FAULT_ADDR)
50 #define bfin_write_DCPLB_FAULT_ADDR(val) bfin_write32(DCPLB_FAULT_ADDR,val)
52 #define MMR_TIMEOUT 0xFFE00010
54 #define bfin_read_DCPLB_ADDR0() bfin_read32(DCPLB_ADDR0)
55 #define bfin_write_DCPLB_ADDR0(val) bfin_write32(DCPLB_ADDR0,val)
56 #define bfin_read_DCPLB_ADDR1() bfin_read32(DCPLB_ADDR1)
57 #define bfin_write_DCPLB_ADDR1(val) bfin_write32(DCPLB_ADDR1,val)
58 #define bfin_read_DCPLB_ADDR2() bfin_read32(DCPLB_ADDR2)
59 #define bfin_write_DCPLB_ADDR2(val) bfin_write32(DCPLB_ADDR2,val)
60 #define bfin_read_DCPLB_ADDR3() bfin_read32(DCPLB_ADDR3)
61 #define bfin_write_DCPLB_ADDR3(val) bfin_write32(DCPLB_ADDR3,val)
62 #define bfin_read_DCPLB_ADDR4() bfin_read32(DCPLB_ADDR4)
63 #define bfin_write_DCPLB_ADDR4(val) bfin_write32(DCPLB_ADDR4,val)
64 #define bfin_read_DCPLB_ADDR5() bfin_read32(DCPLB_ADDR5)
65 #define bfin_write_DCPLB_ADDR5(val) bfin_write32(DCPLB_ADDR5,val)
66 #define bfin_read_DCPLB_ADDR6() bfin_read32(DCPLB_ADDR6)
67 #define bfin_write_DCPLB_ADDR6(val) bfin_write32(DCPLB_ADDR6,val)
68 #define bfin_read_DCPLB_ADDR7() bfin_read32(DCPLB_ADDR7)
69 #define bfin_write_DCPLB_ADDR7(val) bfin_write32(DCPLB_ADDR7,val)
70 #define bfin_read_DCPLB_ADDR8() bfin_read32(DCPLB_ADDR8)
71 #define bfin_write_DCPLB_ADDR8(val) bfin_write32(DCPLB_ADDR8,val)
72 #define bfin_read_DCPLB_ADDR9() bfin_read32(DCPLB_ADDR9)
73 #define bfin_write_DCPLB_ADDR9(val) bfin_write32(DCPLB_ADDR9,val)
74 #define bfin_read_DCPLB_ADDR10() bfin_read32(DCPLB_ADDR10)
75 #define bfin_write_DCPLB_ADDR10(val) bfin_write32(DCPLB_ADDR10,val)
76 #define bfin_read_DCPLB_ADDR11() bfin_read32(DCPLB_ADDR11)
77 #define bfin_write_DCPLB_ADDR11(val) bfin_write32(DCPLB_ADDR11,val)
78 #define bfin_read_DCPLB_ADDR12() bfin_read32(DCPLB_ADDR12)
79 #define bfin_write_DCPLB_ADDR12(val) bfin_write32(DCPLB_ADDR12,val)
80 #define bfin_read_DCPLB_ADDR13() bfin_read32(DCPLB_ADDR13)
81 #define bfin_write_DCPLB_ADDR13(val) bfin_write32(DCPLB_ADDR13,val)
82 #define bfin_read_DCPLB_ADDR14() bfin_read32(DCPLB_ADDR14)
83 #define bfin_write_DCPLB_ADDR14(val) bfin_write32(DCPLB_ADDR14,val)
84 #define bfin_read_DCPLB_ADDR15() bfin_read32(DCPLB_ADDR15)
85 #define bfin_write_DCPLB_ADDR15(val) bfin_write32(DCPLB_ADDR15,val)
86 #define bfin_read_DCPLB_DATA0() bfin_read32(DCPLB_DATA0)
87 #define bfin_write_DCPLB_DATA0(val) bfin_write32(DCPLB_DATA0,val)
88 #define bfin_read_DCPLB_DATA1() bfin_read32(DCPLB_DATA1)
89 #define bfin_write_DCPLB_DATA1(val) bfin_write32(DCPLB_DATA1,val)
90 #define bfin_read_DCPLB_DATA2() bfin_read32(DCPLB_DATA2)
91 #define bfin_write_DCPLB_DATA2(val) bfin_write32(DCPLB_DATA2,val)
92 #define bfin_read_DCPLB_DATA3() bfin_read32(DCPLB_DATA3)
93 #define bfin_write_DCPLB_DATA3(val) bfin_write32(DCPLB_DATA3,val)
94 #define bfin_read_DCPLB_DATA4() bfin_read32(DCPLB_DATA4)
95 #define bfin_write_DCPLB_DATA4(val) bfin_write32(DCPLB_DATA4,val)
96 #define bfin_read_DCPLB_DATA5() bfin_read32(DCPLB_DATA5)
97 #define bfin_write_DCPLB_DATA5(val) bfin_write32(DCPLB_DATA5,val)
98 #define bfin_read_DCPLB_DATA6() bfin_read32(DCPLB_DATA6)
99 #define bfin_write_DCPLB_DATA6(val) bfin_write32(DCPLB_DATA6,val)
100 #define bfin_read_DCPLB_DATA7() bfin_read32(DCPLB_DATA7)
101 #define bfin_write_DCPLB_DATA7(val) bfin_write32(DCPLB_DATA7,val)
102 #define bfin_read_DCPLB_DATA8() bfin_read32(DCPLB_DATA8)
103 #define bfin_write_DCPLB_DATA8(val) bfin_write32(DCPLB_DATA8,val)
104 #define bfin_read_DCPLB_DATA9() bfin_read32(DCPLB_DATA9)
105 #define bfin_write_DCPLB_DATA9(val) bfin_write32(DCPLB_DATA9,val)
106 #define bfin_read_DCPLB_DATA10() bfin_read32(DCPLB_DATA10)
107 #define bfin_write_DCPLB_DATA10(val) bfin_write32(DCPLB_DATA10,val)
108 #define bfin_read_DCPLB_DATA11() bfin_read32(DCPLB_DATA11)
109 #define bfin_write_DCPLB_DATA11(val) bfin_write32(DCPLB_DATA11,val)
110 #define bfin_read_DCPLB_DATA12() bfin_read32(DCPLB_DATA12)
111 #define bfin_write_DCPLB_DATA12(val) bfin_write32(DCPLB_DATA12,val)
112 #define bfin_read_DCPLB_DATA13() bfin_read32(DCPLB_DATA13)
113 #define bfin_write_DCPLB_DATA13(val) bfin_write32(DCPLB_DATA13,val)
114 #define bfin_read_DCPLB_DATA14() bfin_read32(DCPLB_DATA14)
115 #define bfin_write_DCPLB_DATA14(val) bfin_write32(DCPLB_DATA14,val)
116 #define bfin_read_DCPLB_DATA15() bfin_read32(DCPLB_DATA15)
117 #define bfin_write_DCPLB_DATA15(val) bfin_write32(DCPLB_DATA15,val)
118 #define bfin_read_DTEST_COMMAND() bfin_read32(DTEST_COMMAND)
119 #define bfin_write_DTEST_COMMAND(val) bfin_write32(DTEST_COMMAND,val)
121 #define DTEST_INDEX 0xFFE00304
123 #define bfin_read_DTEST_DATA0() bfin_read32(DTEST_DATA0)
124 #define bfin_write_DTEST_DATA0(val) bfin_write32(DTEST_DATA0,val)
125 #define bfin_read_DTEST_DATA1() bfin_read32(DTEST_DATA1)
126 #define bfin_write_DTEST_DATA1(val) bfin_write32(DTEST_DATA1,val)
128 #define DTEST_DATA2 0xFFE00408
129 #define DTEST_DATA3 0xFFE0040C
131 #define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL)
132 #if ANOMALY_05000125
133 extern void bfin_write_IMEM_CONTROL(unsigned int val);
134 #else
135 #define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val)
136 #endif
137 #define bfin_read_ICPLB_STATUS() bfin_read32(ICPLB_STATUS)
138 #define bfin_write_ICPLB_STATUS(val) bfin_write32(ICPLB_STATUS,val)
139 #define bfin_read_ICPLB_FAULT_ADDR() bfin_read32(ICPLB_FAULT_ADDR)
140 #define bfin_write_ICPLB_FAULT_ADDR(val) bfin_write32(ICPLB_FAULT_ADDR,val)
141 #define bfin_read_ICPLB_ADDR0() bfin_read32(ICPLB_ADDR0)
142 #define bfin_write_ICPLB_ADDR0(val) bfin_write32(ICPLB_ADDR0,val)
143 #define bfin_read_ICPLB_ADDR1() bfin_read32(ICPLB_ADDR1)
144 #define bfin_write_ICPLB_ADDR1(val) bfin_write32(ICPLB_ADDR1,val)
145 #define bfin_read_ICPLB_ADDR2() bfin_read32(ICPLB_ADDR2)
146 #define bfin_write_ICPLB_ADDR2(val) bfin_write32(ICPLB_ADDR2,val)
147 #define bfin_read_ICPLB_ADDR3() bfin_read32(ICPLB_ADDR3)
148 #define bfin_write_ICPLB_ADDR3(val) bfin_write32(ICPLB_ADDR3,val)
149 #define bfin_read_ICPLB_ADDR4() bfin_read32(ICPLB_ADDR4)
150 #define bfin_write_ICPLB_ADDR4(val) bfin_write32(ICPLB_ADDR4,val)
151 #define bfin_read_ICPLB_ADDR5() bfin_read32(ICPLB_ADDR5)
152 #define bfin_write_ICPLB_ADDR5(val) bfin_write32(ICPLB_ADDR5,val)
153 #define bfin_read_ICPLB_ADDR6() bfin_read32(ICPLB_ADDR6)
154 #define bfin_write_ICPLB_ADDR6(val) bfin_write32(ICPLB_ADDR6,val)
155 #define bfin_read_ICPLB_ADDR7() bfin_read32(ICPLB_ADDR7)
156 #define bfin_write_ICPLB_ADDR7(val) bfin_write32(ICPLB_ADDR7,val)
157 #define bfin_read_ICPLB_ADDR8() bfin_read32(ICPLB_ADDR8)
158 #define bfin_write_ICPLB_ADDR8(val) bfin_write32(ICPLB_ADDR8,val)
159 #define bfin_read_ICPLB_ADDR9() bfin_read32(ICPLB_ADDR9)
160 #define bfin_write_ICPLB_ADDR9(val) bfin_write32(ICPLB_ADDR9,val)
161 #define bfin_read_ICPLB_ADDR10() bfin_read32(ICPLB_ADDR10)
162 #define bfin_write_ICPLB_ADDR10(val) bfin_write32(ICPLB_ADDR10,val)
163 #define bfin_read_ICPLB_ADDR11() bfin_read32(ICPLB_ADDR11)
164 #define bfin_write_ICPLB_ADDR11(val) bfin_write32(ICPLB_ADDR11,val)
165 #define bfin_read_ICPLB_ADDR12() bfin_read32(ICPLB_ADDR12)
166 #define bfin_write_ICPLB_ADDR12(val) bfin_write32(ICPLB_ADDR12,val)
167 #define bfin_read_ICPLB_ADDR13() bfin_read32(ICPLB_ADDR13)
168 #define bfin_write_ICPLB_ADDR13(val) bfin_write32(ICPLB_ADDR13,val)
169 #define bfin_read_ICPLB_ADDR14() bfin_read32(ICPLB_ADDR14)
170 #define bfin_write_ICPLB_ADDR14(val) bfin_write32(ICPLB_ADDR14,val)
171 #define bfin_read_ICPLB_ADDR15() bfin_read32(ICPLB_ADDR15)
172 #define bfin_write_ICPLB_ADDR15(val) bfin_write32(ICPLB_ADDR15,val)
173 #define bfin_read_ICPLB_DATA0() bfin_read32(ICPLB_DATA0)
174 #define bfin_write_ICPLB_DATA0(val) bfin_write32(ICPLB_DATA0,val)
175 #define bfin_read_ICPLB_DATA1() bfin_read32(ICPLB_DATA1)
176 #define bfin_write_ICPLB_DATA1(val) bfin_write32(ICPLB_DATA1,val)
177 #define bfin_read_ICPLB_DATA2() bfin_read32(ICPLB_DATA2)
178 #define bfin_write_ICPLB_DATA2(val) bfin_write32(ICPLB_DATA2,val)
179 #define bfin_read_ICPLB_DATA3() bfin_read32(ICPLB_DATA3)
180 #define bfin_write_ICPLB_DATA3(val) bfin_write32(ICPLB_DATA3,val)
181 #define bfin_read_ICPLB_DATA4() bfin_read32(ICPLB_DATA4)
182 #define bfin_write_ICPLB_DATA4(val) bfin_write32(ICPLB_DATA4,val)
183 #define bfin_read_ICPLB_DATA5() bfin_read32(ICPLB_DATA5)
184 #define bfin_write_ICPLB_DATA5(val) bfin_write32(ICPLB_DATA5,val)
185 #define bfin_read_ICPLB_DATA6() bfin_read32(ICPLB_DATA6)
186 #define bfin_write_ICPLB_DATA6(val) bfin_write32(ICPLB_DATA6,val)
187 #define bfin_read_ICPLB_DATA7() bfin_read32(ICPLB_DATA7)
188 #define bfin_write_ICPLB_DATA7(val) bfin_write32(ICPLB_DATA7,val)
189 #define bfin_read_ICPLB_DATA8() bfin_read32(ICPLB_DATA8)
190 #define bfin_write_ICPLB_DATA8(val) bfin_write32(ICPLB_DATA8,val)
191 #define bfin_read_ICPLB_DATA9() bfin_read32(ICPLB_DATA9)
192 #define bfin_write_ICPLB_DATA9(val) bfin_write32(ICPLB_DATA9,val)
193 #define bfin_read_ICPLB_DATA10() bfin_read32(ICPLB_DATA10)
194 #define bfin_write_ICPLB_DATA10(val) bfin_write32(ICPLB_DATA10,val)
195 #define bfin_read_ICPLB_DATA11() bfin_read32(ICPLB_DATA11)
196 #define bfin_write_ICPLB_DATA11(val) bfin_write32(ICPLB_DATA11,val)
197 #define bfin_read_ICPLB_DATA12() bfin_read32(ICPLB_DATA12)
198 #define bfin_write_ICPLB_DATA12(val) bfin_write32(ICPLB_DATA12,val)
199 #define bfin_read_ICPLB_DATA13() bfin_read32(ICPLB_DATA13)
200 #define bfin_write_ICPLB_DATA13(val) bfin_write32(ICPLB_DATA13,val)
201 #define bfin_read_ICPLB_DATA14() bfin_read32(ICPLB_DATA14)
202 #define bfin_write_ICPLB_DATA14(val) bfin_write32(ICPLB_DATA14,val)
203 #define bfin_read_ICPLB_DATA15() bfin_read32(ICPLB_DATA15)
204 #define bfin_write_ICPLB_DATA15(val) bfin_write32(ICPLB_DATA15,val)
205 #define bfin_read_ITEST_COMMAND() bfin_read32(ITEST_COMMAND)
206 #define bfin_write_ITEST_COMMAND(val) bfin_write32(ITEST_COMMAND,val)
207 #if 0
208 #define ITEST_INDEX 0xFFE01304 /* Instruction Test Index Register */
209 #endif
210 #define bfin_read_ITEST_DATA0() bfin_read32(ITEST_DATA0)
211 #define bfin_write_ITEST_DATA0(val) bfin_write32(ITEST_DATA0,val)
212 #define bfin_read_ITEST_DATA1() bfin_read32(ITEST_DATA1)
213 #define bfin_write_ITEST_DATA1(val) bfin_write32(ITEST_DATA1,val)
215 /* Event/Interrupt Registers*/
217 #define bfin_read_EVT0() bfin_read32(EVT0)
218 #define bfin_write_EVT0(val) bfin_write32(EVT0,val)
219 #define bfin_read_EVT1() bfin_read32(EVT1)
220 #define bfin_write_EVT1(val) bfin_write32(EVT1,val)
221 #define bfin_read_EVT2() bfin_read32(EVT2)
222 #define bfin_write_EVT2(val) bfin_write32(EVT2,val)
223 #define bfin_read_EVT3() bfin_read32(EVT3)
224 #define bfin_write_EVT3(val) bfin_write32(EVT3,val)
225 #define bfin_read_EVT4() bfin_read32(EVT4)
226 #define bfin_write_EVT4(val) bfin_write32(EVT4,val)
227 #define bfin_read_EVT5() bfin_read32(EVT5)
228 #define bfin_write_EVT5(val) bfin_write32(EVT5,val)
229 #define bfin_read_EVT6() bfin_read32(EVT6)
230 #define bfin_write_EVT6(val) bfin_write32(EVT6,val)
231 #define bfin_read_EVT7() bfin_read32(EVT7)
232 #define bfin_write_EVT7(val) bfin_write32(EVT7,val)
233 #define bfin_read_EVT8() bfin_read32(EVT8)
234 #define bfin_write_EVT8(val) bfin_write32(EVT8,val)
235 #define bfin_read_EVT9() bfin_read32(EVT9)
236 #define bfin_write_EVT9(val) bfin_write32(EVT9,val)
237 #define bfin_read_EVT10() bfin_read32(EVT10)
238 #define bfin_write_EVT10(val) bfin_write32(EVT10,val)
239 #define bfin_read_EVT11() bfin_read32(EVT11)
240 #define bfin_write_EVT11(val) bfin_write32(EVT11,val)
241 #define bfin_read_EVT12() bfin_read32(EVT12)
242 #define bfin_write_EVT12(val) bfin_write32(EVT12,val)
243 #define bfin_read_EVT13() bfin_read32(EVT13)
244 #define bfin_write_EVT13(val) bfin_write32(EVT13,val)
245 #define bfin_read_EVT14() bfin_read32(EVT14)
246 #define bfin_write_EVT14(val) bfin_write32(EVT14,val)
247 #define bfin_read_EVT15() bfin_read32(EVT15)
248 #define bfin_write_EVT15(val) bfin_write32(EVT15,val)
249 #define bfin_read_IMASK() bfin_read32(IMASK)
250 #define bfin_write_IMASK(val) bfin_write32(IMASK,val)
251 #define bfin_read_IPEND() bfin_read32(IPEND)
252 #define bfin_write_IPEND(val) bfin_write32(IPEND,val)
253 #define bfin_read_ILAT() bfin_read32(ILAT)
254 #define bfin_write_ILAT(val) bfin_write32(ILAT,val)
256 /*Core Timer Registers*/
257 #define bfin_read_TCNTL() bfin_read32(TCNTL)
258 #define bfin_write_TCNTL(val) bfin_write32(TCNTL,val)
259 #define bfin_read_TPERIOD() bfin_read32(TPERIOD)
260 #define bfin_write_TPERIOD(val) bfin_write32(TPERIOD,val)
261 #define bfin_read_TSCALE() bfin_read32(TSCALE)
262 #define bfin_write_TSCALE(val) bfin_write32(TSCALE,val)
263 #define bfin_read_TCOUNT() bfin_read32(TCOUNT)
264 #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT,val)
266 /*Debug/MP/Emulation Registers*/
267 #define bfin_read_DSPID() bfin_read32(DSPID)
268 #define bfin_write_DSPID(val) bfin_write32(DSPID,val)
269 #define bfin_read_DBGCTL() bfin_read32(DBGCTL)
270 #define bfin_write_DBGCTL(val) bfin_write32(DBGCTL,val)
271 #define bfin_read_DBGSTAT() bfin_read32(DBGSTAT)
272 #define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT,val)
273 #define bfin_read_EMUDAT() bfin_read32(EMUDAT)
274 #define bfin_write_EMUDAT(val) bfin_write32(EMUDAT,val)
276 /*Trace Buffer Registers*/
277 #define bfin_read_TBUFCTL() bfin_read32(TBUFCTL)
278 #define bfin_write_TBUFCTL(val) bfin_write32(TBUFCTL,val)
279 #define bfin_read_TBUFSTAT() bfin_read32(TBUFSTAT)
280 #define bfin_write_TBUFSTAT(val) bfin_write32(TBUFSTAT,val)
281 #define bfin_read_TBUF() bfin_read32(TBUF)
282 #define bfin_write_TBUF(val) bfin_write32(TBUF,val)
284 /*Watch Point Control Registers*/
285 #define bfin_read_WPIACTL() bfin_read32(WPIACTL)
286 #define bfin_write_WPIACTL(val) bfin_write32(WPIACTL,val)
287 #define bfin_read_WPIA0() bfin_read32(WPIA0)
288 #define bfin_write_WPIA0(val) bfin_write32(WPIA0,val)
289 #define bfin_read_WPIA1() bfin_read32(WPIA1)
290 #define bfin_write_WPIA1(val) bfin_write32(WPIA1,val)
291 #define bfin_read_WPIA2() bfin_read32(WPIA2)
292 #define bfin_write_WPIA2(val) bfin_write32(WPIA2,val)
293 #define bfin_read_WPIA3() bfin_read32(WPIA3)
294 #define bfin_write_WPIA3(val) bfin_write32(WPIA3,val)
295 #define bfin_read_WPIA4() bfin_read32(WPIA4)
296 #define bfin_write_WPIA4(val) bfin_write32(WPIA4,val)
297 #define bfin_read_WPIA5() bfin_read32(WPIA5)
298 #define bfin_write_WPIA5(val) bfin_write32(WPIA5,val)
299 #define bfin_read_WPIACNT0() bfin_read32(WPIACNT0)
300 #define bfin_write_WPIACNT0(val) bfin_write32(WPIACNT0,val)
301 #define bfin_read_WPIACNT1() bfin_read32(WPIACNT1)
302 #define bfin_write_WPIACNT1(val) bfin_write32(WPIACNT1,val)
303 #define bfin_read_WPIACNT2() bfin_read32(WPIACNT2)
304 #define bfin_write_WPIACNT2(val) bfin_write32(WPIACNT2,val)
305 #define bfin_read_WPIACNT3() bfin_read32(WPIACNT3)
306 #define bfin_write_WPIACNT3(val) bfin_write32(WPIACNT3,val)
307 #define bfin_read_WPIACNT4() bfin_read32(WPIACNT4)
308 #define bfin_write_WPIACNT4(val) bfin_write32(WPIACNT4,val)
309 #define bfin_read_WPIACNT5() bfin_read32(WPIACNT5)
310 #define bfin_write_WPIACNT5(val) bfin_write32(WPIACNT5,val)
311 #define bfin_read_WPDACTL() bfin_read32(WPDACTL)
312 #define bfin_write_WPDACTL(val) bfin_write32(WPDACTL,val)
313 #define bfin_read_WPDA0() bfin_read32(WPDA0)
314 #define bfin_write_WPDA0(val) bfin_write32(WPDA0,val)
315 #define bfin_read_WPDA1() bfin_read32(WPDA1)
316 #define bfin_write_WPDA1(val) bfin_write32(WPDA1,val)
317 #define bfin_read_WPDACNT0() bfin_read32(WPDACNT0)
318 #define bfin_write_WPDACNT0(val) bfin_write32(WPDACNT0,val)
319 #define bfin_read_WPDACNT1() bfin_read32(WPDACNT1)
320 #define bfin_write_WPDACNT1(val) bfin_write32(WPDACNT1,val)
321 #define bfin_read_WPSTAT() bfin_read32(WPSTAT)
322 #define bfin_write_WPSTAT(val) bfin_write32(WPSTAT,val)
324 /*Performance Monitor Registers*/
325 #define bfin_read_PFCTL() bfin_read32(PFCTL)
326 #define bfin_write_PFCTL(val) bfin_write32(PFCTL,val)
327 #define bfin_read_PFCNTR0() bfin_read32(PFCNTR0)
328 #define bfin_write_PFCNTR0(val) bfin_write32(PFCNTR0,val)
329 #define bfin_read_PFCNTR1() bfin_read32(PFCNTR1)
330 #define bfin_write_PFCNTR1(val) bfin_write32(PFCNTR1,val)
333 #define IPRIO 0xFFE02110
336 #endif /* _CDEF_LPBLACKFIN_H */