drivers/media/video/ivtv/ivtv-driver.h

   1 /*
   2     ivtv driver internal defines and structures
   3     Copyright (C) 2003-2004  Kevin Thayer <nufan_wfk at yahoo.com>
   4     Copyright (C) 2004  Chris Kennedy <c@groovy.org>
   5     Copyright (C) 2005-2007  Hans Verkuil <hverkuil@xs4all.nl>
   6
   7     This program is free software; you can redistribute it and/or modify
   8     it under the terms of the GNU General Public License as published by
   9     the Free Software Foundation; either version 2 of the License, or
  10     (at your option) any later version.
  11
  12     This program is distributed in the hope that it will be useful,
  13     but WITHOUT ANY WARRANTY; without even the implied warranty of
  14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15     GNU General Public License for more details.
  16
  17     You should have received a copy of the GNU General Public License
  18     along with this program; if not, write to the Free Software
  19     Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #ifndef IVTV_DRIVER_H
  23 #define IVTV_DRIVER_H
  24
  25 /* Internal header for ivtv project:
  26  * Driver for the cx23415/6 chip.
  27  * Author: Kevin Thayer (nufan_wfk at yahoo.com)
  28  * License: GPL
  29  * http://www.ivtvdriver.org
  30  *
  31  * -----
  32  * MPG600/MPG160 support by  T.Adachi <tadachi@tadachi-net.com>
  33  *                      and Takeru KOMORIYA<komoriya@paken.org>
  34  *
  35  * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
  36  *                using information provided by Jiun-Kuei Jung @ AVerMedia.
  37  */
  38
  39 #include <linux/version.h>
  40 #include <linux/module.h>
  41 #include <linux/moduleparam.h>
  42 #include <linux/init.h>
  43 #include <linux/delay.h>
  44 #include <linux/sched.h>
  45 #include <linux/fs.h>
  46 #include <linux/pci.h>
  47 #include <linux/interrupt.h>
  48 #include <linux/spinlock.h>
  49 #include <linux/i2c.h>
  50 #include <linux/i2c-algo-bit.h>
  51 #include <linux/list.h>
  52 #include <linux/unistd.h>
  53 #include <linux/byteorder/swab.h>
  54 #include <linux/pagemap.h>
  55 #include <linux/workqueue.h>
  56 #include <linux/mutex.h>
  57 #include <asm/uaccess.h>
  58 #include <asm/system.h>
  59
  60 #include <linux/dvb/video.h>
  61 #include <linux/dvb/audio.h>
  62 #include <media/v4l2-common.h>
  63 #include <media/tuner.h>
  64 #include <media/cx2341x.h>
  65
  66 #include <media/ivtv.h>
  67
  68
  69 #define IVTV_ENCODER_OFFSET     0x00000000
  70 #define IVTV_ENCODER_SIZE       0x00800000      /* Last half isn't needed 0x01000000 */
  71
  72 #define IVTV_DECODER_OFFSET     0x01000000
  73 #define IVTV_DECODER_SIZE       0x00800000      /* Last half isn't needed 0x01000000 */
  74
  75 #define IVTV_REG_OFFSET         0x02000000
  76 #define IVTV_REG_SIZE           0x00010000
  77
  78 /* Buffers on hardware offsets */
  79 #define IVTV_YUV_BUFFER_OFFSET    0x001a8600    /* First YUV Buffer */
  80 #define IVTV_YUV_BUFFER_OFFSET_1  0x00240400    /* Second YUV Buffer */
  81 #define IVTV_YUV_BUFFER_OFFSET_2  0x002d8200    /* Third YUV Buffer */
  82 #define IVTV_YUV_BUFFER_OFFSET_3  0x00370000    /* Fourth YUV Buffer */
  83 #define IVTV_YUV_BUFFER_UV_OFFSET 0x65400       /* Offset to UV Buffer */
  84
  85 /* Offset to filter table in firmware */
  86 #define IVTV_YUV_HORIZONTAL_FILTER_OFFSET 0x025d8
  87 #define IVTV_YUV_VERTICAL_FILTER_OFFSET 0x03358
  88
  89 extern const u32 yuv_offset[4];
  90
  91 /* Maximum ivtv driver instances. Some people have a huge number of
  92    capture cards, so set this to a high value. */
  93 #define IVTV_MAX_CARDS 32
  94
  95 /* Supported cards */
  96 #define IVTV_CARD_PVR_250             0 /* WinTV PVR 250 */
  97 #define IVTV_CARD_PVR_350             1 /* encoder, decoder, tv-out */
  98 #define IVTV_CARD_PVR_150             2 /* WinTV PVR 150 and PVR 500 (really just two
  99                                            PVR150s on one PCI board) */
 100 #define IVTV_CARD_M179                3 /* AVerMedia M179 (encoder only) */
 101 #define IVTV_CARD_MPG600              4 /* Kuroutoshikou ITVC16-STVLP/YUAN MPG600, encoder only */
 102 #define IVTV_CARD_MPG160              5 /* Kuroutoshikou ITVC15-STVLP/YUAN MPG160
 103                                            cx23415 based, but does not have tv-out */
 104 #define IVTV_CARD_PG600               6 /* YUAN PG600/DIAMONDMM PVR-550 based on the CX Falcon 2 */
 105 #define IVTV_CARD_AVC2410             7 /* Adaptec AVC-2410 */
 106 #define IVTV_CARD_AVC2010             8 /* Adaptec AVD-2010 (No Tuner) */
 107 #define IVTV_CARD_TG5000TV            9 /* NAGASE TRANSGEAR 5000TV, encoder only */
 108 #define IVTV_CARD_VA2000MAX_SNT6     10 /* VA2000MAX-STN6 */
 109 #define IVTV_CARD_CX23416GYC         11 /* Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
 110 #define IVTV_CARD_GV_MVPRX           12 /* I/O Data GV-MVP/RX, RX2, RX2W */
 111 #define IVTV_CARD_GV_MVPRX2E         13 /* I/O Data GV-MVP/RX2E */
 112 #define IVTV_CARD_GOTVIEW_PCI_DVD    14 /* GotView PCI DVD */
 113 #define IVTV_CARD_GOTVIEW_PCI_DVD2   15 /* GotView PCI DVD2 */
 114 #define IVTV_CARD_YUAN_MPC622        16 /* Yuan MPC622 miniPCI */
 115 #define IVTV_CARD_DCTMTVP1           17 /* DIGITAL COWBOY DCT-MTVP1 */
 116 #define IVTV_CARD_PG600V2            18 /* Yuan PG600V2/GotView PCI DVD Lite */
 117 #define IVTV_CARD_CLUB3D             19 /* Club3D ZAP-TV1x01 */
 118 #define IVTV_CARD_AVERTV_MCE116      20 /* AVerTV MCE 116 Plus */
 119 #define IVTV_CARD_LAST               20
 120
 121 /* Variants of existing cards but with the same PCI IDs. The driver
 122    detects these based on other device information.
 123    These cards must always come last.
 124    New cards must be inserted above, and the indices of the cards below
 125    must be adjusted accordingly. */
 126
 127 /* PVR-350 V1 (uses saa7114) */
 128 #define IVTV_CARD_PVR_350_V1         (IVTV_CARD_LAST+1)
 129 /* 2 variants of Kuroutoshikou CX23416GYC-STVLP (Yuan MPG600GR OEM) */
 130 #define IVTV_CARD_CX23416GYC_NOGR    (IVTV_CARD_LAST+2)
 131 #define IVTV_CARD_CX23416GYC_NOGRYCS (IVTV_CARD_LAST+3)
 132
 133 #define IVTV_ENC_STREAM_TYPE_MPG  0
 134 #define IVTV_ENC_STREAM_TYPE_YUV  1
 135 #define IVTV_ENC_STREAM_TYPE_VBI  2
 136 #define IVTV_ENC_STREAM_TYPE_PCM  3
 137 #define IVTV_ENC_STREAM_TYPE_RAD  4
 138 #define IVTV_DEC_STREAM_TYPE_MPG  5
 139 #define IVTV_DEC_STREAM_TYPE_VBI  6
 140 #define IVTV_DEC_STREAM_TYPE_VOUT 7
 141 #define IVTV_DEC_STREAM_TYPE_YUV  8
 142 #define IVTV_MAX_STREAMS          9
 143
 144 #define IVTV_V4L2_DEC_MPG_OFFSET  16    /* offset from 0 to register decoder mpg v4l2 minors on */
 145 #define IVTV_V4L2_ENC_PCM_OFFSET  24    /* offset from 0 to register pcm v4l2 minors on */
 146 #define IVTV_V4L2_ENC_YUV_OFFSET  32    /* offset from 0 to register yuv v4l2 minors on */
 147 #define IVTV_V4L2_DEC_YUV_OFFSET  48    /* offset from 0 to register decoder yuv v4l2 minors on */
 148 #define IVTV_V4L2_DEC_VBI_OFFSET   8    /* offset from 0 to register decoder vbi input v4l2 minors on */
 149 #define IVTV_V4L2_DEC_VOUT_OFFSET 16    /* offset from 0 to register vbi output v4l2 minors on */
 150
 151 #define IVTV_ENC_MEM_START 0x00000000
 152 #define IVTV_DEC_MEM_START 0x01000000
 153
 154 /* system vendor and device IDs */
 155 #define PCI_VENDOR_ID_ICOMP  0x4444
 156 #define PCI_DEVICE_ID_IVTV15 0x0803
 157 #define PCI_DEVICE_ID_IVTV16 0x0016
 158
 159 /* subsystem vendor ID */
 160 #define IVTV_PCI_ID_HAUPPAUGE           0x0070
 161 #define IVTV_PCI_ID_HAUPPAUGE_ALT1      0x0270
 162 #define IVTV_PCI_ID_HAUPPAUGE_ALT2      0x4070
 163 #define IVTV_PCI_ID_ADAPTEC             0x9005
 164 #define IVTV_PCI_ID_AVERMEDIA           0x1461
 165 #define IVTV_PCI_ID_YUAN1               0x12ab
 166 #define IVTV_PCI_ID_YUAN2               0xff01
 167 #define IVTV_PCI_ID_YUAN3               0xffab
 168 #define IVTV_PCI_ID_YUAN4               0xfbab
 169 #define IVTV_PCI_ID_DIAMONDMM           0xff92
 170 #define IVTV_PCI_ID_IODATA              0x10fc
 171 #define IVTV_PCI_ID_MELCO               0x1154
 172 #define IVTV_PCI_ID_GOTVIEW1            0xffac
 173 #define IVTV_PCI_ID_GOTVIEW2            0xffad
 174
 175 /* Decoder Buffer hardware size on Chip */
 176 #define IVTV_DEC_MAX_BUF        0x00100000      /* max bytes in decoder buffer */
 177 #define IVTV_DEC_MIN_BUF        0x00010000      /* min bytes in dec buffer */
 178
 179 /* ======================================================================== */
 180 /* ========================== START USER SETTABLE DMA VARIABLES =========== */
 181 /* ======================================================================== */
 182
 183 #define IVTV_DMA_SG_OSD_ENT     (2883584/PAGE_SIZE)     /* sg entities */
 184
 185 /* DMA Buffers, Default size in MB allocated */
 186 #define IVTV_DEFAULT_ENC_MPG_BUFFERS 4
 187 #define IVTV_DEFAULT_ENC_YUV_BUFFERS 2
 188 #define IVTV_DEFAULT_ENC_VBI_BUFFERS 1
 189 #define IVTV_DEFAULT_ENC_PCM_BUFFERS 1
 190 #define IVTV_DEFAULT_DEC_MPG_BUFFERS 1
 191 #define IVTV_DEFAULT_DEC_YUV_BUFFERS 1
 192 #define IVTV_DEFAULT_DEC_VBI_BUFFERS 1
 193
 194 /* ======================================================================== */
 195 /* ========================== END USER SETTABLE DMA VARIABLES ============= */
 196 /* ======================================================================== */
 197
 198 /* Decoder Status Register */
 199 #define IVTV_DMA_ERR_LIST       0x00000010
 200 #define IVTV_DMA_ERR_WRITE      0x00000008
 201 #define IVTV_DMA_ERR_READ       0x00000004
 202 #define IVTV_DMA_SUCCESS_WRITE  0x00000002
 203 #define IVTV_DMA_SUCCESS_READ   0x00000001
 204 #define IVTV_DMA_READ_ERR       (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_READ)
 205 #define IVTV_DMA_WRITE_ERR      (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE)
 206 #define IVTV_DMA_ERR            (IVTV_DMA_ERR_LIST | IVTV_DMA_ERR_WRITE | IVTV_DMA_ERR_READ)
 207
 208 /* DMA Registers */
 209 #define IVTV_REG_DMAXFER        (0x0000)
 210 #define IVTV_REG_DMASTATUS      (0x0004)
 211 #define IVTV_REG_DECDMAADDR     (0x0008)
 212 #define IVTV_REG_ENCDMAADDR     (0x000c)
 213 #define IVTV_REG_DMACONTROL     (0x0010)
 214 #define IVTV_REG_IRQSTATUS      (0x0040)
 215 #define IVTV_REG_IRQMASK        (0x0048)
 216
 217 /* Setup Registers */
 218 #define IVTV_REG_ENC_SDRAM_REFRESH      (0x07F8)
 219 #define IVTV_REG_ENC_SDRAM_PRECHARGE    (0x07FC)
 220 #define IVTV_REG_DEC_SDRAM_REFRESH      (0x08F8)
 221 #define IVTV_REG_DEC_SDRAM_PRECHARGE    (0x08FC)
 222 #define IVTV_REG_VDM                    (0x2800)
 223 #define IVTV_REG_AO                     (0x2D00)
 224 #define IVTV_REG_BYTEFLUSH              (0x2D24)
 225 #define IVTV_REG_SPU                    (0x9050)
 226 #define IVTV_REG_HW_BLOCKS              (0x9054)
 227 #define IVTV_REG_VPU                    (0x9058)
 228 #define IVTV_REG_APU                    (0xA064)
 229
 230 #define IVTV_IRQ_ENC_START_CAP          (0x1 << 31)
 231 #define IVTV_IRQ_ENC_EOS                (0x1 << 30)
 232 #define IVTV_IRQ_ENC_VBI_CAP            (0x1 << 29)
 233 #define IVTV_IRQ_ENC_VIM_RST            (0x1 << 28)
 234 #define IVTV_IRQ_ENC_DMA_COMPLETE       (0x1 << 27)
 235 #define IVTV_IRQ_ENC_PIO_COMPLETE       (0x1 << 25)
 236 #define IVTV_IRQ_DEC_AUD_MODE_CHG       (0x1 << 24)
 237 #define IVTV_IRQ_DEC_DATA_REQ           (0x1 << 22)
 238 #define IVTV_IRQ_DEC_DMA_COMPLETE       (0x1 << 20)
 239 #define IVTV_IRQ_DEC_VBI_RE_INSERT      (0x1 << 19)
 240 #define IVTV_IRQ_DMA_ERR                (0x1 << 18)
 241 #define IVTV_IRQ_DMA_WRITE              (0x1 << 17)
 242 #define IVTV_IRQ_DMA_READ               (0x1 << 16)
 243 #define IVTV_IRQ_DEC_VSYNC              (0x1 << 10)
 244
 245 /* IRQ Masks */
 246 #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\
 247                 IVTV_IRQ_DMA_READ|IVTV_IRQ_ENC_PIO_COMPLETE)
 248
 249 #define IVTV_IRQ_MASK_CAPTURE (IVTV_IRQ_ENC_START_CAP | IVTV_IRQ_ENC_EOS)
 250 #define IVTV_IRQ_MASK_DECODE  (IVTV_IRQ_DEC_DATA_REQ|IVTV_IRQ_DEC_AUD_MODE_CHG)
 251
 252 /* i2c stuff */
 253 #define I2C_CLIENTS_MAX 16
 254
 255 /* debugging */
 256
 257 #define IVTV_DBGFLG_WARN  (1 << 0)
 258 #define IVTV_DBGFLG_INFO  (1 << 1)
 259 #define IVTV_DBGFLG_API   (1 << 2)
 260 #define IVTV_DBGFLG_DMA   (1 << 3)
 261 #define IVTV_DBGFLG_IOCTL (1 << 4)
 262 #define IVTV_DBGFLG_I2C   (1 << 5)
 263 #define IVTV_DBGFLG_IRQ   (1 << 6)
 264 #define IVTV_DBGFLG_DEC   (1 << 7)
 265 #define IVTV_DBGFLG_YUV   (1 << 8)
 266 /* Flag to turn on high volume debugging */
 267 #define IVTV_DBGFLG_HIGHVOL (1 << 9)
 268
 269 /* NOTE: extra space before comma in 'itv->num , ## args' is required for
 270    gcc-2.95, otherwise it won't compile. */
 271 #define IVTV_DEBUG(x, type, fmt, args...) \
 272         do { \
 273                 if ((x) & ivtv_debug) \
 274                         printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
 275         } while (0)
 276 #define IVTV_DEBUG_WARN(fmt, args...)  IVTV_DEBUG(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
 277 #define IVTV_DEBUG_INFO(fmt, args...)  IVTV_DEBUG(IVTV_DBGFLG_INFO, "info",fmt , ## args)
 278 #define IVTV_DEBUG_API(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_API, "api", fmt , ## args)
 279 #define IVTV_DEBUG_DMA(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
 280 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
 281 #define IVTV_DEBUG_I2C(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
 282 #define IVTV_DEBUG_IRQ(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
 283 #define IVTV_DEBUG_DEC(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
 284 #define IVTV_DEBUG_YUV(fmt, args...)   IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
 285
 286 #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
 287         do { \
 288                 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
 289                         printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
 290         } while (0)
 291 #define IVTV_DEBUG_HI_WARN(fmt, args...)  IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warning", fmt , ## args)
 292 #define IVTV_DEBUG_HI_INFO(fmt, args...)  IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info",fmt , ## args)
 293 #define IVTV_DEBUG_HI_API(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_API, "api", fmt , ## args)
 294 #define IVTV_DEBUG_HI_DMA(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
 295 #define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
 296 #define IVTV_DEBUG_HI_I2C(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
 297 #define IVTV_DEBUG_HI_IRQ(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
 298 #define IVTV_DEBUG_HI_DEC(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
 299 #define IVTV_DEBUG_HI_YUV(fmt, args...)   IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
 300
 301 /* Standard kernel messages */
 302 #define IVTV_ERR(fmt, args...)      printk(KERN_ERR  "ivtv%d: " fmt, itv->num , ## args)
 303 #define IVTV_WARN(fmt, args...)     printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
 304 #define IVTV_INFO(fmt, args...)     printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
 305
 306 /* Values for IVTV_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */
 307 #define MPEG_FRAME_TYPE_IFRAME 1
 308 #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3
 309 #define MPEG_FRAME_TYPE_ALL 7
 310
 311 /* output modes (cx23415 only) */
 312 #define OUT_NONE        0
 313 #define OUT_MPG         1
 314 #define OUT_YUV         2
 315 #define OUT_UDMA_YUV    3
 316 #define OUT_PASSTHROUGH 4
 317
 318 #define IVTV_MAX_PGM_INDEX (400)
 319
 320 extern int ivtv_debug;
 321
 322
 323 struct ivtv_options {
 324         int megabytes[IVTV_MAX_STREAMS]; /* Size in megabytes of each stream */
 325         int cardtype;           /* force card type on load */
 326         int tuner;              /* set tuner on load */
 327         int radio;              /* enable/disable radio */
 328         int newi2c;             /* New I2C algorithm */
 329 };
 330
 331 #define IVTV_MBOX_DMA_START 6
 332 #define IVTV_MBOX_DMA_END 8
 333 #define IVTV_MBOX_DMA 9
 334 #define IVTV_MBOX_FIELD_DISPLAYED 8
 335
 336 /* ivtv-specific mailbox template */
 337 struct ivtv_mailbox {
 338         u32 flags;
 339         u32 cmd;
 340         u32 retval;
 341         u32 timeout;
 342         u32 data[CX2341X_MBOX_MAX_DATA];
 343 };
 344
 345 struct ivtv_api_cache {
 346         unsigned long last_jiffies;             /* when last command was issued */
 347         u32 data[CX2341X_MBOX_MAX_DATA];        /* last sent api data */
 348 };
 349
 350 struct ivtv_mailbox_data {
 351         volatile struct ivtv_mailbox __iomem *mbox;
 352         /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
 353            If the bit is set, then the corresponding mailbox is in use by the driver. */
 354         unsigned long busy;
 355         u8 max_mbox;
 356 };
 357
 358 /* per-buffer bit flags */
 359 #define IVTV_F_B_NEED_BUF_SWAP  0       /* this buffer should be byte swapped */
 360
 361 /* per-stream, s_flags */
 362 #define IVTV_F_S_DMA_PENDING    0       /* this stream has pending DMA */
 363 #define IVTV_F_S_DMA_HAS_VBI    1       /* the current DMA request also requests VBI data */
 364 #define IVTV_F_S_NEEDS_DATA     2       /* this decoding stream needs more data */
 365
 366 #define IVTV_F_S_CLAIMED        3       /* this stream is claimed */
 367 #define IVTV_F_S_STREAMING      4       /* the fw is decoding/encoding this stream */
 368 #define IVTV_F_S_INTERNAL_USE   5       /* this stream is used internally (sliced VBI processing) */
 369 #define IVTV_F_S_PASSTHROUGH    6       /* this stream is in passthrough mode */
 370 #define IVTV_F_S_STREAMOFF      7       /* signal end of stream EOS */
 371 #define IVTV_F_S_APPL_IO        8       /* this stream is used read/written by an application */
 372
 373 #define IVTV_F_S_PIO_PENDING    9       /* this stream has pending PIO */
 374 #define IVTV_F_S_PIO_HAS_VBI    1       /* the current PIO request also requests VBI data */
 375
 376 /* per-ivtv, i_flags */
 377 #define IVTV_F_I_DMA               0    /* DMA in progress */
 378 #define IVTV_F_I_UDMA              1    /* UDMA in progress */
 379 #define IVTV_F_I_UDMA_PENDING      2    /* UDMA pending */
 380 #define IVTV_F_I_SPEED_CHANGE      3    /* A speed change is in progress */
 381 #define IVTV_F_I_EOS               4    /* End of encoder stream reached */
 382 #define IVTV_F_I_RADIO_USER        5    /* The radio tuner is selected */
 383 #define IVTV_F_I_DIG_RST           6    /* Reset digitizer */
 384 #define IVTV_F_I_DEC_YUV           7    /* YUV instead of MPG is being decoded */
 385 #define IVTV_F_I_ENC_VBI           8    /* VBI DMA */
 386 #define IVTV_F_I_UPDATE_CC         9    /* CC should be updated */
 387 #define IVTV_F_I_UPDATE_WSS        10   /* WSS should be updated */
 388 #define IVTV_F_I_UPDATE_VPS        11   /* VPS should be updated */
 389 #define IVTV_F_I_DECODING_YUV      12   /* this stream is YUV frame decoding */
 390 #define IVTV_F_I_ENC_PAUSED        13   /* the encoder is paused */
 391 #define IVTV_F_I_VALID_DEC_TIMINGS 14   /* last_dec_timing is valid */
 392 #define IVTV_F_I_HAVE_WORK         15   /* Used in the interrupt handler: there is work to be done */
 393 #define IVTV_F_I_WORK_HANDLER_VBI  16   /* there is work to be done for VBI */
 394 #define IVTV_F_I_WORK_HANDLER_YUV  17   /* there is work to be done for YUV */
 395 #define IVTV_F_I_WORK_HANDLER_PIO  18   /* there is work to be done for PIO */
 396 #define IVTV_F_I_PIO               19   /* PIO in progress */
 397 #define IVTV_F_I_DEC_PAUSED        20   /* the decoder is paused */
 398 #define IVTV_F_I_INITED            21   /* set after first open */
 399 #define IVTV_F_I_FAILED            22   /* set if first open failed */
 400
 401 /* Event notifications */
 402 #define IVTV_F_I_EV_DEC_STOPPED    28   /* decoder stopped event */
 403 #define IVTV_F_I_EV_VSYNC          29   /* VSYNC event */
 404 #define IVTV_F_I_EV_VSYNC_FIELD    30   /* VSYNC event field (0 = first, 1 = second field) */
 405 #define IVTV_F_I_EV_VSYNC_ENABLED  31   /* VSYNC event enabled */
 406
 407 /* Scatter-Gather array element, used in DMA transfers */
 408 struct ivtv_SG_element {
 409         u32 src;
 410         u32 dst;
 411         u32 size;
 412 };
 413
 414 struct ivtv_user_dma {
 415         struct mutex lock;
 416         int page_count;
 417         struct page *map[IVTV_DMA_SG_OSD_ENT];
 418
 419         /* Base Dev SG Array for cx23415/6 */
 420         struct ivtv_SG_element SGarray[IVTV_DMA_SG_OSD_ENT];
 421         dma_addr_t SG_handle;
 422         int SG_length;
 423
 424         /* SG List of Buffers */
 425         struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
 426 };
 427
 428 struct ivtv_dma_page_info {
 429         unsigned long uaddr;
 430         unsigned long first;
 431         unsigned long last;
 432         unsigned int offset;
 433         unsigned int tail;
 434         int page_count;
 435 };
 436
 437 struct ivtv_buffer {
 438         struct list_head list;
 439         dma_addr_t dma_handle;
 440         unsigned long b_flags;
 441         char *buf;
 442
 443         u32 bytesused;
 444         u32 readpos;
 445 };
 446
 447 struct ivtv_queue {
 448         struct list_head list;
 449         u32 buffers;
 450         u32 length;
 451         u32 bytesused;
 452 };
 453
 454 struct ivtv;    /* forward reference */
 455
 456 struct ivtv_stream {
 457         /* These first four fields are always set, even if the stream
 458            is not actually created. */
 459         struct video_device *v4l2dev;   /* NULL when stream not created */
 460         struct ivtv *itv;               /* for ease of use */
 461         const char *name;               /* name of the stream */
 462         int type;                       /* stream type */
 463
 464         u32 id;
 465         spinlock_t qlock;       /* locks access to the queues */
 466         unsigned long s_flags;  /* status flags, see above */
 467         int dma;                /* can be PCI_DMA_TODEVICE,
 468                                    PCI_DMA_FROMDEVICE or
 469                                    PCI_DMA_NONE */
 470         u32 dma_offset;
 471         u32 dma_backup;
 472         u64 dma_pts;
 473
 474         int subtype;
 475         wait_queue_head_t waitq;
 476         u32 dma_last_offset;
 477
 478         /* Buffer Stats */
 479         u32 buffers;
 480         u32 buf_size;
 481         u32 buffers_stolen;
 482
 483         /* Buffer Queues */
 484         struct ivtv_queue q_free;       /* free buffers */
 485         struct ivtv_queue q_full;       /* full buffers */
 486         struct ivtv_queue q_io;         /* waiting for I/O */
 487         struct ivtv_queue q_dma;        /* waiting for DMA */
 488         struct ivtv_queue q_predma;     /* waiting for DMA */
 489
 490         /* Base Dev SG Array for cx23415/6 */
 491         struct ivtv_SG_element *SGarray;
 492         struct ivtv_SG_element *PIOarray;
 493         dma_addr_t SG_handle;
 494         int SG_length;
 495
 496         /* SG List of Buffers */
 497         struct scatterlist *SGlist;
 498 };
 499
 500 struct ivtv_open_id {
 501         u32 open_id;
 502         int type;
 503         enum v4l2_priority prio;
 504         struct ivtv *itv;
 505 };
 506
 507 #define IVTV_YUV_UPDATE_HORIZONTAL  0x01
 508 #define IVTV_YUV_UPDATE_VERTICAL    0x02
 509
 510 struct yuv_frame_info
 511 {
 512         u32 update;
 513         int src_x;
 514         int src_y;
 515         unsigned int src_w;
 516         unsigned int src_h;
 517         int dst_x;
 518         int dst_y;
 519         unsigned int dst_w;
 520         unsigned int dst_h;
 521         int pan_x;
 522         int pan_y;
 523         u32 vis_w;
 524         u32 vis_h;
 525         u32 interlaced_y;
 526         u32 interlaced_uv;
 527         int tru_x;
 528         u32 tru_w;
 529         u32 tru_h;
 530         u32 offset_y;
 531         int lace_mode;
 532 };
 533
 534 #define IVTV_YUV_MODE_INTERLACED        0x00
 535 #define IVTV_YUV_MODE_PROGRESSIVE       0x01
 536 #define IVTV_YUV_MODE_AUTO              0x02
 537 #define IVTV_YUV_MODE_MASK              0x03
 538
 539 #define IVTV_YUV_SYNC_EVEN              0x00
 540 #define IVTV_YUV_SYNC_ODD               0x04
 541 #define IVTV_YUV_SYNC_MASK              0x04
 542
 543 struct yuv_playback_info
 544 {
 545         u32 reg_2834;
 546         u32 reg_2838;
 547         u32 reg_283c;
 548         u32 reg_2840;
 549         u32 reg_2844;
 550         u32 reg_2848;
 551         u32 reg_2854;
 552         u32 reg_285c;
 553         u32 reg_2864;
 554
 555         u32 reg_2870;
 556         u32 reg_2874;
 557         u32 reg_2890;
 558         u32 reg_2898;
 559         u32 reg_289c;
 560
 561         u32 reg_2918;
 562         u32 reg_291c;
 563         u32 reg_2920;
 564         u32 reg_2924;
 565         u32 reg_2928;
 566         u32 reg_292c;
 567         u32 reg_2930;
 568
 569         u32 reg_2934;
 570
 571         u32 reg_2938;
 572         u32 reg_293c;
 573         u32 reg_2940;
 574         u32 reg_2944;
 575         u32 reg_2948;
 576         u32 reg_294c;
 577         u32 reg_2950;
 578         u32 reg_2954;
 579         u32 reg_2958;
 580         u32 reg_295c;
 581         u32 reg_2960;
 582         u32 reg_2964;
 583         u32 reg_2968;
 584         u32 reg_296c;
 585
 586         u32 reg_2970;
 587
 588         int v_filter_1;
 589         int v_filter_2;
 590         int h_filter;
 591
 592         u32 osd_x_offset;
 593         u32 osd_y_offset;
 594
 595         u32 osd_x_pan;
 596         u32 osd_y_pan;
 597
 598         u32 osd_vis_w;
 599         u32 osd_vis_h;
 600
 601         int decode_height;
 602
 603         int frame_interlaced;
 604
 605         int lace_mode;
 606         int lace_threshold;
 607         int lace_sync_field;
 608
 609         atomic_t next_dma_frame;
 610         atomic_t next_fill_frame;
 611
 612         u32 yuv_forced_update;
 613         int update_frame;
 614
 615         int sync_field[4];  /* Field to sync on */
 616         int field_delay[4]; /* Flag to extend duration of previous frame */
 617         u8 fields_lapsed;   /* Counter used when delaying a frame */
 618
 619         struct yuv_frame_info new_frame_info[4];
 620         struct yuv_frame_info old_frame_info;
 621         struct yuv_frame_info old_frame_info_args;
 622
 623         void *blanking_ptr;
 624         dma_addr_t blanking_dmaptr;
 625 };
 626
 627 #define IVTV_VBI_FRAMES 32
 628
 629 /* VBI data */
 630 struct vbi_info {
 631         u32 dec_start;
 632         u32 enc_start, enc_size;
 633         int fpi;
 634         u32 frame;
 635         u32 dma_offset;
 636         u8 cc_data_odd[256];
 637         u8 cc_data_even[256];
 638         int cc_pos;
 639         u8 cc_no_update;
 640         u8 vps[5];
 641         u8 vps_found;
 642         int wss;
 643         u8 wss_found;
 644         u8 wss_no_update;
 645         u32 raw_decoder_line_size;
 646         u8 raw_decoder_sav_odd_field;
 647         u8 raw_decoder_sav_even_field;
 648         u32 sliced_decoder_line_size;
 649         u8 sliced_decoder_sav_odd_field;
 650         u8 sliced_decoder_sav_even_field;
 651         struct v4l2_format in;
 652         /* convenience pointer to sliced struct in vbi_in union */
 653         struct v4l2_sliced_vbi_format *sliced_in;
 654         int insert_mpeg;
 655
 656         /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
 657            One for /dev/vbi0 and one for /dev/vbi8 */
 658         struct v4l2_sliced_vbi_data sliced_data[36];
 659         struct v4l2_sliced_vbi_data sliced_dec_data[36];
 660
 661         /* Buffer for VBI data inserted into MPEG stream.
 662            The first byte is a dummy byte that's never used.
 663            The next 16 bytes contain the MPEG header for the VBI data,
 664            the remainder is the actual VBI data.
 665            The max size accepted by the MPEG VBI reinsertion turns out
 666            to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
 667            where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
 668            a single line header byte and 2 * 18 is the number of VBI lines per frame.
 669
 670            However, it seems that the data must be 1K aligned, so we have to
 671            pad the data until the 1 or 2 K boundary.
 672
 673            This pointer array will allocate 2049 bytes to store each VBI frame. */
 674         u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
 675         u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
 676         struct ivtv_buffer sliced_mpeg_buf;
 677         u32 inserted_frame;
 678
 679         u32 start[2], count;
 680         u32 raw_size;
 681         u32 sliced_size;
 682 };
 683
 684 /* forward declaration of struct defined in ivtv-cards.h */
 685 struct ivtv_card;
 686
 687 /* Struct to hold info about ivtv cards */
 688 struct ivtv {
 689         int num;                /* board number, -1 during init! */
 690         char name[8];           /* board name for printk and interrupts (e.g. 'ivtv0') */
 691         struct pci_dev *dev;    /* PCI device */
 692         const struct ivtv_card *card;   /* card information */
 693         const char *card_name;  /* full name of the card */
 694         u8 has_cx23415;         /* 1 if it is a cx23415 based card, 0 for cx23416 */
 695         u8 is_50hz;
 696         u8 is_60hz;
 697         u8 is_out_50hz;
 698         u8 is_out_60hz;
 699         u8 pvr150_workaround;   /* 1 if the cx25840 needs to workaround a PVR150 bug */
 700         u8 nof_inputs;          /* number of video inputs */
 701         u8 nof_audio_inputs;    /* number of audio inputs */
 702         u32 v4l2_cap;           /* V4L2 capabilities of card */
 703         u32 hw_flags;           /* Hardware description of the board */
 704         int tunerid;            /* Userspace tuner ID for experimental Xceive tuner support */
 705
 706         /* controlling Video decoder function */
 707         int (*video_dec_func)(struct ivtv *, unsigned int, void *);
 708
 709         struct ivtv_options options;    /* User options */
 710         int stream_buf_size[IVTV_MAX_STREAMS]; /* Stream buffer size */
 711         struct ivtv_stream streams[IVTV_MAX_STREAMS];   /* Stream data */
 712         int speed;
 713         u8 speed_mute_audio;
 714         unsigned long i_flags;  /* global ivtv flags */
 715         atomic_t capturing;     /* count number of active capture streams */
 716         atomic_t decoding;      /* count number of active decoding streams */
 717         u32 irq_rr_idx; /* Round-robin stream index */
 718         int cur_dma_stream;     /* index of stream doing DMA */
 719         int cur_pio_stream;     /* index of stream doing PIO */
 720         u32 dma_data_req_offset;
 721         u32 dma_data_req_size;
 722         int output_mode;        /* NONE, MPG, YUV, UDMA YUV, passthrough */
 723         spinlock_t lock;        /* lock access to this struct */
 724         int search_pack_header;
 725
 726         spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
 727         struct mutex serialize_lock;  /* lock used to serialize starting streams */
 728
 729         /* User based DMA for OSD */
 730         struct ivtv_user_dma udma;
 731
 732         int open_id;            /* incremented each time an open occurs, used as unique ID.
 733                                    starts at 1, so 0 can be used as uninitialized value
 734                                    in the stream->id. */
 735
 736         u32 base_addr;
 737         u32 irqmask;
 738
 739         struct v4l2_prio_state prio;
 740         struct workqueue_struct *irq_work_queues;
 741         struct work_struct irq_work_queue;
 742         struct timer_list dma_timer; /* Timer used to catch unfinished DMAs */
 743
 744         struct vbi_info vbi;
 745
 746         struct ivtv_mailbox_data enc_mbox;
 747         struct ivtv_mailbox_data dec_mbox;
 748         struct ivtv_api_cache api_cache[256];   /* Cached API Commands */
 749
 750         u8 card_rev;
 751         volatile void __iomem *enc_mem, *dec_mem, *reg_mem;
 752
 753         u32 pgm_info_offset;
 754         u32 pgm_info_num;
 755         u32 pgm_info_write_idx;
 756         u32 pgm_info_read_idx;
 757         struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX];
 758
 759         u64 mpg_data_received;
 760         u64 vbi_data_inserted;
 761
 762         wait_queue_head_t cap_w;
 763         /* when the next decoder event arrives this queue is woken up */
 764         wait_queue_head_t event_waitq;
 765         /* when the next decoder vsync arrives this queue is woken up */
 766         wait_queue_head_t vsync_waitq;
 767         /* when the current DMA is finished this queue is woken up */
 768         wait_queue_head_t dma_waitq;
 769
 770         /* OSD support */
 771         unsigned long osd_video_pbase;
 772         int osd_global_alpha_state; /* 0=off : 1=on */
 773         int osd_local_alpha_state;  /* 0=off : 1=on */
 774         int osd_color_key_state;    /* 0=off : 1=on */
 775         u8  osd_global_alpha;       /* Current global alpha */
 776         u32 osd_color_key;          /* Current color key */
 777         u32 osd_pixelformat;        /* Current pixel format */
 778         struct v4l2_rect osd_rect;  /* Current OSD position and size */
 779         struct v4l2_rect main_rect; /* Current Main window position and size */
 780
 781         u32 last_dec_timing[3];     /* Store last retrieved pts/scr/frame values */
 782
 783         /* i2c */
 784         struct i2c_adapter i2c_adap;
 785         struct i2c_algo_bit_data i2c_algo;
 786         struct i2c_client i2c_client;
 787         struct mutex i2c_bus_lock;
 788         int i2c_state;
 789         struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];
 790
 791         /* v4l2 and User settings */
 792
 793         /* codec settings */
 794         struct cx2341x_mpeg_params params;
 795         u32 audio_input;
 796         u32 active_input;
 797         u32 active_output;
 798         v4l2_std_id std;
 799         v4l2_std_id std_out;
 800         v4l2_std_id tuner_std;  /* The norm of the tuner (fixed) */
 801         u8 audio_stereo_mode;
 802         u8 audio_bilingual_mode;
 803
 804         /* dualwatch */
 805         unsigned long dualwatch_jiffies;
 806         u16 dualwatch_stereo_mode;
 807
 808         /* Digitizer type */
 809         int digitizer;          /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */
 810
 811         u32 lastVsyncFrame;
 812
 813         struct yuv_playback_info yuv_info;
 814         struct osd_info *osd_info;
 815 };
 816
 817 /* Globals */
 818 extern struct ivtv *ivtv_cards[];
 819 extern int ivtv_cards_active;
 820 extern int ivtv_first_minor;
 821 extern spinlock_t ivtv_cards_lock;
 822
 823 /*==============Prototypes==================*/
 824
 825 /* Hardware/IRQ */
 826 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
 827 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
 828
 829 /* try to set output mode, return current mode. */
 830 int ivtv_set_output_mode(struct ivtv *itv, int mode);
 831
 832 /* return current output stream based on current mode */
 833 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
 834
 835 /* Return non-zero if a signal is pending */
 836 int ivtv_msleep_timeout(unsigned int msecs, int intr);
 837
 838 /* Wait on queue, returns -EINTR if interrupted */
 839 int ivtv_waitq(wait_queue_head_t *waitq);
 840
 841 /* Read Hauppauge eeprom */
 842 struct tveeprom; /* forward reference */
 843 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
 844
 845 /* First-open initialization: load firmware, init cx25840, etc. */
 846 int ivtv_init_on_first_open(struct ivtv *itv);
 847
 848 /* This is a PCI post thing, where if the pci register is not read, then
 849    the write doesn't always take effect right away. By reading back the
 850    register any pending PCI writes will be performed (in order), and so
 851    you can be sure that the writes are guaranteed to be done.
 852
 853    Rarely needed, only in some timing sensitive cases.
 854    Apparently if this is not done some motherboards seem
 855    to kill the firmware and get into the broken state until computer is
 856    rebooted. */
 857 #define write_sync(val, reg) \
 858         do { writel(val, reg); readl(reg); } while (0)
 859
 860 #define read_reg(reg) readl(itv->reg_mem + (reg))
 861 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
 862 #define write_reg_sync(val, reg) \
 863         do { write_reg(val, reg); read_reg(reg); } while (0)
 864
 865 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
 866 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
 867 #define write_enc_sync(val, addr) \
 868         do { write_enc(val, addr); read_enc(addr); } while (0)
 869
 870 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
 871 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
 872 #define write_dec_sync(val, addr) \
 873         do { write_dec(val, addr); read_dec(addr); } while (0)
 874
 875 #endif /* IVTV_DRIVER_H */