drivers/input/serio/i8042.h

   1 #ifndef _I8042_H
   2 #define _I8042_H
   3
   4
   5 /*
   6  *  Copyright (c) 1999-2002 Vojtech Pavlik
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published by
  10  * the Free Software Foundation.
  11  */
  12
  13 /*
  14  * Arch-dependent inline functions and defines.
  15  */
  16
  17 #if defined(CONFIG_MACH_JAZZ)
  18 #include "i8042-jazzio.h"
  19 <<<<<<< HEAD:drivers/input/serio/i8042.h
  20 #elif defined(CONFIG_SGI_IP22)
  21 =======
  22 #elif defined(CONFIG_SGI_HAS_I8042)
  23 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/input/serio/i8042.h
  24 #include "i8042-ip22io.h"
  25 <<<<<<< HEAD:drivers/input/serio/i8042.h
  26 =======
  27 #elif defined(CONFIG_SNI_RM)
  28 #include "i8042-snirm.h"
  29 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/input/serio/i8042.h
  30 #elif defined(CONFIG_PPC)
  31 #include "i8042-ppcio.h"
  32 #elif defined(CONFIG_SPARC)
  33 #include "i8042-sparcio.h"
  34 #elif defined(CONFIG_X86) || defined(CONFIG_IA64)
  35 #include "i8042-x86ia64io.h"
  36 #else
  37 #include "i8042-io.h"
  38 #endif
  39
  40 /*
  41  * This is in 50us units, the time we wait for the i8042 to react. This
  42  * has to be long enough for the i8042 itself to timeout on sending a byte
  43  * to a non-existent mouse.
  44  */
  45
  46 #define I8042_CTL_TIMEOUT       10000
  47
  48 /*
  49  * Status register bits.
  50  */
  51
  52 #define I8042_STR_PARITY        0x80
  53 #define I8042_STR_TIMEOUT       0x40
  54 #define I8042_STR_AUXDATA       0x20
  55 #define I8042_STR_KEYLOCK       0x10
  56 #define I8042_STR_CMDDAT        0x08
  57 #define I8042_STR_MUXERR        0x04
  58 #define I8042_STR_IBF           0x02
  59 #define I8042_STR_OBF           0x01
  60
  61 /*
  62  * Control register bits.
  63  */
  64
  65 #define I8042_CTR_KBDINT        0x01
  66 #define I8042_CTR_AUXINT        0x02
  67 #define I8042_CTR_IGNKEYLOCK    0x08
  68 #define I8042_CTR_KBDDIS        0x10
  69 #define I8042_CTR_AUXDIS        0x20
  70 #define I8042_CTR_XLATE         0x40
  71
  72 /*
  73  * Return codes.
  74  */
  75
  76 #define I8042_RET_CTL_TEST      0x55
  77
  78 /*
  79  * Expected maximum internal i8042 buffer size. This is used for flushing
  80  * the i8042 buffers.
  81  */
  82
  83 #define I8042_BUFFER_SIZE       16
  84
  85 /*
  86  * Number of AUX ports on controllers supporting active multiplexing
  87  * specification
  88  */
  89
  90 #define I8042_NUM_MUX_PORTS     4
  91
  92 /*
  93  * Debug.
  94  */
  95
  96 #ifdef DEBUG
  97 static unsigned long i8042_start_time;
  98 #define dbg_init() do { i8042_start_time = jiffies; } while (0)
  99 #define dbg(format, arg...)                                                     \
 100         do {                                                                    \
 101                 if (i8042_debug)                                                \
 102                         printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" ,      \
 103                                 ## arg, (int) (jiffies - i8042_start_time));    \
 104         } while (0)
 105 #else
 106 #define dbg_init() do { } while (0)
 107 #define dbg(format, arg...) do {} while (0)
 108 #endif
 109
 110 #endif /* _I8042_H */