Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / rtc / rtc-cmos.c
blob3c9ba3e956200df3b3bcbc4fb47e29e71f9f859f
1 /*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
39 #ifdef CONFIG_HPET_EMULATE_RTC
40 #include <asm/hpet.h>
41 #endif
43 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44 #include <asm-generic/rtc.h>
46 #ifndef CONFIG_HPET_EMULATE_RTC
47 #define is_hpet_enabled() 0
48 #define hpet_set_alarm_time(hrs, min, sec) do { } while (0)
49 #define hpet_set_periodic_freq(arg) 0
50 #define hpet_mask_rtc_irq_bit(arg) do { } while (0)
51 #define hpet_set_rtc_irq_bit(arg) do { } while (0)
52 #define hpet_rtc_timer_init() do { } while (0)
53 #define hpet_register_irq_handler(h) 0
54 #define hpet_unregister_irq_handler(h) do { } while (0)
55 extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
56 #endif
58 struct cmos_rtc {
59 struct rtc_device *rtc;
60 struct device *dev;
61 int irq;
62 struct resource *iomem;
64 void (*wake_on)(struct device *);
65 void (*wake_off)(struct device *);
67 u8 enabled_wake;
68 u8 suspend_ctrl;
70 /* newer hardware extends the original register set */
71 u8 day_alrm;
72 u8 mon_alrm;
73 u8 century;
76 /* both platform and pnp busses use negative numbers for invalid irqs */
77 #define is_valid_irq(n) ((n) >= 0)
79 static const char driver_name[] = "rtc_cmos";
81 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
82 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
83 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
85 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
87 static inline int is_intr(u8 rtc_intr)
89 if (!(rtc_intr & RTC_IRQF))
90 return 0;
91 return rtc_intr & RTC_IRQMASK;
94 /*----------------------------------------------------------------*/
96 static int cmos_read_time(struct device *dev, struct rtc_time *t)
98 /* REVISIT: if the clock has a "century" register, use
99 * that instead of the heuristic in get_rtc_time().
100 * That'll make Y3K compatility (year > 2070) easy!
102 get_rtc_time(t);
103 return 0;
106 static int cmos_set_time(struct device *dev, struct rtc_time *t)
108 /* REVISIT: set the "century" register if available
110 * NOTE: this ignores the issue whereby updating the seconds
111 * takes effect exactly 500ms after we write the register.
112 * (Also queueing and other delays before we get this far.)
114 return set_rtc_time(t);
117 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
119 struct cmos_rtc *cmos = dev_get_drvdata(dev);
120 unsigned char rtc_control;
122 if (!is_valid_irq(cmos->irq))
123 return -EIO;
125 /* Basic alarms only support hour, minute, and seconds fields.
126 * Some also support day and month, for alarms up to a year in
127 * the future.
129 t->time.tm_mday = -1;
130 t->time.tm_mon = -1;
132 spin_lock_irq(&rtc_lock);
133 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
134 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
135 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
137 if (cmos->day_alrm) {
138 /* ignore upper bits on readback per ACPI spec */
139 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
140 if (!t->time.tm_mday)
141 t->time.tm_mday = -1;
143 if (cmos->mon_alrm) {
144 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
145 if (!t->time.tm_mon)
146 t->time.tm_mon = -1;
150 rtc_control = CMOS_READ(RTC_CONTROL);
151 spin_unlock_irq(&rtc_lock);
153 /* REVISIT this assumes PC style usage: always BCD */
155 if (((unsigned)t->time.tm_sec) < 0x60)
156 t->time.tm_sec = BCD2BIN(t->time.tm_sec);
157 else
158 t->time.tm_sec = -1;
159 if (((unsigned)t->time.tm_min) < 0x60)
160 t->time.tm_min = BCD2BIN(t->time.tm_min);
161 else
162 t->time.tm_min = -1;
163 if (((unsigned)t->time.tm_hour) < 0x24)
164 t->time.tm_hour = BCD2BIN(t->time.tm_hour);
165 else
166 t->time.tm_hour = -1;
168 if (cmos->day_alrm) {
169 if (((unsigned)t->time.tm_mday) <= 0x31)
170 t->time.tm_mday = BCD2BIN(t->time.tm_mday);
171 else
172 t->time.tm_mday = -1;
173 if (cmos->mon_alrm) {
174 if (((unsigned)t->time.tm_mon) <= 0x12)
175 t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
176 else
177 t->time.tm_mon = -1;
180 t->time.tm_year = -1;
182 t->enabled = !!(rtc_control & RTC_AIE);
183 t->pending = 0;
185 return 0;
188 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
190 struct cmos_rtc *cmos = dev_get_drvdata(dev);
191 unsigned char mon, mday, hrs, min, sec;
192 unsigned char rtc_control, rtc_intr;
194 if (!is_valid_irq(cmos->irq))
195 return -EIO;
197 /* REVISIT this assumes PC style usage: always BCD */
199 /* Writing 0xff means "don't care" or "match all". */
201 mon = t->time.tm_mon;
202 mon = (mon < 12) ? BIN2BCD(mon) : 0xff;
203 mon++;
205 mday = t->time.tm_mday;
206 mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
208 hrs = t->time.tm_hour;
209 hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
211 min = t->time.tm_min;
212 min = (min < 60) ? BIN2BCD(min) : 0xff;
214 sec = t->time.tm_sec;
215 sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
217 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
218 spin_lock_irq(&rtc_lock);
220 /* next rtc irq must not be from previous alarm setting */
221 rtc_control = CMOS_READ(RTC_CONTROL);
222 rtc_control &= ~RTC_AIE;
223 CMOS_WRITE(rtc_control, RTC_CONTROL);
224 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
225 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
226 if (is_intr(rtc_intr))
227 rtc_update_irq(cmos->rtc, 1, rtc_intr);
229 /* update alarm */
230 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
231 CMOS_WRITE(min, RTC_MINUTES_ALARM);
232 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
234 /* the system may support an "enhanced" alarm */
235 if (cmos->day_alrm) {
236 CMOS_WRITE(mday, cmos->day_alrm);
237 if (cmos->mon_alrm)
238 CMOS_WRITE(mon, cmos->mon_alrm);
241 if (t->enabled) {
242 rtc_control |= RTC_AIE;
243 CMOS_WRITE(rtc_control, RTC_CONTROL);
244 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
245 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
246 if (is_intr(rtc_intr))
247 rtc_update_irq(cmos->rtc, 1, rtc_intr);
250 spin_unlock_irq(&rtc_lock);
252 return 0;
255 static int cmos_irq_set_freq(struct device *dev, int freq)
257 struct cmos_rtc *cmos = dev_get_drvdata(dev);
258 int f;
259 unsigned long flags;
261 if (!is_valid_irq(cmos->irq))
262 return -ENXIO;
264 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
265 f = ffs(freq);
266 if (f-- > 16)
267 return -EINVAL;
268 f = 16 - f;
270 spin_lock_irqsave(&rtc_lock, flags);
271 if (!hpet_set_periodic_freq(freq))
272 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
273 spin_unlock_irqrestore(&rtc_lock, flags);
275 return 0;
278 static int cmos_irq_set_state(struct device *dev, int enabled)
280 struct cmos_rtc *cmos = dev_get_drvdata(dev);
281 unsigned char rtc_control, rtc_intr;
282 unsigned long flags;
284 if (!is_valid_irq(cmos->irq))
285 return -ENXIO;
287 spin_lock_irqsave(&rtc_lock, flags);
288 rtc_control = CMOS_READ(RTC_CONTROL);
290 if (enabled)
291 rtc_control |= RTC_PIE;
292 else
293 rtc_control &= ~RTC_PIE;
295 CMOS_WRITE(rtc_control, RTC_CONTROL);
297 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
298 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
299 if (is_intr(rtc_intr))
300 rtc_update_irq(cmos->rtc, 1, rtc_intr);
302 spin_unlock_irqrestore(&rtc_lock, flags);
303 return 0;
306 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
308 static int
309 cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
311 struct cmos_rtc *cmos = dev_get_drvdata(dev);
312 unsigned char rtc_control, rtc_intr;
313 unsigned long flags;
315 switch (cmd) {
316 case RTC_AIE_OFF:
317 case RTC_AIE_ON:
318 case RTC_UIE_OFF:
319 case RTC_UIE_ON:
320 case RTC_PIE_OFF:
321 case RTC_PIE_ON:
322 if (!is_valid_irq(cmos->irq))
323 return -EINVAL;
324 break;
325 default:
326 return -ENOIOCTLCMD;
329 spin_lock_irqsave(&rtc_lock, flags);
330 rtc_control = CMOS_READ(RTC_CONTROL);
331 switch (cmd) {
332 case RTC_AIE_OFF: /* alarm off */
333 rtc_control &= ~RTC_AIE;
334 hpet_mask_rtc_irq_bit(RTC_AIE);
335 break;
336 case RTC_AIE_ON: /* alarm on */
337 rtc_control |= RTC_AIE;
338 hpet_set_rtc_irq_bit(RTC_AIE);
339 break;
340 case RTC_UIE_OFF: /* update off */
341 rtc_control &= ~RTC_UIE;
342 hpet_mask_rtc_irq_bit(RTC_UIE);
343 break;
344 case RTC_UIE_ON: /* update on */
345 rtc_control |= RTC_UIE;
346 hpet_set_rtc_irq_bit(RTC_UIE);
347 break;
348 case RTC_PIE_OFF: /* periodic off */
349 rtc_control &= ~RTC_PIE;
350 hpet_mask_rtc_irq_bit(RTC_PIE);
351 break;
352 case RTC_PIE_ON: /* periodic on */
353 rtc_control |= RTC_PIE;
354 hpet_set_rtc_irq_bit(RTC_PIE);
355 break;
357 if (!is_hpet_enabled())
358 CMOS_WRITE(rtc_control, RTC_CONTROL);
360 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
361 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
362 if (is_intr(rtc_intr))
363 rtc_update_irq(cmos->rtc, 1, rtc_intr);
365 spin_unlock_irqrestore(&rtc_lock, flags);
366 return 0;
369 #else
370 #define cmos_rtc_ioctl NULL
371 #endif
373 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
375 static int cmos_procfs(struct device *dev, struct seq_file *seq)
377 struct cmos_rtc *cmos = dev_get_drvdata(dev);
378 unsigned char rtc_control, valid;
380 spin_lock_irq(&rtc_lock);
381 rtc_control = CMOS_READ(RTC_CONTROL);
382 valid = CMOS_READ(RTC_VALID);
383 spin_unlock_irq(&rtc_lock);
385 /* NOTE: at least ICH6 reports battery status using a different
386 * (non-RTC) bit; and SQWE is ignored on many current systems.
388 return seq_printf(seq,
389 "periodic_IRQ\t: %s\n"
390 "update_IRQ\t: %s\n"
391 <<<<<<< HEAD:drivers/rtc/rtc-cmos.c
392 =======
393 "HPET_emulated\t: %s\n"
394 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/rtc/rtc-cmos.c
395 // "square_wave\t: %s\n"
396 // "BCD\t\t: %s\n"
397 "DST_enable\t: %s\n"
398 "periodic_freq\t: %d\n"
399 "batt_status\t: %s\n",
400 (rtc_control & RTC_PIE) ? "yes" : "no",
401 (rtc_control & RTC_UIE) ? "yes" : "no",
402 <<<<<<< HEAD:drivers/rtc/rtc-cmos.c
403 =======
404 is_hpet_enabled() ? "yes" : "no",
405 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/rtc/rtc-cmos.c
406 // (rtc_control & RTC_SQWE) ? "yes" : "no",
407 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
408 (rtc_control & RTC_DST_EN) ? "yes" : "no",
409 cmos->rtc->irq_freq,
410 (valid & RTC_VRT) ? "okay" : "dead");
413 #else
414 #define cmos_procfs NULL
415 #endif
417 static const struct rtc_class_ops cmos_rtc_ops = {
418 .ioctl = cmos_rtc_ioctl,
419 .read_time = cmos_read_time,
420 .set_time = cmos_set_time,
421 .read_alarm = cmos_read_alarm,
422 .set_alarm = cmos_set_alarm,
423 .proc = cmos_procfs,
424 .irq_set_freq = cmos_irq_set_freq,
425 .irq_set_state = cmos_irq_set_state,
428 /*----------------------------------------------------------------*/
431 * All these chips have at least 64 bytes of address space, shared by
432 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
433 * by boot firmware. Modern chips have 128 or 256 bytes.
436 #define NVRAM_OFFSET (RTC_REG_D + 1)
438 static ssize_t
439 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
440 char *buf, loff_t off, size_t count)
442 int retval;
444 if (unlikely(off >= attr->size))
445 return 0;
446 if ((off + count) > attr->size)
447 count = attr->size - off;
449 spin_lock_irq(&rtc_lock);
450 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
451 *buf++ = CMOS_READ(off);
452 spin_unlock_irq(&rtc_lock);
454 return retval;
457 static ssize_t
458 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
459 char *buf, loff_t off, size_t count)
461 struct cmos_rtc *cmos;
462 int retval;
464 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
465 if (unlikely(off >= attr->size))
466 return -EFBIG;
467 if ((off + count) > attr->size)
468 count = attr->size - off;
470 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
471 * checksum on part of the NVRAM data. That's currently ignored
472 * here. If userspace is smart enough to know what fields of
473 * NVRAM to update, updating checksums is also part of its job.
475 spin_lock_irq(&rtc_lock);
476 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
477 /* don't trash RTC registers */
478 if (off == cmos->day_alrm
479 || off == cmos->mon_alrm
480 || off == cmos->century)
481 buf++;
482 else
483 CMOS_WRITE(*buf++, off);
485 spin_unlock_irq(&rtc_lock);
487 return retval;
490 static struct bin_attribute nvram = {
491 .attr = {
492 .name = "nvram",
493 .mode = S_IRUGO | S_IWUSR,
494 .owner = THIS_MODULE,
497 .read = cmos_nvram_read,
498 .write = cmos_nvram_write,
499 /* size gets set up later */
502 /*----------------------------------------------------------------*/
504 static struct cmos_rtc cmos_rtc;
506 static irqreturn_t cmos_interrupt(int irq, void *p)
508 u8 irqstat;
509 u8 rtc_control;
511 spin_lock(&rtc_lock);
513 * In this case it is HPET RTC interrupt handler
514 * calling us, with the interrupt information
515 * passed as arg1, instead of irq.
517 if (is_hpet_enabled())
518 irqstat = (unsigned long)irq & 0xF0;
519 else {
520 irqstat = CMOS_READ(RTC_INTR_FLAGS);
521 rtc_control = CMOS_READ(RTC_CONTROL);
522 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
525 /* All Linux RTC alarms should be treated as if they were oneshot.
526 * Similar code may be needed in system wakeup paths, in case the
527 * alarm woke the system.
529 if (irqstat & RTC_AIE) {
530 rtc_control = CMOS_READ(RTC_CONTROL);
531 rtc_control &= ~RTC_AIE;
532 CMOS_WRITE(rtc_control, RTC_CONTROL);
533 CMOS_READ(RTC_INTR_FLAGS);
535 spin_unlock(&rtc_lock);
537 if (is_intr(irqstat)) {
538 rtc_update_irq(p, 1, irqstat);
539 return IRQ_HANDLED;
540 } else
541 return IRQ_NONE;
544 #ifdef CONFIG_PNP
545 #define INITSECTION
547 #else
548 #define INITSECTION __init
549 #endif
551 static int INITSECTION
552 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
554 struct cmos_rtc_board_info *info = dev->platform_data;
555 int retval = 0;
556 unsigned char rtc_control;
557 unsigned address_space;
559 /* there can be only one ... */
560 if (cmos_rtc.dev)
561 return -EBUSY;
563 if (!ports)
564 return -ENODEV;
566 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
568 * REVISIT non-x86 systems may instead use memory space resources
569 * (needing ioremap etc), not i/o space resources like this ...
571 ports = request_region(ports->start,
572 ports->end + 1 - ports->start,
573 driver_name);
574 if (!ports) {
575 dev_dbg(dev, "i/o registers already in use\n");
576 return -EBUSY;
579 cmos_rtc.irq = rtc_irq;
580 cmos_rtc.iomem = ports;
582 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
583 * driver did, but don't reject unknown configs. Old hardware
584 * won't address 128 bytes, and for now we ignore the way newer
585 * chips can address 256 bytes (using two more i/o ports).
587 #if defined(CONFIG_ATARI)
588 address_space = 64;
589 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
590 address_space = 128;
591 #else
592 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
593 address_space = 128;
594 #endif
596 /* For ACPI systems extension info comes from the FADT. On others,
597 * board specific setup provides it as appropriate. Systems where
598 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
599 * some almost-clones) can provide hooks to make that behave.
601 * Note that ACPI doesn't preclude putting these registers into
602 * "extended" areas of the chip, including some that we won't yet
603 * expect CMOS_READ and friends to handle.
605 if (info) {
606 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
607 cmos_rtc.day_alrm = info->rtc_day_alarm;
608 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
609 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
610 if (info->rtc_century && info->rtc_century < 128)
611 cmos_rtc.century = info->rtc_century;
613 if (info->wake_on && info->wake_off) {
614 cmos_rtc.wake_on = info->wake_on;
615 cmos_rtc.wake_off = info->wake_off;
619 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
620 &cmos_rtc_ops, THIS_MODULE);
621 if (IS_ERR(cmos_rtc.rtc)) {
622 retval = PTR_ERR(cmos_rtc.rtc);
623 goto cleanup0;
626 cmos_rtc.dev = dev;
627 dev_set_drvdata(dev, &cmos_rtc);
628 rename_region(ports, cmos_rtc.rtc->dev.bus_id);
630 spin_lock_irq(&rtc_lock);
632 /* force periodic irq to CMOS reset default of 1024Hz;
634 * REVISIT it's been reported that at least one x86_64 ALI mobo
635 * doesn't use 32KHz here ... for portability we might need to
636 * do something about other clock frequencies.
638 cmos_rtc.rtc->irq_freq = 1024;
639 if (!hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq))
640 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
642 /* disable irqs.
644 * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
645 * allegedly some older rtcs need that to handle irqs properly
647 rtc_control = CMOS_READ(RTC_CONTROL);
648 rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
649 CMOS_WRITE(rtc_control, RTC_CONTROL);
650 CMOS_READ(RTC_INTR_FLAGS);
652 spin_unlock_irq(&rtc_lock);
654 /* FIXME teach the alarm code how to handle binary mode;
655 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
657 if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
658 dev_dbg(dev, "only 24-hr BCD mode supported\n");
659 retval = -ENXIO;
660 goto cleanup1;
663 if (is_valid_irq(rtc_irq)) {
664 irq_handler_t rtc_cmos_int_handler;
666 if (is_hpet_enabled()) {
667 int err;
669 rtc_cmos_int_handler = hpet_rtc_interrupt;
670 err = hpet_register_irq_handler(cmos_interrupt);
671 if (err != 0) {
672 printk(KERN_WARNING "hpet_register_irq_handler "
673 " failed in rtc_init().");
674 goto cleanup1;
676 } else
677 rtc_cmos_int_handler = cmos_interrupt;
679 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
680 IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
681 cmos_rtc.rtc);
682 if (retval < 0) {
683 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
684 goto cleanup1;
687 hpet_rtc_timer_init();
689 /* export at least the first block of NVRAM */
690 nvram.size = address_space - NVRAM_OFFSET;
691 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
692 if (retval < 0) {
693 dev_dbg(dev, "can't create nvram file? %d\n", retval);
694 goto cleanup2;
697 pr_info("%s: alarms up to one %s%s\n",
698 cmos_rtc.rtc->dev.bus_id,
699 is_valid_irq(rtc_irq)
700 ? (cmos_rtc.mon_alrm
701 ? "year"
702 : (cmos_rtc.day_alrm
703 ? "month" : "day"))
704 : "no",
705 cmos_rtc.century ? ", y3k" : ""
708 return 0;
710 cleanup2:
711 if (is_valid_irq(rtc_irq))
712 free_irq(rtc_irq, cmos_rtc.rtc);
713 cleanup1:
714 cmos_rtc.dev = NULL;
715 rtc_device_unregister(cmos_rtc.rtc);
716 cleanup0:
717 release_region(ports->start, ports->end + 1 - ports->start);
718 return retval;
721 static void cmos_do_shutdown(void)
723 unsigned char rtc_control;
725 spin_lock_irq(&rtc_lock);
726 rtc_control = CMOS_READ(RTC_CONTROL);
727 rtc_control &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
728 CMOS_WRITE(rtc_control, RTC_CONTROL);
729 CMOS_READ(RTC_INTR_FLAGS);
730 spin_unlock_irq(&rtc_lock);
733 static void __exit cmos_do_remove(struct device *dev)
735 struct cmos_rtc *cmos = dev_get_drvdata(dev);
736 struct resource *ports;
738 cmos_do_shutdown();
740 sysfs_remove_bin_file(&dev->kobj, &nvram);
742 if (is_valid_irq(cmos->irq)) {
743 free_irq(cmos->irq, cmos->rtc);
744 hpet_unregister_irq_handler(cmos_interrupt);
747 rtc_device_unregister(cmos->rtc);
748 cmos->rtc = NULL;
750 ports = cmos->iomem;
751 release_region(ports->start, ports->end + 1 - ports->start);
752 cmos->iomem = NULL;
754 cmos->dev = NULL;
755 dev_set_drvdata(dev, NULL);
758 #ifdef CONFIG_PM
760 static int cmos_suspend(struct device *dev, pm_message_t mesg)
762 struct cmos_rtc *cmos = dev_get_drvdata(dev);
763 int do_wake = device_may_wakeup(dev);
764 unsigned char tmp;
766 /* only the alarm might be a wakeup event source */
767 spin_lock_irq(&rtc_lock);
768 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
769 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
770 unsigned char irqstat;
772 if (do_wake)
773 tmp &= ~(RTC_PIE|RTC_UIE);
774 else
775 tmp &= ~(RTC_PIE|RTC_AIE|RTC_UIE);
776 CMOS_WRITE(tmp, RTC_CONTROL);
777 irqstat = CMOS_READ(RTC_INTR_FLAGS);
778 irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
779 if (is_intr(irqstat))
780 rtc_update_irq(cmos->rtc, 1, irqstat);
782 spin_unlock_irq(&rtc_lock);
784 if (tmp & RTC_AIE) {
785 cmos->enabled_wake = 1;
786 if (cmos->wake_on)
787 cmos->wake_on(dev);
788 else
789 enable_irq_wake(cmos->irq);
792 pr_debug("%s: suspend%s, ctrl %02x\n",
793 cmos_rtc.rtc->dev.bus_id,
794 (tmp & RTC_AIE) ? ", alarm may wake" : "",
795 tmp);
797 return 0;
800 static int cmos_resume(struct device *dev)
802 struct cmos_rtc *cmos = dev_get_drvdata(dev);
803 unsigned char tmp = cmos->suspend_ctrl;
805 /* re-enable any irqs previously active */
806 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
808 if (cmos->enabled_wake) {
809 if (cmos->wake_off)
810 cmos->wake_off(dev);
811 else
812 disable_irq_wake(cmos->irq);
813 cmos->enabled_wake = 0;
816 spin_lock_irq(&rtc_lock);
817 CMOS_WRITE(tmp, RTC_CONTROL);
818 tmp = CMOS_READ(RTC_INTR_FLAGS);
819 tmp &= (cmos->suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
820 if (is_intr(tmp))
821 rtc_update_irq(cmos->rtc, 1, tmp);
822 spin_unlock_irq(&rtc_lock);
825 pr_debug("%s: resume, ctrl %02x\n",
826 cmos_rtc.rtc->dev.bus_id,
827 cmos->suspend_ctrl);
830 return 0;
833 #else
834 #define cmos_suspend NULL
835 #define cmos_resume NULL
836 #endif
838 /*----------------------------------------------------------------*/
840 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
841 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
842 * probably list them in similar PNPBIOS tables; so PNP is more common.
844 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
845 * predate even PNPBIOS should set up platform_bus devices.
848 #ifdef CONFIG_PNP
850 #include <linux/pnp.h>
852 static int __devinit
853 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
855 /* REVISIT paranoia argues for a shutdown notifier, since PNP
856 * drivers can't provide shutdown() methods to disable IRQs.
857 * Or better yet, fix PNP to allow those methods...
859 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
860 /* Some machines contain a PNP entry for the RTC, but
861 * don't define the IRQ. It should always be safe to
862 * hardcode it in these cases
864 return cmos_do_probe(&pnp->dev, &pnp->res.port_resource[0], 8);
865 else
866 return cmos_do_probe(&pnp->dev,
867 &pnp->res.port_resource[0],
868 pnp->res.irq_resource[0].start);
871 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
873 cmos_do_remove(&pnp->dev);
876 #ifdef CONFIG_PM
878 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
880 return cmos_suspend(&pnp->dev, mesg);
883 static int cmos_pnp_resume(struct pnp_dev *pnp)
885 return cmos_resume(&pnp->dev);
888 #else
889 #define cmos_pnp_suspend NULL
890 #define cmos_pnp_resume NULL
891 #endif
894 static const struct pnp_device_id rtc_ids[] = {
895 { .id = "PNP0b00", },
896 { .id = "PNP0b01", },
897 { .id = "PNP0b02", },
898 { },
900 MODULE_DEVICE_TABLE(pnp, rtc_ids);
902 static struct pnp_driver cmos_pnp_driver = {
903 .name = (char *) driver_name,
904 .id_table = rtc_ids,
905 .probe = cmos_pnp_probe,
906 .remove = __exit_p(cmos_pnp_remove),
908 /* flag ensures resume() gets called, and stops syslog spam */
909 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
910 .suspend = cmos_pnp_suspend,
911 .resume = cmos_pnp_resume,
914 static int __init cmos_init(void)
916 return pnp_register_driver(&cmos_pnp_driver);
918 module_init(cmos_init);
920 static void __exit cmos_exit(void)
922 pnp_unregister_driver(&cmos_pnp_driver);
924 module_exit(cmos_exit);
926 #else /* no PNP */
928 /*----------------------------------------------------------------*/
930 /* Platform setup should have set up an RTC device, when PNP is
931 * unavailable ... this could happen even on (older) PCs.
934 static int __init cmos_platform_probe(struct platform_device *pdev)
936 return cmos_do_probe(&pdev->dev,
937 platform_get_resource(pdev, IORESOURCE_IO, 0),
938 platform_get_irq(pdev, 0));
941 static int __exit cmos_platform_remove(struct platform_device *pdev)
943 cmos_do_remove(&pdev->dev);
944 return 0;
947 static void cmos_platform_shutdown(struct platform_device *pdev)
949 cmos_do_shutdown();
952 static struct platform_driver cmos_platform_driver = {
953 .remove = __exit_p(cmos_platform_remove),
954 .shutdown = cmos_platform_shutdown,
955 .driver = {
956 .name = (char *) driver_name,
957 .suspend = cmos_suspend,
958 .resume = cmos_resume,
962 static int __init cmos_init(void)
964 return platform_driver_probe(&cmos_platform_driver,
965 cmos_platform_probe);
967 module_init(cmos_init);
969 static void __exit cmos_exit(void)
971 platform_driver_unregister(&cmos_platform_driver);
973 module_exit(cmos_exit);
976 #endif /* !PNP */
978 MODULE_AUTHOR("David Brownell");
979 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
980 MODULE_LICENSE("GPL");