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x86: 64-bit, add the new split_large_page() function
[wrt350n-kernel.git] / drivers / usb / host / ohci-dbg.c
blobebab5ce8f5ce7d760b48e9fb5e1df650c7ffded5
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * This file is licenced under the GPL.
8 */
9
10 /*-------------------------------------------------------------------------*/
11
12 #ifdef DEBUG
13
14 #define edstring(ed_type) ({ char *temp; \
15 switch (ed_type) { \
16 case PIPE_CONTROL: temp = "ctrl"; break; \
17 case PIPE_BULK: temp = "bulk"; break; \
18 case PIPE_INTERRUPT: temp = "intr"; break; \
19 default: temp = "isoc"; break; \
20 }; temp;})
21 #define pipestring(pipe) edstring(usb_pipetype(pipe))
22
23 /* debug| print the main components of an URB
24 * small: 0) header + data packets 1) just header
25 */
26 static void __maybe_unused
27 urb_print(struct urb * urb, char * str, int small, int status)
28 {
29 unsigned int pipe= urb->pipe;
30
31 if (!urb->dev || !urb->dev->bus) {
32 dbg("%s URB: no dev", str);
33 return;
34 }
35
36 #ifndef OHCI_VERBOSE_DEBUG
37 if (status != 0)
38 #endif
39 dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d",
40 str,
41 urb,
42 usb_pipedevice (pipe),
43 usb_pipeendpoint (pipe),
44 usb_pipeout (pipe)? "out" : "in",
45 pipestring (pipe),
46 urb->transfer_flags,
47 urb->actual_length,
48 urb->transfer_buffer_length,
49 status);
50
51 #ifdef OHCI_VERBOSE_DEBUG
52 if (!small) {
53 int i, len;
54
55 if (usb_pipecontrol (pipe)) {
56 printk (KERN_DEBUG __FILE__ ": setup(8):");
57 for (i = 0; i < 8 ; i++)
58 printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
59 printk ("\n");
60 }
61 if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
62 printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
63 urb->actual_length,
64 urb->transfer_buffer_length);
65 len = usb_pipeout (pipe)?
66 urb->transfer_buffer_length: urb->actual_length;
67 for (i = 0; i < 16 && i < len; i++)
68 printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
69 printk ("%s stat:%d\n", i < len? "...": "", status);
70 }
71 }
72 #endif
73 }
74
75 #define ohci_dbg_sw(ohci, next, size, format, arg...) \
76 do { \
77 if (next != NULL) { \
78 unsigned s_len; \
79 s_len = scnprintf (*next, *size, format, ## arg ); \
80 *size -= s_len; *next += s_len; \
81 } else \
82 ohci_dbg(ohci,format, ## arg ); \
83 } while (0);
84
85
86 static void ohci_dump_intr_mask (
87 struct ohci_hcd *ohci,
88 char *label,
89 u32 mask,
90 char **next,
91 unsigned *size)
92 {
93 ohci_dbg_sw (ohci, next, size, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
94 label,
95 mask,
96 (mask & OHCI_INTR_MIE) ? " MIE" : "",
97 (mask & OHCI_INTR_OC) ? " OC" : "",
98 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
99 (mask & OHCI_INTR_FNO) ? " FNO" : "",
100 (mask & OHCI_INTR_UE) ? " UE" : "",
101 (mask & OHCI_INTR_RD) ? " RD" : "",
102 (mask & OHCI_INTR_SF) ? " SF" : "",
103 (mask & OHCI_INTR_WDH) ? " WDH" : "",
104 (mask & OHCI_INTR_SO) ? " SO" : ""
105 );
106 }
107
108 static void maybe_print_eds (
109 struct ohci_hcd *ohci,
110 char *label,
111 u32 value,
112 char **next,
113 unsigned *size)
114 {
115 if (value)
116 ohci_dbg_sw (ohci, next, size, "%s %08x\n", label, value);
117 }
118
119 static char *hcfs2string (int state)
120 {
121 switch (state) {
122 case OHCI_USB_RESET: return "reset";
123 case OHCI_USB_RESUME: return "resume";
124 case OHCI_USB_OPER: return "operational";
125 case OHCI_USB_SUSPEND: return "suspend";
126 }
127 return "?";
128 }
129
130 // dump control and status registers
131 static void
132 ohci_dump_status (struct ohci_hcd *controller, char **next, unsigned *size)
133 {
134 struct ohci_regs __iomem *regs = controller->regs;
135 u32 temp;
136
137 temp = ohci_readl (controller, &regs->revision) & 0xff;
138 ohci_dbg_sw (controller, next, size,
139 "OHCI %d.%d, %s legacy support registers\n",
140 0x03 & (temp >> 4), (temp & 0x0f),
141 (temp & 0x0100) ? "with" : "NO");
142
143 temp = ohci_readl (controller, &regs->control);
144 ohci_dbg_sw (controller, next, size,
145 "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
146 temp,
147 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
148 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
149 (temp & OHCI_CTRL_IR) ? " IR" : "",
150 hcfs2string (temp & OHCI_CTRL_HCFS),
151 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
152 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
153 (temp & OHCI_CTRL_IE) ? " IE" : "",
154 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
155 temp & OHCI_CTRL_CBSR
156 );
157
158 temp = ohci_readl (controller, &regs->cmdstatus);
159 ohci_dbg_sw (controller, next, size,
160 "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp,
161 (temp & OHCI_SOC) >> 16,
162 (temp & OHCI_OCR) ? " OCR" : "",
163 (temp & OHCI_BLF) ? " BLF" : "",
164 (temp & OHCI_CLF) ? " CLF" : "",
165 (temp & OHCI_HCR) ? " HCR" : ""
166 );
167
168 ohci_dump_intr_mask (controller, "intrstatus",
169 ohci_readl (controller, &regs->intrstatus),
170 next, size);
171 ohci_dump_intr_mask (controller, "intrenable",
172 ohci_readl (controller, &regs->intrenable),
173 next, size);
174 // intrdisable always same as intrenable
175
176 maybe_print_eds (controller, "ed_periodcurrent",
177 ohci_readl (controller, &regs->ed_periodcurrent),
178 next, size);
179
180 maybe_print_eds (controller, "ed_controlhead",
181 ohci_readl (controller, &regs->ed_controlhead),
182 next, size);
183 maybe_print_eds (controller, "ed_controlcurrent",
184 ohci_readl (controller, &regs->ed_controlcurrent),
185 next, size);
186
187 maybe_print_eds (controller, "ed_bulkhead",
188 ohci_readl (controller, &regs->ed_bulkhead),
189 next, size);
190 maybe_print_eds (controller, "ed_bulkcurrent",
191 ohci_readl (controller, &regs->ed_bulkcurrent),
192 next, size);
193
194 maybe_print_eds (controller, "donehead",
195 ohci_readl (controller, &regs->donehead), next, size);
196 }
197
198 #define dbg_port_sw(hc,num,value,next,size) \
199 ohci_dbg_sw (hc, next, size, \
200 "roothub.portstatus [%d] " \
201 "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
202 num, temp, \
203 (temp & RH_PS_PRSC) ? " PRSC" : "", \
204 (temp & RH_PS_OCIC) ? " OCIC" : "", \
205 (temp & RH_PS_PSSC) ? " PSSC" : "", \
206 (temp & RH_PS_PESC) ? " PESC" : "", \
207 (temp & RH_PS_CSC) ? " CSC" : "", \
208 \
209 (temp & RH_PS_LSDA) ? " LSDA" : "", \
210 (temp & RH_PS_PPS) ? " PPS" : "", \
211 (temp & RH_PS_PRS) ? " PRS" : "", \
212 (temp & RH_PS_POCI) ? " POCI" : "", \
213 (temp & RH_PS_PSS) ? " PSS" : "", \
214 \
215 (temp & RH_PS_PES) ? " PES" : "", \
216 (temp & RH_PS_CCS) ? " CCS" : "" \
217 );
218
219
220 static void
221 ohci_dump_roothub (
222 struct ohci_hcd *controller,
223 int verbose,
224 char **next,
225 unsigned *size)
226 {
227 u32 temp, i;
228
229 temp = roothub_a (controller);
230 if (temp == ~(u32)0)
231 return;
232
233 if (verbose) {
234 ohci_dbg_sw (controller, next, size,
235 "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d(%d)\n", temp,
236 ((temp & RH_A_POTPGT) >> 24) & 0xff,
237 (temp & RH_A_NOCP) ? " NOCP" : "",
238 (temp & RH_A_OCPM) ? " OCPM" : "",
239 (temp & RH_A_DT) ? " DT" : "",
240 (temp & RH_A_NPS) ? " NPS" : "",
241 (temp & RH_A_PSM) ? " PSM" : "",
242 (temp & RH_A_NDP), controller->num_ports
243 );
244 temp = roothub_b (controller);
245 ohci_dbg_sw (controller, next, size,
246 "roothub.b %08x PPCM=%04x DR=%04x\n",
247 temp,
248 (temp & RH_B_PPCM) >> 16,
249 (temp & RH_B_DR)
250 );
251 temp = roothub_status (controller);
252 ohci_dbg_sw (controller, next, size,
253 "roothub.status %08x%s%s%s%s%s%s\n",
254 temp,
255 (temp & RH_HS_CRWE) ? " CRWE" : "",
256 (temp & RH_HS_OCIC) ? " OCIC" : "",
257 (temp & RH_HS_LPSC) ? " LPSC" : "",
258 (temp & RH_HS_DRWE) ? " DRWE" : "",
259 (temp & RH_HS_OCI) ? " OCI" : "",
260 (temp & RH_HS_LPS) ? " LPS" : ""
261 );
262 }
263
264 for (i = 0; i < controller->num_ports; i++) {
265 temp = roothub_portstatus (controller, i);
266 dbg_port_sw (controller, i, temp, next, size);
267 }
268 }
269
270 static void ohci_dump (struct ohci_hcd *controller, int verbose)
271 {
272 ohci_dbg (controller, "OHCI controller state\n");
273
274 // dumps some of the state we know about
275 ohci_dump_status (controller, NULL, NULL);
276 if (controller->hcca)
277 ohci_dbg (controller,
278 "hcca frame #%04x\n", ohci_frame_no(controller));
279 ohci_dump_roothub (controller, 1, NULL, NULL);
280 }
281
282 static const char data0 [] = "DATA0";
283 static const char data1 [] = "DATA1";
284
285 static void ohci_dump_td (const struct ohci_hcd *ohci, const char *label,
286 const struct td *td)
287 {
288 u32 tmp = hc32_to_cpup (ohci, &td->hwINFO);
289
290 ohci_dbg (ohci, "%s td %p%s; urb %p index %d; hw next td %08x\n",
291 label, td,
292 (tmp & TD_DONE) ? " (DONE)" : "",
293 td->urb, td->index,
294 hc32_to_cpup (ohci, &td->hwNextTD));
295 if ((tmp & TD_ISO) == 0) {
296 const char *toggle, *pid;
297 u32 cbp, be;
298
299 switch (tmp & TD_T) {
300 case TD_T_DATA0: toggle = data0; break;
301 case TD_T_DATA1: toggle = data1; break;
302 case TD_T_TOGGLE: toggle = "(CARRY)"; break;
303 default: toggle = "(?)"; break;
304 }
305 switch (tmp & TD_DP) {
306 case TD_DP_SETUP: pid = "SETUP"; break;
307 case TD_DP_IN: pid = "IN"; break;
308 case TD_DP_OUT: pid = "OUT"; break;
309 default: pid = "(bad pid)"; break;
310 }
311 ohci_dbg (ohci, " info %08x CC=%x %s DI=%d %s %s\n", tmp,
312 TD_CC_GET(tmp), /* EC, */ toggle,
313 (tmp & TD_DI) >> 21, pid,
314 (tmp & TD_R) ? "R" : "");
315 cbp = hc32_to_cpup (ohci, &td->hwCBP);
316 be = hc32_to_cpup (ohci, &td->hwBE);
317 ohci_dbg (ohci, " cbp %08x be %08x (len %d)\n", cbp, be,
318 cbp ? (be + 1 - cbp) : 0);
319 } else {
320 unsigned i;
321 ohci_dbg (ohci, " info %08x CC=%x FC=%d DI=%d SF=%04x\n", tmp,
322 TD_CC_GET(tmp),
323 (tmp >> 24) & 0x07,
324 (tmp & TD_DI) >> 21,
325 tmp & 0x0000ffff);
326 ohci_dbg (ohci, " bp0 %08x be %08x\n",
327 hc32_to_cpup (ohci, &td->hwCBP) & ~0x0fff,
328 hc32_to_cpup (ohci, &td->hwBE));
329 for (i = 0; i < MAXPSW; i++) {
330 u16 psw = ohci_hwPSW (ohci, td, i);
331 int cc = (psw >> 12) & 0x0f;
332 ohci_dbg (ohci, " psw [%d] = %2x, CC=%x %s=%d\n", i,
333 psw, cc,
334 (cc >= 0x0e) ? "OFFSET" : "SIZE",
335 psw & 0x0fff);
336 }
337 }
338 }
339
340 /* caller MUST own hcd spinlock if verbose is set! */
341 static void __maybe_unused
342 ohci_dump_ed (const struct ohci_hcd *ohci, const char *label,
343 const struct ed *ed, int verbose)
344 {
345 u32 tmp = hc32_to_cpu (ohci, ed->hwINFO);
346 char *type = "";
347
348 ohci_dbg (ohci, "%s, ed %p state 0x%x type %s; next ed %08x\n",
349 label,
350 ed, ed->state, edstring (ed->type),
351 hc32_to_cpup (ohci, &ed->hwNextED));
352 switch (tmp & (ED_IN|ED_OUT)) {
353 case ED_OUT: type = "-OUT"; break;
354 case ED_IN: type = "-IN"; break;
355 /* else from TDs ... control */
356 }
357 ohci_dbg (ohci,
358 " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d\n", tmp,
359 0x03ff & (tmp >> 16),
360 (tmp & ED_DEQUEUE) ? " DQ" : "",
361 (tmp & ED_ISO) ? " ISO" : "",
362 (tmp & ED_SKIP) ? " SKIP" : "",
363 (tmp & ED_LOWSPEED) ? " LOW" : "",
364 0x000f & (tmp >> 7),
365 type,
366 0x007f & tmp);
367 tmp = hc32_to_cpup (ohci, &ed->hwHeadP);
368 ohci_dbg (ohci, " tds: head %08x %s%s tail %08x%s\n",
369 tmp,
370 (tmp & ED_C) ? data1 : data0,
371 (tmp & ED_H) ? " HALT" : "",
372 hc32_to_cpup (ohci, &ed->hwTailP),
373 verbose ? "" : " (not listing)");
374 if (verbose) {
375 struct list_head *tmp;
376
377 /* use ed->td_list because HC concurrently modifies
378 * hwNextTD as it accumulates ed_donelist.
379 */
380 list_for_each (tmp, &ed->td_list) {
381 struct td *td;
382 td = list_entry (tmp, struct td, td_list);
383 ohci_dump_td (ohci, " ->", td);
384 }
385 }
386 }
387
388 #else
389 static inline void ohci_dump (struct ohci_hcd *controller, int verbose) {}
390
391 #undef OHCI_VERBOSE_DEBUG
392
393 #endif /* DEBUG */
394
395 /*-------------------------------------------------------------------------*/
396
397 #ifdef STUB_DEBUG_FILES
398
399 static inline void create_debug_files (struct ohci_hcd *bus) { }
400 static inline void remove_debug_files (struct ohci_hcd *bus) { }
401
402 #else
403
404 static ssize_t
405 show_list (struct ohci_hcd *ohci, char *buf, size_t count, struct ed *ed)
406 {
407 unsigned temp, size = count;
408
409 if (!ed)
410 return 0;
411
412 /* print first --> last */
413 while (ed->ed_prev)
414 ed = ed->ed_prev;
415
416 /* dump a snapshot of the bulk or control schedule */
417 while (ed) {
418 u32 info = hc32_to_cpu (ohci, ed->hwINFO);
419 u32 headp = hc32_to_cpu (ohci, ed->hwHeadP);
420 struct list_head *entry;
421 struct td *td;
422
423 temp = scnprintf (buf, size,
424 "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
425 ed,
426 (info & ED_LOWSPEED) ? 'l' : 'f',
427 info & 0x7f,
428 (info >> 7) & 0xf,
429 (info & ED_IN) ? "in" : "out",
430 0x03ff & (info >> 16),
431 info,
432 (info & ED_SKIP) ? " s" : "",
433 (headp & ED_H) ? " H" : "",
434 (headp & ED_C) ? data1 : data0);
435 size -= temp;
436 buf += temp;
437
438 list_for_each (entry, &ed->td_list) {
439 u32 cbp, be;
440
441 td = list_entry (entry, struct td, td_list);
442 info = hc32_to_cpup (ohci, &td->hwINFO);
443 cbp = hc32_to_cpup (ohci, &td->hwCBP);
444 be = hc32_to_cpup (ohci, &td->hwBE);
445 temp = scnprintf (buf, size,
446 "\n\ttd %p %s %d cc=%x urb %p (%08x)",
447 td,
448 ({ char *pid;
449 switch (info & TD_DP) {
450 case TD_DP_SETUP: pid = "setup"; break;
451 case TD_DP_IN: pid = "in"; break;
452 case TD_DP_OUT: pid = "out"; break;
453 default: pid = "(?)"; break;
454 } pid;}),
455 cbp ? (be + 1 - cbp) : 0,
456 TD_CC_GET (info), td->urb, info);
457 size -= temp;
458 buf += temp;
459 }
460
461 temp = scnprintf (buf, size, "\n");
462 size -= temp;
463 buf += temp;
464
465 ed = ed->ed_next;
466 }
467 return count - size;
468 }
469
470 static ssize_t
471 show_async (struct class_device *class_dev, char *buf)
472 {
473 struct usb_bus *bus;
474 struct usb_hcd *hcd;
475 struct ohci_hcd *ohci;
476 size_t temp;
477 unsigned long flags;
478
479 bus = class_get_devdata(class_dev);
480 hcd = bus_to_hcd(bus);
481 ohci = hcd_to_ohci(hcd);
482
483 /* display control and bulk lists together, for simplicity */
484 spin_lock_irqsave (&ohci->lock, flags);
485 temp = show_list (ohci, buf, PAGE_SIZE, ohci->ed_controltail);
486 temp += show_list (ohci, buf + temp, PAGE_SIZE - temp, ohci->ed_bulktail);
487 spin_unlock_irqrestore (&ohci->lock, flags);
488
489 return temp;
490 }
491 static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
492
493
494 #define DBG_SCHED_LIMIT 64
495
496 static ssize_t
497 show_periodic (struct class_device *class_dev, char *buf)
498 {
499 struct usb_bus *bus;
500 struct usb_hcd *hcd;
501 struct ohci_hcd *ohci;
502 struct ed **seen, *ed;
503 unsigned long flags;
504 unsigned temp, size, seen_count;
505 char *next;
506 unsigned i;
507
508 if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, GFP_ATOMIC)))
509 return 0;
510 seen_count = 0;
511
512 bus = class_get_devdata(class_dev);
513 hcd = bus_to_hcd(bus);
514 ohci = hcd_to_ohci(hcd);
515 next = buf;
516 size = PAGE_SIZE;
517
518 temp = scnprintf (next, size, "size = %d\n", NUM_INTS);
519 size -= temp;
520 next += temp;
521
522 /* dump a snapshot of the periodic schedule (and load) */
523 spin_lock_irqsave (&ohci->lock, flags);
524 for (i = 0; i < NUM_INTS; i++) {
525 if (!(ed = ohci->periodic [i]))
526 continue;
527
528 temp = scnprintf (next, size, "%2d [%3d]:", i, ohci->load [i]);
529 size -= temp;
530 next += temp;
531
532 do {
533 temp = scnprintf (next, size, " ed%d/%p",
534 ed->interval, ed);
535 size -= temp;
536 next += temp;
537 for (temp = 0; temp < seen_count; temp++) {
538 if (seen [temp] == ed)
539 break;
540 }
541
542 /* show more info the first time around */
543 if (temp == seen_count) {
544 u32 info = hc32_to_cpu (ohci, ed->hwINFO);
545 struct list_head *entry;
546 unsigned qlen = 0;
547
548 /* qlen measured here in TDs, not urbs */
549 list_for_each (entry, &ed->td_list)
550 qlen++;
551
552 temp = scnprintf (next, size,
553 " (%cs dev%d ep%d%s-%s qlen %u"
554 " max %d %08x%s%s)",
555 (info & ED_LOWSPEED) ? 'l' : 'f',
556 info & 0x7f,
557 (info >> 7) & 0xf,
558 (info & ED_IN) ? "in" : "out",
559 (info & ED_ISO) ? "iso" : "int",
560 qlen,
561 0x03ff & (info >> 16),
562 info,
563 (info & ED_SKIP) ? " K" : "",
564 (ed->hwHeadP &
565 cpu_to_hc32(ohci, ED_H)) ?
566 " H" : "");
567 size -= temp;
568 next += temp;
569
570 if (seen_count < DBG_SCHED_LIMIT)
571 seen [seen_count++] = ed;
572
573 ed = ed->ed_next;
574
575 } else {
576 /* we've seen it and what's after */
577 temp = 0;
578 ed = NULL;
579 }
580
581 } while (ed);
582
583 temp = scnprintf (next, size, "\n");
584 size -= temp;
585 next += temp;
586 }
587 spin_unlock_irqrestore (&ohci->lock, flags);
588 kfree (seen);
589
590 return PAGE_SIZE - size;
591 }
592 static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
593
594
595 #undef DBG_SCHED_LIMIT
596
597 static ssize_t
598 show_registers (struct class_device *class_dev, char *buf)
599 {
600 struct usb_bus *bus;
601 struct usb_hcd *hcd;
602 struct ohci_hcd *ohci;
603 struct ohci_regs __iomem *regs;
604 unsigned long flags;
605 unsigned temp, size;
606 char *next;
607 u32 rdata;
608
609 bus = class_get_devdata(class_dev);
610 hcd = bus_to_hcd(bus);
611 ohci = hcd_to_ohci(hcd);
612 regs = ohci->regs;
613 next = buf;
614 size = PAGE_SIZE;
615
616 spin_lock_irqsave (&ohci->lock, flags);
617
618 /* dump driver info, then registers in spec order */
619
620 ohci_dbg_sw (ohci, &next, &size,
621 "bus %s, device %s\n"
622 "%s\n"
623 "%s version " DRIVER_VERSION "\n",
624 hcd->self.controller->bus->name,
625 hcd->self.controller->bus_id,
626 hcd->product_desc,
627 hcd_name);
628
629 if (bus->controller->power.power_state.event) {
630 size -= scnprintf (next, size,
631 "SUSPENDED (no register access)\n");
632 goto done;
633 }
634
635 ohci_dump_status(ohci, &next, &size);
636
637 /* hcca */
638 if (ohci->hcca)
639 ohci_dbg_sw (ohci, &next, &size,
640 "hcca frame 0x%04x\n", ohci_frame_no(ohci));
641
642 /* other registers mostly affect frame timings */
643 rdata = ohci_readl (ohci, &regs->fminterval);
644 temp = scnprintf (next, size,
645 "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
646 rdata, (rdata >> 31) ? "FIT " : "",
647 (rdata >> 16) & 0xefff, rdata & 0xffff);
648 size -= temp;
649 next += temp;
650
651 rdata = ohci_readl (ohci, &regs->fmremaining);
652 temp = scnprintf (next, size, "fmremaining 0x%08x %sFR=0x%04x\n",
653 rdata, (rdata >> 31) ? "FRT " : "",
654 rdata & 0x3fff);
655 size -= temp;
656 next += temp;
657
658 rdata = ohci_readl (ohci, &regs->periodicstart);
659 temp = scnprintf (next, size, "periodicstart 0x%04x\n",
660 rdata & 0x3fff);
661 size -= temp;
662 next += temp;
663
664 rdata = ohci_readl (ohci, &regs->lsthresh);
665 temp = scnprintf (next, size, "lsthresh 0x%04x\n",
666 rdata & 0x3fff);
667 size -= temp;
668 next += temp;
669
670 temp = scnprintf (next, size, "hub poll timer %s\n",
671 ohci_to_hcd(ohci)->poll_rh ? "ON" : "off");
672 size -= temp;
673 next += temp;
674
675 /* roothub */
676 ohci_dump_roothub (ohci, 1, &next, &size);
677
678 done:
679 spin_unlock_irqrestore (&ohci->lock, flags);
680 return PAGE_SIZE - size;
681 }
682 static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
683
684
685 static inline void create_debug_files (struct ohci_hcd *ohci)
686 {
687 struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
688 int retval;
689
690 retval = class_device_create_file(cldev, &class_device_attr_async);
691 retval = class_device_create_file(cldev, &class_device_attr_periodic);
692 retval = class_device_create_file(cldev, &class_device_attr_registers);
693 ohci_dbg (ohci, "created debug files\n");
694 }
695
696 static inline void remove_debug_files (struct ohci_hcd *ohci)
697 {
698 struct class_device *cldev = ohci_to_hcd(ohci)->self.class_dev;
699
700 class_device_remove_file(cldev, &class_device_attr_async);
701 class_device_remove_file(cldev, &class_device_attr_periodic);
702 class_device_remove_file(cldev, &class_device_attr_registers);
703 }
704
705 #endif
706
707 /*-------------------------------------------------------------------------*/
708
WRT350N Kernel Patches