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x86: 64-bit, add the new split_large_page() function
[wrt350n-kernel.git] / sound / pci / atiixp.c
blob89184a424140232e91f0c832360593fbda21a5fe
1 /*
2 * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
3 *
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 #include <sound/driver.h>
23 #include <asm/io.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <linux/mutex.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/info.h>
35 #include <sound/ac97_codec.h>
36 #include <sound/initval.h>
37
38 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
39 MODULE_DESCRIPTION("ATI IXP AC97 controller");
40 MODULE_LICENSE("GPL");
41 MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
42
43 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
44 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
45 static int ac97_clock = 48000;
46 static char *ac97_quirk;
47 static int spdif_aclink = 1;
48 static int ac97_codec = -1;
49
50 module_param(index, int, 0444);
51 MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
52 module_param(id, charp, 0444);
53 MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
54 module_param(ac97_clock, int, 0444);
55 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
56 module_param(ac97_quirk, charp, 0444);
57 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
58 module_param(ac97_codec, int, 0444);
59 MODULE_PARM_DESC(ac97_codec, "Specify codec instead of probing.");
60 module_param(spdif_aclink, bool, 0444);
61 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
62
63 /* just for backward compatibility */
64 static int enable;
65 module_param(enable, bool, 0444);
66
67
68 /*
69 */
70
71 #define ATI_REG_ISR 0x00 /* interrupt source */
72 #define ATI_REG_ISR_IN_XRUN (1U<<0)
73 #define ATI_REG_ISR_IN_STATUS (1U<<1)
74 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
75 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
76 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
77 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
78 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
79 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
80 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
81 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
82 #define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
83 #define ATI_REG_ISR_NEW_FRAME (1U<<13)
84
85 #define ATI_REG_IER 0x04 /* interrupt enable */
86 #define ATI_REG_IER_IN_XRUN_EN (1U<<0)
87 #define ATI_REG_IER_IO_STATUS_EN (1U<<1)
88 #define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
89 #define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
90 #define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
91 #define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
92 #define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
93 #define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
94 #define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
95 #define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
96 #define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
97 #define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
98 #define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
99
100 #define ATI_REG_CMD 0x08 /* command */
101 #define ATI_REG_CMD_POWERDOWN (1U<<0)
102 #define ATI_REG_CMD_RECEIVE_EN (1U<<1)
103 #define ATI_REG_CMD_SEND_EN (1U<<2)
104 #define ATI_REG_CMD_STATUS_MEM (1U<<3)
105 #define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
106 #define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
107 #define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
108 #define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
109 #define ATI_REG_CMD_IN_DMA_EN (1U<<8)
110 #define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
111 #define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
112 #define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
113 #define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
114 #define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
115 #define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
116 #define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
117 #define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
118 #define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
119 #define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
120 #define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
121 #define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
122 #define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
123 #define ATI_REG_CMD_PACKED_DIS (1U<<24)
124 #define ATI_REG_CMD_BURST_EN (1U<<25)
125 #define ATI_REG_CMD_PANIC_EN (1U<<26)
126 #define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
127 #define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
128 #define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
129 #define ATI_REG_CMD_AC_SYNC (1U<<30)
130 #define ATI_REG_CMD_AC_RESET (1U<<31)
131
132 #define ATI_REG_PHYS_OUT_ADDR 0x0c
133 #define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
134 #define ATI_REG_PHYS_OUT_RW (1U<<2)
135 #define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
136 #define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
137 #define ATI_REG_PHYS_OUT_DATA_SHIFT 16
138
139 #define ATI_REG_PHYS_IN_ADDR 0x10
140 #define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
141 #define ATI_REG_PHYS_IN_ADDR_SHIFT 9
142 #define ATI_REG_PHYS_IN_DATA_SHIFT 16
143
144 #define ATI_REG_SLOTREQ 0x14
145
146 #define ATI_REG_COUNTER 0x18
147 #define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
148 #define ATI_REG_COUNTER_BITCLOCK (31U<<8)
149
150 #define ATI_REG_IN_FIFO_THRESHOLD 0x1c
151
152 #define ATI_REG_IN_DMA_LINKPTR 0x20
153 #define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
154 #define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
155 #define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
156 #define ATI_REG_IN_DMA_DT_SIZE 0x30
157
158 #define ATI_REG_OUT_DMA_SLOT 0x34
159 #define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
160 #define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
161 #define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
162 #define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
163
164 #define ATI_REG_OUT_DMA_LINKPTR 0x38
165 #define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
166 #define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
167 #define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
168 #define ATI_REG_OUT_DMA_DT_SIZE 0x48
169
170 #define ATI_REG_SPDF_CMD 0x4c
171 #define ATI_REG_SPDF_CMD_LFSR (1U<<4)
172 #define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
173 #define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
174
175 #define ATI_REG_SPDF_DMA_LINKPTR 0x50
176 #define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
177 #define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
178 #define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
179 #define ATI_REG_SPDF_DMA_DT_SIZE 0x60
180
181 #define ATI_REG_MODEM_MIRROR 0x7c
182 #define ATI_REG_AUDIO_MIRROR 0x80
183
184 #define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
185 #define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
186
187 #define ATI_REG_FIFO_FLUSH 0x88
188 #define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
189 #define ATI_REG_FIFO_IN_FLUSH (1U<<1)
190
191 /* LINKPTR */
192 #define ATI_REG_LINKPTR_EN (1U<<0)
193
194 /* [INT|OUT|SPDIF]_DMA_DT_SIZE */
195 #define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
196 #define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
197 #define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
198 #define ATI_REG_DMA_STATE (7U<<26)
199
200
201 #define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
202
203
204 struct atiixp;
205
206 /*
207 * DMA packate descriptor
208 */
209
210 struct atiixp_dma_desc {
211 u32 addr; /* DMA buffer address */
212 u16 status; /* status bits */
213 u16 size; /* size of the packet in dwords */
214 u32 next; /* address of the next packet descriptor */
215 };
216
217 /*
218 * stream enum
219 */
220 enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
221 enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
222 enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
223
224 #define NUM_ATI_CODECS 3
225
226
227 /*
228 * constants and callbacks for each DMA type
229 */
230 struct atiixp_dma_ops {
231 int type; /* ATI_DMA_XXX */
232 unsigned int llp_offset; /* LINKPTR offset */
233 unsigned int dt_cur; /* DT_CUR offset */
234 /* called from open callback */
235 void (*enable_dma)(struct atiixp *chip, int on);
236 /* called from trigger (START/STOP) */
237 void (*enable_transfer)(struct atiixp *chip, int on);
238 /* called from trigger (STOP only) */
239 void (*flush_dma)(struct atiixp *chip);
240 };
241
242 /*
243 * DMA stream
244 */
245 struct atiixp_dma {
246 const struct atiixp_dma_ops *ops;
247 struct snd_dma_buffer desc_buf;
248 struct snd_pcm_substream *substream; /* assigned PCM substream */
249 unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
250 unsigned int period_bytes, periods;
251 int opened;
252 int running;
253 int suspended;
254 int pcm_open_flag;
255 int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
256 unsigned int saved_curptr;
257 };
258
259 /*
260 * ATI IXP chip
261 */
262 struct atiixp {
263 struct snd_card *card;
264 struct pci_dev *pci;
265
266 unsigned long addr;
267 void __iomem *remap_addr;
268 int irq;
269
270 struct snd_ac97_bus *ac97_bus;
271 struct snd_ac97 *ac97[NUM_ATI_CODECS];
272
273 spinlock_t reg_lock;
274
275 struct atiixp_dma dmas[NUM_ATI_DMAS];
276 struct ac97_pcm *pcms[NUM_ATI_PCMS];
277 struct snd_pcm *pcmdevs[NUM_ATI_PCMDEVS];
278
279 int max_channels; /* max. channels for PCM out */
280
281 unsigned int codec_not_ready_bits; /* for codec detection */
282
283 int spdif_over_aclink; /* passed from the module option */
284 struct mutex open_mutex; /* playback open mutex */
285 };
286
287
288 /*
289 */
290 static struct pci_device_id snd_atiixp_ids[] = {
291 { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
292 { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
293 { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
294 { 0, }
295 };
296
297 MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
298
299 static struct snd_pci_quirk atiixp_quirks[] __devinitdata = {
300 SND_PCI_QUIRK(0x15bd, 0x3100, "DFI RS482", 0),
301 { } /* terminator */
302 };
303
304 /*
305 * lowlevel functions
306 */
307
308 /*
309 * update the bits of the given register.
310 * return 1 if the bits changed.
311 */
312 static int snd_atiixp_update_bits(struct atiixp *chip, unsigned int reg,
313 unsigned int mask, unsigned int value)
314 {
315 void __iomem *addr = chip->remap_addr + reg;
316 unsigned int data, old_data;
317 old_data = data = readl(addr);
318 data &= ~mask;
319 data |= value;
320 if (old_data == data)
321 return 0;
322 writel(data, addr);
323 return 1;
324 }
325
326 /*
327 * macros for easy use
328 */
329 #define atiixp_write(chip,reg,value) \
330 writel(value, chip->remap_addr + ATI_REG_##reg)
331 #define atiixp_read(chip,reg) \
332 readl(chip->remap_addr + ATI_REG_##reg)
333 #define atiixp_update(chip,reg,mask,val) \
334 snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
335
336 /*
337 * handling DMA packets
338 *
339 * we allocate a linear buffer for the DMA, and split it to each packet.
340 * in a future version, a scatter-gather buffer should be implemented.
341 */
342
343 #define ATI_DESC_LIST_SIZE \
344 PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(struct atiixp_dma_desc))
345
346 /*
347 * build packets ring for the given buffer size.
348 *
349 * IXP handles the buffer descriptors, which are connected as a linked
350 * list. although we can change the list dynamically, in this version,
351 * a static RING of buffer descriptors is used.
352 *
353 * the ring is built in this function, and is set up to the hardware.
354 */
355 static int atiixp_build_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
356 struct snd_pcm_substream *substream,
357 unsigned int periods,
358 unsigned int period_bytes)
359 {
360 unsigned int i;
361 u32 addr, desc_addr;
362 unsigned long flags;
363
364 if (periods > ATI_MAX_DESCRIPTORS)
365 return -ENOMEM;
366
367 if (dma->desc_buf.area == NULL) {
368 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV,
369 snd_dma_pci_data(chip->pci),
370 ATI_DESC_LIST_SIZE,
371 &dma->desc_buf) < 0)
372 return -ENOMEM;
373 dma->period_bytes = dma->periods = 0; /* clear */
374 }
375
376 if (dma->periods == periods && dma->period_bytes == period_bytes)
377 return 0;
378
379 /* reset DMA before changing the descriptor table */
380 spin_lock_irqsave(&chip->reg_lock, flags);
381 writel(0, chip->remap_addr + dma->ops->llp_offset);
382 dma->ops->enable_dma(chip, 0);
383 dma->ops->enable_dma(chip, 1);
384 spin_unlock_irqrestore(&chip->reg_lock, flags);
385
386 /* fill the entries */
387 addr = (u32)substream->runtime->dma_addr;
388 desc_addr = (u32)dma->desc_buf.addr;
389 for (i = 0; i < periods; i++) {
390 struct atiixp_dma_desc *desc;
391 desc = &((struct atiixp_dma_desc *)dma->desc_buf.area)[i];
392 desc->addr = cpu_to_le32(addr);
393 desc->status = 0;
394 desc->size = period_bytes >> 2; /* in dwords */
395 desc_addr += sizeof(struct atiixp_dma_desc);
396 if (i == periods - 1)
397 desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
398 else
399 desc->next = cpu_to_le32(desc_addr);
400 addr += period_bytes;
401 }
402
403 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
404 chip->remap_addr + dma->ops->llp_offset);
405
406 dma->period_bytes = period_bytes;
407 dma->periods = periods;
408
409 return 0;
410 }
411
412 /*
413 * remove the ring buffer and release it if assigned
414 */
415 static void atiixp_clear_dma_packets(struct atiixp *chip, struct atiixp_dma *dma,
416 struct snd_pcm_substream *substream)
417 {
418 if (dma->desc_buf.area) {
419 writel(0, chip->remap_addr + dma->ops->llp_offset);
420 snd_dma_free_pages(&dma->desc_buf);
421 dma->desc_buf.area = NULL;
422 }
423 }
424
425 /*
426 * AC97 interface
427 */
428 static int snd_atiixp_acquire_codec(struct atiixp *chip)
429 {
430 int timeout = 1000;
431
432 while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
433 if (! timeout--) {
434 snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
435 return -EBUSY;
436 }
437 udelay(1);
438 }
439 return 0;
440 }
441
442 static unsigned short snd_atiixp_codec_read(struct atiixp *chip, unsigned short codec, unsigned short reg)
443 {
444 unsigned int data;
445 int timeout;
446
447 if (snd_atiixp_acquire_codec(chip) < 0)
448 return 0xffff;
449 data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
450 ATI_REG_PHYS_OUT_ADDR_EN |
451 ATI_REG_PHYS_OUT_RW |
452 codec;
453 atiixp_write(chip, PHYS_OUT_ADDR, data);
454 if (snd_atiixp_acquire_codec(chip) < 0)
455 return 0xffff;
456 timeout = 1000;
457 do {
458 data = atiixp_read(chip, PHYS_IN_ADDR);
459 if (data & ATI_REG_PHYS_IN_READ_FLAG)
460 return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
461 udelay(1);
462 } while (--timeout);
463 /* time out may happen during reset */
464 if (reg < 0x7c)
465 snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
466 return 0xffff;
467 }
468
469
470 static void snd_atiixp_codec_write(struct atiixp *chip, unsigned short codec,
471 unsigned short reg, unsigned short val)
472 {
473 unsigned int data;
474
475 if (snd_atiixp_acquire_codec(chip) < 0)
476 return;
477 data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
478 ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
479 ATI_REG_PHYS_OUT_ADDR_EN | codec;
480 atiixp_write(chip, PHYS_OUT_ADDR, data);
481 }
482
483
484 static unsigned short snd_atiixp_ac97_read(struct snd_ac97 *ac97,
485 unsigned short reg)
486 {
487 struct atiixp *chip = ac97->private_data;
488 return snd_atiixp_codec_read(chip, ac97->num, reg);
489
490 }
491
492 static void snd_atiixp_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
493 unsigned short val)
494 {
495 struct atiixp *chip = ac97->private_data;
496 snd_atiixp_codec_write(chip, ac97->num, reg, val);
497 }
498
499 /*
500 * reset AC link
501 */
502 static int snd_atiixp_aclink_reset(struct atiixp *chip)
503 {
504 int timeout;
505
506 /* reset powerdoewn */
507 if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
508 udelay(10);
509
510 /* perform a software reset */
511 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
512 atiixp_read(chip, CMD);
513 udelay(10);
514 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
515
516 timeout = 10;
517 while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
518 /* do a hard reset */
519 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
520 ATI_REG_CMD_AC_SYNC);
521 atiixp_read(chip, CMD);
522 mdelay(1);
523 atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
524 if (--timeout) {
525 snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
526 break;
527 }
528 }
529
530 /* deassert RESET and assert SYNC to make sure */
531 atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
532 ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
533
534 return 0;
535 }
536
537 #ifdef CONFIG_PM
538 static int snd_atiixp_aclink_down(struct atiixp *chip)
539 {
540 // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
541 // return -EBUSY;
542 atiixp_update(chip, CMD,
543 ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
544 ATI_REG_CMD_POWERDOWN);
545 return 0;
546 }
547 #endif
548
549 /*
550 * auto-detection of codecs
551 *
552 * the IXP chip can generate interrupts for the non-existing codecs.
553 * NEW_FRAME interrupt is used to make sure that the interrupt is generated
554 * even if all three codecs are connected.
555 */
556
557 #define ALL_CODEC_NOT_READY \
558 (ATI_REG_ISR_CODEC0_NOT_READY |\
559 ATI_REG_ISR_CODEC1_NOT_READY |\
560 ATI_REG_ISR_CODEC2_NOT_READY)
561 #define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
562
563 static int ac97_probing_bugs(struct pci_dev *pci)
564 {
565 const struct snd_pci_quirk *q;
566
567 q = snd_pci_quirk_lookup(pci, atiixp_quirks);
568 if (q) {
569 snd_printdd(KERN_INFO "Atiixp quirk for %s. "
570 "Forcing codec %d\n", q->name, q->value);
571 return q->value;
572 }
573 /* this hardware doesn't need workarounds. Probe for codec */
574 return -1;
575 }
576
577 static int snd_atiixp_codec_detect(struct atiixp *chip)
578 {
579 int timeout;
580
581 chip->codec_not_ready_bits = 0;
582 if (ac97_codec == -1)
583 ac97_codec = ac97_probing_bugs(chip->pci);
584 if (ac97_codec >= 0) {
585 chip->codec_not_ready_bits |=
586 CODEC_CHECK_BITS ^ (1 << (ac97_codec + 10));
587 return 0;
588 }
589
590 atiixp_write(chip, IER, CODEC_CHECK_BITS);
591 /* wait for the interrupts */
592 timeout = 50;
593 while (timeout-- > 0) {
594 mdelay(1);
595 if (chip->codec_not_ready_bits)
596 break;
597 }
598 atiixp_write(chip, IER, 0); /* disable irqs */
599
600 if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
601 snd_printk(KERN_ERR "atiixp: no codec detected!\n");
602 return -ENXIO;
603 }
604 return 0;
605 }
606
607
608 /*
609 * enable DMA and irqs
610 */
611 static int snd_atiixp_chip_start(struct atiixp *chip)
612 {
613 unsigned int reg;
614
615 /* set up spdif, enable burst mode */
616 reg = atiixp_read(chip, CMD);
617 reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
618 reg |= ATI_REG_CMD_BURST_EN;
619 atiixp_write(chip, CMD, reg);
620
621 reg = atiixp_read(chip, SPDF_CMD);
622 reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
623 atiixp_write(chip, SPDF_CMD, reg);
624
625 /* clear all interrupt source */
626 atiixp_write(chip, ISR, 0xffffffff);
627 /* enable irqs */
628 atiixp_write(chip, IER,
629 ATI_REG_IER_IO_STATUS_EN |
630 ATI_REG_IER_IN_XRUN_EN |
631 ATI_REG_IER_OUT_XRUN_EN |
632 ATI_REG_IER_SPDF_XRUN_EN |
633 ATI_REG_IER_SPDF_STATUS_EN);
634 return 0;
635 }
636
637
638 /*
639 * disable DMA and IRQs
640 */
641 static int snd_atiixp_chip_stop(struct atiixp *chip)
642 {
643 /* clear interrupt source */
644 atiixp_write(chip, ISR, atiixp_read(chip, ISR));
645 /* disable irqs */
646 atiixp_write(chip, IER, 0);
647 return 0;
648 }
649
650
651 /*
652 * PCM section
653 */
654
655 /*
656 * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
657 * position. when SG-buffer is implemented, the offset must be calculated
658 * correctly...
659 */
660 static snd_pcm_uframes_t snd_atiixp_pcm_pointer(struct snd_pcm_substream *substream)
661 {
662 struct atiixp *chip = snd_pcm_substream_chip(substream);
663 struct snd_pcm_runtime *runtime = substream->runtime;
664 struct atiixp_dma *dma = runtime->private_data;
665 unsigned int curptr;
666 int timeout = 1000;
667
668 while (timeout--) {
669 curptr = readl(chip->remap_addr + dma->ops->dt_cur);
670 if (curptr < dma->buf_addr)
671 continue;
672 curptr -= dma->buf_addr;
673 if (curptr >= dma->buf_bytes)
674 continue;
675 return bytes_to_frames(runtime, curptr);
676 }
677 snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
678 readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
679 return 0;
680 }
681
682 /*
683 * XRUN detected, and stop the PCM substream
684 */
685 static void snd_atiixp_xrun_dma(struct atiixp *chip, struct atiixp_dma *dma)
686 {
687 if (! dma->substream || ! dma->running)
688 return;
689 snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
690 snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
691 }
692
693 /*
694 * the period ack. update the substream.
695 */
696 static void snd_atiixp_update_dma(struct atiixp *chip, struct atiixp_dma *dma)
697 {
698 if (! dma->substream || ! dma->running)
699 return;
700 snd_pcm_period_elapsed(dma->substream);
701 }
702
703 /* set BUS_BUSY interrupt bit if any DMA is running */
704 /* call with spinlock held */
705 static void snd_atiixp_check_bus_busy(struct atiixp *chip)
706 {
707 unsigned int bus_busy;
708 if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
709 ATI_REG_CMD_RECEIVE_EN |
710 ATI_REG_CMD_SPDF_OUT_EN))
711 bus_busy = ATI_REG_IER_SET_BUS_BUSY;
712 else
713 bus_busy = 0;
714 atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
715 }
716
717 /* common trigger callback
718 * calling the lowlevel callbacks in it
719 */
720 static int snd_atiixp_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
721 {
722 struct atiixp *chip = snd_pcm_substream_chip(substream);
723 struct atiixp_dma *dma = substream->runtime->private_data;
724 int err = 0;
725
726 snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
727
728 spin_lock(&chip->reg_lock);
729 switch (cmd) {
730 case SNDRV_PCM_TRIGGER_START:
731 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
732 case SNDRV_PCM_TRIGGER_RESUME:
733 dma->ops->enable_transfer(chip, 1);
734 dma->running = 1;
735 dma->suspended = 0;
736 break;
737 case SNDRV_PCM_TRIGGER_STOP:
738 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
739 case SNDRV_PCM_TRIGGER_SUSPEND:
740 dma->ops->enable_transfer(chip, 0);
741 dma->running = 0;
742 dma->suspended = cmd == SNDRV_PCM_TRIGGER_SUSPEND;
743 break;
744 default:
745 err = -EINVAL;
746 break;
747 }
748 if (! err) {
749 snd_atiixp_check_bus_busy(chip);
750 if (cmd == SNDRV_PCM_TRIGGER_STOP) {
751 dma->ops->flush_dma(chip);
752 snd_atiixp_check_bus_busy(chip);
753 }
754 }
755 spin_unlock(&chip->reg_lock);
756 return err;
757 }
758
759
760 /*
761 * lowlevel callbacks for each DMA type
762 *
763 * every callback is supposed to be called in chip->reg_lock spinlock
764 */
765
766 /* flush FIFO of analog OUT DMA */
767 static void atiixp_out_flush_dma(struct atiixp *chip)
768 {
769 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
770 }
771
772 /* enable/disable analog OUT DMA */
773 static void atiixp_out_enable_dma(struct atiixp *chip, int on)
774 {
775 unsigned int data;
776 data = atiixp_read(chip, CMD);
777 if (on) {
778 if (data & ATI_REG_CMD_OUT_DMA_EN)
779 return;
780 atiixp_out_flush_dma(chip);
781 data |= ATI_REG_CMD_OUT_DMA_EN;
782 } else
783 data &= ~ATI_REG_CMD_OUT_DMA_EN;
784 atiixp_write(chip, CMD, data);
785 }
786
787 /* start/stop transfer over OUT DMA */
788 static void atiixp_out_enable_transfer(struct atiixp *chip, int on)
789 {
790 atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
791 on ? ATI_REG_CMD_SEND_EN : 0);
792 }
793
794 /* enable/disable analog IN DMA */
795 static void atiixp_in_enable_dma(struct atiixp *chip, int on)
796 {
797 atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
798 on ? ATI_REG_CMD_IN_DMA_EN : 0);
799 }
800
801 /* start/stop analog IN DMA */
802 static void atiixp_in_enable_transfer(struct atiixp *chip, int on)
803 {
804 if (on) {
805 unsigned int data = atiixp_read(chip, CMD);
806 if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
807 data |= ATI_REG_CMD_RECEIVE_EN;
808 #if 0 /* FIXME: this causes the endless loop */
809 /* wait until slot 3/4 are finished */
810 while ((atiixp_read(chip, COUNTER) &
811 ATI_REG_COUNTER_SLOT) != 5)
812 ;
813 #endif
814 atiixp_write(chip, CMD, data);
815 }
816 } else
817 atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
818 }
819
820 /* flush FIFO of analog IN DMA */
821 static void atiixp_in_flush_dma(struct atiixp *chip)
822 {
823 atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
824 }
825
826 /* enable/disable SPDIF OUT DMA */
827 static void atiixp_spdif_enable_dma(struct atiixp *chip, int on)
828 {
829 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
830 on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
831 }
832
833 /* start/stop SPDIF OUT DMA */
834 static void atiixp_spdif_enable_transfer(struct atiixp *chip, int on)
835 {
836 unsigned int data;
837 data = atiixp_read(chip, CMD);
838 if (on)
839 data |= ATI_REG_CMD_SPDF_OUT_EN;
840 else
841 data &= ~ATI_REG_CMD_SPDF_OUT_EN;
842 atiixp_write(chip, CMD, data);
843 }
844
845 /* flush FIFO of SPDIF OUT DMA */
846 static void atiixp_spdif_flush_dma(struct atiixp *chip)
847 {
848 int timeout;
849
850 /* DMA off, transfer on */
851 atiixp_spdif_enable_dma(chip, 0);
852 atiixp_spdif_enable_transfer(chip, 1);
853
854 timeout = 100;
855 do {
856 if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
857 break;
858 udelay(1);
859 } while (timeout-- > 0);
860
861 atiixp_spdif_enable_transfer(chip, 0);
862 }
863
864 /* set up slots and formats for SPDIF OUT */
865 static int snd_atiixp_spdif_prepare(struct snd_pcm_substream *substream)
866 {
867 struct atiixp *chip = snd_pcm_substream_chip(substream);
868
869 spin_lock_irq(&chip->reg_lock);
870 if (chip->spdif_over_aclink) {
871 unsigned int data;
872 /* enable slots 10/11 */
873 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
874 ATI_REG_CMD_SPDF_CONFIG_01);
875 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
876 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
877 ATI_REG_OUT_DMA_SLOT_BIT(11);
878 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
879 atiixp_write(chip, OUT_DMA_SLOT, data);
880 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
881 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
882 ATI_REG_CMD_INTERLEAVE_OUT : 0);
883 } else {
884 atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
885 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
886 }
887 spin_unlock_irq(&chip->reg_lock);
888 return 0;
889 }
890
891 /* set up slots and formats for analog OUT */
892 static int snd_atiixp_playback_prepare(struct snd_pcm_substream *substream)
893 {
894 struct atiixp *chip = snd_pcm_substream_chip(substream);
895 unsigned int data;
896
897 spin_lock_irq(&chip->reg_lock);
898 data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
899 switch (substream->runtime->channels) {
900 case 8:
901 data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
902 ATI_REG_OUT_DMA_SLOT_BIT(11);
903 /* fallthru */
904 case 6:
905 data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
906 ATI_REG_OUT_DMA_SLOT_BIT(8);
907 /* fallthru */
908 case 4:
909 data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
910 ATI_REG_OUT_DMA_SLOT_BIT(9);
911 /* fallthru */
912 default:
913 data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
914 ATI_REG_OUT_DMA_SLOT_BIT(4);
915 break;
916 }
917
918 /* set output threshold */
919 data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
920 atiixp_write(chip, OUT_DMA_SLOT, data);
921
922 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
923 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
924 ATI_REG_CMD_INTERLEAVE_OUT : 0);
925
926 /*
927 * enable 6 channel re-ordering bit if needed
928 */
929 atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
930 substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
931
932 spin_unlock_irq(&chip->reg_lock);
933 return 0;
934 }
935
936 /* set up slots and formats for analog IN */
937 static int snd_atiixp_capture_prepare(struct snd_pcm_substream *substream)
938 {
939 struct atiixp *chip = snd_pcm_substream_chip(substream);
940
941 spin_lock_irq(&chip->reg_lock);
942 atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
943 substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
944 ATI_REG_CMD_INTERLEAVE_IN : 0);
945 spin_unlock_irq(&chip->reg_lock);
946 return 0;
947 }
948
949 /*
950 * hw_params - allocate the buffer and set up buffer descriptors
951 */
952 static int snd_atiixp_pcm_hw_params(struct snd_pcm_substream *substream,
953 struct snd_pcm_hw_params *hw_params)
954 {
955 struct atiixp *chip = snd_pcm_substream_chip(substream);
956 struct atiixp_dma *dma = substream->runtime->private_data;
957 int err;
958
959 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
960 if (err < 0)
961 return err;
962 dma->buf_addr = substream->runtime->dma_addr;
963 dma->buf_bytes = params_buffer_bytes(hw_params);
964
965 err = atiixp_build_dma_packets(chip, dma, substream,
966 params_periods(hw_params),
967 params_period_bytes(hw_params));
968 if (err < 0)
969 return err;
970
971 if (dma->ac97_pcm_type >= 0) {
972 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
973 /* PCM is bound to AC97 codec(s)
974 * set up the AC97 codecs
975 */
976 if (dma->pcm_open_flag) {
977 snd_ac97_pcm_close(pcm);
978 dma->pcm_open_flag = 0;
979 }
980 err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
981 params_channels(hw_params),
982 pcm->r[0].slots);
983 if (err >= 0)
984 dma->pcm_open_flag = 1;
985 }
986
987 return err;
988 }
989
990 static int snd_atiixp_pcm_hw_free(struct snd_pcm_substream *substream)
991 {
992 struct atiixp *chip = snd_pcm_substream_chip(substream);
993 struct atiixp_dma *dma = substream->runtime->private_data;
994
995 if (dma->pcm_open_flag) {
996 struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
997 snd_ac97_pcm_close(pcm);
998 dma->pcm_open_flag = 0;
999 }
1000 atiixp_clear_dma_packets(chip, dma, substream);
1001 snd_pcm_lib_free_pages(substream);
1002 return 0;
1003 }
1004
1005
1006 /*
1007 * pcm hardware definition, identical for all DMA types
1008 */
1009 static struct snd_pcm_hardware snd_atiixp_pcm_hw =
1010 {
1011 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1012 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1013 SNDRV_PCM_INFO_PAUSE |
1014 SNDRV_PCM_INFO_RESUME |
1015 SNDRV_PCM_INFO_MMAP_VALID),
1016 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
1017 .rates = SNDRV_PCM_RATE_48000,
1018 .rate_min = 48000,
1019 .rate_max = 48000,
1020 .channels_min = 2,
1021 .channels_max = 2,
1022 .buffer_bytes_max = 256 * 1024,
1023 .period_bytes_min = 32,
1024 .period_bytes_max = 128 * 1024,
1025 .periods_min = 2,
1026 .periods_max = ATI_MAX_DESCRIPTORS,
1027 };
1028
1029 static int snd_atiixp_pcm_open(struct snd_pcm_substream *substream,
1030 struct atiixp_dma *dma, int pcm_type)
1031 {
1032 struct atiixp *chip = snd_pcm_substream_chip(substream);
1033 struct snd_pcm_runtime *runtime = substream->runtime;
1034 int err;
1035
1036 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1037
1038 if (dma->opened)
1039 return -EBUSY;
1040 dma->substream = substream;
1041 runtime->hw = snd_atiixp_pcm_hw;
1042 dma->ac97_pcm_type = pcm_type;
1043 if (pcm_type >= 0) {
1044 runtime->hw.rates = chip->pcms[pcm_type]->rates;
1045 snd_pcm_limit_hw_rates(runtime);
1046 } else {
1047 /* direct SPDIF */
1048 runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
1049 }
1050 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
1051 return err;
1052 runtime->private_data = dma;
1053
1054 /* enable DMA bits */
1055 spin_lock_irq(&chip->reg_lock);
1056 dma->ops->enable_dma(chip, 1);
1057 spin_unlock_irq(&chip->reg_lock);
1058 dma->opened = 1;
1059
1060 return 0;
1061 }
1062
1063 static int snd_atiixp_pcm_close(struct snd_pcm_substream *substream,
1064 struct atiixp_dma *dma)
1065 {
1066 struct atiixp *chip = snd_pcm_substream_chip(substream);
1067 /* disable DMA bits */
1068 snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
1069 spin_lock_irq(&chip->reg_lock);
1070 dma->ops->enable_dma(chip, 0);
1071 spin_unlock_irq(&chip->reg_lock);
1072 dma->substream = NULL;
1073 dma->opened = 0;
1074 return 0;
1075 }
1076
1077 /*
1078 */
1079 static int snd_atiixp_playback_open(struct snd_pcm_substream *substream)
1080 {
1081 struct atiixp *chip = snd_pcm_substream_chip(substream);
1082 int err;
1083
1084 mutex_lock(&chip->open_mutex);
1085 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
1086 mutex_unlock(&chip->open_mutex);
1087 if (err < 0)
1088 return err;
1089 substream->runtime->hw.channels_max = chip->max_channels;
1090 if (chip->max_channels > 2)
1091 /* channels must be even */
1092 snd_pcm_hw_constraint_step(substream->runtime, 0,
1093 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1094 return 0;
1095 }
1096
1097 static int snd_atiixp_playback_close(struct snd_pcm_substream *substream)
1098 {
1099 struct atiixp *chip = snd_pcm_substream_chip(substream);
1100 int err;
1101 mutex_lock(&chip->open_mutex);
1102 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1103 mutex_unlock(&chip->open_mutex);
1104 return err;
1105 }
1106
1107 static int snd_atiixp_capture_open(struct snd_pcm_substream *substream)
1108 {
1109 struct atiixp *chip = snd_pcm_substream_chip(substream);
1110 return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
1111 }
1112
1113 static int snd_atiixp_capture_close(struct snd_pcm_substream *substream)
1114 {
1115 struct atiixp *chip = snd_pcm_substream_chip(substream);
1116 return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
1117 }
1118
1119 static int snd_atiixp_spdif_open(struct snd_pcm_substream *substream)
1120 {
1121 struct atiixp *chip = snd_pcm_substream_chip(substream);
1122 int err;
1123 mutex_lock(&chip->open_mutex);
1124 if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
1125 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
1126 else
1127 err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
1128 mutex_unlock(&chip->open_mutex);
1129 return err;
1130 }
1131
1132 static int snd_atiixp_spdif_close(struct snd_pcm_substream *substream)
1133 {
1134 struct atiixp *chip = snd_pcm_substream_chip(substream);
1135 int err;
1136 mutex_lock(&chip->open_mutex);
1137 if (chip->spdif_over_aclink)
1138 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
1139 else
1140 err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
1141 mutex_unlock(&chip->open_mutex);
1142 return err;
1143 }
1144
1145 /* AC97 playback */
1146 static struct snd_pcm_ops snd_atiixp_playback_ops = {
1147 .open = snd_atiixp_playback_open,
1148 .close = snd_atiixp_playback_close,
1149 .ioctl = snd_pcm_lib_ioctl,
1150 .hw_params = snd_atiixp_pcm_hw_params,
1151 .hw_free = snd_atiixp_pcm_hw_free,
1152 .prepare = snd_atiixp_playback_prepare,
1153 .trigger = snd_atiixp_pcm_trigger,
1154 .pointer = snd_atiixp_pcm_pointer,
1155 };
1156
1157 /* AC97 capture */
1158 static struct snd_pcm_ops snd_atiixp_capture_ops = {
1159 .open = snd_atiixp_capture_open,
1160 .close = snd_atiixp_capture_close,
1161 .ioctl = snd_pcm_lib_ioctl,
1162 .hw_params = snd_atiixp_pcm_hw_params,
1163 .hw_free = snd_atiixp_pcm_hw_free,
1164 .prepare = snd_atiixp_capture_prepare,
1165 .trigger = snd_atiixp_pcm_trigger,
1166 .pointer = snd_atiixp_pcm_pointer,
1167 };
1168
1169 /* SPDIF playback */
1170 static struct snd_pcm_ops snd_atiixp_spdif_ops = {
1171 .open = snd_atiixp_spdif_open,
1172 .close = snd_atiixp_spdif_close,
1173 .ioctl = snd_pcm_lib_ioctl,
1174 .hw_params = snd_atiixp_pcm_hw_params,
1175 .hw_free = snd_atiixp_pcm_hw_free,
1176 .prepare = snd_atiixp_spdif_prepare,
1177 .trigger = snd_atiixp_pcm_trigger,
1178 .pointer = snd_atiixp_pcm_pointer,
1179 };
1180
1181 static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
1182 /* front PCM */
1183 {
1184 .exclusive = 1,
1185 .r = { {
1186 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1187 (1 << AC97_SLOT_PCM_RIGHT) |
1188 (1 << AC97_SLOT_PCM_CENTER) |
1189 (1 << AC97_SLOT_PCM_SLEFT) |
1190 (1 << AC97_SLOT_PCM_SRIGHT) |
1191 (1 << AC97_SLOT_LFE)
1192 }
1193 }
1194 },
1195 /* PCM IN #1 */
1196 {
1197 .stream = 1,
1198 .exclusive = 1,
1199 .r = { {
1200 .slots = (1 << AC97_SLOT_PCM_LEFT) |
1201 (1 << AC97_SLOT_PCM_RIGHT)
1202 }
1203 }
1204 },
1205 /* S/PDIF OUT (optional) */
1206 {
1207 .exclusive = 1,
1208 .spdif = 1,
1209 .r = { {
1210 .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
1211 (1 << AC97_SLOT_SPDIF_RIGHT2)
1212 }
1213 }
1214 },
1215 };
1216
1217 static struct atiixp_dma_ops snd_atiixp_playback_dma_ops = {
1218 .type = ATI_DMA_PLAYBACK,
1219 .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
1220 .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
1221 .enable_dma = atiixp_out_enable_dma,
1222 .enable_transfer = atiixp_out_enable_transfer,
1223 .flush_dma = atiixp_out_flush_dma,
1224 };
1225
1226 static struct atiixp_dma_ops snd_atiixp_capture_dma_ops = {
1227 .type = ATI_DMA_CAPTURE,
1228 .llp_offset = ATI_REG_IN_DMA_LINKPTR,
1229 .dt_cur = ATI_REG_IN_DMA_DT_CUR,
1230 .enable_dma = atiixp_in_enable_dma,
1231 .enable_transfer = atiixp_in_enable_transfer,
1232 .flush_dma = atiixp_in_flush_dma,
1233 };
1234
1235 static struct atiixp_dma_ops snd_atiixp_spdif_dma_ops = {
1236 .type = ATI_DMA_SPDIF,
1237 .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
1238 .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
1239 .enable_dma = atiixp_spdif_enable_dma,
1240 .enable_transfer = atiixp_spdif_enable_transfer,
1241 .flush_dma = atiixp_spdif_flush_dma,
1242 };
1243
1244
1245 static int __devinit snd_atiixp_pcm_new(struct atiixp *chip)
1246 {
1247 struct snd_pcm *pcm;
1248 struct snd_ac97_bus *pbus = chip->ac97_bus;
1249 int err, i, num_pcms;
1250
1251 /* initialize constants */
1252 chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
1253 chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
1254 if (! chip->spdif_over_aclink)
1255 chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
1256
1257 /* assign AC97 pcm */
1258 if (chip->spdif_over_aclink)
1259 num_pcms = 3;
1260 else
1261 num_pcms = 2;
1262 err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
1263 if (err < 0)
1264 return err;
1265 for (i = 0; i < num_pcms; i++)
1266 chip->pcms[i] = &pbus->pcms[i];
1267
1268 chip->max_channels = 2;
1269 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
1270 if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
1271 chip->max_channels = 6;
1272 else
1273 chip->max_channels = 4;
1274 }
1275
1276 /* PCM #0: analog I/O */
1277 err = snd_pcm_new(chip->card, "ATI IXP AC97",
1278 ATI_PCMDEV_ANALOG, 1, 1, &pcm);
1279 if (err < 0)
1280 return err;
1281 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
1282 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
1283 pcm->private_data = chip;
1284 strcpy(pcm->name, "ATI IXP AC97");
1285 chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
1286
1287 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1288 snd_dma_pci_data(chip->pci),
1289 64*1024, 128*1024);
1290
1291 /* no SPDIF support on codec? */
1292 if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
1293 return 0;
1294
1295 /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
1296 if (chip->pcms[ATI_PCM_SPDIF])
1297 chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
1298
1299 /* PCM #1: spdif playback */
1300 err = snd_pcm_new(chip->card, "ATI IXP IEC958",
1301 ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
1302 if (err < 0)
1303 return err;
1304 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
1305 pcm->private_data = chip;
1306 if (chip->spdif_over_aclink)
1307 strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
1308 else
1309 strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
1310 chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
1311
1312 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1313 snd_dma_pci_data(chip->pci),
1314 64*1024, 128*1024);
1315
1316 /* pre-select AC97 SPDIF slots 10/11 */
1317 for (i = 0; i < NUM_ATI_CODECS; i++) {
1318 if (chip->ac97[i])
1319 snd_ac97_update_bits(chip->ac97[i],
1320 AC97_EXTENDED_STATUS,
1321 0x03 << 4, 0x03 << 4);
1322 }
1323
1324 return 0;
1325 }
1326
1327
1328
1329 /*
1330 * interrupt handler
1331 */
1332 static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id)
1333 {
1334 struct atiixp *chip = dev_id;
1335 unsigned int status;
1336
1337 status = atiixp_read(chip, ISR);
1338
1339 if (! status)
1340 return IRQ_NONE;
1341
1342 /* process audio DMA */
1343 if (status & ATI_REG_ISR_OUT_XRUN)
1344 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1345 else if (status & ATI_REG_ISR_OUT_STATUS)
1346 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
1347 if (status & ATI_REG_ISR_IN_XRUN)
1348 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1349 else if (status & ATI_REG_ISR_IN_STATUS)
1350 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
1351 if (! chip->spdif_over_aclink) {
1352 if (status & ATI_REG_ISR_SPDF_XRUN)
1353 snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1354 else if (status & ATI_REG_ISR_SPDF_STATUS)
1355 snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
1356 }
1357
1358 /* for codec detection */
1359 if (status & CODEC_CHECK_BITS) {
1360 unsigned int detected;
1361 detected = status & CODEC_CHECK_BITS;
1362 spin_lock(&chip->reg_lock);
1363 chip->codec_not_ready_bits |= detected;
1364 atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
1365 spin_unlock(&chip->reg_lock);
1366 }
1367
1368 /* ack */
1369 atiixp_write(chip, ISR, status);
1370
1371 return IRQ_HANDLED;
1372 }
1373
1374
1375 /*
1376 * ac97 mixer section
1377 */
1378
1379 static struct ac97_quirk ac97_quirks[] __devinitdata = {
1380 {
1381 .subvendor = 0x103c,
1382 .subdevice = 0x006b,
1383 .name = "HP Pavilion ZV5030US",
1384 .type = AC97_TUNE_MUTE_LED
1385 },
1386 {
1387 .subvendor = 0x103c,
1388 .subdevice = 0x308b,
1389 .name = "HP nx6125",
1390 .type = AC97_TUNE_MUTE_LED
1391 },
1392 { } /* terminator */
1393 };
1394
1395 static int __devinit snd_atiixp_mixer_new(struct atiixp *chip, int clock,
1396 const char *quirk_override)
1397 {
1398 struct snd_ac97_bus *pbus;
1399 struct snd_ac97_template ac97;
1400 int i, err;
1401 int codec_count;
1402 static struct snd_ac97_bus_ops ops = {
1403 .write = snd_atiixp_ac97_write,
1404 .read = snd_atiixp_ac97_read,
1405 };
1406 static unsigned int codec_skip[NUM_ATI_CODECS] = {
1407 ATI_REG_ISR_CODEC0_NOT_READY,
1408 ATI_REG_ISR_CODEC1_NOT_READY,
1409 ATI_REG_ISR_CODEC2_NOT_READY,
1410 };
1411
1412 if (snd_atiixp_codec_detect(chip) < 0)
1413 return -ENXIO;
1414
1415 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
1416 return err;
1417 pbus->clock = clock;
1418 chip->ac97_bus = pbus;
1419
1420 codec_count = 0;
1421 for (i = 0; i < NUM_ATI_CODECS; i++) {
1422 if (chip->codec_not_ready_bits & codec_skip[i])
1423 continue;
1424 memset(&ac97, 0, sizeof(ac97));
1425 ac97.private_data = chip;
1426 ac97.pci = chip->pci;
1427 ac97.num = i;
1428 ac97.scaps = AC97_SCAP_SKIP_MODEM | AC97_SCAP_POWER_SAVE;
1429 if (! chip->spdif_over_aclink)
1430 ac97.scaps |= AC97_SCAP_NO_SPDIF;
1431 if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
1432 chip->ac97[i] = NULL; /* to be sure */
1433 snd_printdd("atiixp: codec %d not available for audio\n", i);
1434 continue;
1435 }
1436 codec_count++;
1437 }
1438
1439 if (! codec_count) {
1440 snd_printk(KERN_ERR "atiixp: no codec available\n");
1441 return -ENODEV;
1442 }
1443
1444 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
1445
1446 return 0;
1447 }
1448
1449
1450 #ifdef CONFIG_PM
1451 /*
1452 * power management
1453 */
1454 static int snd_atiixp_suspend(struct pci_dev *pci, pm_message_t state)
1455 {
1456 struct snd_card *card = pci_get_drvdata(pci);
1457 struct atiixp *chip = card->private_data;
1458 int i;
1459
1460 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1461 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1462 if (chip->pcmdevs[i]) {
1463 struct atiixp_dma *dma = &chip->dmas[i];
1464 if (dma->substream && dma->running)
1465 dma->saved_curptr = readl(chip->remap_addr +
1466 dma->ops->dt_cur);
1467 snd_pcm_suspend_all(chip->pcmdevs[i]);
1468 }
1469 for (i = 0; i < NUM_ATI_CODECS; i++)
1470 snd_ac97_suspend(chip->ac97[i]);
1471 snd_atiixp_aclink_down(chip);
1472 snd_atiixp_chip_stop(chip);
1473
1474 pci_disable_device(pci);
1475 pci_save_state(pci);
1476 pci_set_power_state(pci, pci_choose_state(pci, state));
1477 return 0;
1478 }
1479
1480 static int snd_atiixp_resume(struct pci_dev *pci)
1481 {
1482 struct snd_card *card = pci_get_drvdata(pci);
1483 struct atiixp *chip = card->private_data;
1484 int i;
1485
1486 pci_set_power_state(pci, PCI_D0);
1487 pci_restore_state(pci);
1488 if (pci_enable_device(pci) < 0) {
1489 printk(KERN_ERR "atiixp: pci_enable_device failed, "
1490 "disabling device\n");
1491 snd_card_disconnect(card);
1492 return -EIO;
1493 }
1494 pci_set_master(pci);
1495
1496 snd_atiixp_aclink_reset(chip);
1497 snd_atiixp_chip_start(chip);
1498
1499 for (i = 0; i < NUM_ATI_CODECS; i++)
1500 snd_ac97_resume(chip->ac97[i]);
1501
1502 for (i = 0; i < NUM_ATI_PCMDEVS; i++)
1503 if (chip->pcmdevs[i]) {
1504 struct atiixp_dma *dma = &chip->dmas[i];
1505 if (dma->substream && dma->suspended) {
1506 dma->ops->enable_dma(chip, 1);
1507 dma->substream->ops->prepare(dma->substream);
1508 writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
1509 chip->remap_addr + dma->ops->llp_offset);
1510 writel(dma->saved_curptr, chip->remap_addr +
1511 dma->ops->dt_cur);
1512 }
1513 }
1514
1515 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1516 return 0;
1517 }
1518 #endif /* CONFIG_PM */
1519
1520
1521 #ifdef CONFIG_PROC_FS
1522 /*
1523 * proc interface for register dump
1524 */
1525
1526 static void snd_atiixp_proc_read(struct snd_info_entry *entry,
1527 struct snd_info_buffer *buffer)
1528 {
1529 struct atiixp *chip = entry->private_data;
1530 int i;
1531
1532 for (i = 0; i < 256; i += 4)
1533 snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
1534 }
1535
1536 static void __devinit snd_atiixp_proc_init(struct atiixp *chip)
1537 {
1538 struct snd_info_entry *entry;
1539
1540 if (! snd_card_proc_new(chip->card, "atiixp", &entry))
1541 snd_info_set_text_ops(entry, chip, snd_atiixp_proc_read);
1542 }
1543 #else /* !CONFIG_PROC_FS */
1544 #define snd_atiixp_proc_init(chip)
1545 #endif
1546
1547
1548 /*
1549 * destructor
1550 */
1551
1552 static int snd_atiixp_free(struct atiixp *chip)
1553 {
1554 if (chip->irq < 0)
1555 goto __hw_end;
1556 snd_atiixp_chip_stop(chip);
1557 synchronize_irq(chip->irq);
1558 __hw_end:
1559 if (chip->irq >= 0)
1560 free_irq(chip->irq, chip);
1561 if (chip->remap_addr)
1562 iounmap(chip->remap_addr);
1563 pci_release_regions(chip->pci);
1564 pci_disable_device(chip->pci);
1565 kfree(chip);
1566 return 0;
1567 }
1568
1569 static int snd_atiixp_dev_free(struct snd_device *device)
1570 {
1571 struct atiixp *chip = device->device_data;
1572 return snd_atiixp_free(chip);
1573 }
1574
1575 /*
1576 * constructor for chip instance
1577 */
1578 static int __devinit snd_atiixp_create(struct snd_card *card,
1579 struct pci_dev *pci,
1580 struct atiixp **r_chip)
1581 {
1582 static struct snd_device_ops ops = {
1583 .dev_free = snd_atiixp_dev_free,
1584 };
1585 struct atiixp *chip;
1586 int err;
1587
1588 if ((err = pci_enable_device(pci)) < 0)
1589 return err;
1590
1591 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1592 if (chip == NULL) {
1593 pci_disable_device(pci);
1594 return -ENOMEM;
1595 }
1596
1597 spin_lock_init(&chip->reg_lock);
1598 mutex_init(&chip->open_mutex);
1599 chip->card = card;
1600 chip->pci = pci;
1601 chip->irq = -1;
1602 if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
1603 pci_disable_device(pci);
1604 kfree(chip);
1605 return err;
1606 }
1607 chip->addr = pci_resource_start(pci, 0);
1608 chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
1609 if (chip->remap_addr == NULL) {
1610 snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
1611 snd_atiixp_free(chip);
1612 return -EIO;
1613 }
1614
1615 if (request_irq(pci->irq, snd_atiixp_interrupt, IRQF_SHARED,
1616 card->shortname, chip)) {
1617 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1618 snd_atiixp_free(chip);
1619 return -EBUSY;
1620 }
1621 chip->irq = pci->irq;
1622 pci_set_master(pci);
1623 synchronize_irq(chip->irq);
1624
1625 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1626 snd_atiixp_free(chip);
1627 return err;
1628 }
1629
1630 snd_card_set_dev(card, &pci->dev);
1631
1632 *r_chip = chip;
1633 return 0;
1634 }
1635
1636
1637 static int __devinit snd_atiixp_probe(struct pci_dev *pci,
1638 const struct pci_device_id *pci_id)
1639 {
1640 struct snd_card *card;
1641 struct atiixp *chip;
1642 int err;
1643
1644 card = snd_card_new(index, id, THIS_MODULE, 0);
1645 if (card == NULL)
1646 return -ENOMEM;
1647
1648 strcpy(card->driver, spdif_aclink ? "ATIIXP" : "ATIIXP-SPDMA");
1649 strcpy(card->shortname, "ATI IXP");
1650 if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
1651 goto __error;
1652 card->private_data = chip;
1653
1654 if ((err = snd_atiixp_aclink_reset(chip)) < 0)
1655 goto __error;
1656
1657 chip->spdif_over_aclink = spdif_aclink;
1658
1659 if ((err = snd_atiixp_mixer_new(chip, ac97_clock, ac97_quirk)) < 0)
1660 goto __error;
1661
1662 if ((err = snd_atiixp_pcm_new(chip)) < 0)
1663 goto __error;
1664
1665 snd_atiixp_proc_init(chip);
1666
1667 snd_atiixp_chip_start(chip);
1668
1669 snprintf(card->longname, sizeof(card->longname),
1670 "%s rev %x with %s at %#lx, irq %i", card->shortname,
1671 pci->revision,
1672 chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
1673 chip->addr, chip->irq);
1674
1675 if ((err = snd_card_register(card)) < 0)
1676 goto __error;
1677
1678 pci_set_drvdata(pci, card);
1679 return 0;
1680
1681 __error:
1682 snd_card_free(card);
1683 return err;
1684 }
1685
1686 static void __devexit snd_atiixp_remove(struct pci_dev *pci)
1687 {
1688 snd_card_free(pci_get_drvdata(pci));
1689 pci_set_drvdata(pci, NULL);
1690 }
1691
1692 static struct pci_driver driver = {
1693 .name = "ATI IXP AC97 controller",
1694 .id_table = snd_atiixp_ids,
1695 .probe = snd_atiixp_probe,
1696 .remove = __devexit_p(snd_atiixp_remove),
1697 #ifdef CONFIG_PM
1698 .suspend = snd_atiixp_suspend,
1699 .resume = snd_atiixp_resume,
1700 #endif
1701 };
1702
1703
1704 static int __init alsa_card_atiixp_init(void)
1705 {
1706 return pci_register_driver(&driver);
1707 }
1708
1709 static void __exit alsa_card_atiixp_exit(void)
1710 {
1711 pci_unregister_driver(&driver);
1712 }
1713
1714 module_init(alsa_card_atiixp_init)
1715 module_exit(alsa_card_atiixp_exit)
WRT350N Kernel Patches