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x86: 64-bit, add the new split_large_page() function
[wrt350n-kernel.git] / sound / pci / ice1712 / ice1712.c
blob052fc3cb32728b8cedb712370ca8e61eec0aad41
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <sound/driver.h>
51 #include <asm/io.h>
52 #include <linux/delay.h>
53 #include <linux/interrupt.h>
54 #include <linux/init.h>
55 #include <linux/pci.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/slab.h>
58 #include <linux/moduleparam.h>
59 #include <linux/mutex.h>
60
61 #include <sound/core.h>
62 #include <sound/cs8427.h>
63 #include <sound/info.h>
64 #include <sound/initval.h>
65 #include <sound/tlv.h>
66
67 #include <sound/asoundef.h>
68
69 #include "ice1712.h"
70
71 /* lowlevel routines */
72 #include "delta.h"
73 #include "ews.h"
74 #include "hoontech.h"
75
76 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
77 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
78 MODULE_LICENSE("GPL");
79 MODULE_SUPPORTED_DEVICE("{"
80 HOONTECH_DEVICE_DESC
81 DELTA_DEVICE_DESC
82 EWS_DEVICE_DESC
83 "{ICEnsemble,Generic ICE1712},"
84 "{ICEnsemble,Generic Envy24}}");
85
86 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
87 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
88 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
89 static char *model[SNDRV_CARDS];
90 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
91 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */
92 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
93
94 module_param_array(index, int, NULL, 0444);
95 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
96 module_param_array(id, charp, NULL, 0444);
97 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
98 module_param_array(enable, bool, NULL, 0444);
99 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
100 module_param_array(omni, bool, NULL, 0444);
101 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
102 module_param_array(cs8427_timeout, int, NULL, 0444);
103 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
104 module_param_array(model, charp, NULL, 0444);
105 MODULE_PARM_DESC(model, "Use the given board model.");
106 module_param_array(dxr_enable, int, NULL, 0444);
107 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
108
109
110 static const struct pci_device_id snd_ice1712_ids[] = {
111 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */
112 { 0, }
113 };
114
115 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
116
117 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
118 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
119
120 static int PRO_RATE_LOCKED;
121 static int PRO_RATE_RESET = 1;
122 static unsigned int PRO_RATE_DEFAULT = 44100;
123
124 /*
125 * Basic I/O
126 */
127
128 /* check whether the clock mode is spdif-in */
129 static inline int is_spdif_master(struct snd_ice1712 *ice)
130 {
131 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
132 }
133
134 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
135 {
136 return is_spdif_master(ice) || PRO_RATE_LOCKED;
137 }
138
139 static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data)
140 {
141 outb((channel << 4) | addr, ICEDS(ice, INDEX));
142 outl(data, ICEDS(ice, DATA));
143 }
144
145 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr)
146 {
147 outb((channel << 4) | addr, ICEDS(ice, INDEX));
148 return inl(ICEDS(ice, DATA));
149 }
150
151 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
152 unsigned short reg,
153 unsigned short val)
154 {
155 struct snd_ice1712 *ice = ac97->private_data;
156 int tm;
157 unsigned char old_cmd = 0;
158
159 for (tm = 0; tm < 0x10000; tm++) {
160 old_cmd = inb(ICEREG(ice, AC97_CMD));
161 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
162 continue;
163 if (!(old_cmd & ICE1712_AC97_READY))
164 continue;
165 break;
166 }
167 outb(reg, ICEREG(ice, AC97_INDEX));
168 outw(val, ICEREG(ice, AC97_DATA));
169 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
170 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
171 for (tm = 0; tm < 0x10000; tm++)
172 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
173 break;
174 }
175
176 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
177 unsigned short reg)
178 {
179 struct snd_ice1712 *ice = ac97->private_data;
180 int tm;
181 unsigned char old_cmd = 0;
182
183 for (tm = 0; tm < 0x10000; tm++) {
184 old_cmd = inb(ICEREG(ice, AC97_CMD));
185 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
186 continue;
187 if (!(old_cmd & ICE1712_AC97_READY))
188 continue;
189 break;
190 }
191 outb(reg, ICEREG(ice, AC97_INDEX));
192 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
193 for (tm = 0; tm < 0x10000; tm++)
194 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
195 break;
196 if (tm >= 0x10000) /* timeout */
197 return ~0;
198 return inw(ICEREG(ice, AC97_DATA));
199 }
200
201 /*
202 * pro ac97 section
203 */
204
205 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
206 unsigned short reg,
207 unsigned short val)
208 {
209 struct snd_ice1712 *ice = ac97->private_data;
210 int tm;
211 unsigned char old_cmd = 0;
212
213 for (tm = 0; tm < 0x10000; tm++) {
214 old_cmd = inb(ICEMT(ice, AC97_CMD));
215 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
216 continue;
217 if (!(old_cmd & ICE1712_AC97_READY))
218 continue;
219 break;
220 }
221 outb(reg, ICEMT(ice, AC97_INDEX));
222 outw(val, ICEMT(ice, AC97_DATA));
223 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
224 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
225 for (tm = 0; tm < 0x10000; tm++)
226 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
227 break;
228 }
229
230
231 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
232 unsigned short reg)
233 {
234 struct snd_ice1712 *ice = ac97->private_data;
235 int tm;
236 unsigned char old_cmd = 0;
237
238 for (tm = 0; tm < 0x10000; tm++) {
239 old_cmd = inb(ICEMT(ice, AC97_CMD));
240 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
241 continue;
242 if (!(old_cmd & ICE1712_AC97_READY))
243 continue;
244 break;
245 }
246 outb(reg, ICEMT(ice, AC97_INDEX));
247 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
248 for (tm = 0; tm < 0x10000; tm++)
249 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
250 break;
251 if (tm >= 0x10000) /* timeout */
252 return ~0;
253 return inw(ICEMT(ice, AC97_DATA));
254 }
255
256 /*
257 * consumer ac97 digital mix
258 */
259 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
260
261 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
262 {
263 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
264
265 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
266 return 0;
267 }
268
269 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
270 {
271 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
272 unsigned char val, nval;
273
274 spin_lock_irq(&ice->reg_lock);
275 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
276 nval = val & ~ICE1712_ROUTE_AC97;
277 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97;
278 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
279 spin_unlock_irq(&ice->reg_lock);
280 return val != nval;
281 }
282
283 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = {
284 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
285 .name = "Digital Mixer To AC97",
286 .info = snd_ice1712_digmix_route_ac97_info,
287 .get = snd_ice1712_digmix_route_ac97_get,
288 .put = snd_ice1712_digmix_route_ac97_put,
289 };
290
291
292 /*
293 * gpio operations
294 */
295 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
296 {
297 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
298 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
299 }
300
301 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
302 {
303 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
304 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
305 }
306
307 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
308 {
309 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
310 }
311
312 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
313 {
314 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
315 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
316 }
317
318 /*
319 *
320 * CS8427 interface
321 *
322 */
323
324 /*
325 * change the input clock selection
326 * spdif_clock = 1 - IEC958 input, 0 - Envy24
327 */
328 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
329 {
330 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
331 unsigned char val, nval;
332 int res = 0;
333
334 snd_i2c_lock(ice->i2c);
335 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
336 snd_i2c_unlock(ice->i2c);
337 return -EIO;
338 }
339 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
340 snd_i2c_unlock(ice->i2c);
341 return -EIO;
342 }
343 nval = val & 0xf0;
344 if (spdif_clock)
345 nval |= 0x01;
346 else
347 nval |= 0x04;
348 if (val != nval) {
349 reg[1] = nval;
350 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
351 res = -EIO;
352 } else {
353 res++;
354 }
355 }
356 snd_i2c_unlock(ice->i2c);
357 return res;
358 }
359
360 /*
361 * spdif callbacks
362 */
363 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
364 {
365 snd_cs8427_iec958_active(ice->cs8427, 1);
366 }
367
368 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
369 {
370 snd_cs8427_iec958_active(ice->cs8427, 0);
371 }
372
373 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
374 {
375 snd_cs8427_iec958_pcm(ice->cs8427, rate);
376 }
377
378 /*
379 * create and initialize callbacks for cs8427 interface
380 */
381 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
382 {
383 int err;
384
385 if ((err = snd_cs8427_create(ice->i2c, addr,
386 (ice->cs8427_timeout * HZ) / 1000,
387 &ice->cs8427)) < 0) {
388 snd_printk(KERN_ERR "CS8427 initialization failed\n");
389 return err;
390 }
391 ice->spdif.ops.open = open_cs8427;
392 ice->spdif.ops.close = close_cs8427;
393 ice->spdif.ops.setup_rate = setup_cs8427;
394 return 0;
395 }
396
397 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
398 {
399 /* change CS8427 clock source too */
400 if (ice->cs8427)
401 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
402 /* notify ak4524 chip as well */
403 if (spdif_is_master) {
404 unsigned int i;
405 for (i = 0; i < ice->akm_codecs; i++) {
406 if (ice->akm[i].ops.set_rate_val)
407 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
408 }
409 }
410 }
411
412 /*
413 * Interrupt handler
414 */
415
416 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
417 {
418 struct snd_ice1712 *ice = dev_id;
419 unsigned char status;
420 int handled = 0;
421
422 while (1) {
423 status = inb(ICEREG(ice, IRQSTAT));
424 if (status == 0)
425 break;
426 handled = 1;
427 if (status & ICE1712_IRQ_MPU1) {
428 if (ice->rmidi[0])
429 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
430 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
431 status &= ~ICE1712_IRQ_MPU1;
432 }
433 if (status & ICE1712_IRQ_TIMER)
434 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
435 if (status & ICE1712_IRQ_MPU2) {
436 if (ice->rmidi[1])
437 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
438 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
439 status &= ~ICE1712_IRQ_MPU2;
440 }
441 if (status & ICE1712_IRQ_PROPCM) {
442 unsigned char mtstat = inb(ICEMT(ice, IRQ));
443 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
444 if (ice->playback_pro_substream)
445 snd_pcm_period_elapsed(ice->playback_pro_substream);
446 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
447 }
448 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
449 if (ice->capture_pro_substream)
450 snd_pcm_period_elapsed(ice->capture_pro_substream);
451 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
452 }
453 }
454 if (status & ICE1712_IRQ_FM)
455 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
456 if (status & ICE1712_IRQ_PBKDS) {
457 u32 idx;
458 u16 pbkstatus;
459 struct snd_pcm_substream *substream;
460 pbkstatus = inw(ICEDS(ice, INTSTAT));
461 //printk("pbkstatus = 0x%x\n", pbkstatus);
462 for (idx = 0; idx < 6; idx++) {
463 if ((pbkstatus & (3 << (idx * 2))) == 0)
464 continue;
465 if ((substream = ice->playback_con_substream_ds[idx]) != NULL)
466 snd_pcm_period_elapsed(substream);
467 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
468 }
469 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
470 }
471 if (status & ICE1712_IRQ_CONCAP) {
472 if (ice->capture_con_substream)
473 snd_pcm_period_elapsed(ice->capture_con_substream);
474 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
475 }
476 if (status & ICE1712_IRQ_CONPBK) {
477 if (ice->playback_con_substream)
478 snd_pcm_period_elapsed(ice->playback_con_substream);
479 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
480 }
481 }
482 return IRQ_RETVAL(handled);
483 }
484
485
486 /*
487 * PCM part - misc
488 */
489
490 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
491 struct snd_pcm_hw_params *hw_params)
492 {
493 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
494 }
495
496 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
497 {
498 return snd_pcm_lib_free_pages(substream);
499 }
500
501 /*
502 * PCM part - consumer I/O
503 */
504
505 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
506 int cmd)
507 {
508 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
509 int result = 0;
510 u32 tmp;
511
512 spin_lock(&ice->reg_lock);
513 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
514 if (cmd == SNDRV_PCM_TRIGGER_START) {
515 tmp |= 1;
516 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
517 tmp &= ~1;
518 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
519 tmp |= 2;
520 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
521 tmp &= ~2;
522 } else {
523 result = -EINVAL;
524 }
525 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
526 spin_unlock(&ice->reg_lock);
527 return result;
528 }
529
530 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
531 int cmd)
532 {
533 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
534 int result = 0;
535 u32 tmp;
536
537 spin_lock(&ice->reg_lock);
538 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
539 if (cmd == SNDRV_PCM_TRIGGER_START) {
540 tmp |= 1;
541 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
542 tmp &= ~1;
543 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
544 tmp |= 2;
545 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
546 tmp &= ~2;
547 } else {
548 result = -EINVAL;
549 }
550 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
551 spin_unlock(&ice->reg_lock);
552 return result;
553 }
554
555 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
556 int cmd)
557 {
558 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
559 int result = 0;
560 u8 tmp;
561
562 spin_lock(&ice->reg_lock);
563 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
564 if (cmd == SNDRV_PCM_TRIGGER_START) {
565 tmp |= 1;
566 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
567 tmp &= ~1;
568 } else {
569 result = -EINVAL;
570 }
571 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
572 spin_unlock(&ice->reg_lock);
573 return result;
574 }
575
576 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
577 {
578 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
579 struct snd_pcm_runtime *runtime = substream->runtime;
580 u32 period_size, buf_size, rate, tmp;
581
582 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
583 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
584 tmp = 0x0000;
585 if (snd_pcm_format_width(runtime->format) == 16)
586 tmp |= 0x10;
587 if (runtime->channels == 2)
588 tmp |= 0x08;
589 rate = (runtime->rate * 8192) / 375;
590 if (rate > 0x000fffff)
591 rate = 0x000fffff;
592 spin_lock_irq(&ice->reg_lock);
593 outb(0, ice->ddma_port + 15);
594 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
595 outl(runtime->dma_addr, ice->ddma_port + 0);
596 outw(buf_size, ice->ddma_port + 4);
597 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
598 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
599 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
600 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
601 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
602 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
603 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
604 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
605 spin_unlock_irq(&ice->reg_lock);
606 return 0;
607 }
608
609 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
610 {
611 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
612 struct snd_pcm_runtime *runtime = substream->runtime;
613 u32 period_size, buf_size, rate, tmp, chn;
614
615 period_size = snd_pcm_lib_period_bytes(substream) - 1;
616 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
617 tmp = 0x0064;
618 if (snd_pcm_format_width(runtime->format) == 16)
619 tmp &= ~0x04;
620 if (runtime->channels == 2)
621 tmp |= 0x08;
622 rate = (runtime->rate * 8192) / 375;
623 if (rate > 0x000fffff)
624 rate = 0x000fffff;
625 ice->playback_con_active_buf[substream->number] = 0;
626 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
627 chn = substream->number * 2;
628 spin_lock_irq(&ice->reg_lock);
629 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
630 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
631 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
632 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
633 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
634 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
635 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
636 if (runtime->channels == 2) {
637 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
638 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
639 }
640 spin_unlock_irq(&ice->reg_lock);
641 return 0;
642 }
643
644 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
645 {
646 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
647 struct snd_pcm_runtime *runtime = substream->runtime;
648 u32 period_size, buf_size;
649 u8 tmp;
650
651 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
652 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
653 tmp = 0x06;
654 if (snd_pcm_format_width(runtime->format) == 16)
655 tmp &= ~0x04;
656 if (runtime->channels == 2)
657 tmp &= ~0x02;
658 spin_lock_irq(&ice->reg_lock);
659 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
660 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
661 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
662 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
663 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
664 spin_unlock_irq(&ice->reg_lock);
665 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
666 return 0;
667 }
668
669 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
670 {
671 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
672 struct snd_pcm_runtime *runtime = substream->runtime;
673 size_t ptr;
674
675 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
676 return 0;
677 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
678 if (ptr == runtime->buffer_size)
679 ptr = 0;
680 return bytes_to_frames(substream->runtime, ptr);
681 }
682
683 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
684 {
685 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
686 u8 addr;
687 size_t ptr;
688
689 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
690 return 0;
691 if (ice->playback_con_active_buf[substream->number])
692 addr = ICE1712_DSC_ADDR1;
693 else
694 addr = ICE1712_DSC_ADDR0;
695 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
696 ice->playback_con_virt_addr[substream->number];
697 if (ptr == substream->runtime->buffer_size)
698 ptr = 0;
699 return bytes_to_frames(substream->runtime, ptr);
700 }
701
702 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
703 {
704 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
705 size_t ptr;
706
707 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
708 return 0;
709 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
710 if (ptr == substream->runtime->buffer_size)
711 ptr = 0;
712 return bytes_to_frames(substream->runtime, ptr);
713 }
714
715 static const struct snd_pcm_hardware snd_ice1712_playback =
716 {
717 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
718 SNDRV_PCM_INFO_BLOCK_TRANSFER |
719 SNDRV_PCM_INFO_MMAP_VALID |
720 SNDRV_PCM_INFO_PAUSE),
721 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
722 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
723 .rate_min = 4000,
724 .rate_max = 48000,
725 .channels_min = 1,
726 .channels_max = 2,
727 .buffer_bytes_max = (64*1024),
728 .period_bytes_min = 64,
729 .period_bytes_max = (64*1024),
730 .periods_min = 1,
731 .periods_max = 1024,
732 .fifo_size = 0,
733 };
734
735 static const struct snd_pcm_hardware snd_ice1712_playback_ds =
736 {
737 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
738 SNDRV_PCM_INFO_BLOCK_TRANSFER |
739 SNDRV_PCM_INFO_MMAP_VALID |
740 SNDRV_PCM_INFO_PAUSE),
741 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
742 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
743 .rate_min = 4000,
744 .rate_max = 48000,
745 .channels_min = 1,
746 .channels_max = 2,
747 .buffer_bytes_max = (128*1024),
748 .period_bytes_min = 64,
749 .period_bytes_max = (128*1024),
750 .periods_min = 2,
751 .periods_max = 2,
752 .fifo_size = 0,
753 };
754
755 static const struct snd_pcm_hardware snd_ice1712_capture =
756 {
757 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
758 SNDRV_PCM_INFO_BLOCK_TRANSFER |
759 SNDRV_PCM_INFO_MMAP_VALID),
760 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
761 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
762 .rate_min = 4000,
763 .rate_max = 48000,
764 .channels_min = 1,
765 .channels_max = 2,
766 .buffer_bytes_max = (64*1024),
767 .period_bytes_min = 64,
768 .period_bytes_max = (64*1024),
769 .periods_min = 1,
770 .periods_max = 1024,
771 .fifo_size = 0,
772 };
773
774 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
775 {
776 struct snd_pcm_runtime *runtime = substream->runtime;
777 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
778
779 ice->playback_con_substream = substream;
780 runtime->hw = snd_ice1712_playback;
781 return 0;
782 }
783
784 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
785 {
786 struct snd_pcm_runtime *runtime = substream->runtime;
787 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
788 u32 tmp;
789
790 ice->playback_con_substream_ds[substream->number] = substream;
791 runtime->hw = snd_ice1712_playback_ds;
792 spin_lock_irq(&ice->reg_lock);
793 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
794 outw(tmp, ICEDS(ice, INTMASK));
795 spin_unlock_irq(&ice->reg_lock);
796 return 0;
797 }
798
799 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
800 {
801 struct snd_pcm_runtime *runtime = substream->runtime;
802 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
803
804 ice->capture_con_substream = substream;
805 runtime->hw = snd_ice1712_capture;
806 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
807 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
808 runtime->hw.rate_min = 48000;
809 return 0;
810 }
811
812 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
813 {
814 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
815
816 ice->playback_con_substream = NULL;
817 return 0;
818 }
819
820 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
821 {
822 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
823 u32 tmp;
824
825 spin_lock_irq(&ice->reg_lock);
826 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
827 outw(tmp, ICEDS(ice, INTMASK));
828 spin_unlock_irq(&ice->reg_lock);
829 ice->playback_con_substream_ds[substream->number] = NULL;
830 return 0;
831 }
832
833 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
834 {
835 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
836
837 ice->capture_con_substream = NULL;
838 return 0;
839 }
840
841 static struct snd_pcm_ops snd_ice1712_playback_ops = {
842 .open = snd_ice1712_playback_open,
843 .close = snd_ice1712_playback_close,
844 .ioctl = snd_pcm_lib_ioctl,
845 .hw_params = snd_ice1712_hw_params,
846 .hw_free = snd_ice1712_hw_free,
847 .prepare = snd_ice1712_playback_prepare,
848 .trigger = snd_ice1712_playback_trigger,
849 .pointer = snd_ice1712_playback_pointer,
850 };
851
852 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
853 .open = snd_ice1712_playback_ds_open,
854 .close = snd_ice1712_playback_ds_close,
855 .ioctl = snd_pcm_lib_ioctl,
856 .hw_params = snd_ice1712_hw_params,
857 .hw_free = snd_ice1712_hw_free,
858 .prepare = snd_ice1712_playback_ds_prepare,
859 .trigger = snd_ice1712_playback_ds_trigger,
860 .pointer = snd_ice1712_playback_ds_pointer,
861 };
862
863 static struct snd_pcm_ops snd_ice1712_capture_ops = {
864 .open = snd_ice1712_capture_open,
865 .close = snd_ice1712_capture_close,
866 .ioctl = snd_pcm_lib_ioctl,
867 .hw_params = snd_ice1712_hw_params,
868 .hw_free = snd_ice1712_hw_free,
869 .prepare = snd_ice1712_capture_prepare,
870 .trigger = snd_ice1712_capture_trigger,
871 .pointer = snd_ice1712_capture_pointer,
872 };
873
874 static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
875 {
876 struct snd_pcm *pcm;
877 int err;
878
879 if (rpcm)
880 *rpcm = NULL;
881 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
882 if (err < 0)
883 return err;
884
885 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
886 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
887
888 pcm->private_data = ice;
889 pcm->info_flags = 0;
890 strcpy(pcm->name, "ICE1712 consumer");
891 ice->pcm = pcm;
892
893 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
894 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
895
896 if (rpcm)
897 *rpcm = pcm;
898
899 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
900
901 return 0;
902 }
903
904 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
905 {
906 struct snd_pcm *pcm;
907 int err;
908
909 if (rpcm)
910 *rpcm = NULL;
911 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
912 if (err < 0)
913 return err;
914
915 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
916
917 pcm->private_data = ice;
918 pcm->info_flags = 0;
919 strcpy(pcm->name, "ICE1712 consumer (DS)");
920 ice->pcm_ds = pcm;
921
922 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
923 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
924
925 if (rpcm)
926 *rpcm = pcm;
927
928 return 0;
929 }
930
931 /*
932 * PCM code - professional part (multitrack)
933 */
934
935 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
936 32000, 44100, 48000, 64000, 88200, 96000 };
937
938 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
939 .count = ARRAY_SIZE(rates),
940 .list = rates,
941 .mask = 0,
942 };
943
944 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
945 int cmd)
946 {
947 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
948 switch (cmd) {
949 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
950 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
951 {
952 unsigned int what;
953 unsigned int old;
954 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
955 return -EINVAL;
956 what = ICE1712_PLAYBACK_PAUSE;
957 snd_pcm_trigger_done(substream, substream);
958 spin_lock(&ice->reg_lock);
959 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
960 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
961 old |= what;
962 else
963 old &= ~what;
964 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
965 spin_unlock(&ice->reg_lock);
966 break;
967 }
968 case SNDRV_PCM_TRIGGER_START:
969 case SNDRV_PCM_TRIGGER_STOP:
970 {
971 unsigned int what = 0;
972 unsigned int old;
973 struct snd_pcm_substream *s;
974
975 snd_pcm_group_for_each_entry(s, substream) {
976 if (s == ice->playback_pro_substream) {
977 what |= ICE1712_PLAYBACK_START;
978 snd_pcm_trigger_done(s, substream);
979 } else if (s == ice->capture_pro_substream) {
980 what |= ICE1712_CAPTURE_START_SHADOW;
981 snd_pcm_trigger_done(s, substream);
982 }
983 }
984 spin_lock(&ice->reg_lock);
985 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
986 if (cmd == SNDRV_PCM_TRIGGER_START)
987 old |= what;
988 else
989 old &= ~what;
990 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
991 spin_unlock(&ice->reg_lock);
992 break;
993 }
994 default:
995 return -EINVAL;
996 }
997 return 0;
998 }
999
1000 /*
1001 */
1002 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1003 {
1004 unsigned long flags;
1005 unsigned char val, old;
1006 unsigned int i;
1007
1008 switch (rate) {
1009 case 8000: val = 6; break;
1010 case 9600: val = 3; break;
1011 case 11025: val = 10; break;
1012 case 12000: val = 2; break;
1013 case 16000: val = 5; break;
1014 case 22050: val = 9; break;
1015 case 24000: val = 1; break;
1016 case 32000: val = 4; break;
1017 case 44100: val = 8; break;
1018 case 48000: val = 0; break;
1019 case 64000: val = 15; break;
1020 case 88200: val = 11; break;
1021 case 96000: val = 7; break;
1022 default:
1023 snd_BUG();
1024 val = 0;
1025 rate = 48000;
1026 break;
1027 }
1028
1029 spin_lock_irqsave(&ice->reg_lock, flags);
1030 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1031 ICE1712_PLAYBACK_PAUSE|
1032 ICE1712_PLAYBACK_START)) {
1033 __out:
1034 spin_unlock_irqrestore(&ice->reg_lock, flags);
1035 return;
1036 }
1037 if (!force && is_pro_rate_locked(ice))
1038 goto __out;
1039
1040 old = inb(ICEMT(ice, RATE));
1041 if (!force && old == val)
1042 goto __out;
1043 outb(val, ICEMT(ice, RATE));
1044 spin_unlock_irqrestore(&ice->reg_lock, flags);
1045
1046 if (ice->gpio.set_pro_rate)
1047 ice->gpio.set_pro_rate(ice, rate);
1048 for (i = 0; i < ice->akm_codecs; i++) {
1049 if (ice->akm[i].ops.set_rate_val)
1050 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1051 }
1052 if (ice->spdif.ops.setup_rate)
1053 ice->spdif.ops.setup_rate(ice, rate);
1054 }
1055
1056 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1057 {
1058 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1059
1060 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1061 spin_lock_irq(&ice->reg_lock);
1062 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1063 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1064 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1065 spin_unlock_irq(&ice->reg_lock);
1066
1067 return 0;
1068 }
1069
1070 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1071 struct snd_pcm_hw_params *hw_params)
1072 {
1073 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1074
1075 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1076 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1077 }
1078
1079 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1080 {
1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1082
1083 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1084 spin_lock_irq(&ice->reg_lock);
1085 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1086 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1087 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1088 spin_unlock_irq(&ice->reg_lock);
1089 return 0;
1090 }
1091
1092 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1093 struct snd_pcm_hw_params *hw_params)
1094 {
1095 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1096
1097 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1098 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1099 }
1100
1101 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1102 {
1103 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1104 size_t ptr;
1105
1106 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1107 return 0;
1108 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1109 if (ptr == substream->runtime->buffer_size)
1110 ptr = 0;
1111 return bytes_to_frames(substream->runtime, ptr);
1112 }
1113
1114 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1115 {
1116 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1117 size_t ptr;
1118
1119 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1120 return 0;
1121 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1122 if (ptr == substream->runtime->buffer_size)
1123 ptr = 0;
1124 return bytes_to_frames(substream->runtime, ptr);
1125 }
1126
1127 static const struct snd_pcm_hardware snd_ice1712_playback_pro =
1128 {
1129 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1130 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1131 SNDRV_PCM_INFO_MMAP_VALID |
1132 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1133 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1134 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1135 .rate_min = 4000,
1136 .rate_max = 96000,
1137 .channels_min = 10,
1138 .channels_max = 10,
1139 .buffer_bytes_max = (256*1024),
1140 .period_bytes_min = 10 * 4 * 2,
1141 .period_bytes_max = 131040,
1142 .periods_min = 1,
1143 .periods_max = 1024,
1144 .fifo_size = 0,
1145 };
1146
1147 static const struct snd_pcm_hardware snd_ice1712_capture_pro =
1148 {
1149 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1150 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1151 SNDRV_PCM_INFO_MMAP_VALID |
1152 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1153 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1154 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1155 .rate_min = 4000,
1156 .rate_max = 96000,
1157 .channels_min = 12,
1158 .channels_max = 12,
1159 .buffer_bytes_max = (256*1024),
1160 .period_bytes_min = 12 * 4 * 2,
1161 .period_bytes_max = 131040,
1162 .periods_min = 1,
1163 .periods_max = 1024,
1164 .fifo_size = 0,
1165 };
1166
1167 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1168 {
1169 struct snd_pcm_runtime *runtime = substream->runtime;
1170 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1171
1172 ice->playback_pro_substream = substream;
1173 runtime->hw = snd_ice1712_playback_pro;
1174 snd_pcm_set_sync(substream);
1175 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1176 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1177
1178 if (ice->spdif.ops.open)
1179 ice->spdif.ops.open(ice, substream);
1180
1181 return 0;
1182 }
1183
1184 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1185 {
1186 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1187 struct snd_pcm_runtime *runtime = substream->runtime;
1188
1189 ice->capture_pro_substream = substream;
1190 runtime->hw = snd_ice1712_capture_pro;
1191 snd_pcm_set_sync(substream);
1192 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1193 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1194 return 0;
1195 }
1196
1197 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1198 {
1199 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1200
1201 if (PRO_RATE_RESET)
1202 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1203 ice->playback_pro_substream = NULL;
1204 if (ice->spdif.ops.close)
1205 ice->spdif.ops.close(ice, substream);
1206
1207 return 0;
1208 }
1209
1210 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1211 {
1212 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1213
1214 if (PRO_RATE_RESET)
1215 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1216 ice->capture_pro_substream = NULL;
1217 return 0;
1218 }
1219
1220 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1221 .open = snd_ice1712_playback_pro_open,
1222 .close = snd_ice1712_playback_pro_close,
1223 .ioctl = snd_pcm_lib_ioctl,
1224 .hw_params = snd_ice1712_playback_pro_hw_params,
1225 .hw_free = snd_ice1712_hw_free,
1226 .prepare = snd_ice1712_playback_pro_prepare,
1227 .trigger = snd_ice1712_pro_trigger,
1228 .pointer = snd_ice1712_playback_pro_pointer,
1229 };
1230
1231 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1232 .open = snd_ice1712_capture_pro_open,
1233 .close = snd_ice1712_capture_pro_close,
1234 .ioctl = snd_pcm_lib_ioctl,
1235 .hw_params = snd_ice1712_capture_pro_hw_params,
1236 .hw_free = snd_ice1712_hw_free,
1237 .prepare = snd_ice1712_capture_pro_prepare,
1238 .trigger = snd_ice1712_pro_trigger,
1239 .pointer = snd_ice1712_capture_pro_pointer,
1240 };
1241
1242 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm)
1243 {
1244 struct snd_pcm *pcm;
1245 int err;
1246
1247 if (rpcm)
1248 *rpcm = NULL;
1249 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1250 if (err < 0)
1251 return err;
1252
1253 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1254 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1255
1256 pcm->private_data = ice;
1257 pcm->info_flags = 0;
1258 strcpy(pcm->name, "ICE1712 multi");
1259
1260 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1261 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1262
1263 ice->pcm_pro = pcm;
1264 if (rpcm)
1265 *rpcm = pcm;
1266
1267 if (ice->cs8427) {
1268 /* assign channels to iec958 */
1269 err = snd_cs8427_iec958_build(ice->cs8427,
1270 pcm->streams[0].substream,
1271 pcm->streams[1].substream);
1272 if (err < 0)
1273 return err;
1274 }
1275
1276 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0)
1277 return err;
1278 return 0;
1279 }
1280
1281 /*
1282 * Mixer section
1283 */
1284
1285 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1286 {
1287 unsigned int vol = ice->pro_volumes[index];
1288 unsigned short val = 0;
1289
1290 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1291 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1292 outb(index, ICEMT(ice, MONITOR_INDEX));
1293 outw(val, ICEMT(ice, MONITOR_VOLUME));
1294 }
1295
1296 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1297
1298 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1299 {
1300 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1301 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1302
1303 spin_lock_irq(&ice->reg_lock);
1304 ucontrol->value.integer.value[0] = !((ice->pro_volumes[index] >> 15) & 1);
1305 ucontrol->value.integer.value[1] = !((ice->pro_volumes[index] >> 31) & 1);
1306 spin_unlock_irq(&ice->reg_lock);
1307 return 0;
1308 }
1309
1310 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1311 {
1312 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1313 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1314 unsigned int nval, change;
1315
1316 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1317 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1318 spin_lock_irq(&ice->reg_lock);
1319 nval |= ice->pro_volumes[index] & ~0x80008000;
1320 change = nval != ice->pro_volumes[index];
1321 ice->pro_volumes[index] = nval;
1322 snd_ice1712_update_volume(ice, index);
1323 spin_unlock_irq(&ice->reg_lock);
1324 return change;
1325 }
1326
1327 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1328 {
1329 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1330 uinfo->count = 2;
1331 uinfo->value.integer.min = 0;
1332 uinfo->value.integer.max = 96;
1333 return 0;
1334 }
1335
1336 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1337 {
1338 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1339 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1340
1341 spin_lock_irq(&ice->reg_lock);
1342 ucontrol->value.integer.value[0] = (ice->pro_volumes[index] >> 0) & 127;
1343 ucontrol->value.integer.value[1] = (ice->pro_volumes[index] >> 16) & 127;
1344 spin_unlock_irq(&ice->reg_lock);
1345 return 0;
1346 }
1347
1348 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1349 {
1350 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1351 int index = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + kcontrol->private_value;
1352 unsigned int nval, change;
1353
1354 nval = (ucontrol->value.integer.value[0] & 127) |
1355 ((ucontrol->value.integer.value[1] & 127) << 16);
1356 spin_lock_irq(&ice->reg_lock);
1357 nval |= ice->pro_volumes[index] & ~0x007f007f;
1358 change = nval != ice->pro_volumes[index];
1359 ice->pro_volumes[index] = nval;
1360 snd_ice1712_update_volume(ice, index);
1361 spin_unlock_irq(&ice->reg_lock);
1362 return change;
1363 }
1364
1365 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1366
1367 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = {
1368 {
1369 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1370 .name = "Multi Playback Switch",
1371 .info = snd_ice1712_pro_mixer_switch_info,
1372 .get = snd_ice1712_pro_mixer_switch_get,
1373 .put = snd_ice1712_pro_mixer_switch_put,
1374 .private_value = 0,
1375 .count = 10,
1376 },
1377 {
1378 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1379 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1380 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1381 .name = "Multi Playback Volume",
1382 .info = snd_ice1712_pro_mixer_volume_info,
1383 .get = snd_ice1712_pro_mixer_volume_get,
1384 .put = snd_ice1712_pro_mixer_volume_put,
1385 .private_value = 0,
1386 .count = 10,
1387 .tlv = { .p = db_scale_playback }
1388 },
1389 };
1390
1391 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = {
1392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1393 .name = "H/W Multi Capture Switch",
1394 .info = snd_ice1712_pro_mixer_switch_info,
1395 .get = snd_ice1712_pro_mixer_switch_get,
1396 .put = snd_ice1712_pro_mixer_switch_put,
1397 .private_value = 10,
1398 };
1399
1400 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = {
1401 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1402 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH),
1403 .info = snd_ice1712_pro_mixer_switch_info,
1404 .get = snd_ice1712_pro_mixer_switch_get,
1405 .put = snd_ice1712_pro_mixer_switch_put,
1406 .private_value = 18,
1407 .count = 2,
1408 };
1409
1410 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = {
1411 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1412 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1413 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1414 .name = "H/W Multi Capture Volume",
1415 .info = snd_ice1712_pro_mixer_volume_info,
1416 .get = snd_ice1712_pro_mixer_volume_get,
1417 .put = snd_ice1712_pro_mixer_volume_put,
1418 .private_value = 10,
1419 .tlv = { .p = db_scale_playback }
1420 };
1421
1422 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = {
1423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1424 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME),
1425 .info = snd_ice1712_pro_mixer_volume_info,
1426 .get = snd_ice1712_pro_mixer_volume_get,
1427 .put = snd_ice1712_pro_mixer_volume_put,
1428 .private_value = 18,
1429 .count = 2,
1430 };
1431
1432 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1433 {
1434 struct snd_card *card = ice->card;
1435 unsigned int idx;
1436 int err;
1437
1438 /* multi-channel mixer */
1439 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1440 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1441 if (err < 0)
1442 return err;
1443 }
1444
1445 if (ice->num_total_adcs > 0) {
1446 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1447 tmp.count = ice->num_total_adcs;
1448 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1449 if (err < 0)
1450 return err;
1451 }
1452
1453 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1454 if (err < 0)
1455 return err;
1456
1457 if (ice->num_total_adcs > 0) {
1458 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1459 tmp.count = ice->num_total_adcs;
1460 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1461 if (err < 0)
1462 return err;
1463 }
1464
1465 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1466 if (err < 0)
1467 return err;
1468
1469 /* initialize volumes */
1470 for (idx = 0; idx < 10; idx++) {
1471 ice->pro_volumes[idx] = 0x80008000; /* mute */
1472 snd_ice1712_update_volume(ice, idx);
1473 }
1474 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1475 ice->pro_volumes[idx] = 0x80008000; /* mute */
1476 snd_ice1712_update_volume(ice, idx);
1477 }
1478 for (idx = 18; idx < 20; idx++) {
1479 ice->pro_volumes[idx] = 0x80008000; /* mute */
1480 snd_ice1712_update_volume(ice, idx);
1481 }
1482 return 0;
1483 }
1484
1485 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1486 {
1487 struct snd_ice1712 *ice = ac97->private_data;
1488 ice->ac97 = NULL;
1489 }
1490
1491 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice)
1492 {
1493 int err, bus_num = 0;
1494 struct snd_ac97_template ac97;
1495 struct snd_ac97_bus *pbus;
1496 static struct snd_ac97_bus_ops con_ops = {
1497 .write = snd_ice1712_ac97_write,
1498 .read = snd_ice1712_ac97_read,
1499 };
1500 static struct snd_ac97_bus_ops pro_ops = {
1501 .write = snd_ice1712_pro_ac97_write,
1502 .read = snd_ice1712_pro_ac97_read,
1503 };
1504
1505 if (ice_has_con_ac97(ice)) {
1506 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0)
1507 return err;
1508 memset(&ac97, 0, sizeof(ac97));
1509 ac97.private_data = ice;
1510 ac97.private_free = snd_ice1712_mixer_free_ac97;
1511 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1512 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1513 else {
1514 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0)
1515 return err;
1516 return 0;
1517 }
1518 }
1519
1520 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1521 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0)
1522 return err;
1523 memset(&ac97, 0, sizeof(ac97));
1524 ac97.private_data = ice;
1525 ac97.private_free = snd_ice1712_mixer_free_ac97;
1526 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
1527 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1528 else
1529 return 0;
1530 }
1531 /* I2S mixer only */
1532 strcat(ice->card->mixername, "ICE1712 - multitrack");
1533 return 0;
1534 }
1535
1536 /*
1537 *
1538 */
1539
1540 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1541 {
1542 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1543 }
1544
1545 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1546 struct snd_info_buffer *buffer)
1547 {
1548 struct snd_ice1712 *ice = entry->private_data;
1549 unsigned int idx;
1550
1551 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1552 snd_iprintf(buffer, "EEPROM:\n");
1553
1554 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1555 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1556 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1557 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1558 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1559 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1560 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1561 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1562 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1563 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1564 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1565 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1566 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1567 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1568 for (idx = 0; idx < 4; idx++)
1569 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1570 for (idx = 0; idx < 4; idx++)
1571 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1572 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1573 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1574
1575 snd_iprintf(buffer, "\nRegisters:\n");
1576 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1577 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1578 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1579 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1580 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1581 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1582 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1583 }
1584
1585 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice)
1586 {
1587 struct snd_info_entry *entry;
1588
1589 if (! snd_card_proc_new(ice->card, "ice1712", &entry))
1590 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1591 }
1592
1593 /*
1594 *
1595 */
1596
1597 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1598 struct snd_ctl_elem_info *uinfo)
1599 {
1600 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1601 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1602 return 0;
1603 }
1604
1605 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1606 struct snd_ctl_elem_value *ucontrol)
1607 {
1608 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1609
1610 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1611 return 0;
1612 }
1613
1614 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = {
1615 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1616 .name = "ICE1712 EEPROM",
1617 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1618 .info = snd_ice1712_eeprom_info,
1619 .get = snd_ice1712_eeprom_get
1620 };
1621
1622 /*
1623 */
1624 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1625 struct snd_ctl_elem_info *uinfo)
1626 {
1627 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1628 uinfo->count = 1;
1629 return 0;
1630 }
1631
1632 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1633 struct snd_ctl_elem_value *ucontrol)
1634 {
1635 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1636 if (ice->spdif.ops.default_get)
1637 ice->spdif.ops.default_get(ice, ucontrol);
1638 return 0;
1639 }
1640
1641 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1643 {
1644 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1645 if (ice->spdif.ops.default_put)
1646 return ice->spdif.ops.default_put(ice, ucontrol);
1647 return 0;
1648 }
1649
1650 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata =
1651 {
1652 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1653 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1654 .info = snd_ice1712_spdif_info,
1655 .get = snd_ice1712_spdif_default_get,
1656 .put = snd_ice1712_spdif_default_put
1657 };
1658
1659 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1660 struct snd_ctl_elem_value *ucontrol)
1661 {
1662 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1663 if (ice->spdif.ops.default_get) {
1664 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1665 IEC958_AES0_PROFESSIONAL |
1666 IEC958_AES0_CON_NOT_COPYRIGHT |
1667 IEC958_AES0_CON_EMPHASIS;
1668 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1669 IEC958_AES1_CON_CATEGORY;
1670 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1671 } else {
1672 ucontrol->value.iec958.status[0] = 0xff;
1673 ucontrol->value.iec958.status[1] = 0xff;
1674 ucontrol->value.iec958.status[2] = 0xff;
1675 ucontrol->value.iec958.status[3] = 0xff;
1676 ucontrol->value.iec958.status[4] = 0xff;
1677 }
1678 return 0;
1679 }
1680
1681 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1682 struct snd_ctl_elem_value *ucontrol)
1683 {
1684 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1685 if (ice->spdif.ops.default_get) {
1686 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1687 IEC958_AES0_PROFESSIONAL |
1688 IEC958_AES0_PRO_FS |
1689 IEC958_AES0_PRO_EMPHASIS;
1690 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1691 } else {
1692 ucontrol->value.iec958.status[0] = 0xff;
1693 ucontrol->value.iec958.status[1] = 0xff;
1694 ucontrol->value.iec958.status[2] = 0xff;
1695 ucontrol->value.iec958.status[3] = 0xff;
1696 ucontrol->value.iec958.status[4] = 0xff;
1697 }
1698 return 0;
1699 }
1700
1701 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata =
1702 {
1703 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1704 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1705 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1706 .info = snd_ice1712_spdif_info,
1707 .get = snd_ice1712_spdif_maskc_get,
1708 };
1709
1710 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata =
1711 {
1712 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1713 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1714 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1715 .info = snd_ice1712_spdif_info,
1716 .get = snd_ice1712_spdif_maskp_get,
1717 };
1718
1719 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1720 struct snd_ctl_elem_value *ucontrol)
1721 {
1722 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1723 if (ice->spdif.ops.stream_get)
1724 ice->spdif.ops.stream_get(ice, ucontrol);
1725 return 0;
1726 }
1727
1728 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1729 struct snd_ctl_elem_value *ucontrol)
1730 {
1731 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1732 if (ice->spdif.ops.stream_put)
1733 return ice->spdif.ops.stream_put(ice, ucontrol);
1734 return 0;
1735 }
1736
1737 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata =
1738 {
1739 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1740 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1741 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1742 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1743 .info = snd_ice1712_spdif_info,
1744 .get = snd_ice1712_spdif_stream_get,
1745 .put = snd_ice1712_spdif_stream_put
1746 };
1747
1748 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1749 struct snd_ctl_elem_value *ucontrol)
1750 {
1751 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1752 unsigned char mask = kcontrol->private_value & 0xff;
1753 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1754
1755 snd_ice1712_save_gpio_status(ice);
1756 ucontrol->value.integer.value[0] =
1757 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1758 snd_ice1712_restore_gpio_status(ice);
1759 return 0;
1760 }
1761
1762 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1763 struct snd_ctl_elem_value *ucontrol)
1764 {
1765 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1766 unsigned char mask = kcontrol->private_value & 0xff;
1767 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1768 unsigned int val, nval;
1769
1770 if (kcontrol->private_value & (1 << 31))
1771 return -EPERM;
1772 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1773 snd_ice1712_save_gpio_status(ice);
1774 val = snd_ice1712_gpio_read(ice);
1775 nval |= val & ~mask;
1776 if (val != nval)
1777 snd_ice1712_gpio_write(ice, nval);
1778 snd_ice1712_restore_gpio_status(ice);
1779 return val != nval;
1780 }
1781
1782 /*
1783 * rate
1784 */
1785 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1786 struct snd_ctl_elem_info *uinfo)
1787 {
1788 static const char * const texts[] = {
1789 "8000", /* 0: 6 */
1790 "9600", /* 1: 3 */
1791 "11025", /* 2: 10 */
1792 "12000", /* 3: 2 */
1793 "16000", /* 4: 5 */
1794 "22050", /* 5: 9 */
1795 "24000", /* 6: 1 */
1796 "32000", /* 7: 4 */
1797 "44100", /* 8: 8 */
1798 "48000", /* 9: 0 */
1799 "64000", /* 10: 15 */
1800 "88200", /* 11: 11 */
1801 "96000", /* 12: 7 */
1802 "IEC958 Input", /* 13: -- */
1803 };
1804 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1805 uinfo->count = 1;
1806 uinfo->value.enumerated.items = 14;
1807 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1808 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1809 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1810 return 0;
1811 }
1812
1813 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1814 struct snd_ctl_elem_value *ucontrol)
1815 {
1816 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1817 static const unsigned char xlate[16] = {
1818 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1819 };
1820 unsigned char val;
1821
1822 spin_lock_irq(&ice->reg_lock);
1823 if (is_spdif_master(ice)) {
1824 ucontrol->value.enumerated.item[0] = 13;
1825 } else {
1826 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1827 if (val == 255) {
1828 snd_BUG();
1829 val = 0;
1830 }
1831 ucontrol->value.enumerated.item[0] = val;
1832 }
1833 spin_unlock_irq(&ice->reg_lock);
1834 return 0;
1835 }
1836
1837 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1838 struct snd_ctl_elem_value *ucontrol)
1839 {
1840 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1841 static const unsigned int xrate[13] = {
1842 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1843 32000, 44100, 48000, 64000, 88200, 96000
1844 };
1845 unsigned char oval;
1846 int change = 0;
1847
1848 spin_lock_irq(&ice->reg_lock);
1849 oval = inb(ICEMT(ice, RATE));
1850 if (ucontrol->value.enumerated.item[0] == 13) {
1851 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1852 } else {
1853 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1854 spin_unlock_irq(&ice->reg_lock);
1855 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1856 spin_lock_irq(&ice->reg_lock);
1857 }
1858 change = inb(ICEMT(ice, RATE)) != oval;
1859 spin_unlock_irq(&ice->reg_lock);
1860
1861 if ((oval & ICE1712_SPDIF_MASTER) !=
1862 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1863 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1864
1865 return change;
1866 }
1867
1868 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = {
1869 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1870 .name = "Multi Track Internal Clock",
1871 .info = snd_ice1712_pro_internal_clock_info,
1872 .get = snd_ice1712_pro_internal_clock_get,
1873 .put = snd_ice1712_pro_internal_clock_put
1874 };
1875
1876 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1877 struct snd_ctl_elem_info *uinfo)
1878 {
1879 static const char * const texts[] = {
1880 "8000", /* 0: 6 */
1881 "9600", /* 1: 3 */
1882 "11025", /* 2: 10 */
1883 "12000", /* 3: 2 */
1884 "16000", /* 4: 5 */
1885 "22050", /* 5: 9 */
1886 "24000", /* 6: 1 */
1887 "32000", /* 7: 4 */
1888 "44100", /* 8: 8 */
1889 "48000", /* 9: 0 */
1890 "64000", /* 10: 15 */
1891 "88200", /* 11: 11 */
1892 "96000", /* 12: 7 */
1893 // "IEC958 Input", /* 13: -- */
1894 };
1895 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1896 uinfo->count = 1;
1897 uinfo->value.enumerated.items = 13;
1898 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1899 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1900 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1901 return 0;
1902 }
1903
1904 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1905 struct snd_ctl_elem_value *ucontrol)
1906 {
1907 int val;
1908 static const unsigned int xrate[13] = {
1909 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1910 32000, 44100, 48000, 64000, 88200, 96000
1911 };
1912
1913 for (val = 0; val < 13; val++) {
1914 if (xrate[val] == PRO_RATE_DEFAULT)
1915 break;
1916 }
1917
1918 ucontrol->value.enumerated.item[0] = val;
1919 return 0;
1920 }
1921
1922 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1923 struct snd_ctl_elem_value *ucontrol)
1924 {
1925 static const unsigned int xrate[13] = {
1926 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1927 32000, 44100, 48000, 64000, 88200, 96000
1928 };
1929 unsigned char oval;
1930 int change = 0;
1931
1932 oval = PRO_RATE_DEFAULT;
1933 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1934 change = PRO_RATE_DEFAULT != oval;
1935
1936 return change;
1937 }
1938
1939 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = {
1940 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1941 .name = "Multi Track Internal Clock Default",
1942 .info = snd_ice1712_pro_internal_clock_default_info,
1943 .get = snd_ice1712_pro_internal_clock_default_get,
1944 .put = snd_ice1712_pro_internal_clock_default_put
1945 };
1946
1947 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1948
1949 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1950 struct snd_ctl_elem_value *ucontrol)
1951 {
1952 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1953 return 0;
1954 }
1955
1956 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1957 struct snd_ctl_elem_value *ucontrol)
1958 {
1959 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1960 int change = 0, nval;
1961
1962 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1963 spin_lock_irq(&ice->reg_lock);
1964 change = PRO_RATE_LOCKED != nval;
1965 PRO_RATE_LOCKED = nval;
1966 spin_unlock_irq(&ice->reg_lock);
1967 return change;
1968 }
1969
1970 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = {
1971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1972 .name = "Multi Track Rate Locking",
1973 .info = snd_ice1712_pro_rate_locking_info,
1974 .get = snd_ice1712_pro_rate_locking_get,
1975 .put = snd_ice1712_pro_rate_locking_put
1976 };
1977
1978 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
1979
1980 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
1981 struct snd_ctl_elem_value *ucontrol)
1982 {
1983 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
1984 return 0;
1985 }
1986
1987 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
1988 struct snd_ctl_elem_value *ucontrol)
1989 {
1990 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1991 int change = 0, nval;
1992
1993 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1994 spin_lock_irq(&ice->reg_lock);
1995 change = PRO_RATE_RESET != nval;
1996 PRO_RATE_RESET = nval;
1997 spin_unlock_irq(&ice->reg_lock);
1998 return change;
1999 }
2000
2001 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = {
2002 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2003 .name = "Multi Track Rate Reset",
2004 .info = snd_ice1712_pro_rate_reset_info,
2005 .get = snd_ice1712_pro_rate_reset_get,
2006 .put = snd_ice1712_pro_rate_reset_put
2007 };
2008
2009 /*
2010 * routing
2011 */
2012 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2013 struct snd_ctl_elem_info *uinfo)
2014 {
2015 static const char * const texts[] = {
2016 "PCM Out", /* 0 */
2017 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2018 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2019 "IEC958 In L", "IEC958 In R", /* 9-10 */
2020 "Digital Mixer", /* 11 - optional */
2021 };
2022
2023 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2024 uinfo->count = 1;
2025 uinfo->value.enumerated.items =
2026 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2027 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2028 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2029 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2030 return 0;
2031 }
2032
2033 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2034 struct snd_ctl_elem_value *ucontrol)
2035 {
2036 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2037 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2038 unsigned int val, cval;
2039
2040 spin_lock_irq(&ice->reg_lock);
2041 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2042 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2043 spin_unlock_irq(&ice->reg_lock);
2044
2045 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2046 val &= 3;
2047 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2048 if (val == 1 && idx < 2)
2049 ucontrol->value.enumerated.item[0] = 11;
2050 else if (val == 2)
2051 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2052 else if (val == 3)
2053 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2054 else
2055 ucontrol->value.enumerated.item[0] = 0;
2056 return 0;
2057 }
2058
2059 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2060 struct snd_ctl_elem_value *ucontrol)
2061 {
2062 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2063 int change, shift;
2064 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2065 unsigned int val, old_val, nval;
2066
2067 /* update PSDOUT */
2068 if (ucontrol->value.enumerated.item[0] >= 11)
2069 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2070 else if (ucontrol->value.enumerated.item[0] >= 9)
2071 nval = 3; /* spdif in */
2072 else if (ucontrol->value.enumerated.item[0] >= 1)
2073 nval = 2; /* analog in */
2074 else
2075 nval = 0; /* pcm */
2076 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2077 spin_lock_irq(&ice->reg_lock);
2078 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2079 val &= ~(0x03 << shift);
2080 val |= nval << shift;
2081 change = val != old_val;
2082 if (change)
2083 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2084 spin_unlock_irq(&ice->reg_lock);
2085 if (nval < 2) /* dig mixer of pcm */
2086 return change;
2087
2088 /* update CAPTURE */
2089 spin_lock_irq(&ice->reg_lock);
2090 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2091 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2092 if (nval == 2) { /* analog in */
2093 nval = ucontrol->value.enumerated.item[0] - 1;
2094 val &= ~(0x07 << shift);
2095 val |= nval << shift;
2096 } else { /* spdif in */
2097 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2098 val &= ~(0x08 << shift);
2099 val |= nval << shift;
2100 }
2101 if (val != old_val) {
2102 change = 1;
2103 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2104 }
2105 spin_unlock_irq(&ice->reg_lock);
2106 return change;
2107 }
2108
2109 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2110 struct snd_ctl_elem_value *ucontrol)
2111 {
2112 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2113 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2114 unsigned int val, cval;
2115 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2116 cval = (val >> (idx * 4 + 8)) & 0x0f;
2117 val = (val >> (idx * 2)) & 0x03;
2118 if (val == 1)
2119 ucontrol->value.enumerated.item[0] = 11;
2120 else if (val == 2)
2121 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2122 else if (val == 3)
2123 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2124 else
2125 ucontrol->value.enumerated.item[0] = 0;
2126 return 0;
2127 }
2128
2129 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2130 struct snd_ctl_elem_value *ucontrol)
2131 {
2132 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2133 int change, shift;
2134 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2135 unsigned int val, old_val, nval;
2136
2137 /* update SPDOUT */
2138 spin_lock_irq(&ice->reg_lock);
2139 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2140 if (ucontrol->value.enumerated.item[0] >= 11)
2141 nval = 1;
2142 else if (ucontrol->value.enumerated.item[0] >= 9)
2143 nval = 3;
2144 else if (ucontrol->value.enumerated.item[0] >= 1)
2145 nval = 2;
2146 else
2147 nval = 0;
2148 shift = idx * 2;
2149 val &= ~(0x03 << shift);
2150 val |= nval << shift;
2151 shift = idx * 4 + 8;
2152 if (nval == 2) {
2153 nval = ucontrol->value.enumerated.item[0] - 1;
2154 val &= ~(0x07 << shift);
2155 val |= nval << shift;
2156 } else if (nval == 3) {
2157 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2158 val &= ~(0x08 << shift);
2159 val |= nval << shift;
2160 }
2161 change = val != old_val;
2162 if (change)
2163 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2164 spin_unlock_irq(&ice->reg_lock);
2165 return change;
2166 }
2167
2168 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = {
2169 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2170 .name = "H/W Playback Route",
2171 .info = snd_ice1712_pro_route_info,
2172 .get = snd_ice1712_pro_route_analog_get,
2173 .put = snd_ice1712_pro_route_analog_put,
2174 };
2175
2176 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = {
2177 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2178 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
2179 .info = snd_ice1712_pro_route_info,
2180 .get = snd_ice1712_pro_route_spdif_get,
2181 .put = snd_ice1712_pro_route_spdif_put,
2182 .count = 2,
2183 };
2184
2185
2186 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2187 struct snd_ctl_elem_info *uinfo)
2188 {
2189 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2190 uinfo->count = 1;
2191 uinfo->value.integer.min = 0;
2192 uinfo->value.integer.max = 255;
2193 return 0;
2194 }
2195
2196 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2197 struct snd_ctl_elem_value *ucontrol)
2198 {
2199 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2200
2201 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2202 return 0;
2203 }
2204
2205 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2206 struct snd_ctl_elem_value *ucontrol)
2207 {
2208 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2209 int change;
2210
2211 spin_lock_irq(&ice->reg_lock);
2212 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2213 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2214 spin_unlock_irq(&ice->reg_lock);
2215 return change;
2216 }
2217
2218 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = {
2219 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2220 .name = "Multi Track Volume Rate",
2221 .info = snd_ice1712_pro_volume_rate_info,
2222 .get = snd_ice1712_pro_volume_rate_get,
2223 .put = snd_ice1712_pro_volume_rate_put
2224 };
2225
2226 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2227 struct snd_ctl_elem_info *uinfo)
2228 {
2229 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2230 uinfo->count = 22;
2231 uinfo->value.integer.min = 0;
2232 uinfo->value.integer.max = 255;
2233 return 0;
2234 }
2235
2236 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2237 struct snd_ctl_elem_value *ucontrol)
2238 {
2239 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2240 int idx;
2241
2242 spin_lock_irq(&ice->reg_lock);
2243 for (idx = 0; idx < 22; idx++) {
2244 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2245 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2246 }
2247 spin_unlock_irq(&ice->reg_lock);
2248 return 0;
2249 }
2250
2251 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = {
2252 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2253 .name = "Multi Track Peak",
2254 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2255 .info = snd_ice1712_pro_peak_info,
2256 .get = snd_ice1712_pro_peak_get
2257 };
2258
2259 /*
2260 *
2261 */
2262
2263 /*
2264 * list of available boards
2265 */
2266 static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
2267 snd_ice1712_hoontech_cards,
2268 snd_ice1712_delta_cards,
2269 snd_ice1712_ews_cards,
2270 NULL,
2271 };
2272
2273 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2274 unsigned char dev,
2275 unsigned char addr)
2276 {
2277 long t = 0x10000;
2278
2279 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2280 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2281 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2282 return inb(ICEREG(ice, I2C_DATA));
2283 }
2284
2285 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2286 const char *modelname)
2287 {
2288 int dev = 0xa0; /* EEPROM device address */
2289 unsigned int i, size;
2290 struct snd_ice1712_card_info * const *tbl, *c;
2291
2292 if (! modelname || ! *modelname) {
2293 ice->eeprom.subvendor = 0;
2294 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2295 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2296 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2297 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2298 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2299 if (ice->eeprom.subvendor == 0 ||
2300 ice->eeprom.subvendor == (unsigned int)-1) {
2301 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2302 u16 vendor, device;
2303 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2304 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2305 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2306 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2307 printk(KERN_ERR "ice1712: No valid ID is found\n");
2308 return -ENXIO;
2309 }
2310 }
2311 }
2312 for (tbl = card_tables; *tbl; tbl++) {
2313 for (c = *tbl; c->subvendor; c++) {
2314 if (modelname && c->model && ! strcmp(modelname, c->model)) {
2315 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2316 ice->eeprom.subvendor = c->subvendor;
2317 } else if (c->subvendor != ice->eeprom.subvendor)
2318 continue;
2319 if (! c->eeprom_size || ! c->eeprom_data)
2320 goto found;
2321 /* if the EEPROM is given by the driver, use it */
2322 snd_printdd("using the defined eeprom..\n");
2323 ice->eeprom.version = 1;
2324 ice->eeprom.size = c->eeprom_size + 6;
2325 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2326 goto read_skipped;
2327 }
2328 }
2329 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2330 ice->eeprom.subvendor);
2331
2332 found:
2333 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2334 if (ice->eeprom.size < 6)
2335 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2336 else if (ice->eeprom.size > 32) {
2337 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2338 return -EIO;
2339 }
2340 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2341 if (ice->eeprom.version != 1) {
2342 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2343 ice->eeprom.version);
2344 /* return -EIO; */
2345 }
2346 size = ice->eeprom.size - 6;
2347 for (i = 0; i < size; i++)
2348 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2349
2350 read_skipped:
2351 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2352 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2353 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2354
2355 return 0;
2356 }
2357
2358
2359
2360 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice)
2361 {
2362 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2363 udelay(200);
2364 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2365 udelay(200);
2366 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2367 !ice->dxr_enable)
2368 /* Set eeprom value to limit active ADCs and DACs to 6;
2369 * Also disable AC97 as no hardware in standard 6fire card/box
2370 * Note: DXR extensions are not currently supported
2371 */
2372 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2373 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2374 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2375 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2376 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2377 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2378 ice->gpio.write_mask = ice->eeprom.gpiomask;
2379 ice->gpio.direction = ice->eeprom.gpiodir;
2380 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2381 ice->eeprom.gpiomask);
2382 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2383 ice->eeprom.gpiodir);
2384 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2385 ice->eeprom.gpiostate);
2386 } else {
2387 ice->gpio.write_mask = 0xc0;
2388 ice->gpio.direction = 0xff;
2389 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2390 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2391 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2392 ICE1712_STDSP24_CLOCK_BIT);
2393 }
2394 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2395 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2396 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2397 udelay(100);
2398 outb(0, ICEREG(ice, AC97_CMD));
2399 udelay(200);
2400 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2401 }
2402 snd_ice1712_set_pro_rate(ice, 48000, 1);
2403
2404 return 0;
2405 }
2406
2407 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2408 {
2409 int err;
2410 struct snd_kcontrol *kctl;
2411
2412 snd_assert(ice->pcm_pro != NULL, return -EIO);
2413 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2414 if (err < 0)
2415 return err;
2416 kctl->id.device = ice->pcm_pro->device;
2417 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2418 if (err < 0)
2419 return err;
2420 kctl->id.device = ice->pcm_pro->device;
2421 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2422 if (err < 0)
2423 return err;
2424 kctl->id.device = ice->pcm_pro->device;
2425 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2426 if (err < 0)
2427 return err;
2428 kctl->id.device = ice->pcm_pro->device;
2429 ice->spdif.stream_ctl = kctl;
2430 return 0;
2431 }
2432
2433
2434 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice)
2435 {
2436 int err;
2437
2438 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2439 if (err < 0)
2440 return err;
2441 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2442 if (err < 0)
2443 return err;
2444 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2445 if (err < 0)
2446 return err;
2447
2448 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2449 if (err < 0)
2450 return err;
2451 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2452 if (err < 0)
2453 return err;
2454
2455 if (ice->num_total_dacs > 0) {
2456 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2457 tmp.count = ice->num_total_dacs;
2458 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2459 if (err < 0)
2460 return err;
2461 }
2462
2463 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2464 if (err < 0)
2465 return err;
2466
2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2468 if (err < 0)
2469 return err;
2470 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2471 if (err < 0)
2472 return err;
2473
2474 return 0;
2475 }
2476
2477 static int snd_ice1712_free(struct snd_ice1712 *ice)
2478 {
2479 if (! ice->port)
2480 goto __hw_end;
2481 /* mask all interrupts */
2482 outb(0xc0, ICEMT(ice, IRQ));
2483 outb(0xff, ICEREG(ice, IRQMASK));
2484 /* --- */
2485 __hw_end:
2486 if (ice->irq >= 0) {
2487 synchronize_irq(ice->irq);
2488 free_irq(ice->irq, ice);
2489 }
2490 if (ice->port)
2491 pci_release_regions(ice->pci);
2492 snd_ice1712_akm4xxx_free(ice);
2493 pci_disable_device(ice->pci);
2494 kfree(ice);
2495 return 0;
2496 }
2497
2498 static int snd_ice1712_dev_free(struct snd_device *device)
2499 {
2500 struct snd_ice1712 *ice = device->device_data;
2501 return snd_ice1712_free(ice);
2502 }
2503
2504 static int __devinit snd_ice1712_create(struct snd_card *card,
2505 struct pci_dev *pci,
2506 const char *modelname,
2507 int omni,
2508 int cs8427_timeout,
2509 int dxr_enable,
2510 struct snd_ice1712 ** r_ice1712)
2511 {
2512 struct snd_ice1712 *ice;
2513 int err;
2514 static struct snd_device_ops ops = {
2515 .dev_free = snd_ice1712_dev_free,
2516 };
2517
2518 *r_ice1712 = NULL;
2519
2520 /* enable PCI device */
2521 if ((err = pci_enable_device(pci)) < 0)
2522 return err;
2523 /* check, if we can restrict PCI DMA transfers to 28 bits */
2524 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 ||
2525 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) {
2526 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2527 pci_disable_device(pci);
2528 return -ENXIO;
2529 }
2530
2531 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2532 if (ice == NULL) {
2533 pci_disable_device(pci);
2534 return -ENOMEM;
2535 }
2536 ice->omni = omni ? 1 : 0;
2537 if (cs8427_timeout < 1)
2538 cs8427_timeout = 1;
2539 else if (cs8427_timeout > 1000)
2540 cs8427_timeout = 1000;
2541 ice->cs8427_timeout = cs8427_timeout;
2542 ice->dxr_enable = dxr_enable;
2543 spin_lock_init(&ice->reg_lock);
2544 mutex_init(&ice->gpio_mutex);
2545 mutex_init(&ice->i2c_mutex);
2546 mutex_init(&ice->open_mutex);
2547 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2548 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2549 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2550 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2551
2552 ice->spdif.cs8403_bits =
2553 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2554 0x10 | /* no emphasis */
2555 0x20); /* PCM encoder/decoder */
2556 ice->card = card;
2557 ice->pci = pci;
2558 ice->irq = -1;
2559 pci_set_master(pci);
2560 pci_write_config_word(ice->pci, 0x40, 0x807f);
2561 pci_write_config_word(ice->pci, 0x42, 0x0006);
2562 snd_ice1712_proc_init(ice);
2563 synchronize_irq(pci->irq);
2564
2565 if ((err = pci_request_regions(pci, "ICE1712")) < 0) {
2566 kfree(ice);
2567 pci_disable_device(pci);
2568 return err;
2569 }
2570 ice->port = pci_resource_start(pci, 0);
2571 ice->ddma_port = pci_resource_start(pci, 1);
2572 ice->dmapath_port = pci_resource_start(pci, 2);
2573 ice->profi_port = pci_resource_start(pci, 3);
2574
2575 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2576 "ICE1712", ice)) {
2577 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2578 snd_ice1712_free(ice);
2579 return -EIO;
2580 }
2581
2582 ice->irq = pci->irq;
2583
2584 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2585 snd_ice1712_free(ice);
2586 return -EIO;
2587 }
2588 if (snd_ice1712_chip_init(ice) < 0) {
2589 snd_ice1712_free(ice);
2590 return -EIO;
2591 }
2592
2593 /* unmask used interrupts */
2594 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2595 ICE1712_IRQ_MPU2 : 0) |
2596 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2597 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2598 ICEREG(ice, IRQMASK));
2599 outb(0x00, ICEMT(ice, IRQ));
2600
2601 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
2602 snd_ice1712_free(ice);
2603 return err;
2604 }
2605
2606 snd_card_set_dev(card, &pci->dev);
2607
2608 *r_ice1712 = ice;
2609 return 0;
2610 }
2611
2612
2613 /*
2614 *
2615 * Registration
2616 *
2617 */
2618
2619 static struct snd_ice1712_card_info no_matched __devinitdata;
2620
2621 static int __devinit snd_ice1712_probe(struct pci_dev *pci,
2622 const struct pci_device_id *pci_id)
2623 {
2624 static int dev;
2625 struct snd_card *card;
2626 struct snd_ice1712 *ice;
2627 int pcm_dev = 0, err;
2628 struct snd_ice1712_card_info * const *tbl, *c;
2629
2630 if (dev >= SNDRV_CARDS)
2631 return -ENODEV;
2632 if (!enable[dev]) {
2633 dev++;
2634 return -ENOENT;
2635 }
2636
2637 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
2638 if (card == NULL)
2639 return -ENOMEM;
2640
2641 strcpy(card->driver, "ICE1712");
2642 strcpy(card->shortname, "ICEnsemble ICE1712");
2643
2644 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2645 cs8427_timeout[dev], dxr_enable[dev],
2646 &ice)) < 0) {
2647 snd_card_free(card);
2648 return err;
2649 }
2650
2651 for (tbl = card_tables; *tbl; tbl++) {
2652 for (c = *tbl; c->subvendor; c++) {
2653 if (c->subvendor == ice->eeprom.subvendor) {
2654 strcpy(card->shortname, c->name);
2655 if (c->driver) /* specific driver? */
2656 strcpy(card->driver, c->driver);
2657 if (c->chip_init) {
2658 if ((err = c->chip_init(ice)) < 0) {
2659 snd_card_free(card);
2660 return err;
2661 }
2662 }
2663 goto __found;
2664 }
2665 }
2666 }
2667 c = &no_matched;
2668 __found:
2669
2670 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) {
2671 snd_card_free(card);
2672 return err;
2673 }
2674
2675 if (ice_has_con_ac97(ice))
2676 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) {
2677 snd_card_free(card);
2678 return err;
2679 }
2680
2681 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) {
2682 snd_card_free(card);
2683 return err;
2684 }
2685
2686 if ((err = snd_ice1712_build_controls(ice)) < 0) {
2687 snd_card_free(card);
2688 return err;
2689 }
2690
2691 if (c->build_controls) {
2692 if ((err = c->build_controls(ice)) < 0) {
2693 snd_card_free(card);
2694 return err;
2695 }
2696 }
2697
2698 if (ice_has_con_ac97(ice))
2699 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) {
2700 snd_card_free(card);
2701 return err;
2702 }
2703
2704 if (! c->no_mpu401) {
2705 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2706 ICEREG(ice, MPU1_CTRL),
2707 (c->mpu401_1_info_flags |
2708 MPU401_INFO_INTEGRATED),
2709 ice->irq, 0,
2710 &ice->rmidi[0])) < 0) {
2711 snd_card_free(card);
2712 return err;
2713 }
2714 if (c->mpu401_1_name)
2715 /* Prefered name available in card_info */
2716 snprintf(ice->rmidi[0]->name,
2717 sizeof(ice->rmidi[0]->name),
2718 "%s %d", c->mpu401_1_name, card->number);
2719
2720 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2721 /* 2nd port used */
2722 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2723 ICEREG(ice, MPU2_CTRL),
2724 (c->mpu401_2_info_flags |
2725 MPU401_INFO_INTEGRATED),
2726 ice->irq, 0,
2727 &ice->rmidi[1])) < 0) {
2728 snd_card_free(card);
2729 return err;
2730 }
2731 if (c->mpu401_2_name)
2732 /* Prefered name available in card_info */
2733 snprintf(ice->rmidi[1]->name,
2734 sizeof(ice->rmidi[1]->name),
2735 "%s %d", c->mpu401_2_name,
2736 card->number);
2737 }
2738 }
2739
2740 snd_ice1712_set_input_clock_source(ice, 0);
2741
2742 sprintf(card->longname, "%s at 0x%lx, irq %i",
2743 card->shortname, ice->port, ice->irq);
2744
2745 if ((err = snd_card_register(card)) < 0) {
2746 snd_card_free(card);
2747 return err;
2748 }
2749 pci_set_drvdata(pci, card);
2750 dev++;
2751 return 0;
2752 }
2753
2754 static void __devexit snd_ice1712_remove(struct pci_dev *pci)
2755 {
2756 snd_card_free(pci_get_drvdata(pci));
2757 pci_set_drvdata(pci, NULL);
2758 }
2759
2760 static struct pci_driver driver = {
2761 .name = "ICE1712",
2762 .id_table = snd_ice1712_ids,
2763 .probe = snd_ice1712_probe,
2764 .remove = __devexit_p(snd_ice1712_remove),
2765 };
2766
2767 static int __init alsa_card_ice1712_init(void)
2768 {
2769 return pci_register_driver(&driver);
2770 }
2771
2772 static void __exit alsa_card_ice1712_exit(void)
2773 {
2774 pci_unregister_driver(&driver);
2775 }
2776
2777 module_init(alsa_card_ice1712_init)
2778 module_exit(alsa_card_ice1712_exit)
WRT350N Kernel Patches