m68knommu: move ColdFire pit.c to its own coldfire directory
[wrt350n-kernel.git] / arch / arm / mach-omap2 / board-2430sdp.c
blob64235dee561445b9ae5776912b974771d3589944
1 /*
2 * linux/arch/arm/mach-omap2/board-2430sdp.c
4 * Copyright (C) 2006 Texas Instruments
6 * Modified from mach-omap2/board-generic.c
8 * Initial Code : Based on a patch from Komal Shah and Richard Woodruff
9 * Updated the Code for 2430 SDP : Syed Mohammed Khasim
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/partitions.h>
21 #include <linux/delay.h>
22 #include <linux/err.h>
23 #include <linux/clk.h>
25 #include <asm/hardware.h>
26 #include <asm/mach-types.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/flash.h>
31 #include <asm/arch/gpio.h>
32 #include <asm/arch/mux.h>
33 #include <asm/arch/board.h>
34 #include <asm/arch/common.h>
35 #include <asm/arch/gpmc.h>
36 #include "prcm-regs.h"
38 #include <asm/io.h>
41 #define SDP2430_FLASH_CS 0
42 #define SDP2430_SMC91X_CS 5
44 static struct mtd_partition sdp2430_partitions[] = {
45 /* bootloader (U-Boot, etc) in first sector */
47 .name = "bootloader",
48 .offset = 0,
49 .size = SZ_256K,
50 .mask_flags = MTD_WRITEABLE, /* force read-only */
52 /* bootloader params in the next sector */
54 .name = "params",
55 .offset = MTDPART_OFS_APPEND,
56 .size = SZ_128K,
57 .mask_flags = 0,
59 /* kernel */
61 .name = "kernel",
62 .offset = MTDPART_OFS_APPEND,
63 .size = SZ_2M,
64 .mask_flags = 0
66 /* file system */
68 .name = "filesystem",
69 .offset = MTDPART_OFS_APPEND,
70 .size = MTDPART_SIZ_FULL,
71 .mask_flags = 0
75 static struct flash_platform_data sdp2430_flash_data = {
76 .map_name = "cfi_probe",
77 .width = 2,
78 .parts = sdp2430_partitions,
79 .nr_parts = ARRAY_SIZE(sdp2430_partitions),
82 static struct resource sdp2430_flash_resource = {
83 .start = SDP2430_CS0_BASE,
84 .end = SDP2430_CS0_BASE + SZ_64M - 1,
85 .flags = IORESOURCE_MEM,
88 static struct platform_device sdp2430_flash_device = {
89 .name = "omapflash",
90 .id = 0,
91 .dev = {
92 .platform_data = &sdp2430_flash_data,
94 .num_resources = 1,
95 .resource = &sdp2430_flash_resource,
98 static struct resource sdp2430_smc91x_resources[] = {
99 [0] = {
100 .start = SDP2430_CS0_BASE,
101 .end = SDP2430_CS0_BASE + SZ_64M - 1,
102 .flags = IORESOURCE_MEM,
104 [1] = {
105 .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
106 .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ),
107 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
111 static struct platform_device sdp2430_smc91x_device = {
112 .name = "smc91x",
113 .id = -1,
114 .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources),
115 .resource = sdp2430_smc91x_resources,
118 static struct platform_device *sdp2430_devices[] __initdata = {
119 &sdp2430_smc91x_device,
120 &sdp2430_flash_device,
123 static inline void __init sdp2430_init_smc91x(void)
125 int eth_cs;
126 unsigned long cs_mem_base;
127 unsigned int rate;
128 struct clk *l3ck;
130 eth_cs = SDP2430_SMC91X_CS;
132 l3ck = clk_get(NULL, "core_l3_ck");
133 if (IS_ERR(l3ck))
134 rate = 100000000;
135 else
136 rate = clk_get_rate(l3ck);
138 /* Make sure CS1 timings are correct, for 2430 always muxed */
139 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200);
141 if (rate >= 160000000) {
142 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01);
143 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803);
144 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a);
145 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
146 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
147 } else if (rate >= 130000000) {
148 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
149 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
150 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
151 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F);
152 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4);
153 } else { /* rate = 100000000 */
154 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00);
155 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802);
156 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09);
157 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F);
158 gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2);
161 if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) {
162 printk(KERN_ERR "Failed to request GPMC mem for smc91x\n");
163 return;
166 sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300;
167 sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f;
168 udelay(100);
170 if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) {
171 printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n",
172 OMAP24XX_ETHR_GPIO_IRQ);
173 gpmc_cs_free(eth_cs);
174 return;
176 omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1);
180 static void __init omap_2430sdp_init_irq(void)
182 omap2_init_common_hw();
183 omap_init_irq();
184 omap_gpio_init();
185 sdp2430_init_smc91x();
188 static struct omap_uart_config sdp2430_uart_config __initdata = {
189 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
192 static struct omap_board_config_kernel sdp2430_config[] = {
193 {OMAP_TAG_UART, &sdp2430_uart_config},
196 static void __init omap_2430sdp_init(void)
198 platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
199 omap_board_config = sdp2430_config;
200 omap_board_config_size = ARRAY_SIZE(sdp2430_config);
201 omap_serial_init();
204 static void __init omap_2430sdp_map_io(void)
206 omap2_map_common_io();
209 MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
210 /* Maintainer: Syed Khasim - Texas Instruments Inc */
211 .phys_io = 0x48000000,
212 .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
213 .boot_params = 0x80000100,
214 .map_io = omap_2430sdp_map_io,
215 .init_irq = omap_2430sdp_init_irq,
216 .init_machine = omap_2430sdp_init,
217 .timer = &omap_timer,
218 MACHINE_END