arch/arm/mm/proc-arm720.S

   1 /*
   2  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
   3  *
   4  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
   5  *                     Rob Scott (rscott@mtrob.fdns.net)
   6  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
   7  *  hacked for non-paged-MM by Hyok S. Choi, 2004.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  22  *
  23  *
  24  * These are the low level assembler for performing cache and TLB
  25  * functions on the ARM720T.  The ARM720T has a writethrough IDC
  26  * cache, so we don't need to clean it.
  27  *
  28  *  Changelog:
  29  *   05-09-2000 SJH     Created by moving 720 specific functions
  30  *                      out of 'proc-arm6,7.S' per RMK discussion
  31  *   07-25-2000 SJH     Added idle function.
  32  *   08-25-2000 DBS     Updated for integration of ARM Ltd version.
  33  *   04-20-2004 HSC     modified for non-paged memory management mode.
  34  */
  35 #include <linux/linkage.h>
  36 #include <linux/init.h>
  37 #include <asm/assembler.h>
  38 #include <asm/asm-offsets.h>
  39 #include <asm/elf.h>
  40 #include <asm/pgtable-hwdef.h>
  41 #include <asm/pgtable.h>
  42 #include <asm/ptrace.h>
  43
  44 #include "proc-macros.S"
  45
  46 /*
  47  * Function: arm720_proc_init (void)
  48  *         : arm720_proc_fin (void)
  49  *
  50  * Notes   : This processor does not require these
  51  */
  52 ENTRY(cpu_arm720_dcache_clean_area)
  53 ENTRY(cpu_arm720_proc_init)
  54                 mov     pc, lr
  55
  56 ENTRY(cpu_arm720_proc_fin)
  57                 stmfd   sp!, {lr}
  58                 mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
  59                 msr     cpsr_c, ip
  60                 mrc     p15, 0, r0, c1, c0, 0
  61                 bic     r0, r0, #0x1000                 @ ...i............
  62                 bic     r0, r0, #0x000e                 @ ............wca.
  63                 mcr     p15, 0, r0, c1, c0, 0           @ disable caches
  64                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  65                 ldmfd   sp!, {pc}
  66
  67 /*
  68  * Function: arm720_proc_do_idle(void)
  69  * Params  : r0 = unused
  70  * Purpose : put the processer in proper idle mode
  71  */
  72 ENTRY(cpu_arm720_do_idle)
  73                 mov     pc, lr
  74
  75 /*
  76  * Function: arm720_switch_mm(unsigned long pgd_phys)
  77  * Params  : pgd_phys   Physical address of page table
  78  * Purpose : Perform a task switch, saving the old process' state and restoring
  79  *           the new.
  80  */
  81 ENTRY(cpu_arm720_switch_mm)
  82 #ifdef CONFIG_MMU
  83                 mov     r1, #0
  84                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  85                 mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
  86                 mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
  87 #endif
  88                 mov     pc, lr
  89
  90 /*
  91  * Function: arm720_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
  92  * Params  : r0 = Address to set
  93  *         : r1 = value to set
  94  * Purpose : Set a PTE and flush it out of any WB cache
  95  */
  96                 .align  5
  97 ENTRY(cpu_arm720_set_pte_ext)
  98 #ifdef CONFIG_MMU
  99                 str     r1, [r0], #-2048                @ linux version
 100
 101                 eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
 102
 103                 bic     r2, r1, #PTE_SMALL_AP_MASK
 104                 bic     r2, r2, #PTE_TYPE_MASK
 105                 orr     r2, r2, #PTE_TYPE_SMALL
 106
 107                 tst     r1, #L_PTE_USER                 @ User?
 108                 orrne   r2, r2, #PTE_SMALL_AP_URO_SRW
 109
 110                 tst     r1, #L_PTE_WRITE | L_PTE_DIRTY  @ Write and Dirty?
 111                 orreq   r2, r2, #PTE_SMALL_AP_UNO_SRW
 112
 113                 tst     r1, #L_PTE_PRESENT | L_PTE_YOUNG        @ Present and Young
 114                 movne   r2, #0
 115
 116                 str     r2, [r0]                        @ hardware version
 117 #endif
 118                 mov     pc, lr
 119
 120 /*
 121  * Function: arm720_reset
 122  * Params  : r0 = address to jump to
 123  * Notes   : This sets up everything for a reset
 124  */
 125 ENTRY(cpu_arm720_reset)
 126                 mov     ip, #0
 127                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
 128 #ifdef CONFIG_MMU
 129                 mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
 130 #endif
 131                 mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
 132                 bic     ip, ip, #0x000f                 @ ............wcam
 133                 bic     ip, ip, #0x2100                 @ ..v....s........
 134                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
 135                 mov     pc, r0
 136
 137         __INIT
 138
 139         .type   __arm710_setup, #function
 140 __arm710_setup:
 141         mov     r0, #0
 142         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 143 #ifdef CONFIG_MMU
 144         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 145 #endif
 146         mrc     p15, 0, r0, c1, c0              @ get control register
 147         ldr     r5, arm710_cr1_clear
 148         bic     r0, r0, r5
 149         ldr     r5, arm710_cr1_set
 150         orr     r0, r0, r5
 151         mov     pc, lr                          @ __ret (head.S)
 152         .size   __arm710_setup, . - __arm710_setup
 153
 154         /*
 155          *  R
 156          * .RVI ZFRS BLDP WCAM
 157          * .... 0001 ..11 1101
 158          *
 159          */
 160         .type   arm710_cr1_clear, #object
 161         .type   arm710_cr1_set, #object
 162 arm710_cr1_clear:
 163         .word   0x0f3f
 164 arm710_cr1_set:
 165         .word   0x013d
 166
 167         .type   __arm720_setup, #function
 168 __arm720_setup:
 169         mov     r0, #0
 170         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 171 #ifdef CONFIG_MMU
 172         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 173 #endif
 174         adr     r5, arm720_crval
 175         ldmia   r5, {r5, r6}
 176         mrc     p15, 0, r0, c1, c0              @ get control register
 177         bic     r0, r0, r5
 178         orr     r0, r0, r6
 179         mov     pc, lr                          @ __ret (head.S)
 180         .size   __arm720_setup, . - __arm720_setup
 181
 182         /*
 183          *  R
 184          * .RVI ZFRS BLDP WCAM
 185          * ..1. 1001 ..11 1101
 186          *
 187          */
 188         .type   arm720_crval, #object
 189 arm720_crval:
 190         crval   clear=0x00002f3f, mmuset=0x0000213d, ucset=0x00000130
 191
 192                 __INITDATA
 193
 194 /*
 195  * Purpose : Function pointers used to access above functions - all calls
 196  *           come through these
 197  */
 198                 .type   arm720_processor_functions, #object
 199 ENTRY(arm720_processor_functions)
 200                 .word   v4t_late_abort
 201                 .word   cpu_arm720_proc_init
 202                 .word   cpu_arm720_proc_fin
 203                 .word   cpu_arm720_reset
 204                 .word   cpu_arm720_do_idle
 205                 .word   cpu_arm720_dcache_clean_area
 206                 .word   cpu_arm720_switch_mm
 207                 .word   cpu_arm720_set_pte_ext
 208                 .size   arm720_processor_functions, . - arm720_processor_functions
 209
 210                 .section ".rodata"
 211
 212                 .type   cpu_arch_name, #object
 213 cpu_arch_name:  .asciz  "armv4t"
 214                 .size   cpu_arch_name, . - cpu_arch_name
 215
 216                 .type   cpu_elf_name, #object
 217 cpu_elf_name:   .asciz  "v4"
 218                 .size   cpu_elf_name, . - cpu_elf_name
 219
 220                 .type   cpu_arm710_name, #object
 221 cpu_arm710_name:
 222                 .asciz  "ARM710T"
 223                 .size   cpu_arm710_name, . - cpu_arm710_name
 224
 225                 .type   cpu_arm720_name, #object
 226 cpu_arm720_name:
 227                 .asciz  "ARM720T"
 228                 .size   cpu_arm720_name, . - cpu_arm720_name
 229
 230                 .align
 231
 232 /*
 233  * See linux/include/asm-arm/procinfo.h for a definition of this structure.
 234  */
 235
 236                 .section ".proc.info.init", #alloc, #execinstr
 237
 238                 .type   __arm710_proc_info, #object
 239 __arm710_proc_info:
 240                 .long   0x41807100                              @ cpu_val
 241                 .long   0xffffff00                              @ cpu_mask
 242                 .long   PMD_TYPE_SECT | \
 243                         PMD_SECT_BUFFERABLE | \
 244                         PMD_SECT_CACHEABLE | \
 245                         PMD_BIT4 | \
 246                         PMD_SECT_AP_WRITE | \
 247                         PMD_SECT_AP_READ
 248                 .long   PMD_TYPE_SECT | \
 249                         PMD_BIT4 | \
 250                         PMD_SECT_AP_WRITE | \
 251                         PMD_SECT_AP_READ
 252                 b       __arm710_setup                          @ cpu_flush
 253                 .long   cpu_arch_name                           @ arch_name
 254                 .long   cpu_elf_name                            @ elf_name
 255                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 256                 .long   cpu_arm710_name                         @ name
 257                 .long   arm720_processor_functions
 258                 .long   v4_tlb_fns
 259                 .long   v4wt_user_fns
 260                 .long   v4_cache_fns
 261                 .size   __arm710_proc_info, . - __arm710_proc_info
 262
 263                 .type   __arm720_proc_info, #object
 264 __arm720_proc_info:
 265                 .long   0x41807200                              @ cpu_val
 266                 .long   0xffffff00                              @ cpu_mask
 267                 .long   PMD_TYPE_SECT | \
 268                         PMD_SECT_BUFFERABLE | \
 269                         PMD_SECT_CACHEABLE | \
 270                         PMD_BIT4 | \
 271                         PMD_SECT_AP_WRITE | \
 272                         PMD_SECT_AP_READ
 273                 .long   PMD_TYPE_SECT | \
 274                         PMD_BIT4 | \
 275                         PMD_SECT_AP_WRITE | \
 276                         PMD_SECT_AP_READ
 277                 b       __arm720_setup                          @ cpu_flush
 278                 .long   cpu_arch_name                           @ arch_name
 279                 .long   cpu_elf_name                            @ elf_name
 280                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 281                 .long   cpu_arm720_name                         @ name
 282                 .long   arm720_processor_functions
 283                 .long   v4_tlb_fns
 284                 .long   v4wt_user_fns
 285                 .long   v4_cache_fns
 286                 .size   __arm720_proc_info, . - __arm720_proc_info