x86: re-add reboot fixups
[wrt350n-kernel.git] / include / media / saa7115.h
blobf677dfb9d373d7f87364ae8fd0b6d881c78bc8d3
1 /*
2 saa7115.h - definition for saa7113/4/5 inputs and frequency flags
4 Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #ifndef _SAA7115_H_
22 #define _SAA7115_H_
24 /* SAA7113/4/5 HW inputs */
25 #define SAA7115_COMPOSITE0 0
26 #define SAA7115_COMPOSITE1 1
27 #define SAA7115_COMPOSITE2 2
28 #define SAA7115_COMPOSITE3 3
29 #define SAA7115_COMPOSITE4 4 /* not available for the saa7113 */
30 #define SAA7115_COMPOSITE5 5 /* not available for the saa7113 */
31 #define SAA7115_SVIDEO0 6
32 #define SAA7115_SVIDEO1 7
33 #define SAA7115_SVIDEO2 8
34 #define SAA7115_SVIDEO3 9
36 /* SAA7115 v4l2_crystal_freq frequency values */
37 #define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */
38 #define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */
40 /* SAA7115 v4l2_crystal_freq audio clock control flags */
41 #define SAA7115_FREQ_FL_UCGC (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */
42 #define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
43 #define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
45 #define SAA7115_IPORT_ON 1
46 #define SAA7115_IPORT_OFF 0
48 #endif