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x86: i8259A: remove redundant irq_descinitialization
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_ethtool.c
bloba119cbd8dbb8b2aad03186d12a8e2150f3752a1b
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for ixgbe */
30
31 #include <linux/types.h>
32 #include <linux/module.h>
33 #include <linux/pci.h>
34 #include <linux/netdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/vmalloc.h>
37 #include <linux/uaccess.h>
38
39 #include "ixgbe.h"
40
41
42 #define IXGBE_ALL_RAR_ENTRIES 16
43
44 struct ixgbe_stats {
45 char stat_string[ETH_GSTRING_LEN];
46 int sizeof_stat;
47 int stat_offset;
48 };
49
50 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
51 offsetof(struct ixgbe_adapter, m)
52 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
53 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
54 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
55 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
56 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
57 {"lsc_int", IXGBE_STAT(lsc_int)},
58 {"tx_busy", IXGBE_STAT(tx_busy)},
59 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
60 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
61 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
62 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
63 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
64 {"multicast", IXGBE_STAT(net_stats.multicast)},
65 {"broadcast", IXGBE_STAT(stats.bprc)},
66 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
67 {"collisions", IXGBE_STAT(net_stats.collisions)},
68 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
69 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
70 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
71 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
72 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
73 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
74 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
75 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
76 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
77 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
78 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
79 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
80 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
81 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
82 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
83 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
84 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
85 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
86 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
87 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
88 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
89 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
90 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
91 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
92 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
93 };
94
95 #define IXGBE_QUEUE_STATS_LEN \
96 ((((struct ixgbe_adapter *)netdev->priv)->num_tx_queues + \
97 ((struct ixgbe_adapter *)netdev->priv)->num_rx_queues) * \
98 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
99 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
100 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + IXGBE_QUEUE_STATS_LEN)
101
102 static int ixgbe_get_settings(struct net_device *netdev,
103 struct ethtool_cmd *ecmd)
104 {
105 struct ixgbe_adapter *adapter = netdev_priv(netdev);
106 struct ixgbe_hw *hw = &adapter->hw;
107 u32 link_speed = 0;
108 bool link_up;
109
110 ecmd->supported = SUPPORTED_10000baseT_Full;
111 ecmd->autoneg = AUTONEG_ENABLE;
112 ecmd->transceiver = XCVR_EXTERNAL;
113 if (hw->phy.media_type == ixgbe_media_type_copper) {
114 ecmd->supported |= (SUPPORTED_1000baseT_Full |
115 SUPPORTED_TP | SUPPORTED_Autoneg);
116
117 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
118 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
119 ecmd->advertising |= ADVERTISED_10000baseT_Full;
120 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
121 ecmd->advertising |= ADVERTISED_1000baseT_Full;
122
123 ecmd->port = PORT_TP;
124 } else {
125 ecmd->supported |= SUPPORTED_FIBRE;
126 ecmd->advertising = (ADVERTISED_10000baseT_Full |
127 ADVERTISED_FIBRE);
128 ecmd->port = PORT_FIBRE;
129 }
130
131 adapter->hw.mac.ops.check_link(hw, &(link_speed), &link_up);
132 if (link_up) {
133 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
134 SPEED_10000 : SPEED_1000;
135 ecmd->duplex = DUPLEX_FULL;
136 } else {
137 ecmd->speed = -1;
138 ecmd->duplex = -1;
139 }
140
141 return 0;
142 }
143
144 static int ixgbe_set_settings(struct net_device *netdev,
145 struct ethtool_cmd *ecmd)
146 {
147 struct ixgbe_adapter *adapter = netdev_priv(netdev);
148 struct ixgbe_hw *hw = &adapter->hw;
149
150 switch (hw->phy.media_type) {
151 case ixgbe_media_type_fiber:
152 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
153 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
154 return -EINVAL;
155 /* in this case we currently only support 10Gb/FULL */
156 break;
157 default:
158 break;
159 }
160
161 return 0;
162 }
163
164 static void ixgbe_get_pauseparam(struct net_device *netdev,
165 struct ethtool_pauseparam *pause)
166 {
167 struct ixgbe_adapter *adapter = netdev_priv(netdev);
168 struct ixgbe_hw *hw = &adapter->hw;
169
170 pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
171
172 if (hw->fc.type == ixgbe_fc_rx_pause) {
173 pause->rx_pause = 1;
174 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
175 pause->tx_pause = 1;
176 } else if (hw->fc.type == ixgbe_fc_full) {
177 pause->rx_pause = 1;
178 pause->tx_pause = 1;
179 }
180 }
181
182 static int ixgbe_set_pauseparam(struct net_device *netdev,
183 struct ethtool_pauseparam *pause)
184 {
185 struct ixgbe_adapter *adapter = netdev_priv(netdev);
186 struct ixgbe_hw *hw = &adapter->hw;
187
188 if ((pause->autoneg == AUTONEG_ENABLE) ||
189 (pause->rx_pause && pause->tx_pause))
190 hw->fc.type = ixgbe_fc_full;
191 else if (pause->rx_pause && !pause->tx_pause)
192 hw->fc.type = ixgbe_fc_rx_pause;
193 else if (!pause->rx_pause && pause->tx_pause)
194 hw->fc.type = ixgbe_fc_tx_pause;
195 else if (!pause->rx_pause && !pause->tx_pause)
196 hw->fc.type = ixgbe_fc_none;
197 else
198 return -EINVAL;
199
200 hw->fc.original_type = hw->fc.type;
201
202 if (netif_running(netdev))
203 ixgbe_reinit_locked(adapter);
204 else
205 ixgbe_reset(adapter);
206
207 return 0;
208 }
209
210 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
211 {
212 struct ixgbe_adapter *adapter = netdev_priv(netdev);
213 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
214 }
215
216 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
217 {
218 struct ixgbe_adapter *adapter = netdev_priv(netdev);
219 if (data)
220 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
221 else
222 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
223
224 if (netif_running(netdev))
225 ixgbe_reinit_locked(adapter);
226 else
227 ixgbe_reset(adapter);
228
229 return 0;
230 }
231
232 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
233 {
234 return (netdev->features & NETIF_F_HW_CSUM) != 0;
235 }
236
237 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
238 {
239 if (data)
240 netdev->features |= NETIF_F_HW_CSUM;
241 else
242 netdev->features &= ~NETIF_F_HW_CSUM;
243
244 return 0;
245 }
246
247 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
248 {
249
250 if (data) {
251 netdev->features |= NETIF_F_TSO;
252 netdev->features |= NETIF_F_TSO6;
253 } else {
254 netdev->features &= ~NETIF_F_TSO;
255 netdev->features &= ~NETIF_F_TSO6;
256 }
257 return 0;
258 }
259
260 static u32 ixgbe_get_msglevel(struct net_device *netdev)
261 {
262 struct ixgbe_adapter *adapter = netdev_priv(netdev);
263 return adapter->msg_enable;
264 }
265
266 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
267 {
268 struct ixgbe_adapter *adapter = netdev_priv(netdev);
269 adapter->msg_enable = data;
270 }
271
272 static int ixgbe_get_regs_len(struct net_device *netdev)
273 {
274 #define IXGBE_REGS_LEN 1128
275 return IXGBE_REGS_LEN * sizeof(u32);
276 }
277
278 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
279
280 static void ixgbe_get_regs(struct net_device *netdev,
281 struct ethtool_regs *regs, void *p)
282 {
283 struct ixgbe_adapter *adapter = netdev_priv(netdev);
284 struct ixgbe_hw *hw = &adapter->hw;
285 u32 *regs_buff = p;
286 u8 i;
287
288 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
289
290 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
291
292 /* General Registers */
293 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
294 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
295 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
296 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
297 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
298 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
299 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
300 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
301
302 /* NVM Register */
303 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
304 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
305 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
306 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
307 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
308 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
309 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
310 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
311 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
312 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
313
314 /* Interrupt */
315 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
316 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
317 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
318 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
319 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
320 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
321 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
322 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
323 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
324 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
325 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL);
326 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
327
328 /* Flow Control */
329 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
330 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
331 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
332 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
333 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
334 for (i = 0; i < 8; i++)
335 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
336 for (i = 0; i < 8; i++)
337 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
338 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
339 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
340
341 /* Receive DMA */
342 for (i = 0; i < 64; i++)
343 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
344 for (i = 0; i < 64; i++)
345 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
346 for (i = 0; i < 64; i++)
347 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
348 for (i = 0; i < 64; i++)
349 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
350 for (i = 0; i < 64; i++)
351 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
352 for (i = 0; i < 64; i++)
353 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
354 for (i = 0; i < 16; i++)
355 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
356 for (i = 0; i < 16; i++)
357 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
358 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
359 for (i = 0; i < 8; i++)
360 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
361 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
362 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
363
364 /* Receive */
365 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
366 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
367 for (i = 0; i < 16; i++)
368 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
369 for (i = 0; i < 16; i++)
370 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
371 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE);
372 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
373 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
374 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
375 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
376 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
377 for (i = 0; i < 8; i++)
378 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
379 for (i = 0; i < 8; i++)
380 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
381 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
382
383 /* Transmit */
384 for (i = 0; i < 32; i++)
385 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
386 for (i = 0; i < 32; i++)
387 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
388 for (i = 0; i < 32; i++)
389 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
390 for (i = 0; i < 32; i++)
391 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
392 for (i = 0; i < 32; i++)
393 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
394 for (i = 0; i < 32; i++)
395 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
396 for (i = 0; i < 32; i++)
397 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
398 for (i = 0; i < 32; i++)
399 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
400 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
401 for (i = 0; i < 16; i++)
402 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
403 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
404 for (i = 0; i < 8; i++)
405 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
406 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
407
408 /* Wake Up */
409 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
410 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
411 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
412 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
413 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
414 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
415 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
416 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
417 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
418
419 /* DCE */
420 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
421 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
422 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
423 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
424 for (i = 0; i < 8; i++)
425 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
426 for (i = 0; i < 8; i++)
427 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
428 for (i = 0; i < 8; i++)
429 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
430 for (i = 0; i < 8; i++)
431 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
432 for (i = 0; i < 8; i++)
433 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
434 for (i = 0; i < 8; i++)
435 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
436
437 /* Statistics */
438 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
439 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
440 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
441 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
442 for (i = 0; i < 8; i++)
443 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
444 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
445 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
446 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
447 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
448 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
449 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
450 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
451 for (i = 0; i < 8; i++)
452 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
453 for (i = 0; i < 8; i++)
454 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
455 for (i = 0; i < 8; i++)
456 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
457 for (i = 0; i < 8; i++)
458 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
459 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
460 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
461 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
462 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
463 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
464 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
465 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
466 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
467 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
468 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
469 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
470 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
471 for (i = 0; i < 8; i++)
472 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
473 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
474 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
475 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
476 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
477 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
478 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
479 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
480 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
481 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
482 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
483 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
484 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
485 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
486 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
487 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
488 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
489 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
490 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
491 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
492 for (i = 0; i < 16; i++)
493 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
494 for (i = 0; i < 16; i++)
495 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
496 for (i = 0; i < 16; i++)
497 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
498 for (i = 0; i < 16; i++)
499 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
500
501 /* MAC */
502 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
503 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
504 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
505 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
506 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
507 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
508 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
509 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
510 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
511 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
512 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
513 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
514 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
515 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
516 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
517 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
518 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
519 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
520 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
521 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
522 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
523 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
524 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
525 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
526 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
527 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
528 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
529 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
530 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
531 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
532 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
533 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
534 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
535
536 /* Diagnostic */
537 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
538 for (i = 0; i < 8; i++)
539 regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
540 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
541 regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
542 regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
543 regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
544 regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
545 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
546 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
547 for (i = 0; i < 8; i++)
548 regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
549 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
550 regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
551 regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
552 regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
553 regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
554 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
555 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
556 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
557 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
558 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
559 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
560 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
561 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
562 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
563 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
564 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
565 for (i = 0; i < 8; i++)
566 regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
567 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
568 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
569 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
570 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
571 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
572 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
573 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
574 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
575 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
576 }
577
578 static int ixgbe_get_eeprom_len(struct net_device *netdev)
579 {
580 struct ixgbe_adapter *adapter = netdev_priv(netdev);
581 return adapter->hw.eeprom.word_size * 2;
582 }
583
584 static int ixgbe_get_eeprom(struct net_device *netdev,
585 struct ethtool_eeprom *eeprom, u8 *bytes)
586 {
587 struct ixgbe_adapter *adapter = netdev_priv(netdev);
588 struct ixgbe_hw *hw = &adapter->hw;
589 u16 *eeprom_buff;
590 int first_word, last_word, eeprom_len;
591 int ret_val = 0;
592 u16 i;
593
594 if (eeprom->len == 0)
595 return -EINVAL;
596
597 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
598
599 first_word = eeprom->offset >> 1;
600 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
601 eeprom_len = last_word - first_word + 1;
602
603 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
604 if (!eeprom_buff)
605 return -ENOMEM;
606
607 for (i = 0; i < eeprom_len; i++) {
608 if ((ret_val = ixgbe_read_eeprom(hw, first_word + i,
609 &eeprom_buff[i])))
610 break;
611 }
612
613 /* Device's eeprom is always little-endian, word addressable */
614 for (i = 0; i < eeprom_len; i++)
615 le16_to_cpus(&eeprom_buff[i]);
616
617 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
618 kfree(eeprom_buff);
619
620 return ret_val;
621 }
622
623 static void ixgbe_get_drvinfo(struct net_device *netdev,
624 struct ethtool_drvinfo *drvinfo)
625 {
626 struct ixgbe_adapter *adapter = netdev_priv(netdev);
627
628 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
629 strncpy(drvinfo->version, ixgbe_driver_version, 32);
630 strncpy(drvinfo->fw_version, "N/A", 32);
631 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
632 drvinfo->n_stats = IXGBE_STATS_LEN;
633 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
634 }
635
636 static void ixgbe_get_ringparam(struct net_device *netdev,
637 struct ethtool_ringparam *ring)
638 {
639 struct ixgbe_adapter *adapter = netdev_priv(netdev);
640 struct ixgbe_ring *tx_ring = adapter->tx_ring;
641 struct ixgbe_ring *rx_ring = adapter->rx_ring;
642
643 ring->rx_max_pending = IXGBE_MAX_RXD;
644 ring->tx_max_pending = IXGBE_MAX_TXD;
645 ring->rx_mini_max_pending = 0;
646 ring->rx_jumbo_max_pending = 0;
647 ring->rx_pending = rx_ring->count;
648 ring->tx_pending = tx_ring->count;
649 ring->rx_mini_pending = 0;
650 ring->rx_jumbo_pending = 0;
651 }
652
653 static int ixgbe_set_ringparam(struct net_device *netdev,
654 struct ethtool_ringparam *ring)
655 {
656 struct ixgbe_adapter *adapter = netdev_priv(netdev);
657 struct ixgbe_tx_buffer *old_buf;
658 struct ixgbe_rx_buffer *old_rx_buf;
659 void *old_desc;
660 int i, err;
661 u32 new_rx_count, new_tx_count, old_size;
662 dma_addr_t old_dma;
663
664 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
665 return -EINVAL;
666
667 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
668 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
669 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
670
671 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
672 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
673 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
674
675 if ((new_tx_count == adapter->tx_ring->count) &&
676 (new_rx_count == adapter->rx_ring->count)) {
677 /* nothing to do */
678 return 0;
679 }
680
681 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
682 msleep(1);
683
684 if (netif_running(netdev))
685 ixgbe_down(adapter);
686
687 /*
688 * We can't just free everything and then setup again,
689 * because the ISRs in MSI-X mode get passed pointers
690 * to the tx and rx ring structs.
691 */
692 if (new_tx_count != adapter->tx_ring->count) {
693 for (i = 0; i < adapter->num_tx_queues; i++) {
694 /* Save existing descriptor ring */
695 old_buf = adapter->tx_ring[i].tx_buffer_info;
696 old_desc = adapter->tx_ring[i].desc;
697 old_size = adapter->tx_ring[i].size;
698 old_dma = adapter->tx_ring[i].dma;
699 /* Try to allocate a new one */
700 adapter->tx_ring[i].tx_buffer_info = NULL;
701 adapter->tx_ring[i].desc = NULL;
702 adapter->tx_ring[i].count = new_tx_count;
703 err = ixgbe_setup_tx_resources(adapter,
704 &adapter->tx_ring[i]);
705 if (err) {
706 /* Restore the old one so at least
707 the adapter still works, even if
708 we failed the request */
709 adapter->tx_ring[i].tx_buffer_info = old_buf;
710 adapter->tx_ring[i].desc = old_desc;
711 adapter->tx_ring[i].size = old_size;
712 adapter->tx_ring[i].dma = old_dma;
713 goto err_setup;
714 }
715 /* Free the old buffer manually */
716 vfree(old_buf);
717 pci_free_consistent(adapter->pdev, old_size,
718 old_desc, old_dma);
719 }
720 }
721
722 if (new_rx_count != adapter->rx_ring->count) {
723 for (i = 0; i < adapter->num_rx_queues; i++) {
724
725 old_rx_buf = adapter->rx_ring[i].rx_buffer_info;
726 old_desc = adapter->rx_ring[i].desc;
727 old_size = adapter->rx_ring[i].size;
728 old_dma = adapter->rx_ring[i].dma;
729
730 adapter->rx_ring[i].rx_buffer_info = NULL;
731 adapter->rx_ring[i].desc = NULL;
732 adapter->rx_ring[i].dma = 0;
733 adapter->rx_ring[i].count = new_rx_count;
734 err = ixgbe_setup_rx_resources(adapter,
735 &adapter->rx_ring[i]);
736 if (err) {
737 adapter->rx_ring[i].rx_buffer_info = old_rx_buf;
738 adapter->rx_ring[i].desc = old_desc;
739 adapter->rx_ring[i].size = old_size;
740 adapter->rx_ring[i].dma = old_dma;
741 goto err_setup;
742 }
743
744 vfree(old_rx_buf);
745 pci_free_consistent(adapter->pdev, old_size, old_desc,
746 old_dma);
747 }
748 }
749
750 err = 0;
751 err_setup:
752 if (netif_running(adapter->netdev))
753 ixgbe_up(adapter);
754
755 clear_bit(__IXGBE_RESETTING, &adapter->state);
756 return err;
757 }
758
759 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
760 {
761 switch (sset) {
762 case ETH_SS_STATS:
763 return IXGBE_STATS_LEN;
764 default:
765 return -EOPNOTSUPP;
766 }
767 }
768
769 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
770 struct ethtool_stats *stats, u64 *data)
771 {
772 struct ixgbe_adapter *adapter = netdev_priv(netdev);
773 u64 *queue_stat;
774 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
775 int j, k;
776 int i;
777
778 ixgbe_update_stats(adapter);
779 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
780 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
781 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
782 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
783 }
784 for (j = 0; j < adapter->num_tx_queues; j++) {
785 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
786 for (k = 0; k < stat_count; k++)
787 data[i + k] = queue_stat[k];
788 i += k;
789 }
790 for (j = 0; j < adapter->num_rx_queues; j++) {
791 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
792 for (k = 0; k < stat_count; k++)
793 data[i + k] = queue_stat[k];
794 i += k;
795 }
796 }
797
798 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
799 u8 *data)
800 {
801 struct ixgbe_adapter *adapter = netdev_priv(netdev);
802 u8 *p = data;
803 int i;
804
805 switch (stringset) {
806 case ETH_SS_STATS:
807 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
808 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
809 ETH_GSTRING_LEN);
810 p += ETH_GSTRING_LEN;
811 }
812 for (i = 0; i < adapter->num_tx_queues; i++) {
813 sprintf(p, "tx_queue_%u_packets", i);
814 p += ETH_GSTRING_LEN;
815 sprintf(p, "tx_queue_%u_bytes", i);
816 p += ETH_GSTRING_LEN;
817 }
818 for (i = 0; i < adapter->num_rx_queues; i++) {
819 sprintf(p, "rx_queue_%u_packets", i);
820 p += ETH_GSTRING_LEN;
821 sprintf(p, "rx_queue_%u_bytes", i);
822 p += ETH_GSTRING_LEN;
823 }
824 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
825 break;
826 }
827 }
828
829
830 static void ixgbe_get_wol(struct net_device *netdev,
831 struct ethtool_wolinfo *wol)
832 {
833 wol->supported = 0;
834 wol->wolopts = 0;
835
836 return;
837 }
838
839 static int ixgbe_nway_reset(struct net_device *netdev)
840 {
841 struct ixgbe_adapter *adapter = netdev_priv(netdev);
842
843 if (netif_running(netdev))
844 ixgbe_reinit_locked(adapter);
845
846 return 0;
847 }
848
849 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
850 {
851 struct ixgbe_adapter *adapter = netdev_priv(netdev);
852 u32 led_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_LEDCTL);
853 u32 i;
854
855 if (!data || data > 300)
856 data = 300;
857
858 for (i = 0; i < (data * 1000); i += 400) {
859 ixgbe_led_on(&adapter->hw, IXGBE_LED_ON);
860 msleep_interruptible(200);
861 ixgbe_led_off(&adapter->hw, IXGBE_LED_ON);
862 msleep_interruptible(200);
863 }
864
865 /* Restore LED settings */
866 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
867
868 return 0;
869 }
870
871 static int ixgbe_get_coalesce(struct net_device *netdev,
872 struct ethtool_coalesce *ec)
873 {
874 struct ixgbe_adapter *adapter = netdev_priv(netdev);
875
876 if (adapter->rx_eitr == 0)
877 ec->rx_coalesce_usecs = 0;
878 else
879 ec->rx_coalesce_usecs = 1000000 / adapter->rx_eitr;
880
881 if (adapter->tx_eitr == 0)
882 ec->tx_coalesce_usecs = 0;
883 else
884 ec->tx_coalesce_usecs = 1000000 / adapter->tx_eitr;
885
886 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
887 return 0;
888 }
889
890 static int ixgbe_set_coalesce(struct net_device *netdev,
891 struct ethtool_coalesce *ec)
892 {
893 struct ixgbe_adapter *adapter = netdev_priv(netdev);
894
895 if ((ec->rx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
896 ((ec->rx_coalesce_usecs > 0) &&
897 (ec->rx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
898 return -EINVAL;
899 if ((ec->tx_coalesce_usecs > IXGBE_MAX_ITR_USECS) ||
900 ((ec->tx_coalesce_usecs > 0) &&
901 (ec->tx_coalesce_usecs < IXGBE_MIN_ITR_USECS)))
902 return -EINVAL;
903
904 /* convert to rate of irq's per second */
905 if (ec->rx_coalesce_usecs == 0)
906 adapter->rx_eitr = 0;
907 else
908 adapter->rx_eitr = (1000000 / ec->rx_coalesce_usecs);
909
910 if (ec->tx_coalesce_usecs == 0)
911 adapter->tx_eitr = 0;
912 else
913 adapter->tx_eitr = (1000000 / ec->tx_coalesce_usecs);
914
915 if (ec->tx_max_coalesced_frames_irq)
916 adapter->tx_ring[0].work_limit =
917 ec->tx_max_coalesced_frames_irq;
918
919 if (netif_running(netdev)) {
920 ixgbe_down(adapter);
921 ixgbe_up(adapter);
922 }
923
924 return 0;
925 }
926
927
928 static struct ethtool_ops ixgbe_ethtool_ops = {
929 .get_settings = ixgbe_get_settings,
930 .set_settings = ixgbe_set_settings,
931 .get_drvinfo = ixgbe_get_drvinfo,
932 .get_regs_len = ixgbe_get_regs_len,
933 .get_regs = ixgbe_get_regs,
934 .get_wol = ixgbe_get_wol,
935 .nway_reset = ixgbe_nway_reset,
936 .get_link = ethtool_op_get_link,
937 .get_eeprom_len = ixgbe_get_eeprom_len,
938 .get_eeprom = ixgbe_get_eeprom,
939 .get_ringparam = ixgbe_get_ringparam,
940 .set_ringparam = ixgbe_set_ringparam,
941 .get_pauseparam = ixgbe_get_pauseparam,
942 .set_pauseparam = ixgbe_set_pauseparam,
943 .get_rx_csum = ixgbe_get_rx_csum,
944 .set_rx_csum = ixgbe_set_rx_csum,
945 .get_tx_csum = ixgbe_get_tx_csum,
946 .set_tx_csum = ixgbe_set_tx_csum,
947 .get_sg = ethtool_op_get_sg,
948 .set_sg = ethtool_op_set_sg,
949 .get_msglevel = ixgbe_get_msglevel,
950 .set_msglevel = ixgbe_set_msglevel,
951 .get_tso = ethtool_op_get_tso,
952 .set_tso = ixgbe_set_tso,
953 .get_strings = ixgbe_get_strings,
954 .phys_id = ixgbe_phys_id,
955 .get_sset_count = ixgbe_get_sset_count,
956 .get_ethtool_stats = ixgbe_get_ethtool_stats,
957 .get_coalesce = ixgbe_get_coalesce,
958 .set_coalesce = ixgbe_set_coalesce,
959 };
960
961 void ixgbe_set_ethtool_ops(struct net_device *netdev)
962 {
963 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
964 }
WRT350N Kernel Patches