include/asm-arm/plat-s3c24xx/dma.h

   1 /* linux/include/asm-arm/plat-s3c24xx/dma.h
   2  *
   3  * Copyright (C) 2006 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Samsung S3C24XX DMA support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 extern struct sysdev_class dma_sysclass;
  14 extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
  15
  16 #define DMA_CH_VALID            (1<<31)
  17 #define DMA_CH_NEVER            (1<<30)
  18
  19 struct s3c24xx_dma_addr {
  20         unsigned long           from;
  21         unsigned long           to;
  22 };
  23
  24 /* struct s3c24xx_dma_map
  25  *
  26  * this holds the mapping information for the channel selected
  27  * to be connected to the specified device
  28 */
  29
  30 struct s3c24xx_dma_map {
  31         const char              *name;
  32         struct s3c24xx_dma_addr  hw_addr;
  33
  34         unsigned long            channels[S3C2410_DMA_CHANNELS];
  35         unsigned long            channels_rx[S3C2410_DMA_CHANNELS];
  36 };
  37
  38 struct s3c24xx_dma_selection {
  39         struct s3c24xx_dma_map  *map;
  40         unsigned long            map_size;
  41         unsigned long            dcon_mask;
  42
  43         void    (*select)(struct s3c2410_dma_chan *chan,
  44                           struct s3c24xx_dma_map *map);
  45
  46         void    (*direction)(struct s3c2410_dma_chan *chan,
  47                              struct s3c24xx_dma_map *map,
  48                              enum s3c2410_dmasrc dir);
  49 };
  50
  51 extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
  52
  53 /* struct s3c24xx_dma_order_ch
  54  *
  55  * channel map for one of the `enum dma_ch` dma channels. the list
  56  * entry contains a set of low-level channel numbers, orred with
  57  * DMA_CH_VALID, which are checked in the order in the array.
  58 */
  59
  60 struct s3c24xx_dma_order_ch {
  61         unsigned int    list[S3C2410_DMA_CHANNELS];     /* list of channels */
  62         unsigned int    flags;                          /* flags */
  63 };
  64
  65 /* struct s3c24xx_dma_order
  66  *
  67  * information provided by either the core or the board to give the
  68  * dma system a hint on how to allocate channels
  69 */
  70
  71 struct s3c24xx_dma_order {
  72         struct s3c24xx_dma_order_ch     channels[DMACH_MAX];
  73 };
  74
  75 extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
  76
  77 /* DMA init code, called from the cpu support code */
  78
  79 extern int s3c2410_dma_init(void);
  80
  81 extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
  82                             unsigned int stride);