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Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus
[wrt350n-kernel.git] / drivers / net / ixgbe / ixgbe_main.c
blobc2095ce531c9b7fdb9785a0dea063f45516b8f10
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
35 #include <linux/in.h>
36 #include <linux/ip.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/ethtool.h>
42 #include <linux/if_vlan.h>
43
44 #include "ixgbe.h"
45 #include "ixgbe_common.h"
46
47 char ixgbe_driver_name[] = "ixgbe";
48 static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
50
51 #define DRV_VERSION "1.1.18"
52 const char ixgbe_driver_version[] = DRV_VERSION;
53 static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
55
56 static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598] = &ixgbe_82598_info,
58 };
59
60 /* ixgbe_pci_tbl - PCI Device ID Table
61 *
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
70 board_82598 },
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
72 board_82598 },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
74 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
76 board_82598 },
77
78 /* required last entry */
79 {0, }
80 };
81 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82
83 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
85 MODULE_LICENSE("GPL");
86 MODULE_VERSION(DRV_VERSION);
87
88 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
91 {
92 u32 ctrl_ext;
93
94 /* Let firmware take over control of h/w */
95 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
96 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
97 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
98 }
99
100 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
101 {
102 u32 ctrl_ext;
103
104 /* Let firmware know the driver has taken over */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
108 }
109
110 #ifdef DEBUG
111 /**
112 * ixgbe_get_hw_dev_name - return device name string
113 * used by hardware layer to print debugging information
114 **/
115 char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
116 {
117 struct ixgbe_adapter *adapter = hw->back;
118 struct net_device *netdev = adapter->netdev;
119 return netdev->name;
120 }
121 #endif
122
123 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
124 u8 msix_vector)
125 {
126 u32 ivar, index;
127
128 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
129 index = (int_alloc_entry >> 2) & 0x1F;
130 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
131 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
132 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
134 }
135
136 static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
137 struct ixgbe_tx_buffer
138 *tx_buffer_info)
139 {
140 if (tx_buffer_info->dma) {
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length, PCI_DMA_TODEVICE);
144 tx_buffer_info->dma = 0;
145 }
146 if (tx_buffer_info->skb) {
147 dev_kfree_skb_any(tx_buffer_info->skb);
148 tx_buffer_info->skb = NULL;
149 }
150 /* tx_buffer_info must be completely set up in the transmit path */
151 }
152
153 static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
154 struct ixgbe_ring *tx_ring,
155 unsigned int eop,
156 union ixgbe_adv_tx_desc *eop_desc)
157 {
158 /* Detect a transmit hang in hardware, this serializes the
159 * check with the clearing of time_stamp and movement of i */
160 adapter->detect_tx_hung = false;
161 if (tx_ring->tx_buffer_info[eop].dma &&
162 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
163 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
164 /* detected Tx unit hang */
165 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
166 " TDH <%x>\n"
167 " TDT <%x>\n"
168 " next_to_use <%x>\n"
169 " next_to_clean <%x>\n"
170 "tx_buffer_info[next_to_clean]\n"
171 " time_stamp <%lx>\n"
172 " next_to_watch <%x>\n"
173 " jiffies <%lx>\n"
174 " next_to_watch.status <%x>\n",
175 readl(adapter->hw.hw_addr + tx_ring->head),
176 readl(adapter->hw.hw_addr + tx_ring->tail),
177 tx_ring->next_to_use,
178 tx_ring->next_to_clean,
179 tx_ring->tx_buffer_info[eop].time_stamp,
180 eop, jiffies, eop_desc->wb.status);
181 return true;
182 }
183
184 return false;
185 }
186
187 #define IXGBE_MAX_TXD_PWR 14
188 #define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
189
190 /* Tx Descriptors needed, worst case */
191 #define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
192 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
193 #define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
194 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
195
196 /**
197 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
198 * @adapter: board private structure
199 **/
200 static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
201 struct ixgbe_ring *tx_ring)
202 {
203 struct net_device *netdev = adapter->netdev;
204 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
205 struct ixgbe_tx_buffer *tx_buffer_info;
206 unsigned int i, eop;
207 bool cleaned = false;
208 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
209
210 i = tx_ring->next_to_clean;
211 eop = tx_ring->tx_buffer_info[i].next_to_watch;
212 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
213 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
214 cleaned = false;
215 while (!cleaned) {
216 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
217 tx_buffer_info = &tx_ring->tx_buffer_info[i];
218 cleaned = (i == eop);
219
220 tx_ring->stats.bytes += tx_buffer_info->length;
221 if (cleaned) {
222 struct sk_buff *skb = tx_buffer_info->skb;
223 unsigned int segs, bytecount;
224 segs = skb_shinfo(skb)->gso_segs ?: 1;
225 /* multiply data chunks by size of headers */
226 bytecount = ((segs - 1) * skb_headlen(skb)) +
227 skb->len;
228 total_tx_packets += segs;
229 total_tx_bytes += bytecount;
230 }
231 ixgbe_unmap_and_free_tx_resource(adapter,
232 tx_buffer_info);
233 tx_desc->wb.status = 0;
234
235 i++;
236 if (i == tx_ring->count)
237 i = 0;
238 }
239
240 tx_ring->stats.packets++;
241
242 eop = tx_ring->tx_buffer_info[i].next_to_watch;
243 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
244
245 /* weight of a sort for tx, avoid endless transmit cleanup */
246 if (total_tx_packets >= tx_ring->work_limit)
247 break;
248 }
249
250 tx_ring->next_to_clean = i;
251
252 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
253 if (total_tx_packets && netif_carrier_ok(netdev) &&
254 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
255 /* Make sure that anybody stopping the queue after this
256 * sees the new next_to_clean.
257 */
258 smp_mb();
259 if (netif_queue_stopped(netdev) &&
260 !test_bit(__IXGBE_DOWN, &adapter->state)) {
261 netif_wake_queue(netdev);
262 adapter->restart_queue++;
263 }
264 }
265
266 if (adapter->detect_tx_hung)
267 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
268 netif_stop_queue(netdev);
269
270 if (total_tx_packets >= tx_ring->work_limit)
271 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
272
273 adapter->net_stats.tx_bytes += total_tx_bytes;
274 adapter->net_stats.tx_packets += total_tx_packets;
275 cleaned = total_tx_packets ? true : false;
276 return cleaned;
277 }
278
279 /**
280 * ixgbe_receive_skb - Send a completed packet up the stack
281 * @adapter: board private structure
282 * @skb: packet to send up
283 * @is_vlan: packet has a VLAN tag
284 * @tag: VLAN tag from descriptor
285 **/
286 static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
287 struct sk_buff *skb, bool is_vlan,
288 u16 tag)
289 {
290 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
291 if (adapter->vlgrp && is_vlan)
292 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
293 else
294 netif_receive_skb(skb);
295 } else {
296
297 if (adapter->vlgrp && is_vlan)
298 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
299 else
300 netif_rx(skb);
301 }
302 }
303
304 /**
305 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
306 * @adapter: address of board private structure
307 * @status_err: hardware indication of status of receive
308 * @skb: skb currently being received and modified
309 **/
310 static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
311 u32 status_err,
312 struct sk_buff *skb)
313 {
314 skb->ip_summed = CHECKSUM_NONE;
315
316 /* Ignore Checksum bit is set, or rx csum disabled */
317 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
318 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
319 return;
320
321 /* if IP and error */
322 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
323 (status_err & IXGBE_RXDADV_ERR_IPE)) {
324 adapter->hw_csum_rx_error++;
325 return;
326 }
327
328 if (!(status_err & IXGBE_RXD_STAT_L4CS))
329 return;
330
331 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
332 adapter->hw_csum_rx_error++;
333 return;
334 }
335
336 /* It must be a TCP or UDP packet with a valid checksum */
337 skb->ip_summed = CHECKSUM_UNNECESSARY;
338 adapter->hw_csum_rx_good++;
339 }
340
341 /**
342 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
343 * @adapter: address of board private structure
344 **/
345 static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
346 struct ixgbe_ring *rx_ring,
347 int cleaned_count)
348 {
349 struct net_device *netdev = adapter->netdev;
350 struct pci_dev *pdev = adapter->pdev;
351 union ixgbe_adv_rx_desc *rx_desc;
352 struct ixgbe_rx_buffer *rx_buffer_info;
353 struct sk_buff *skb;
354 unsigned int i;
355 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
356
357 i = rx_ring->next_to_use;
358 rx_buffer_info = &rx_ring->rx_buffer_info[i];
359
360 while (cleaned_count--) {
361 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
362
363 if (!rx_buffer_info->page &&
364 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
365 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
366 if (!rx_buffer_info->page) {
367 adapter->alloc_rx_page_failed++;
368 goto no_buffers;
369 }
370 rx_buffer_info->page_dma =
371 pci_map_page(pdev, rx_buffer_info->page,
372 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
373 }
374
375 if (!rx_buffer_info->skb) {
376 skb = netdev_alloc_skb(netdev, bufsz);
377
378 if (!skb) {
379 adapter->alloc_rx_buff_failed++;
380 goto no_buffers;
381 }
382
383 /*
384 * Make buffer alignment 2 beyond a 16 byte boundary
385 * this will result in a 16 byte aligned IP header after
386 * the 14 byte MAC header is removed
387 */
388 skb_reserve(skb, NET_IP_ALIGN);
389
390 rx_buffer_info->skb = skb;
391 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
392 bufsz,
393 PCI_DMA_FROMDEVICE);
394 }
395 /* Refresh the desc even if buffer_addrs didn't change because
396 * each write-back erases this info. */
397 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
398 rx_desc->read.pkt_addr =
399 cpu_to_le64(rx_buffer_info->page_dma);
400 rx_desc->read.hdr_addr =
401 cpu_to_le64(rx_buffer_info->dma);
402 } else {
403 rx_desc->read.pkt_addr =
404 cpu_to_le64(rx_buffer_info->dma);
405 }
406
407 i++;
408 if (i == rx_ring->count)
409 i = 0;
410 rx_buffer_info = &rx_ring->rx_buffer_info[i];
411 }
412 no_buffers:
413 if (rx_ring->next_to_use != i) {
414 rx_ring->next_to_use = i;
415 if (i-- == 0)
416 i = (rx_ring->count - 1);
417
418 /*
419 * Force memory writes to complete before letting h/w
420 * know there are new descriptors to fetch. (Only
421 * applicable for weak-ordered memory model archs,
422 * such as IA-64).
423 */
424 wmb();
425 writel(i, adapter->hw.hw_addr + rx_ring->tail);
426 }
427 }
428
429 static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
430 struct ixgbe_ring *rx_ring,
431 int *work_done, int work_to_do)
432 {
433 struct net_device *netdev = adapter->netdev;
434 struct pci_dev *pdev = adapter->pdev;
435 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
436 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
437 struct sk_buff *skb;
438 unsigned int i;
439 u32 upper_len, len, staterr;
440 u16 hdr_info, vlan_tag;
441 bool is_vlan, cleaned = false;
442 int cleaned_count = 0;
443 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
444
445 i = rx_ring->next_to_clean;
446 upper_len = 0;
447 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
448 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
449 rx_buffer_info = &rx_ring->rx_buffer_info[i];
450 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
451 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
452
453 while (staterr & IXGBE_RXD_STAT_DD) {
454 if (*work_done >= work_to_do)
455 break;
456 (*work_done)++;
457
458 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
459 hdr_info =
460 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
461 len =
462 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
463 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
464 if (hdr_info & IXGBE_RXDADV_SPH)
465 adapter->rx_hdr_split++;
466 if (len > IXGBE_RX_HDR_SIZE)
467 len = IXGBE_RX_HDR_SIZE;
468 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
469 } else
470 len = le16_to_cpu(rx_desc->wb.upper.length);
471
472 cleaned = true;
473 skb = rx_buffer_info->skb;
474 prefetch(skb->data - NET_IP_ALIGN);
475 rx_buffer_info->skb = NULL;
476
477 if (len && !skb_shinfo(skb)->nr_frags) {
478 pci_unmap_single(pdev, rx_buffer_info->dma,
479 adapter->rx_buf_len + NET_IP_ALIGN,
480 PCI_DMA_FROMDEVICE);
481 skb_put(skb, len);
482 }
483
484 if (upper_len) {
485 pci_unmap_page(pdev, rx_buffer_info->page_dma,
486 PAGE_SIZE, PCI_DMA_FROMDEVICE);
487 rx_buffer_info->page_dma = 0;
488 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
489 rx_buffer_info->page, 0, upper_len);
490 rx_buffer_info->page = NULL;
491
492 skb->len += upper_len;
493 skb->data_len += upper_len;
494 skb->truesize += upper_len;
495 }
496
497 i++;
498 if (i == rx_ring->count)
499 i = 0;
500 next_buffer = &rx_ring->rx_buffer_info[i];
501
502 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
503 prefetch(next_rxd);
504
505 cleaned_count++;
506 if (staterr & IXGBE_RXD_STAT_EOP) {
507 rx_ring->stats.packets++;
508 rx_ring->stats.bytes += skb->len;
509 } else {
510 rx_buffer_info->skb = next_buffer->skb;
511 rx_buffer_info->dma = next_buffer->dma;
512 next_buffer->skb = skb;
513 adapter->non_eop_descs++;
514 goto next_desc;
515 }
516
517 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
518 dev_kfree_skb_irq(skb);
519 goto next_desc;
520 }
521
522 ixgbe_rx_checksum(adapter, staterr, skb);
523
524 /* probably a little skewed due to removing CRC */
525 total_rx_bytes += skb->len;
526 total_rx_packets++;
527
528 skb->protocol = eth_type_trans(skb, netdev);
529 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
530 netdev->last_rx = jiffies;
531
532 next_desc:
533 rx_desc->wb.upper.status_error = 0;
534
535 /* return some buffers to hardware, one at a time is too slow */
536 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
537 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
538 cleaned_count = 0;
539 }
540
541 /* use prefetched values */
542 rx_desc = next_rxd;
543 rx_buffer_info = next_buffer;
544
545 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
546 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
547 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
548 }
549
550 rx_ring->next_to_clean = i;
551 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
552
553 if (cleaned_count)
554 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
555
556 adapter->net_stats.rx_bytes += total_rx_bytes;
557 adapter->net_stats.rx_packets += total_rx_packets;
558
559 return cleaned;
560 }
561
562 #define IXGBE_MAX_INTR 10
563 /**
564 * ixgbe_configure_msix - Configure MSI-X hardware
565 * @adapter: board private structure
566 *
567 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
568 * interrupts.
569 **/
570 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
571 {
572 int i, vector = 0;
573
574 for (i = 0; i < adapter->num_tx_queues; i++) {
575 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
576 IXGBE_MSIX_VECTOR(vector));
577 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
578 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
579 vector++;
580 }
581
582 for (i = 0; i < adapter->num_rx_queues; i++) {
583 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
584 IXGBE_MSIX_VECTOR(vector));
585 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
586 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
587 vector++;
588 }
589
590 vector = adapter->num_tx_queues + adapter->num_rx_queues;
591 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
592 IXGBE_MSIX_VECTOR(vector));
593 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
594 }
595
596 static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
597 {
598 struct net_device *netdev = data;
599 struct ixgbe_adapter *adapter = netdev_priv(netdev);
600 struct ixgbe_hw *hw = &adapter->hw;
601 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
602
603 if (eicr & IXGBE_EICR_LSC) {
604 adapter->lsc_int++;
605 if (!test_bit(__IXGBE_DOWN, &adapter->state))
606 mod_timer(&adapter->watchdog_timer, jiffies);
607 }
608
609 if (!test_bit(__IXGBE_DOWN, &adapter->state))
610 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
611
612 return IRQ_HANDLED;
613 }
614
615 static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
616 {
617 struct ixgbe_ring *txr = data;
618 struct ixgbe_adapter *adapter = txr->adapter;
619
620 ixgbe_clean_tx_irq(adapter, txr);
621
622 return IRQ_HANDLED;
623 }
624
625 static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
626 {
627 struct ixgbe_ring *rxr = data;
628 struct ixgbe_adapter *adapter = rxr->adapter;
629
630 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
631 netif_rx_schedule(adapter->netdev, &adapter->napi);
632 return IRQ_HANDLED;
633 }
634
635 static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
636 {
637 struct ixgbe_adapter *adapter = container_of(napi,
638 struct ixgbe_adapter, napi);
639 struct net_device *netdev = adapter->netdev;
640 int work_done = 0;
641 struct ixgbe_ring *rxr = adapter->rx_ring;
642
643 /* Keep link state information with original netdev */
644 if (!netif_carrier_ok(netdev))
645 goto quit_polling;
646
647 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
648
649 /* If no Tx and not enough Rx work done, exit the polling mode */
650 if ((work_done < budget) || !netif_running(netdev)) {
651 quit_polling:
652 netif_rx_complete(netdev, napi);
653 if (!test_bit(__IXGBE_DOWN, &adapter->state))
654 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
655 rxr->eims_value);
656 }
657
658 return work_done;
659 }
660
661 /**
662 * ixgbe_setup_msix - Initialize MSI-X interrupts
663 *
664 * ixgbe_setup_msix allocates MSI-X vectors and requests
665 * interrutps from the kernel.
666 **/
667 static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
668 {
669 struct net_device *netdev = adapter->netdev;
670 int i, int_vector = 0, err = 0;
671 int max_msix_count;
672
673 /* +1 for the LSC interrupt */
674 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
675 adapter->msix_entries = kcalloc(max_msix_count,
676 sizeof(struct msix_entry), GFP_KERNEL);
677 if (!adapter->msix_entries)
678 return -ENOMEM;
679
680 for (i = 0; i < max_msix_count; i++)
681 adapter->msix_entries[i].entry = i;
682
683 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
684 max_msix_count);
685 if (err)
686 goto out;
687
688 for (i = 0; i < adapter->num_tx_queues; i++) {
689 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
690 err = request_irq(adapter->msix_entries[int_vector].vector,
691 &ixgbe_msix_clean_tx,
692 0,
693 adapter->tx_ring[i].name,
694 &(adapter->tx_ring[i]));
695 if (err) {
696 DPRINTK(PROBE, ERR,
697 "request_irq failed for MSIX interrupt "
698 "Error: %d\n", err);
699 goto release_irqs;
700 }
701 adapter->tx_ring[i].eims_value =
702 (1 << IXGBE_MSIX_VECTOR(int_vector));
703 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
704 int_vector++;
705 }
706
707 for (i = 0; i < adapter->num_rx_queues; i++) {
708 if (strlen(netdev->name) < (IFNAMSIZ - 5))
709 sprintf(adapter->rx_ring[i].name,
710 "%s-rx%d", netdev->name, i);
711 else
712 memcpy(adapter->rx_ring[i].name,
713 netdev->name, IFNAMSIZ);
714 err = request_irq(adapter->msix_entries[int_vector].vector,
715 &ixgbe_msix_clean_rx, 0,
716 adapter->rx_ring[i].name,
717 &(adapter->rx_ring[i]));
718 if (err) {
719 DPRINTK(PROBE, ERR,
720 "request_irq failed for MSIX interrupt "
721 "Error: %d\n", err);
722 goto release_irqs;
723 }
724
725 adapter->rx_ring[i].eims_value =
726 (1 << IXGBE_MSIX_VECTOR(int_vector));
727 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
728 int_vector++;
729 }
730
731 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
732 err = request_irq(adapter->msix_entries[int_vector].vector,
733 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
734 if (err) {
735 DPRINTK(PROBE, ERR,
736 "request_irq for msix_lsc failed: %d\n", err);
737 goto release_irqs;
738 }
739
740 /* FIXME: implement netif_napi_remove() instead */
741 adapter->napi.poll = ixgbe_clean_rxonly;
742 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
743 return 0;
744
745 release_irqs:
746 int_vector--;
747 for (; int_vector >= adapter->num_tx_queues; int_vector--)
748 free_irq(adapter->msix_entries[int_vector].vector,
749 &(adapter->rx_ring[int_vector -
750 adapter->num_tx_queues]));
751
752 for (; int_vector >= 0; int_vector--)
753 free_irq(adapter->msix_entries[int_vector].vector,
754 &(adapter->tx_ring[int_vector]));
755 out:
756 kfree(adapter->msix_entries);
757 adapter->msix_entries = NULL;
758 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
759 return err;
760 }
761
762 /**
763 * ixgbe_intr - Interrupt Handler
764 * @irq: interrupt number
765 * @data: pointer to a network interface device structure
766 * @pt_regs: CPU registers structure
767 **/
768 static irqreturn_t ixgbe_intr(int irq, void *data)
769 {
770 struct net_device *netdev = data;
771 struct ixgbe_adapter *adapter = netdev_priv(netdev);
772 struct ixgbe_hw *hw = &adapter->hw;
773 u32 eicr;
774
775 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
776
777 if (!eicr)
778 return IRQ_NONE; /* Not our interrupt */
779
780 if (eicr & IXGBE_EICR_LSC) {
781 adapter->lsc_int++;
782 if (!test_bit(__IXGBE_DOWN, &adapter->state))
783 mod_timer(&adapter->watchdog_timer, jiffies);
784 }
785 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
786 /* Disable interrupts and register for poll. The flush of the
787 * posted write is intentionally left out. */
788 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
789 __netif_rx_schedule(netdev, &adapter->napi);
790 }
791
792 return IRQ_HANDLED;
793 }
794
795 /**
796 * ixgbe_request_irq - initialize interrupts
797 * @adapter: board private structure
798 *
799 * Attempts to configure interrupts using the best available
800 * capabilities of the hardware and kernel.
801 **/
802 static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
803 {
804 struct net_device *netdev = adapter->netdev;
805 int flags, err;
806 irq_handler_t handler = ixgbe_intr;
807
808 flags = IRQF_SHARED;
809
810 err = ixgbe_setup_msix(adapter);
811 if (!err)
812 goto request_done;
813
814 /*
815 * if we can't do MSI-X, fall through and try MSI
816 * No need to reallocate memory since we're decreasing the number of
817 * queues. We just won't use the other ones, also it is freed correctly
818 * on ixgbe_remove.
819 */
820 *num_rx_queues = 1;
821
822 /* do MSI */
823 err = pci_enable_msi(adapter->pdev);
824 if (!err) {
825 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
826 flags &= ~IRQF_SHARED;
827 handler = &ixgbe_intr;
828 }
829
830 err = request_irq(adapter->pdev->irq, handler, flags,
831 netdev->name, netdev);
832 if (err)
833 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
834
835 request_done:
836 return err;
837 }
838
839 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
840 {
841 struct net_device *netdev = adapter->netdev;
842
843 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
844 int i;
845
846 for (i = 0; i < adapter->num_tx_queues; i++)
847 free_irq(adapter->msix_entries[i].vector,
848 &(adapter->tx_ring[i]));
849 for (i = 0; i < adapter->num_rx_queues; i++)
850 free_irq(adapter->msix_entries[i +
851 adapter->num_tx_queues].vector,
852 &(adapter->rx_ring[i]));
853 i = adapter->num_rx_queues + adapter->num_tx_queues;
854 free_irq(adapter->msix_entries[i].vector, netdev);
855 pci_disable_msix(adapter->pdev);
856 kfree(adapter->msix_entries);
857 adapter->msix_entries = NULL;
858 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
859 return;
860 }
861
862 free_irq(adapter->pdev->irq, netdev);
863 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
864 pci_disable_msi(adapter->pdev);
865 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
866 }
867 }
868
869 /**
870 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
871 * @adapter: board private structure
872 **/
873 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
874 {
875 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
876 IXGBE_WRITE_FLUSH(&adapter->hw);
877 synchronize_irq(adapter->pdev->irq);
878 }
879
880 /**
881 * ixgbe_irq_enable - Enable default interrupt generation settings
882 * @adapter: board private structure
883 **/
884 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
885 {
886 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
887 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
888 (IXGBE_EIMS_ENABLE_MASK &
889 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
890 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
891 IXGBE_EIMS_ENABLE_MASK);
892 IXGBE_WRITE_FLUSH(&adapter->hw);
893 }
894
895 /**
896 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
897 *
898 **/
899 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
900 {
901 int i;
902 struct ixgbe_hw *hw = &adapter->hw;
903
904 if (adapter->rx_eitr)
905 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
906 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
907
908 /* for re-triggering the interrupt in non-NAPI mode */
909 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
910 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
911
912 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
913 for (i = 0; i < adapter->num_tx_queues; i++)
914 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
915 }
916
917 /**
918 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
919 * @adapter: board private structure
920 *
921 * Configure the Tx unit of the MAC after a reset.
922 **/
923 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
924 {
925 u64 tdba;
926 struct ixgbe_hw *hw = &adapter->hw;
927 u32 i, tdlen;
928
929 /* Setup the HW Tx Head and Tail descriptor pointers */
930 for (i = 0; i < adapter->num_tx_queues; i++) {
931 tdba = adapter->tx_ring[i].dma;
932 tdlen = adapter->tx_ring[i].count *
933 sizeof(union ixgbe_adv_tx_desc);
934 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
935 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
936 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
937 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
938 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
939 adapter->tx_ring[i].head = IXGBE_TDH(i);
940 adapter->tx_ring[i].tail = IXGBE_TDT(i);
941 }
942
943 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
944 }
945
946 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
947 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
948
949 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
950 /**
951 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
952 * @adapter: board private structure
953 *
954 * Configure the Rx unit of the MAC after a reset.
955 **/
956 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
957 {
958 u64 rdba;
959 struct ixgbe_hw *hw = &adapter->hw;
960 struct net_device *netdev = adapter->netdev;
961 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
962 u32 rdlen, rxctrl, rxcsum;
963 u32 random[10];
964 u32 reta, mrqc;
965 int i;
966 u32 fctrl, hlreg0;
967 u32 srrctl;
968 u32 pages;
969
970 /* Decide whether to use packet split mode or not */
971 if (netdev->mtu > ETH_DATA_LEN)
972 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
973 else
974 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
975
976 /* Set the RX buffer length according to the mode */
977 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
978 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
979 } else {
980 if (netdev->mtu <= ETH_DATA_LEN)
981 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
982 else
983 adapter->rx_buf_len = ALIGN(max_frame, 1024);
984 }
985
986 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
987 fctrl |= IXGBE_FCTRL_BAM;
988 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
989
990 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
991 if (adapter->netdev->mtu <= ETH_DATA_LEN)
992 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
993 else
994 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
995 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
996
997 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
998
999 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1000 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1001 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1002
1003 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1004 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1005 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1006 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1007 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1008 IXGBE_SRRCTL_BSIZEHDR_MASK);
1009 } else {
1010 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1011
1012 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1013 srrctl |=
1014 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1015 else
1016 srrctl |=
1017 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1018 }
1019 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1020
1021 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1022 /* disable receives while setting up the descriptors */
1023 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1024 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1025
1026 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1027 * the Base and Length of the Rx Descriptor Ring */
1028 for (i = 0; i < adapter->num_rx_queues; i++) {
1029 rdba = adapter->rx_ring[i].dma;
1030 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1031 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1032 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1033 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1034 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1035 adapter->rx_ring[i].head = IXGBE_RDH(i);
1036 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1037 }
1038
1039 if (adapter->num_rx_queues > 1) {
1040 /* Random 40bytes used as random key in RSS hash function */
1041 get_random_bytes(&random[0], 40);
1042
1043 switch (adapter->num_rx_queues) {
1044 case 8:
1045 case 4:
1046 /* Bits [3:0] in each byte refers the Rx queue no */
1047 reta = 0x00010203;
1048 break;
1049 case 2:
1050 reta = 0x00010001;
1051 break;
1052 default:
1053 reta = 0x00000000;
1054 break;
1055 }
1056
1057 /* Fill out redirection table */
1058 for (i = 0; i < 32; i++) {
1059 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
1060 if (adapter->num_rx_queues > 4) {
1061 i++;
1062 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
1063 0x04050607);
1064 }
1065 }
1066
1067 /* Fill out hash function seeds */
1068 for (i = 0; i < 10; i++)
1069 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1070
1071 mrqc = IXGBE_MRQC_RSSEN
1072 /* Perform hash on these packet types */
1073 | IXGBE_MRQC_RSS_FIELD_IPV4
1074 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1075 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1076 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1077 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1078 | IXGBE_MRQC_RSS_FIELD_IPV6
1079 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1080 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1081 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1082 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1083
1084 /* Multiqueue and packet checksumming are mutually exclusive. */
1085 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1086 rxcsum |= IXGBE_RXCSUM_PCSD;
1087 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1088 } else {
1089 /* Enable Receive Checksum Offload for TCP and UDP */
1090 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1091 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1092 /* Enable IPv4 payload checksum for UDP fragments
1093 * Must be used in conjunction with packet-split. */
1094 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1095 } else {
1096 /* don't need to clear IPPCSE as it defaults to 0 */
1097 }
1098 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1099 }
1100 /* Enable Receives */
1101 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1102 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1103 }
1104
1105 static void ixgbe_vlan_rx_register(struct net_device *netdev,
1106 struct vlan_group *grp)
1107 {
1108 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1109 u32 ctrl;
1110
1111 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1112 ixgbe_irq_disable(adapter);
1113 adapter->vlgrp = grp;
1114
1115 if (grp) {
1116 /* enable VLAN tag insert/strip */
1117 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1118 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1119 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1120 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1121 }
1122
1123 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1124 ixgbe_irq_enable(adapter);
1125 }
1126
1127 static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1128 {
1129 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1130
1131 /* add VID to filter table */
1132 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1133 }
1134
1135 static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1136 {
1137 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1138
1139 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1140 ixgbe_irq_disable(adapter);
1141
1142 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1143
1144 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1145 ixgbe_irq_enable(adapter);
1146
1147 /* remove VID from filter table */
1148 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1149 }
1150
1151 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1152 {
1153 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1154
1155 if (adapter->vlgrp) {
1156 u16 vid;
1157 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1158 if (!vlan_group_get_device(adapter->vlgrp, vid))
1159 continue;
1160 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1161 }
1162 }
1163 }
1164
1165 /**
1166 * ixgbe_set_multi - Multicast and Promiscuous mode set
1167 * @netdev: network interface device structure
1168 *
1169 * The set_multi entry point is called whenever the multicast address
1170 * list or the network interface flags are updated. This routine is
1171 * responsible for configuring the hardware for proper multicast,
1172 * promiscuous mode, and all-multi behavior.
1173 **/
1174 static void ixgbe_set_multi(struct net_device *netdev)
1175 {
1176 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1177 struct ixgbe_hw *hw = &adapter->hw;
1178 struct dev_mc_list *mc_ptr;
1179 u8 *mta_list;
1180 u32 fctrl;
1181 int i;
1182
1183 /* Check for Promiscuous and All Multicast modes */
1184
1185 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1186
1187 if (netdev->flags & IFF_PROMISC) {
1188 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1189 } else if (netdev->flags & IFF_ALLMULTI) {
1190 fctrl |= IXGBE_FCTRL_MPE;
1191 fctrl &= ~IXGBE_FCTRL_UPE;
1192 } else {
1193 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1194 }
1195
1196 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1197
1198 if (netdev->mc_count) {
1199 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1200 if (!mta_list)
1201 return;
1202
1203 /* Shared function expects packed array of only addresses. */
1204 mc_ptr = netdev->mc_list;
1205
1206 for (i = 0; i < netdev->mc_count; i++) {
1207 if (!mc_ptr)
1208 break;
1209 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1210 ETH_ALEN);
1211 mc_ptr = mc_ptr->next;
1212 }
1213
1214 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1215 kfree(mta_list);
1216 } else {
1217 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1218 }
1219
1220 }
1221
1222 static void ixgbe_configure(struct ixgbe_adapter *adapter)
1223 {
1224 struct net_device *netdev = adapter->netdev;
1225 int i;
1226
1227 ixgbe_set_multi(netdev);
1228
1229 ixgbe_restore_vlan(adapter);
1230
1231 ixgbe_configure_tx(adapter);
1232 ixgbe_configure_rx(adapter);
1233 for (i = 0; i < adapter->num_rx_queues; i++)
1234 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1235 (adapter->rx_ring[i].count - 1));
1236 }
1237
1238 static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1239 {
1240 struct net_device *netdev = adapter->netdev;
1241 int i;
1242 u32 gpie = 0;
1243 struct ixgbe_hw *hw = &adapter->hw;
1244 u32 txdctl, rxdctl, mhadd;
1245 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1246
1247 ixgbe_get_hw_control(adapter);
1248
1249 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1250 IXGBE_FLAG_MSI_ENABLED)) {
1251 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1252 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1253 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1254 } else {
1255 /* MSI only */
1256 gpie = (IXGBE_GPIE_EIAME |
1257 IXGBE_GPIE_PBA_SUPPORT);
1258 }
1259 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1260 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1261 }
1262
1263 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1264
1265 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1266 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1267 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1268
1269 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1270 }
1271
1272 for (i = 0; i < adapter->num_tx_queues; i++) {
1273 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1274 txdctl |= IXGBE_TXDCTL_ENABLE;
1275 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1276 }
1277
1278 for (i = 0; i < adapter->num_rx_queues; i++) {
1279 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1280 rxdctl |= IXGBE_RXDCTL_ENABLE;
1281 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1282 }
1283 /* enable all receives */
1284 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1285 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1286 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1287
1288 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1289 ixgbe_configure_msix(adapter);
1290 else
1291 ixgbe_configure_msi_and_legacy(adapter);
1292
1293 clear_bit(__IXGBE_DOWN, &adapter->state);
1294 napi_enable(&adapter->napi);
1295 ixgbe_irq_enable(adapter);
1296
1297 /* bring the link up in the watchdog, this could race with our first
1298 * link up interrupt but shouldn't be a problem */
1299 mod_timer(&adapter->watchdog_timer, jiffies);
1300 return 0;
1301 }
1302
1303 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1304 {
1305 WARN_ON(in_interrupt());
1306 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1307 msleep(1);
1308 ixgbe_down(adapter);
1309 ixgbe_up(adapter);
1310 clear_bit(__IXGBE_RESETTING, &adapter->state);
1311 }
1312
1313 int ixgbe_up(struct ixgbe_adapter *adapter)
1314 {
1315 /* hardware has been reset, we need to reload some things */
1316 ixgbe_configure(adapter);
1317
1318 return ixgbe_up_complete(adapter);
1319 }
1320
1321 void ixgbe_reset(struct ixgbe_adapter *adapter)
1322 {
1323 if (ixgbe_init_hw(&adapter->hw))
1324 DPRINTK(PROBE, ERR, "Hardware Error\n");
1325
1326 /* reprogram the RAR[0] in case user changed it. */
1327 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1328
1329 }
1330
1331 #ifdef CONFIG_PM
1332 static int ixgbe_resume(struct pci_dev *pdev)
1333 {
1334 struct net_device *netdev = pci_get_drvdata(pdev);
1335 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1336 u32 err, num_rx_queues = adapter->num_rx_queues;
1337
1338 pci_set_power_state(pdev, PCI_D0);
1339 pci_restore_state(pdev);
1340 err = pci_enable_device(pdev);
1341 if (err) {
1342 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1343 "suspend\n");
1344 return err;
1345 }
1346 pci_set_master(pdev);
1347
1348 pci_enable_wake(pdev, PCI_D3hot, 0);
1349 pci_enable_wake(pdev, PCI_D3cold, 0);
1350
1351 if (netif_running(netdev)) {
1352 err = ixgbe_request_irq(adapter, &num_rx_queues);
1353 if (err)
1354 return err;
1355 }
1356
1357 ixgbe_reset(adapter);
1358
1359 if (netif_running(netdev))
1360 ixgbe_up(adapter);
1361
1362 netif_device_attach(netdev);
1363
1364 return 0;
1365 }
1366 #endif
1367
1368 /**
1369 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1370 * @adapter: board private structure
1371 * @rx_ring: ring to free buffers from
1372 **/
1373 static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1374 struct ixgbe_ring *rx_ring)
1375 {
1376 struct pci_dev *pdev = adapter->pdev;
1377 unsigned long size;
1378 unsigned int i;
1379
1380 /* Free all the Rx ring sk_buffs */
1381
1382 for (i = 0; i < rx_ring->count; i++) {
1383 struct ixgbe_rx_buffer *rx_buffer_info;
1384
1385 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1386 if (rx_buffer_info->dma) {
1387 pci_unmap_single(pdev, rx_buffer_info->dma,
1388 adapter->rx_buf_len,
1389 PCI_DMA_FROMDEVICE);
1390 rx_buffer_info->dma = 0;
1391 }
1392 if (rx_buffer_info->skb) {
1393 dev_kfree_skb(rx_buffer_info->skb);
1394 rx_buffer_info->skb = NULL;
1395 }
1396 if (!rx_buffer_info->page)
1397 continue;
1398 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1399 PCI_DMA_FROMDEVICE);
1400 rx_buffer_info->page_dma = 0;
1401
1402 put_page(rx_buffer_info->page);
1403 rx_buffer_info->page = NULL;
1404 }
1405
1406 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1407 memset(rx_ring->rx_buffer_info, 0, size);
1408
1409 /* Zero out the descriptor ring */
1410 memset(rx_ring->desc, 0, rx_ring->size);
1411
1412 rx_ring->next_to_clean = 0;
1413 rx_ring->next_to_use = 0;
1414
1415 writel(0, adapter->hw.hw_addr + rx_ring->head);
1416 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1417 }
1418
1419 /**
1420 * ixgbe_clean_tx_ring - Free Tx Buffers
1421 * @adapter: board private structure
1422 * @tx_ring: ring to be cleaned
1423 **/
1424 static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1425 struct ixgbe_ring *tx_ring)
1426 {
1427 struct ixgbe_tx_buffer *tx_buffer_info;
1428 unsigned long size;
1429 unsigned int i;
1430
1431 /* Free all the Tx ring sk_buffs */
1432
1433 for (i = 0; i < tx_ring->count; i++) {
1434 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1435 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1436 }
1437
1438 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1439 memset(tx_ring->tx_buffer_info, 0, size);
1440
1441 /* Zero out the descriptor ring */
1442 memset(tx_ring->desc, 0, tx_ring->size);
1443
1444 tx_ring->next_to_use = 0;
1445 tx_ring->next_to_clean = 0;
1446
1447 writel(0, adapter->hw.hw_addr + tx_ring->head);
1448 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1449 }
1450
1451 /**
1452 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1453 * @adapter: board private structure
1454 **/
1455 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1456 {
1457 int i;
1458
1459 for (i = 0; i < adapter->num_tx_queues; i++)
1460 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1461 }
1462
1463 /**
1464 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1465 * @adapter: board private structure
1466 **/
1467 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1468 {
1469 int i;
1470
1471 for (i = 0; i < adapter->num_rx_queues; i++)
1472 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1473 }
1474
1475 void ixgbe_down(struct ixgbe_adapter *adapter)
1476 {
1477 struct net_device *netdev = adapter->netdev;
1478 u32 rxctrl;
1479
1480 /* signal that we are down to the interrupt handler */
1481 set_bit(__IXGBE_DOWN, &adapter->state);
1482
1483 /* disable receives */
1484 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1485 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1486 rxctrl & ~IXGBE_RXCTRL_RXEN);
1487
1488 netif_tx_disable(netdev);
1489
1490 /* disable transmits in the hardware */
1491
1492 /* flush both disables */
1493 IXGBE_WRITE_FLUSH(&adapter->hw);
1494 msleep(10);
1495
1496 napi_disable(&adapter->napi);
1497
1498 ixgbe_irq_disable(adapter);
1499
1500 del_timer_sync(&adapter->watchdog_timer);
1501
1502 netif_carrier_off(netdev);
1503 netif_stop_queue(netdev);
1504
1505 ixgbe_reset(adapter);
1506 ixgbe_clean_all_tx_rings(adapter);
1507 ixgbe_clean_all_rx_rings(adapter);
1508
1509 }
1510
1511 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1512 {
1513 struct net_device *netdev = pci_get_drvdata(pdev);
1514 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1515 #ifdef CONFIG_PM
1516 int retval = 0;
1517 #endif
1518
1519 netif_device_detach(netdev);
1520
1521 if (netif_running(netdev)) {
1522 ixgbe_down(adapter);
1523 ixgbe_free_irq(adapter);
1524 }
1525
1526 #ifdef CONFIG_PM
1527 retval = pci_save_state(pdev);
1528 if (retval)
1529 return retval;
1530 #endif
1531
1532 pci_enable_wake(pdev, PCI_D3hot, 0);
1533 pci_enable_wake(pdev, PCI_D3cold, 0);
1534
1535 ixgbe_release_hw_control(adapter);
1536
1537 pci_disable_device(pdev);
1538
1539 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1540
1541 return 0;
1542 }
1543
1544 static void ixgbe_shutdown(struct pci_dev *pdev)
1545 {
1546 ixgbe_suspend(pdev, PMSG_SUSPEND);
1547 }
1548
1549 /**
1550 * ixgbe_clean - NAPI Rx polling callback
1551 * @adapter: board private structure
1552 **/
1553 static int ixgbe_clean(struct napi_struct *napi, int budget)
1554 {
1555 struct ixgbe_adapter *adapter = container_of(napi,
1556 struct ixgbe_adapter, napi);
1557 struct net_device *netdev = adapter->netdev;
1558 int tx_cleaned = 0, work_done = 0;
1559
1560 /* In non-MSIX case, there is no multi-Tx/Rx queue */
1561 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
1562 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1563 budget);
1564
1565 if (tx_cleaned)
1566 work_done = budget;
1567
1568 /* If budget not fully consumed, exit the polling mode */
1569 if (work_done < budget) {
1570 netif_rx_complete(netdev, napi);
1571 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1572 ixgbe_irq_enable(adapter);
1573 }
1574
1575 return work_done;
1576 }
1577
1578 /**
1579 * ixgbe_tx_timeout - Respond to a Tx Hang
1580 * @netdev: network interface device structure
1581 **/
1582 static void ixgbe_tx_timeout(struct net_device *netdev)
1583 {
1584 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1585
1586 /* Do the reset outside of interrupt context */
1587 schedule_work(&adapter->reset_task);
1588 }
1589
1590 static void ixgbe_reset_task(struct work_struct *work)
1591 {
1592 struct ixgbe_adapter *adapter;
1593 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1594
1595 adapter->tx_timeout_count++;
1596
1597 ixgbe_reinit_locked(adapter);
1598 }
1599
1600 /**
1601 * ixgbe_alloc_queues - Allocate memory for all rings
1602 * @adapter: board private structure to initialize
1603 *
1604 * We allocate one ring per queue at run-time since we don't know the
1605 * number of queues at compile-time. The polling_netdev array is
1606 * intended for Multiqueue, but should work fine with a single queue.
1607 **/
1608 static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1609 {
1610 int i;
1611
1612 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1613 sizeof(struct ixgbe_ring), GFP_KERNEL);
1614 if (!adapter->tx_ring)
1615 return -ENOMEM;
1616
1617 for (i = 0; i < adapter->num_tx_queues; i++)
1618 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1619
1620 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1621 sizeof(struct ixgbe_ring), GFP_KERNEL);
1622 if (!adapter->rx_ring) {
1623 kfree(adapter->tx_ring);
1624 return -ENOMEM;
1625 }
1626
1627 for (i = 0; i < adapter->num_rx_queues; i++) {
1628 adapter->rx_ring[i].adapter = adapter;
1629 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1630 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1631 }
1632
1633 return 0;
1634 }
1635
1636 /**
1637 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1638 * @adapter: board private structure to initialize
1639 *
1640 * ixgbe_sw_init initializes the Adapter private data structure.
1641 * Fields are initialized based on PCI device information and
1642 * OS network device settings (MTU size).
1643 **/
1644 static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1645 {
1646 struct ixgbe_hw *hw = &adapter->hw;
1647 struct pci_dev *pdev = adapter->pdev;
1648
1649 /* default flow control settings */
1650 hw->fc.original_type = ixgbe_fc_full;
1651 hw->fc.type = ixgbe_fc_full;
1652
1653 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1654 if (hw->mac.ops.reset(hw)) {
1655 dev_err(&pdev->dev, "HW Init failed\n");
1656 return -EIO;
1657 }
1658 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1659 false)) {
1660 dev_err(&pdev->dev, "Link Speed setup failed\n");
1661 return -EIO;
1662 }
1663
1664 /* initialize eeprom parameters */
1665 if (ixgbe_init_eeprom(hw)) {
1666 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1667 return -EIO;
1668 }
1669
1670 /* Set the default values */
1671 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1672 adapter->num_tx_queues = 1;
1673 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1674
1675 if (ixgbe_alloc_queues(adapter)) {
1676 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1677 return -ENOMEM;
1678 }
1679
1680 set_bit(__IXGBE_DOWN, &adapter->state);
1681
1682 return 0;
1683 }
1684
1685 /**
1686 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1687 * @adapter: board private structure
1688 * @txdr: tx descriptor ring (for a specific queue) to setup
1689 *
1690 * Return 0 on success, negative on failure
1691 **/
1692 int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1693 struct ixgbe_ring *txdr)
1694 {
1695 struct pci_dev *pdev = adapter->pdev;
1696 int size;
1697
1698 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1699 txdr->tx_buffer_info = vmalloc(size);
1700 if (!txdr->tx_buffer_info) {
1701 DPRINTK(PROBE, ERR,
1702 "Unable to allocate memory for the transmit descriptor ring\n");
1703 return -ENOMEM;
1704 }
1705 memset(txdr->tx_buffer_info, 0, size);
1706
1707 /* round up to nearest 4K */
1708 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1709 txdr->size = ALIGN(txdr->size, 4096);
1710
1711 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1712 if (!txdr->desc) {
1713 vfree(txdr->tx_buffer_info);
1714 DPRINTK(PROBE, ERR,
1715 "Memory allocation failed for the tx desc ring\n");
1716 return -ENOMEM;
1717 }
1718
1719 txdr->adapter = adapter;
1720 txdr->next_to_use = 0;
1721 txdr->next_to_clean = 0;
1722 txdr->work_limit = txdr->count;
1723
1724 return 0;
1725 }
1726
1727 /**
1728 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1729 * @adapter: board private structure
1730 * @rxdr: rx descriptor ring (for a specific queue) to setup
1731 *
1732 * Returns 0 on success, negative on failure
1733 **/
1734 int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1735 struct ixgbe_ring *rxdr)
1736 {
1737 struct pci_dev *pdev = adapter->pdev;
1738 int size, desc_len;
1739
1740 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1741 rxdr->rx_buffer_info = vmalloc(size);
1742 if (!rxdr->rx_buffer_info) {
1743 DPRINTK(PROBE, ERR,
1744 "vmalloc allocation failed for the rx desc ring\n");
1745 return -ENOMEM;
1746 }
1747 memset(rxdr->rx_buffer_info, 0, size);
1748
1749 desc_len = sizeof(union ixgbe_adv_rx_desc);
1750
1751 /* Round up to nearest 4K */
1752 rxdr->size = rxdr->count * desc_len;
1753 rxdr->size = ALIGN(rxdr->size, 4096);
1754
1755 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1756
1757 if (!rxdr->desc) {
1758 DPRINTK(PROBE, ERR,
1759 "Memory allocation failed for the rx desc ring\n");
1760 vfree(rxdr->rx_buffer_info);
1761 return -ENOMEM;
1762 }
1763
1764 rxdr->next_to_clean = 0;
1765 rxdr->next_to_use = 0;
1766 rxdr->adapter = adapter;
1767
1768 return 0;
1769 }
1770
1771 /**
1772 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1773 * @adapter: board private structure
1774 * @tx_ring: Tx descriptor ring for a specific queue
1775 *
1776 * Free all transmit software resources
1777 **/
1778 static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1779 struct ixgbe_ring *tx_ring)
1780 {
1781 struct pci_dev *pdev = adapter->pdev;
1782
1783 ixgbe_clean_tx_ring(adapter, tx_ring);
1784
1785 vfree(tx_ring->tx_buffer_info);
1786 tx_ring->tx_buffer_info = NULL;
1787
1788 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1789
1790 tx_ring->desc = NULL;
1791 }
1792
1793 /**
1794 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1795 * @adapter: board private structure
1796 *
1797 * Free all transmit software resources
1798 **/
1799 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1800 {
1801 int i;
1802
1803 for (i = 0; i < adapter->num_tx_queues; i++)
1804 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1805 }
1806
1807 /**
1808 * ixgbe_free_rx_resources - Free Rx Resources
1809 * @adapter: board private structure
1810 * @rx_ring: ring to clean the resources from
1811 *
1812 * Free all receive software resources
1813 **/
1814 static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1815 struct ixgbe_ring *rx_ring)
1816 {
1817 struct pci_dev *pdev = adapter->pdev;
1818
1819 ixgbe_clean_rx_ring(adapter, rx_ring);
1820
1821 vfree(rx_ring->rx_buffer_info);
1822 rx_ring->rx_buffer_info = NULL;
1823
1824 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1825
1826 rx_ring->desc = NULL;
1827 }
1828
1829 /**
1830 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1831 * @adapter: board private structure
1832 *
1833 * Free all receive software resources
1834 **/
1835 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1836 {
1837 int i;
1838
1839 for (i = 0; i < adapter->num_rx_queues; i++)
1840 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1841 }
1842
1843 /**
1844 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1845 * (Descriptors) for all queues
1846 * @adapter: board private structure
1847 *
1848 * If this function returns with an error, then it's possible one or
1849 * more of the rings is populated (while the rest are not). It is the
1850 * callers duty to clean those orphaned rings.
1851 *
1852 * Return 0 on success, negative on failure
1853 **/
1854 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1855 {
1856 int i, err = 0;
1857
1858 for (i = 0; i < adapter->num_tx_queues; i++) {
1859 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1860 if (err) {
1861 DPRINTK(PROBE, ERR,
1862 "Allocation for Tx Queue %u failed\n", i);
1863 break;
1864 }
1865 }
1866
1867 return err;
1868 }
1869
1870 /**
1871 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1872 * (Descriptors) for all queues
1873 * @adapter: board private structure
1874 *
1875 * If this function returns with an error, then it's possible one or
1876 * more of the rings is populated (while the rest are not). It is the
1877 * callers duty to clean those orphaned rings.
1878 *
1879 * Return 0 on success, negative on failure
1880 **/
1881
1882 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1883 {
1884 int i, err = 0;
1885
1886 for (i = 0; i < adapter->num_rx_queues; i++) {
1887 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1888 if (err) {
1889 DPRINTK(PROBE, ERR,
1890 "Allocation for Rx Queue %u failed\n", i);
1891 break;
1892 }
1893 }
1894
1895 return err;
1896 }
1897
1898 /**
1899 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1900 * @netdev: network interface device structure
1901 * @new_mtu: new value for maximum frame size
1902 *
1903 * Returns 0 on success, negative on failure
1904 **/
1905 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1906 {
1907 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1908 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1909
1910 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1911 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1912 return -EINVAL;
1913
1914 netdev->mtu = new_mtu;
1915
1916 if (netif_running(netdev))
1917 ixgbe_reinit_locked(adapter);
1918
1919 return 0;
1920 }
1921
1922 /**
1923 * ixgbe_open - Called when a network interface is made active
1924 * @netdev: network interface device structure
1925 *
1926 * Returns 0 on success, negative value on failure
1927 *
1928 * The open entry point is called when a network interface is made
1929 * active by the system (IFF_UP). At this point all resources needed
1930 * for transmit and receive operations are allocated, the interrupt
1931 * handler is registered with the OS, the watchdog timer is started,
1932 * and the stack is notified that the interface is ready.
1933 **/
1934 static int ixgbe_open(struct net_device *netdev)
1935 {
1936 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1937 int err;
1938 u32 num_rx_queues = adapter->num_rx_queues;
1939
1940 /* disallow open during test */
1941 if (test_bit(__IXGBE_TESTING, &adapter->state))
1942 return -EBUSY;
1943
1944 try_intr_reinit:
1945 /* allocate transmit descriptors */
1946 err = ixgbe_setup_all_tx_resources(adapter);
1947 if (err)
1948 goto err_setup_tx;
1949
1950 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1951 num_rx_queues = 1;
1952 adapter->num_rx_queues = num_rx_queues;
1953 }
1954
1955 /* allocate receive descriptors */
1956 err = ixgbe_setup_all_rx_resources(adapter);
1957 if (err)
1958 goto err_setup_rx;
1959
1960 ixgbe_configure(adapter);
1961
1962 err = ixgbe_request_irq(adapter, &num_rx_queues);
1963 if (err)
1964 goto err_req_irq;
1965
1966 /* ixgbe_request might have reduced num_rx_queues */
1967 if (num_rx_queues < adapter->num_rx_queues) {
1968 /* We didn't get MSI-X, so we need to release everything,
1969 * set our Rx queue count to num_rx_queues, and redo the
1970 * whole init process.
1971 */
1972 ixgbe_free_irq(adapter);
1973 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1974 pci_disable_msi(adapter->pdev);
1975 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1976 }
1977 ixgbe_free_all_rx_resources(adapter);
1978 ixgbe_free_all_tx_resources(adapter);
1979 adapter->num_rx_queues = num_rx_queues;
1980
1981 /* Reset the hardware, and start over. */
1982 ixgbe_reset(adapter);
1983
1984 goto try_intr_reinit;
1985 }
1986
1987 err = ixgbe_up_complete(adapter);
1988 if (err)
1989 goto err_up;
1990
1991 return 0;
1992
1993 err_up:
1994 ixgbe_release_hw_control(adapter);
1995 ixgbe_free_irq(adapter);
1996 err_req_irq:
1997 ixgbe_free_all_rx_resources(adapter);
1998 err_setup_rx:
1999 ixgbe_free_all_tx_resources(adapter);
2000 err_setup_tx:
2001 ixgbe_reset(adapter);
2002
2003 return err;
2004 }
2005
2006 /**
2007 * ixgbe_close - Disables a network interface
2008 * @netdev: network interface device structure
2009 *
2010 * Returns 0, this is not allowed to fail
2011 *
2012 * The close entry point is called when an interface is de-activated
2013 * by the OS. The hardware is still under the drivers control, but
2014 * needs to be disabled. A global MAC reset is issued to stop the
2015 * hardware, and all transmit and receive resources are freed.
2016 **/
2017 static int ixgbe_close(struct net_device *netdev)
2018 {
2019 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2020
2021 ixgbe_down(adapter);
2022 ixgbe_free_irq(adapter);
2023
2024 ixgbe_free_all_tx_resources(adapter);
2025 ixgbe_free_all_rx_resources(adapter);
2026
2027 ixgbe_release_hw_control(adapter);
2028
2029 return 0;
2030 }
2031
2032 /**
2033 * ixgbe_update_stats - Update the board statistics counters.
2034 * @adapter: board private structure
2035 **/
2036 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2037 {
2038 struct ixgbe_hw *hw = &adapter->hw;
2039 u64 total_mpc = 0;
2040 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
2041
2042 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2043 for (i = 0; i < 8; i++) {
2044 /* for packet buffers not used, the register should read 0 */
2045 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2046 missed_rx += mpc;
2047 adapter->stats.mpc[i] += mpc;
2048 total_mpc += adapter->stats.mpc[i];
2049 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2050 }
2051 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2052 /* work around hardware counting issue */
2053 adapter->stats.gprc -= missed_rx;
2054
2055 /* 82598 hardware only has a 32 bit counter in the high register */
2056 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2057 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2058 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2059 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2060 adapter->stats.bprc += bprc;
2061 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2062 adapter->stats.mprc -= bprc;
2063 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2064 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2065 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2066 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2067 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2068 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2069 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2070 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2071 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2072 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2073 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2074 adapter->stats.lxontxc += lxon;
2075 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2076 adapter->stats.lxofftxc += lxoff;
2077 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2078 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2079 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2080 /*
2081 * 82598 errata - tx of flow control packets is included in tx counters
2082 */
2083 xon_off_tot = lxon + lxoff;
2084 adapter->stats.gptc -= xon_off_tot;
2085 adapter->stats.mptc -= xon_off_tot;
2086 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2087 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2088 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2089 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2090 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2091 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2092 adapter->stats.ptc64 -= xon_off_tot;
2093 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2094 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2095 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2096 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2097 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2098 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2099
2100 /* Fill out the OS statistics structure */
2101 adapter->net_stats.multicast = adapter->stats.mprc;
2102
2103 /* Rx Errors */
2104 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2105 adapter->stats.rlec;
2106 adapter->net_stats.rx_dropped = 0;
2107 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2108 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2109 adapter->net_stats.rx_missed_errors = total_mpc;
2110 }
2111
2112 /**
2113 * ixgbe_watchdog - Timer Call-back
2114 * @data: pointer to adapter cast into an unsigned long
2115 **/
2116 static void ixgbe_watchdog(unsigned long data)
2117 {
2118 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2119 struct net_device *netdev = adapter->netdev;
2120 bool link_up;
2121 u32 link_speed = 0;
2122
2123 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2124
2125 if (link_up) {
2126 if (!netif_carrier_ok(netdev)) {
2127 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2128 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2129 #define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2130 #define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2131 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2132 "Flow Control: %s\n",
2133 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2134 "10 Gbps" :
2135 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2136 "1 Gbps" : "unknown speed")),
2137 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2138 (FLOW_RX ? "RX" :
2139 (FLOW_TX ? "TX" : "None"))));
2140
2141 netif_carrier_on(netdev);
2142 netif_wake_queue(netdev);
2143 } else {
2144 /* Force detection of hung controller */
2145 adapter->detect_tx_hung = true;
2146 }
2147 } else {
2148 if (netif_carrier_ok(netdev)) {
2149 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2150 netif_carrier_off(netdev);
2151 netif_stop_queue(netdev);
2152 }
2153 }
2154
2155 ixgbe_update_stats(adapter);
2156
2157 /* Reset the timer */
2158 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2159 mod_timer(&adapter->watchdog_timer,
2160 round_jiffies(jiffies + 2 * HZ));
2161 }
2162
2163 static int ixgbe_tso(struct ixgbe_adapter *adapter,
2164 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2165 u32 tx_flags, u8 *hdr_len)
2166 {
2167 struct ixgbe_adv_tx_context_desc *context_desc;
2168 unsigned int i;
2169 int err;
2170 struct ixgbe_tx_buffer *tx_buffer_info;
2171 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2172 u32 mss_l4len_idx = 0, l4len;
2173 *hdr_len = 0;
2174
2175 if (skb_is_gso(skb)) {
2176 if (skb_header_cloned(skb)) {
2177 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2178 if (err)
2179 return err;
2180 }
2181 l4len = tcp_hdrlen(skb);
2182 *hdr_len += l4len;
2183
2184 if (skb->protocol == htons(ETH_P_IP)) {
2185 struct iphdr *iph = ip_hdr(skb);
2186 iph->tot_len = 0;
2187 iph->check = 0;
2188 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2189 iph->daddr, 0,
2190 IPPROTO_TCP,
2191 0);
2192 adapter->hw_tso_ctxt++;
2193 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2194 ipv6_hdr(skb)->payload_len = 0;
2195 tcp_hdr(skb)->check =
2196 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2197 &ipv6_hdr(skb)->daddr,
2198 0, IPPROTO_TCP, 0);
2199 adapter->hw_tso6_ctxt++;
2200 }
2201
2202 i = tx_ring->next_to_use;
2203
2204 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2205 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2206
2207 /* VLAN MACLEN IPLEN */
2208 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2209 vlan_macip_lens |=
2210 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2211 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2212 IXGBE_ADVTXD_MACLEN_SHIFT);
2213 *hdr_len += skb_network_offset(skb);
2214 vlan_macip_lens |=
2215 (skb_transport_header(skb) - skb_network_header(skb));
2216 *hdr_len +=
2217 (skb_transport_header(skb) - skb_network_header(skb));
2218 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2219 context_desc->seqnum_seed = 0;
2220
2221 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2222 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2223 IXGBE_ADVTXD_DTYP_CTXT);
2224
2225 if (skb->protocol == htons(ETH_P_IP))
2226 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2227 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2228 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2229
2230 /* MSS L4LEN IDX */
2231 mss_l4len_idx |=
2232 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2233 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2234 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2235
2236 tx_buffer_info->time_stamp = jiffies;
2237 tx_buffer_info->next_to_watch = i;
2238
2239 i++;
2240 if (i == tx_ring->count)
2241 i = 0;
2242 tx_ring->next_to_use = i;
2243
2244 return true;
2245 }
2246 return false;
2247 }
2248
2249 static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2250 struct ixgbe_ring *tx_ring,
2251 struct sk_buff *skb, u32 tx_flags)
2252 {
2253 struct ixgbe_adv_tx_context_desc *context_desc;
2254 unsigned int i;
2255 struct ixgbe_tx_buffer *tx_buffer_info;
2256 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2257
2258 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2259 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2260 i = tx_ring->next_to_use;
2261 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2262 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2263
2264 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2265 vlan_macip_lens |=
2266 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2267 vlan_macip_lens |= (skb_network_offset(skb) <<
2268 IXGBE_ADVTXD_MACLEN_SHIFT);
2269 if (skb->ip_summed == CHECKSUM_PARTIAL)
2270 vlan_macip_lens |= (skb_transport_header(skb) -
2271 skb_network_header(skb));
2272
2273 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2274 context_desc->seqnum_seed = 0;
2275
2276 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2277 IXGBE_ADVTXD_DTYP_CTXT);
2278
2279 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2280 switch (skb->protocol) {
2281 case __constant_htons(ETH_P_IP):
2282 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2283 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2284 type_tucmd_mlhl |=
2285 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2286 break;
2287
2288 case __constant_htons(ETH_P_IPV6):
2289 /* XXX what about other V6 headers?? */
2290 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2291 type_tucmd_mlhl |=
2292 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2293 break;
2294
2295 default:
2296 if (unlikely(net_ratelimit())) {
2297 DPRINTK(PROBE, WARNING,
2298 "partial checksum but proto=%x!\n",
2299 skb->protocol);
2300 }
2301 break;
2302 }
2303 }
2304
2305 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2306 context_desc->mss_l4len_idx = 0;
2307
2308 tx_buffer_info->time_stamp = jiffies;
2309 tx_buffer_info->next_to_watch = i;
2310 adapter->hw_csum_tx_good++;
2311 i++;
2312 if (i == tx_ring->count)
2313 i = 0;
2314 tx_ring->next_to_use = i;
2315
2316 return true;
2317 }
2318 return false;
2319 }
2320
2321 static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2322 struct ixgbe_ring *tx_ring,
2323 struct sk_buff *skb, unsigned int first)
2324 {
2325 struct ixgbe_tx_buffer *tx_buffer_info;
2326 unsigned int len = skb->len;
2327 unsigned int offset = 0, size, count = 0, i;
2328 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2329 unsigned int f;
2330
2331 len -= skb->data_len;
2332
2333 i = tx_ring->next_to_use;
2334
2335 while (len) {
2336 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2337 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2338
2339 tx_buffer_info->length = size;
2340 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2341 skb->data + offset,
2342 size, PCI_DMA_TODEVICE);
2343 tx_buffer_info->time_stamp = jiffies;
2344 tx_buffer_info->next_to_watch = i;
2345
2346 len -= size;
2347 offset += size;
2348 count++;
2349 i++;
2350 if (i == tx_ring->count)
2351 i = 0;
2352 }
2353
2354 for (f = 0; f < nr_frags; f++) {
2355 struct skb_frag_struct *frag;
2356
2357 frag = &skb_shinfo(skb)->frags[f];
2358 len = frag->size;
2359 offset = frag->page_offset;
2360
2361 while (len) {
2362 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2363 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2364
2365 tx_buffer_info->length = size;
2366 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2367 frag->page,
2368 offset,
2369 size, PCI_DMA_TODEVICE);
2370 tx_buffer_info->time_stamp = jiffies;
2371 tx_buffer_info->next_to_watch = i;
2372
2373 len -= size;
2374 offset += size;
2375 count++;
2376 i++;
2377 if (i == tx_ring->count)
2378 i = 0;
2379 }
2380 }
2381 if (i == 0)
2382 i = tx_ring->count - 1;
2383 else
2384 i = i - 1;
2385 tx_ring->tx_buffer_info[i].skb = skb;
2386 tx_ring->tx_buffer_info[first].next_to_watch = i;
2387
2388 return count;
2389 }
2390
2391 static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2392 struct ixgbe_ring *tx_ring,
2393 int tx_flags, int count, u32 paylen, u8 hdr_len)
2394 {
2395 union ixgbe_adv_tx_desc *tx_desc = NULL;
2396 struct ixgbe_tx_buffer *tx_buffer_info;
2397 u32 olinfo_status = 0, cmd_type_len = 0;
2398 unsigned int i;
2399 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2400
2401 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2402
2403 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2404
2405 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2406 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2407
2408 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2409 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2410
2411 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2412 IXGBE_ADVTXD_POPTS_SHIFT;
2413
2414 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2415 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2416 IXGBE_ADVTXD_POPTS_SHIFT;
2417
2418 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2419 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2420 IXGBE_ADVTXD_POPTS_SHIFT;
2421
2422 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2423
2424 i = tx_ring->next_to_use;
2425 while (count--) {
2426 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2427 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2428 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2429 tx_desc->read.cmd_type_len =
2430 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2431 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2432
2433 i++;
2434 if (i == tx_ring->count)
2435 i = 0;
2436 }
2437
2438 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2439
2440 /*
2441 * Force memory writes to complete before letting h/w
2442 * know there are new descriptors to fetch. (Only
2443 * applicable for weak-ordered memory model archs,
2444 * such as IA-64).
2445 */
2446 wmb();
2447
2448 tx_ring->next_to_use = i;
2449 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2450 }
2451
2452 static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
2453 struct ixgbe_ring *tx_ring, int size)
2454 {
2455 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2456
2457 netif_stop_queue(netdev);
2458 /* Herbert's original patch had:
2459 * smp_mb__after_netif_stop_queue();
2460 * but since that doesn't exist yet, just open code it. */
2461 smp_mb();
2462
2463 /* We need to check again in a case another CPU has just
2464 * made room available. */
2465 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2466 return -EBUSY;
2467
2468 /* A reprieve! - use start_queue because it doesn't call schedule */
2469 netif_wake_queue(netdev);
2470 ++adapter->restart_queue;
2471 return 0;
2472 }
2473
2474 static int ixgbe_maybe_stop_tx(struct net_device *netdev,
2475 struct ixgbe_ring *tx_ring, int size)
2476 {
2477 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2478 return 0;
2479 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
2480 }
2481
2482
2483 static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2484 {
2485 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2486 struct ixgbe_ring *tx_ring;
2487 unsigned int len = skb->len;
2488 unsigned int first;
2489 unsigned int tx_flags = 0;
2490 u8 hdr_len;
2491 int tso;
2492 unsigned int mss = 0;
2493 int count = 0;
2494 unsigned int f;
2495 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2496 len -= skb->data_len;
2497
2498 tx_ring = adapter->tx_ring;
2499
2500 if (skb->len <= 0) {
2501 dev_kfree_skb(skb);
2502 return NETDEV_TX_OK;
2503 }
2504 mss = skb_shinfo(skb)->gso_size;
2505
2506 if (mss)
2507 count++;
2508 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2509 count++;
2510
2511 count += TXD_USE_COUNT(len);
2512 for (f = 0; f < nr_frags; f++)
2513 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2514
2515 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
2516 adapter->tx_busy++;
2517 return NETDEV_TX_BUSY;
2518 }
2519 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2520 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2521 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2522 }
2523
2524 if (skb->protocol == htons(ETH_P_IP))
2525 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2526 first = tx_ring->next_to_use;
2527 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2528 if (tso < 0) {
2529 dev_kfree_skb_any(skb);
2530 return NETDEV_TX_OK;
2531 }
2532
2533 if (tso)
2534 tx_flags |= IXGBE_TX_FLAGS_TSO;
2535 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2536 (skb->ip_summed == CHECKSUM_PARTIAL))
2537 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2538
2539 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2540 ixgbe_tx_map(adapter, tx_ring, skb, first),
2541 skb->len, hdr_len);
2542
2543 netdev->trans_start = jiffies;
2544
2545 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
2546
2547 return NETDEV_TX_OK;
2548 }
2549
2550 /**
2551 * ixgbe_get_stats - Get System Network Statistics
2552 * @netdev: network interface device structure
2553 *
2554 * Returns the address of the device statistics structure.
2555 * The statistics are actually updated from the timer callback.
2556 **/
2557 static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2558 {
2559 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2560
2561 /* only return the current stats */
2562 return &adapter->net_stats;
2563 }
2564
2565 /**
2566 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2567 * @netdev: network interface device structure
2568 * @p: pointer to an address structure
2569 *
2570 * Returns 0 on success, negative on failure
2571 **/
2572 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2573 {
2574 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2575 struct sockaddr *addr = p;
2576
2577 if (!is_valid_ether_addr(addr->sa_data))
2578 return -EADDRNOTAVAIL;
2579
2580 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2581 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2582
2583 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2584
2585 return 0;
2586 }
2587
2588 #ifdef CONFIG_NET_POLL_CONTROLLER
2589 /*
2590 * Polling 'interrupt' - used by things like netconsole to send skbs
2591 * without having to re-enable interrupts. It's not called while
2592 * the interrupt routine is executing.
2593 */
2594 static void ixgbe_netpoll(struct net_device *netdev)
2595 {
2596 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2597
2598 disable_irq(adapter->pdev->irq);
2599 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2600 ixgbe_intr(adapter->pdev->irq, netdev);
2601 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2602 enable_irq(adapter->pdev->irq);
2603 }
2604 #endif
2605
2606 /**
2607 * ixgbe_probe - Device Initialization Routine
2608 * @pdev: PCI device information struct
2609 * @ent: entry in ixgbe_pci_tbl
2610 *
2611 * Returns 0 on success, negative on failure
2612 *
2613 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2614 * The OS initialization, configuring of the adapter private structure,
2615 * and a hardware reset occur.
2616 **/
2617 static int __devinit ixgbe_probe(struct pci_dev *pdev,
2618 const struct pci_device_id *ent)
2619 {
2620 struct net_device *netdev;
2621 struct ixgbe_adapter *adapter = NULL;
2622 struct ixgbe_hw *hw;
2623 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2624 unsigned long mmio_start, mmio_len;
2625 static int cards_found;
2626 int i, err, pci_using_dac;
2627 u16 link_status, link_speed, link_width;
2628 u32 part_num;
2629
2630 err = pci_enable_device(pdev);
2631 if (err)
2632 return err;
2633
2634 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2635 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2636 pci_using_dac = 1;
2637 } else {
2638 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2639 if (err) {
2640 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2641 if (err) {
2642 dev_err(&pdev->dev, "No usable DMA "
2643 "configuration, aborting\n");
2644 goto err_dma;
2645 }
2646 }
2647 pci_using_dac = 0;
2648 }
2649
2650 err = pci_request_regions(pdev, ixgbe_driver_name);
2651 if (err) {
2652 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2653 goto err_pci_reg;
2654 }
2655
2656 pci_set_master(pdev);
2657
2658 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2659 if (!netdev) {
2660 err = -ENOMEM;
2661 goto err_alloc_etherdev;
2662 }
2663
2664 SET_NETDEV_DEV(netdev, &pdev->dev);
2665
2666 pci_set_drvdata(pdev, netdev);
2667 adapter = netdev_priv(netdev);
2668
2669 adapter->netdev = netdev;
2670 adapter->pdev = pdev;
2671 hw = &adapter->hw;
2672 hw->back = adapter;
2673 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2674
2675 mmio_start = pci_resource_start(pdev, 0);
2676 mmio_len = pci_resource_len(pdev, 0);
2677
2678 hw->hw_addr = ioremap(mmio_start, mmio_len);
2679 if (!hw->hw_addr) {
2680 err = -EIO;
2681 goto err_ioremap;
2682 }
2683
2684 for (i = 1; i <= 5; i++) {
2685 if (pci_resource_len(pdev, i) == 0)
2686 continue;
2687 }
2688
2689 netdev->open = &ixgbe_open;
2690 netdev->stop = &ixgbe_close;
2691 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2692 netdev->get_stats = &ixgbe_get_stats;
2693 netdev->set_multicast_list = &ixgbe_set_multi;
2694 netdev->set_mac_address = &ixgbe_set_mac;
2695 netdev->change_mtu = &ixgbe_change_mtu;
2696 ixgbe_set_ethtool_ops(netdev);
2697 netdev->tx_timeout = &ixgbe_tx_timeout;
2698 netdev->watchdog_timeo = 5 * HZ;
2699 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2700 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2701 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2702 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2703 #ifdef CONFIG_NET_POLL_CONTROLLER
2704 netdev->poll_controller = ixgbe_netpoll;
2705 #endif
2706 strcpy(netdev->name, pci_name(pdev));
2707
2708 netdev->mem_start = mmio_start;
2709 netdev->mem_end = mmio_start + mmio_len;
2710
2711 adapter->bd_number = cards_found;
2712
2713 /* PCI config space info */
2714 hw->vendor_id = pdev->vendor;
2715 hw->device_id = pdev->device;
2716 hw->revision_id = pdev->revision;
2717 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2718 hw->subsystem_device_id = pdev->subsystem_device;
2719
2720 /* Setup hw api */
2721 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2722
2723 err = ii->get_invariants(hw);
2724 if (err)
2725 goto err_hw_init;
2726
2727 /* setup the private structure */
2728 err = ixgbe_sw_init(adapter);
2729 if (err)
2730 goto err_sw_init;
2731
2732 netdev->features = NETIF_F_SG |
2733 NETIF_F_HW_CSUM |
2734 NETIF_F_HW_VLAN_TX |
2735 NETIF_F_HW_VLAN_RX |
2736 NETIF_F_HW_VLAN_FILTER;
2737
2738 netdev->features |= NETIF_F_TSO;
2739
2740 netdev->features |= NETIF_F_TSO6;
2741 if (pci_using_dac)
2742 netdev->features |= NETIF_F_HIGHDMA;
2743
2744
2745 /* make sure the EEPROM is good */
2746 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2747 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2748 err = -EIO;
2749 goto err_eeprom;
2750 }
2751
2752 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2753 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2754
2755 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2756 err = -EIO;
2757 goto err_eeprom;
2758 }
2759
2760 init_timer(&adapter->watchdog_timer);
2761 adapter->watchdog_timer.function = &ixgbe_watchdog;
2762 adapter->watchdog_timer.data = (unsigned long)adapter;
2763
2764 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2765
2766 /* initialize default flow control settings */
2767 hw->fc.original_type = ixgbe_fc_full;
2768 hw->fc.type = ixgbe_fc_full;
2769 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2770 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2771 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2772
2773 /* Interrupt Throttle Rate */
2774 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2775 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2776
2777 /* print bus type/speed/width info */
2778 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2779 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2780 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2781 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2782 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2783 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2784 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2785 "Unknown"),
2786 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2787 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2788 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2789 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2790 "Unknown"),
2791 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2792 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2793 ixgbe_read_part_num(hw, &part_num);
2794 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2795 hw->mac.type, hw->phy.type,
2796 (part_num >> 8), (part_num & 0xff));
2797
2798 if (link_width <= IXGBE_PCI_LINK_WIDTH_4) {
2799 dev_warn(&pdev->dev, "PCI-Express bandwidth available for "
2800 "this card is not sufficient for optimal "
2801 "performance.\n");
2802 dev_warn(&pdev->dev, "For optimal performance a x8 "
2803 "PCI-Express slot is required.\n");
2804 }
2805
2806 /* reset the hardware with the new settings */
2807 ixgbe_start_hw(hw);
2808
2809 netif_carrier_off(netdev);
2810 netif_stop_queue(netdev);
2811
2812 strcpy(netdev->name, "eth%d");
2813 err = register_netdev(netdev);
2814 if (err)
2815 goto err_register;
2816
2817
2818 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2819 cards_found++;
2820 return 0;
2821
2822 err_register:
2823 ixgbe_release_hw_control(adapter);
2824 err_hw_init:
2825 err_sw_init:
2826 err_eeprom:
2827 iounmap(hw->hw_addr);
2828 err_ioremap:
2829 free_netdev(netdev);
2830 err_alloc_etherdev:
2831 pci_release_regions(pdev);
2832 err_pci_reg:
2833 err_dma:
2834 pci_disable_device(pdev);
2835 return err;
2836 }
2837
2838 /**
2839 * ixgbe_remove - Device Removal Routine
2840 * @pdev: PCI device information struct
2841 *
2842 * ixgbe_remove is called by the PCI subsystem to alert the driver
2843 * that it should release a PCI device. The could be caused by a
2844 * Hot-Plug event, or because the driver is going to be removed from
2845 * memory.
2846 **/
2847 static void __devexit ixgbe_remove(struct pci_dev *pdev)
2848 {
2849 struct net_device *netdev = pci_get_drvdata(pdev);
2850 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2851
2852 set_bit(__IXGBE_DOWN, &adapter->state);
2853 del_timer_sync(&adapter->watchdog_timer);
2854
2855 flush_scheduled_work();
2856
2857 unregister_netdev(netdev);
2858
2859 ixgbe_release_hw_control(adapter);
2860
2861 kfree(adapter->tx_ring);
2862 kfree(adapter->rx_ring);
2863
2864 iounmap(adapter->hw.hw_addr);
2865 pci_release_regions(pdev);
2866
2867 free_netdev(netdev);
2868
2869 pci_disable_device(pdev);
2870 }
2871
2872 /**
2873 * ixgbe_io_error_detected - called when PCI error is detected
2874 * @pdev: Pointer to PCI device
2875 * @state: The current pci connection state
2876 *
2877 * This function is called after a PCI bus error affecting
2878 * this device has been detected.
2879 */
2880 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2881 pci_channel_state_t state)
2882 {
2883 struct net_device *netdev = pci_get_drvdata(pdev);
2884 struct ixgbe_adapter *adapter = netdev->priv;
2885
2886 netif_device_detach(netdev);
2887
2888 if (netif_running(netdev))
2889 ixgbe_down(adapter);
2890 pci_disable_device(pdev);
2891
2892 /* Request a slot slot reset. */
2893 return PCI_ERS_RESULT_NEED_RESET;
2894 }
2895
2896 /**
2897 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2898 * @pdev: Pointer to PCI device
2899 *
2900 * Restart the card from scratch, as if from a cold-boot.
2901 */
2902 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2903 {
2904 struct net_device *netdev = pci_get_drvdata(pdev);
2905 struct ixgbe_adapter *adapter = netdev->priv;
2906
2907 if (pci_enable_device(pdev)) {
2908 DPRINTK(PROBE, ERR,
2909 "Cannot re-enable PCI device after reset.\n");
2910 return PCI_ERS_RESULT_DISCONNECT;
2911 }
2912 pci_set_master(pdev);
2913
2914 pci_enable_wake(pdev, PCI_D3hot, 0);
2915 pci_enable_wake(pdev, PCI_D3cold, 0);
2916
2917 ixgbe_reset(adapter);
2918
2919 return PCI_ERS_RESULT_RECOVERED;
2920 }
2921
2922 /**
2923 * ixgbe_io_resume - called when traffic can start flowing again.
2924 * @pdev: Pointer to PCI device
2925 *
2926 * This callback is called when the error recovery driver tells us that
2927 * its OK to resume normal operation.
2928 */
2929 static void ixgbe_io_resume(struct pci_dev *pdev)
2930 {
2931 struct net_device *netdev = pci_get_drvdata(pdev);
2932 struct ixgbe_adapter *adapter = netdev->priv;
2933
2934 if (netif_running(netdev)) {
2935 if (ixgbe_up(adapter)) {
2936 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2937 return;
2938 }
2939 }
2940
2941 netif_device_attach(netdev);
2942
2943 }
2944
2945 static struct pci_error_handlers ixgbe_err_handler = {
2946 .error_detected = ixgbe_io_error_detected,
2947 .slot_reset = ixgbe_io_slot_reset,
2948 .resume = ixgbe_io_resume,
2949 };
2950
2951 static struct pci_driver ixgbe_driver = {
2952 .name = ixgbe_driver_name,
2953 .id_table = ixgbe_pci_tbl,
2954 .probe = ixgbe_probe,
2955 .remove = __devexit_p(ixgbe_remove),
2956 #ifdef CONFIG_PM
2957 .suspend = ixgbe_suspend,
2958 .resume = ixgbe_resume,
2959 #endif
2960 .shutdown = ixgbe_shutdown,
2961 .err_handler = &ixgbe_err_handler
2962 };
2963
2964 /**
2965 * ixgbe_init_module - Driver Registration Routine
2966 *
2967 * ixgbe_init_module is the first routine called when the driver is
2968 * loaded. All it does is register with the PCI subsystem.
2969 **/
2970 static int __init ixgbe_init_module(void)
2971 {
2972 int ret;
2973 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2974 ixgbe_driver_string, ixgbe_driver_version);
2975
2976 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2977
2978 ret = pci_register_driver(&ixgbe_driver);
2979 return ret;
2980 }
2981 module_init(ixgbe_init_module);
2982
2983 /**
2984 * ixgbe_exit_module - Driver Exit Cleanup Routine
2985 *
2986 * ixgbe_exit_module is called just before the driver is removed
2987 * from memory.
2988 **/
2989 static void __exit ixgbe_exit_module(void)
2990 {
2991 pci_unregister_driver(&ixgbe_driver);
2992 }
2993 module_exit(ixgbe_exit_module);
2994
2995 /* ixgbe_main.c */
WRT350N Kernel Patches