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Merge git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-for-linus
[wrt350n-kernel.git] / drivers / net / wireless / p54common.c
blobd191e055a788210e4a2b6343f4815b1bf120180d
1
2 /*
3 * Common code for mac80211 Prism54 drivers
4 *
5 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
7 *
8 * Based on the islsm (softmac prism54) driver, which is:
9 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/init.h>
17 #include <linux/firmware.h>
18 #include <linux/etherdevice.h>
19
20 #include <net/mac80211.h>
21
22 #include "p54.h"
23 #include "p54common.h"
24
25 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
26 MODULE_DESCRIPTION("Softmac Prism54 common code");
27 MODULE_LICENSE("GPL");
28 MODULE_ALIAS("prism54common");
29
30 void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
31 {
32 struct p54_common *priv = dev->priv;
33 struct bootrec_exp_if *exp_if;
34 struct bootrec *bootrec;
35 u32 *data = (u32 *)fw->data;
36 u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
37 u8 *fw_version = NULL;
38 size_t len;
39 int i;
40
41 if (priv->rx_start)
42 return;
43
44 while (data < end_data && *data)
45 data++;
46
47 while (data < end_data && !*data)
48 data++;
49
50 bootrec = (struct bootrec *) data;
51
52 while (bootrec->data <= end_data &&
53 (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) {
54 u32 code = le32_to_cpu(bootrec->code);
55 switch (code) {
56 case BR_CODE_COMPONENT_ID:
57 switch (be32_to_cpu(*(__be32 *)bootrec->data)) {
58 case FW_FMAC:
59 printk(KERN_INFO "p54: FreeMAC firmware\n");
60 break;
61 case FW_LM20:
62 printk(KERN_INFO "p54: LM20 firmware\n");
63 break;
64 case FW_LM86:
65 printk(KERN_INFO "p54: LM86 firmware\n");
66 break;
67 case FW_LM87:
68 printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n");
69 break;
70 default:
71 printk(KERN_INFO "p54: unknown firmware\n");
72 break;
73 }
74 break;
75 case BR_CODE_COMPONENT_VERSION:
76 /* 24 bytes should be enough for all firmwares */
77 if (strnlen((unsigned char*)bootrec->data, 24) < 24)
78 fw_version = (unsigned char*)bootrec->data;
79 break;
80 case BR_CODE_DESCR:
81 priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]);
82 /* FIXME add sanity checking */
83 priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500;
84 break;
85 case BR_CODE_EXPOSED_IF:
86 exp_if = (struct bootrec_exp_if *) bootrec->data;
87 for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
88 if (exp_if[i].if_id == cpu_to_le16(0x1a))
89 priv->fw_var = le16_to_cpu(exp_if[i].variant);
90 break;
91 case BR_CODE_DEPENDENT_IF:
92 break;
93 case BR_CODE_END_OF_BRA:
94 case LEGACY_BR_CODE_END_OF_BRA:
95 end_data = NULL;
96 break;
97 default:
98 break;
99 }
100 bootrec = (struct bootrec *)&bootrec->data[len];
101 }
102
103 if (fw_version)
104 printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n",
105 fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
106
107 if (priv->fw_var >= 0x300) {
108 /* Firmware supports QoS, use it! */
109 priv->tx_stats.data[0].limit = 3;
110 priv->tx_stats.data[1].limit = 4;
111 priv->tx_stats.data[2].limit = 3;
112 priv->tx_stats.data[3].limit = 1;
113 dev->queues = 4;
114 }
115 }
116 EXPORT_SYMBOL_GPL(p54_parse_firmware);
117
118 static int p54_convert_rev0_to_rev1(struct ieee80211_hw *dev,
119 struct pda_pa_curve_data *curve_data)
120 {
121 struct p54_common *priv = dev->priv;
122 struct pda_pa_curve_data_sample_rev1 *rev1;
123 struct pda_pa_curve_data_sample_rev0 *rev0;
124 size_t cd_len = sizeof(*curve_data) +
125 (curve_data->points_per_channel*sizeof(*rev1) + 2) *
126 curve_data->channels;
127 unsigned int i, j;
128 void *source, *target;
129
130 priv->curve_data = kmalloc(cd_len, GFP_KERNEL);
131 if (!priv->curve_data)
132 return -ENOMEM;
133
134 memcpy(priv->curve_data, curve_data, sizeof(*curve_data));
135 source = curve_data->data;
136 target = priv->curve_data->data;
137 for (i = 0; i < curve_data->channels; i++) {
138 __le16 *freq = source;
139 source += sizeof(__le16);
140 *((__le16 *)target) = *freq;
141 target += sizeof(__le16);
142 for (j = 0; j < curve_data->points_per_channel; j++) {
143 rev1 = target;
144 rev0 = source;
145
146 rev1->rf_power = rev0->rf_power;
147 rev1->pa_detector = rev0->pa_detector;
148 rev1->data_64qam = rev0->pcv;
149 /* "invent" the points for the other modulations */
150 #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y)
151 rev1->data_16qam = SUB(rev0->pcv, 12);
152 rev1->data_qpsk = SUB(rev1->data_16qam, 12);
153 rev1->data_bpsk = SUB(rev1->data_qpsk, 12);
154 rev1->data_barker= SUB(rev1->data_bpsk, 14);
155 #undef SUB
156 target += sizeof(*rev1);
157 source += sizeof(*rev0);
158 }
159 }
160
161 return 0;
162 }
163
164 int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len)
165 {
166 struct p54_common *priv = dev->priv;
167 struct eeprom_pda_wrap *wrap = NULL;
168 struct pda_entry *entry;
169 unsigned int data_len, entry_len;
170 void *tmp;
171 int err;
172 u8 *end = (u8 *)eeprom + len;
173
174 wrap = (struct eeprom_pda_wrap *) eeprom;
175 entry = (void *)wrap->data + le16_to_cpu(wrap->len);
176
177 /* verify that at least the entry length/code fits */
178 while ((u8 *)entry <= end - sizeof(*entry)) {
179 entry_len = le16_to_cpu(entry->len);
180 data_len = ((entry_len - 1) << 1);
181
182 /* abort if entry exceeds whole structure */
183 if ((u8 *)entry + sizeof(*entry) + data_len > end)
184 break;
185
186 switch (le16_to_cpu(entry->code)) {
187 case PDR_MAC_ADDRESS:
188 SET_IEEE80211_PERM_ADDR(dev, entry->data);
189 break;
190 case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS:
191 if (data_len < 2) {
192 err = -EINVAL;
193 goto err;
194 }
195
196 if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) {
197 err = -EINVAL;
198 goto err;
199 }
200
201 priv->output_limit = kmalloc(entry->data[1] *
202 sizeof(*priv->output_limit), GFP_KERNEL);
203
204 if (!priv->output_limit) {
205 err = -ENOMEM;
206 goto err;
207 }
208
209 memcpy(priv->output_limit, &entry->data[2],
210 entry->data[1]*sizeof(*priv->output_limit));
211 priv->output_limit_len = entry->data[1];
212 break;
213 case PDR_PRISM_PA_CAL_CURVE_DATA:
214 if (data_len < sizeof(struct pda_pa_curve_data)) {
215 err = -EINVAL;
216 goto err;
217 }
218
219 if (((struct pda_pa_curve_data *)entry->data)->cal_method_rev) {
220 priv->curve_data = kmalloc(data_len, GFP_KERNEL);
221 if (!priv->curve_data) {
222 err = -ENOMEM;
223 goto err;
224 }
225
226 memcpy(priv->curve_data, entry->data, data_len);
227 } else {
228 err = p54_convert_rev0_to_rev1(dev, (struct pda_pa_curve_data *)entry->data);
229 if (err)
230 goto err;
231 }
232
233 break;
234 case PDR_PRISM_ZIF_TX_IQ_CALIBRATION:
235 priv->iq_autocal = kmalloc(data_len, GFP_KERNEL);
236 if (!priv->iq_autocal) {
237 err = -ENOMEM;
238 goto err;
239 }
240
241 memcpy(priv->iq_autocal, entry->data, data_len);
242 priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry);
243 break;
244 case PDR_INTERFACE_LIST:
245 tmp = entry->data;
246 while ((u8 *)tmp < entry->data + data_len) {
247 struct bootrec_exp_if *exp_if = tmp;
248 if (le16_to_cpu(exp_if->if_id) == 0xF)
249 priv->rxhw = exp_if->variant & cpu_to_le16(0x07);
250 tmp += sizeof(struct bootrec_exp_if);
251 }
252 break;
253 case PDR_HARDWARE_PLATFORM_COMPONENT_ID:
254 priv->version = *(u8 *)(entry->data + 1);
255 break;
256 case PDR_END:
257 /* make it overrun */
258 entry_len = len;
259 break;
260 }
261
262 entry = (void *)entry + (entry_len + 1)*2;
263 }
264
265 if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) {
266 printk(KERN_ERR "p54: not all required entries found in eeprom!\n");
267 err = -EINVAL;
268 goto err;
269 }
270
271 return 0;
272
273 err:
274 if (priv->iq_autocal) {
275 kfree(priv->iq_autocal);
276 priv->iq_autocal = NULL;
277 }
278
279 if (priv->output_limit) {
280 kfree(priv->output_limit);
281 priv->output_limit = NULL;
282 }
283
284 if (priv->curve_data) {
285 kfree(priv->curve_data);
286 priv->curve_data = NULL;
287 }
288
289 printk(KERN_ERR "p54: eeprom parse failed!\n");
290 return err;
291 }
292 EXPORT_SYMBOL_GPL(p54_parse_eeprom);
293
294 void p54_fill_eeprom_readback(struct p54_control_hdr *hdr)
295 {
296 struct p54_eeprom_lm86 *eeprom_hdr;
297
298 hdr->magic1 = cpu_to_le16(0x8000);
299 hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000);
300 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK);
301 hdr->retry1 = hdr->retry2 = 0;
302 eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data;
303 eeprom_hdr->offset = 0x0;
304 eeprom_hdr->len = cpu_to_le16(0x2000);
305 }
306 EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback);
307
308 static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb)
309 {
310 struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data;
311 struct ieee80211_rx_status rx_status = {0};
312 u16 freq = le16_to_cpu(hdr->freq);
313
314 rx_status.ssi = hdr->rssi;
315 rx_status.rate = hdr->rate & 0x1f; /* report short preambles & CCK too */
316 rx_status.channel = freq == 2484 ? 14 : (freq - 2407)/5;
317 rx_status.freq = freq;
318 rx_status.phymode = MODE_IEEE80211G;
319 rx_status.antenna = hdr->antenna;
320 rx_status.mactime = le64_to_cpu(hdr->timestamp);
321 rx_status.flag |= RX_FLAG_TSFT;
322
323 skb_pull(skb, sizeof(*hdr));
324 skb_trim(skb, le16_to_cpu(hdr->len));
325
326 ieee80211_rx_irqsafe(dev, skb, &rx_status);
327 }
328
329 static void inline p54_wake_free_queues(struct ieee80211_hw *dev)
330 {
331 struct p54_common *priv = dev->priv;
332 int i;
333
334 /* ieee80211_start_queues is great if all queues are really empty.
335 * But, what if some are full? */
336
337 for (i = 0; i < dev->queues; i++)
338 if (priv->tx_stats.data[i].len < priv->tx_stats.data[i].limit)
339 ieee80211_wake_queue(dev, i);
340 }
341
342 static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
343 {
344 struct p54_common *priv = dev->priv;
345 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
346 struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data;
347 struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
348 u32 addr = le32_to_cpu(hdr->req_id) - 0x70;
349 struct memrecord *range = NULL;
350 u32 freed = 0;
351 u32 last_addr = priv->rx_start;
352
353 while (entry != (struct sk_buff *)&priv->tx_queue) {
354 range = (struct memrecord *)&entry->cb;
355 if (range->start_addr == addr) {
356 struct ieee80211_tx_status status = {{0}};
357 struct p54_control_hdr *entry_hdr;
358 struct p54_tx_control_allocdata *entry_data;
359 int pad = 0;
360
361 if (entry->next != (struct sk_buff *)&priv->tx_queue)
362 freed = ((struct memrecord *)&entry->next->cb)->start_addr - last_addr;
363 else
364 freed = priv->rx_end - last_addr;
365
366 last_addr = range->end_addr;
367 __skb_unlink(entry, &priv->tx_queue);
368 if (!range->control) {
369 kfree_skb(entry);
370 break;
371 }
372 memcpy(&status.control, range->control,
373 sizeof(status.control));
374 kfree(range->control);
375 priv->tx_stats.data[status.control.queue].len--;
376
377 entry_hdr = (struct p54_control_hdr *) entry->data;
378 entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data;
379 if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0)
380 pad = entry_data->align[0];
381
382 if (!(status.control.flags & IEEE80211_TXCTL_NO_ACK)) {
383 if (!(payload->status & 0x01))
384 status.flags |= IEEE80211_TX_STATUS_ACK;
385 else
386 status.excessive_retries = 1;
387 }
388 status.retry_count = payload->retries - 1;
389 status.ack_signal = le16_to_cpu(payload->ack_rssi);
390 skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
391 ieee80211_tx_status_irqsafe(dev, entry, &status);
392 break;
393 } else
394 last_addr = range->end_addr;
395 entry = entry->next;
396 }
397
398 if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
399 sizeof(struct p54_control_hdr))
400 p54_wake_free_queues(dev);
401 }
402
403 static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb)
404 {
405 struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data;
406
407 switch (le16_to_cpu(hdr->type)) {
408 case P54_CONTROL_TYPE_TXDONE:
409 p54_rx_frame_sent(dev, skb);
410 break;
411 case P54_CONTROL_TYPE_BBP:
412 break;
413 default:
414 printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n",
415 wiphy_name(dev->wiphy), le16_to_cpu(hdr->type));
416 break;
417 }
418 }
419
420 /* returns zero if skb can be reused */
421 int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
422 {
423 u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8;
424 switch (type) {
425 case 0x00:
426 case 0x01:
427 p54_rx_data(dev, skb);
428 return -1;
429 case 0x4d:
430 /* TODO: do something better... but then again, I've never seen this happen */
431 printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n",
432 wiphy_name(dev->wiphy));
433 break;
434 case 0x80:
435 p54_rx_control(dev, skb);
436 break;
437 default:
438 printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n",
439 wiphy_name(dev->wiphy), type);
440 break;
441 }
442 return 0;
443 }
444 EXPORT_SYMBOL_GPL(p54_rx);
445
446 /*
447 * So, the firmware is somewhat stupid and doesn't know what places in its
448 * memory incoming data should go to. By poking around in the firmware, we
449 * can find some unused memory to upload our packets to. However, data that we
450 * want the card to TX needs to stay intact until the card has told us that
451 * it is done with it. This function finds empty places we can upload to and
452 * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees
453 * allocated areas.
454 */
455 static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
456 struct p54_control_hdr *data, u32 len,
457 struct ieee80211_tx_control *control)
458 {
459 struct p54_common *priv = dev->priv;
460 struct sk_buff *entry = priv->tx_queue.next;
461 struct sk_buff *target_skb = NULL;
462 struct memrecord *range;
463 u32 last_addr = priv->rx_start;
464 u32 largest_hole = 0;
465 u32 target_addr = priv->rx_start;
466 unsigned long flags;
467 unsigned int left;
468 len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */
469
470 spin_lock_irqsave(&priv->tx_queue.lock, flags);
471 left = skb_queue_len(&priv->tx_queue);
472 while (left--) {
473 u32 hole_size;
474 range = (struct memrecord *)&entry->cb;
475 hole_size = range->start_addr - last_addr;
476 if (!target_skb && hole_size >= len) {
477 target_skb = entry->prev;
478 hole_size -= len;
479 target_addr = last_addr;
480 }
481 largest_hole = max(largest_hole, hole_size);
482 last_addr = range->end_addr;
483 entry = entry->next;
484 }
485 if (!target_skb && priv->rx_end - last_addr >= len) {
486 target_skb = priv->tx_queue.prev;
487 largest_hole = max(largest_hole, priv->rx_end - last_addr - len);
488 if (!skb_queue_empty(&priv->tx_queue)) {
489 range = (struct memrecord *)&target_skb->cb;
490 target_addr = range->end_addr;
491 }
492 } else
493 largest_hole = max(largest_hole, priv->rx_end - last_addr);
494
495 if (skb) {
496 range = (struct memrecord *)&skb->cb;
497 range->start_addr = target_addr;
498 range->end_addr = target_addr + len;
499 range->control = control;
500 __skb_queue_after(&priv->tx_queue, target_skb, skb);
501 if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 +
502 sizeof(struct p54_control_hdr))
503 ieee80211_stop_queues(dev);
504 }
505 spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
506
507 data->req_id = cpu_to_le32(target_addr + 0x70);
508 }
509
510 static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
511 struct ieee80211_tx_control *control)
512 {
513 struct ieee80211_tx_queue_stats_data *current_queue;
514 struct p54_common *priv = dev->priv;
515 struct p54_control_hdr *hdr;
516 struct p54_tx_control_allocdata *txhdr;
517 struct ieee80211_tx_control *control_copy;
518 size_t padding, len;
519 u8 rate;
520
521 current_queue = &priv->tx_stats.data[control->queue];
522 if (unlikely(current_queue->len > current_queue->limit))
523 return NETDEV_TX_BUSY;
524 current_queue->len++;
525 current_queue->count++;
526 if (current_queue->len == current_queue->limit)
527 ieee80211_stop_queue(dev, control->queue);
528
529 padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
530 len = skb->len;
531
532 control_copy = kmalloc(sizeof(*control), GFP_ATOMIC);
533 if (control_copy)
534 memcpy(control_copy, control, sizeof(*control));
535
536 txhdr = (struct p54_tx_control_allocdata *)
537 skb_push(skb, sizeof(*txhdr) + padding);
538 hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr));
539
540 if (padding)
541 hdr->magic1 = cpu_to_le16(0x4010);
542 else
543 hdr->magic1 = cpu_to_le16(0x0010);
544 hdr->len = cpu_to_le16(len);
545 hdr->type = (control->flags & IEEE80211_TXCTL_NO_ACK) ? 0 : cpu_to_le16(1);
546 hdr->retry1 = hdr->retry2 = control->retry_limit;
547 p54_assign_address(dev, skb, hdr, skb->len, control_copy);
548
549 memset(txhdr->wep_key, 0x0, 16);
550 txhdr->padding = 0;
551 txhdr->padding2 = 0;
552
553 /* TODO: add support for alternate retry TX rates */
554 rate = control->tx_rate;
555 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS)
556 rate |= 0x40;
557 else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
558 rate |= 0x20;
559 memset(txhdr->rateset, rate, 8);
560 txhdr->wep_key_present = 0;
561 txhdr->wep_key_len = 0;
562 txhdr->frame_type = cpu_to_le32(control->queue + 4);
563 txhdr->magic4 = 0;
564 txhdr->antenna = (control->antenna_sel_tx == 0) ?
565 2 : control->antenna_sel_tx - 1;
566 txhdr->output_power = 0x7f; // HW Maximum
567 txhdr->magic5 = (control->flags & IEEE80211_TXCTL_NO_ACK) ?
568 0 : ((rate > 0x3) ? cpu_to_le32(0x33) : cpu_to_le32(0x23));
569 if (padding)
570 txhdr->align[0] = padding;
571
572 priv->tx(dev, hdr, skb->len, 0);
573 return 0;
574 }
575
576 static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type,
577 const u8 *dst, const u8 *src, u8 antenna,
578 u32 magic3, u32 magic8, u32 magic9)
579 {
580 struct p54_common *priv = dev->priv;
581 struct p54_control_hdr *hdr;
582 struct p54_tx_control_filter *filter;
583
584 hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) +
585 priv->tx_hdr_len, GFP_ATOMIC);
586 if (!hdr)
587 return -ENOMEM;
588
589 hdr = (void *)hdr + priv->tx_hdr_len;
590
591 filter = (struct p54_tx_control_filter *) hdr->data;
592 hdr->magic1 = cpu_to_le16(0x8001);
593 hdr->len = cpu_to_le16(sizeof(*filter));
594 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter), NULL);
595 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET);
596
597 filter->filter_type = cpu_to_le16(filter_type);
598 memcpy(filter->dst, dst, ETH_ALEN);
599 if (!src)
600 memset(filter->src, ~0, ETH_ALEN);
601 else
602 memcpy(filter->src, src, ETH_ALEN);
603 filter->antenna = antenna;
604 filter->magic3 = cpu_to_le32(magic3);
605 filter->rx_addr = cpu_to_le32(priv->rx_end);
606 filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */
607 filter->rxhw = priv->rxhw;
608 filter->magic8 = cpu_to_le16(magic8);
609 filter->magic9 = cpu_to_le16(magic9);
610
611 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1);
612 return 0;
613 }
614
615 static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq)
616 {
617 struct p54_common *priv = dev->priv;
618 struct p54_control_hdr *hdr;
619 struct p54_tx_control_channel *chan;
620 unsigned int i;
621 size_t payload_len = sizeof(*chan) + sizeof(u32)*2 +
622 sizeof(*chan->curve_data) *
623 priv->curve_data->points_per_channel;
624 void *entry;
625
626 hdr = kzalloc(sizeof(*hdr) + payload_len +
627 priv->tx_hdr_len, GFP_KERNEL);
628 if (!hdr)
629 return -ENOMEM;
630
631 hdr = (void *)hdr + priv->tx_hdr_len;
632
633 chan = (struct p54_tx_control_channel *) hdr->data;
634
635 hdr->magic1 = cpu_to_le16(0x8001);
636 hdr->len = cpu_to_le16(sizeof(*chan));
637 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE);
638 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + payload_len, NULL);
639
640 chan->magic1 = cpu_to_le16(0x1);
641 chan->magic2 = cpu_to_le16(0x0);
642
643 for (i = 0; i < priv->iq_autocal_len; i++) {
644 if (priv->iq_autocal[i].freq != freq)
645 continue;
646
647 memcpy(&chan->iq_autocal, &priv->iq_autocal[i],
648 sizeof(*priv->iq_autocal));
649 break;
650 }
651 if (i == priv->iq_autocal_len)
652 goto err;
653
654 for (i = 0; i < priv->output_limit_len; i++) {
655 if (priv->output_limit[i].freq != freq)
656 continue;
657
658 chan->val_barker = 0x38;
659 chan->val_bpsk = priv->output_limit[i].val_bpsk;
660 chan->val_qpsk = priv->output_limit[i].val_qpsk;
661 chan->val_16qam = priv->output_limit[i].val_16qam;
662 chan->val_64qam = priv->output_limit[i].val_64qam;
663 break;
664 }
665 if (i == priv->output_limit_len)
666 goto err;
667
668 chan->pa_points_per_curve = priv->curve_data->points_per_channel;
669
670 entry = priv->curve_data->data;
671 for (i = 0; i < priv->curve_data->channels; i++) {
672 if (*((__le16 *)entry) != freq) {
673 entry += sizeof(__le16);
674 entry += sizeof(struct pda_pa_curve_data_sample_rev1) *
675 chan->pa_points_per_curve;
676 continue;
677 }
678
679 entry += sizeof(__le16);
680 memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) *
681 chan->pa_points_per_curve);
682 break;
683 }
684
685 memcpy(hdr->data + payload_len - 4, &chan->val_bpsk, 4);
686
687 priv->tx(dev, hdr, sizeof(*hdr) + payload_len, 1);
688 return 0;
689
690 err:
691 printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy));
692 kfree(hdr);
693 return -EINVAL;
694 }
695
696 static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act)
697 {
698 struct p54_common *priv = dev->priv;
699 struct p54_control_hdr *hdr;
700 struct p54_tx_control_led *led;
701
702 hdr = kzalloc(sizeof(*hdr) + sizeof(*led) +
703 priv->tx_hdr_len, GFP_KERNEL);
704 if (!hdr)
705 return -ENOMEM;
706
707 hdr = (void *)hdr + priv->tx_hdr_len;
708 hdr->magic1 = cpu_to_le16(0x8001);
709 hdr->len = cpu_to_le16(sizeof(*led));
710 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED);
711 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led), NULL);
712
713 led = (struct p54_tx_control_led *) hdr->data;
714 led->mode = cpu_to_le16(mode);
715 led->led_permanent = cpu_to_le16(link);
716 led->led_temporary = cpu_to_le16(act);
717 led->duration = cpu_to_le16(1000);
718
719 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1);
720
721 return 0;
722 }
723
724 #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, burst) \
725 do { \
726 queue.aifs = cpu_to_le16(ai_fs); \
727 queue.cwmin = cpu_to_le16(cw_min); \
728 queue.cwmax = cpu_to_le16(cw_max); \
729 queue.txop = (burst == 0) ? \
730 0 : cpu_to_le16((burst * 100) / 32 + 1); \
731 } while(0)
732
733 static void p54_init_vdcf(struct ieee80211_hw *dev)
734 {
735 struct p54_common *priv = dev->priv;
736 struct p54_control_hdr *hdr;
737 struct p54_tx_control_vdcf *vdcf;
738
739 /* all USB V1 adapters need a extra headroom */
740 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
741 hdr->magic1 = cpu_to_le16(0x8001);
742 hdr->len = cpu_to_le16(sizeof(*vdcf));
743 hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT);
744 hdr->req_id = cpu_to_le32(priv->rx_start);
745
746 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
747
748 P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 0x000f);
749 P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 0x001e);
750 P54_SET_QUEUE(vdcf->queue[2], 0x0002, 0x000f, 0x03ff, 0x0014);
751 P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0x0000);
752 }
753
754 static void p54_set_vdcf(struct ieee80211_hw *dev)
755 {
756 struct p54_common *priv = dev->priv;
757 struct p54_control_hdr *hdr;
758 struct p54_tx_control_vdcf *vdcf;
759
760 hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len;
761
762 p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf), NULL);
763
764 vdcf = (struct p54_tx_control_vdcf *) hdr->data;
765
766 if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
767 vdcf->slottime = 9;
768 vdcf->magic1 = 0x00;
769 vdcf->magic2 = 0x10;
770 } else {
771 vdcf->slottime = 20;
772 vdcf->magic1 = 0x0a;
773 vdcf->magic2 = 0x06;
774 }
775
776 /* (see prism54/isl_oid.h for further details) */
777 vdcf->frameburst = cpu_to_le16(0);
778
779 priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0);
780 }
781
782 static int p54_start(struct ieee80211_hw *dev)
783 {
784 struct p54_common *priv = dev->priv;
785 int err;
786
787 err = priv->open(dev);
788 if (!err)
789 priv->mode = IEEE80211_IF_TYPE_MNTR;
790
791 return err;
792 }
793
794 static void p54_stop(struct ieee80211_hw *dev)
795 {
796 struct p54_common *priv = dev->priv;
797 struct sk_buff *skb;
798 while ((skb = skb_dequeue(&priv->tx_queue))) {
799 struct memrecord *range = (struct memrecord *)&skb->cb;
800 if (range->control)
801 kfree(range->control);
802 kfree_skb(skb);
803 }
804 priv->stop(dev);
805 priv->mode = IEEE80211_IF_TYPE_INVALID;
806 }
807
808 static int p54_add_interface(struct ieee80211_hw *dev,
809 struct ieee80211_if_init_conf *conf)
810 {
811 struct p54_common *priv = dev->priv;
812
813 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
814 return -EOPNOTSUPP;
815
816 switch (conf->type) {
817 case IEEE80211_IF_TYPE_STA:
818 priv->mode = conf->type;
819 break;
820 default:
821 return -EOPNOTSUPP;
822 }
823
824 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
825
826 p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642);
827 p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642);
828
829 switch (conf->type) {
830 case IEEE80211_IF_TYPE_STA:
831 p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0);
832 break;
833 default:
834 BUG(); /* impossible */
835 break;
836 }
837
838 p54_set_leds(dev, 1, 0, 0);
839
840 return 0;
841 }
842
843 static void p54_remove_interface(struct ieee80211_hw *dev,
844 struct ieee80211_if_init_conf *conf)
845 {
846 struct p54_common *priv = dev->priv;
847 priv->mode = IEEE80211_IF_TYPE_MNTR;
848 memset(priv->mac_addr, 0, ETH_ALEN);
849 p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0);
850 }
851
852 static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
853 {
854 int ret;
855
856 ret = p54_set_freq(dev, cpu_to_le16(conf->freq));
857 p54_set_vdcf(dev);
858 return ret;
859 }
860
861 static int p54_config_interface(struct ieee80211_hw *dev,
862 struct ieee80211_vif *vif,
863 struct ieee80211_if_conf *conf)
864 {
865 struct p54_common *priv = dev->priv;
866
867 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642);
868 p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0);
869 p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0);
870 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
871 return 0;
872 }
873
874 static void p54_configure_filter(struct ieee80211_hw *dev,
875 unsigned int changed_flags,
876 unsigned int *total_flags,
877 int mc_count, struct dev_mc_list *mclist)
878 {
879 struct p54_common *priv = dev->priv;
880
881 *total_flags &= FIF_BCN_PRBRESP_PROMISC;
882
883 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
884 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
885 p54_set_filter(dev, 0, priv->mac_addr,
886 NULL, 2, 0, 0, 0);
887 else
888 p54_set_filter(dev, 0, priv->mac_addr,
889 priv->bssid, 2, 0, 0, 0);
890 }
891 }
892
893 static int p54_conf_tx(struct ieee80211_hw *dev, int queue,
894 const struct ieee80211_tx_queue_params *params)
895 {
896 struct p54_common *priv = dev->priv;
897 struct p54_tx_control_vdcf *vdcf;
898
899 vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *)
900 ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data);
901
902 if ((params) && !((queue < 0) || (queue > 4))) {
903 P54_SET_QUEUE(vdcf->queue[queue], params->aifs,
904 params->cw_min, params->cw_max, params->burst_time);
905 } else
906 return -EINVAL;
907
908 p54_set_vdcf(dev);
909
910 return 0;
911 }
912
913 static int p54_get_stats(struct ieee80211_hw *dev,
914 struct ieee80211_low_level_stats *stats)
915 {
916 /* TODO */
917 return 0;
918 }
919
920 static int p54_get_tx_stats(struct ieee80211_hw *dev,
921 struct ieee80211_tx_queue_stats *stats)
922 {
923 struct p54_common *priv = dev->priv;
924 unsigned int i;
925
926 for (i = 0; i < dev->queues; i++)
927 memcpy(&stats->data[i], &priv->tx_stats.data[i],
928 sizeof(stats->data[i]));
929
930 return 0;
931 }
932
933 static const struct ieee80211_ops p54_ops = {
934 .tx = p54_tx,
935 .start = p54_start,
936 .stop = p54_stop,
937 .add_interface = p54_add_interface,
938 .remove_interface = p54_remove_interface,
939 .config = p54_config,
940 .config_interface = p54_config_interface,
941 .configure_filter = p54_configure_filter,
942 .conf_tx = p54_conf_tx,
943 .get_stats = p54_get_stats,
944 .get_tx_stats = p54_get_tx_stats
945 };
946
947 struct ieee80211_hw *p54_init_common(size_t priv_data_len)
948 {
949 struct ieee80211_hw *dev;
950 struct p54_common *priv;
951 int i;
952
953 dev = ieee80211_alloc_hw(priv_data_len, &p54_ops);
954 if (!dev)
955 return NULL;
956
957 priv = dev->priv;
958 priv->mode = IEEE80211_IF_TYPE_INVALID;
959 skb_queue_head_init(&priv->tx_queue);
960 memcpy(priv->channels, p54_channels, sizeof(p54_channels));
961 memcpy(priv->rates, p54_rates, sizeof(p54_rates));
962 priv->modes[1].mode = MODE_IEEE80211B;
963 priv->modes[1].num_rates = 4;
964 priv->modes[1].rates = priv->rates;
965 priv->modes[1].num_channels = ARRAY_SIZE(p54_channels);
966 priv->modes[1].channels = priv->channels;
967 priv->modes[0].mode = MODE_IEEE80211G;
968 priv->modes[0].num_rates = ARRAY_SIZE(p54_rates);
969 priv->modes[0].rates = priv->rates;
970 priv->modes[0].num_channels = ARRAY_SIZE(p54_channels);
971 priv->modes[0].channels = priv->channels;
972 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */
973 IEEE80211_HW_RX_INCLUDES_FCS;
974 dev->channel_change_time = 1000; /* TODO: find actual value */
975 dev->max_rssi = 127;
976
977 priv->tx_stats.data[0].limit = 5;
978 dev->queues = 1;
979
980 dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 +
981 sizeof(struct p54_tx_control_allocdata);
982
983 priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf) +
984 priv->tx_hdr_len + sizeof(struct p54_control_hdr), GFP_KERNEL);
985
986 if (!priv->cached_vdcf) {
987 ieee80211_free_hw(dev);
988 return NULL;
989 }
990
991 p54_init_vdcf(dev);
992
993 for (i = 0; i < 2; i++) {
994 if (ieee80211_register_hwmode(dev, &priv->modes[i])) {
995 kfree(priv->cached_vdcf);
996 ieee80211_free_hw(dev);
997 return NULL;
998 }
999 }
1000
1001 return dev;
1002 }
1003 EXPORT_SYMBOL_GPL(p54_init_common);
1004
1005 void p54_free_common(struct ieee80211_hw *dev)
1006 {
1007 struct p54_common *priv = dev->priv;
1008 kfree(priv->iq_autocal);
1009 kfree(priv->output_limit);
1010 kfree(priv->curve_data);
1011 kfree(priv->cached_vdcf);
1012 }
1013 EXPORT_SYMBOL_GPL(p54_free_common);
1014
1015 static int __init p54_init(void)
1016 {
1017 return 0;
1018 }
1019
1020 static void __exit p54_exit(void)
1021 {
1022 }
1023
1024 module_init(p54_init);
1025 module_exit(p54_exit);
WRT350N Kernel Patches