x86: arch/x86/mm/init_32.c cleanup
[wrt350n-kernel.git] / arch / ppc / platforms / ivms8.h
blob9109e684ad9b8b9daa466f34730eae174f5225d3
1 /*
2 * Speech Design Integrated Voicemail board specific definitions
3 * - IVMS8 (small, 8 channels)
4 * - IVML24 (large, 24 channels)
6 * In 2.5 when we force a new bootloader, we can merge these two, and add
7 * in _MACH_'s for them. -- Tom
9 * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de)
12 #ifdef __KERNEL__
13 #ifndef __ASM_IVMS8_H__
14 #define __ASM_IVMS8_H__
17 #include <asm/ppcboot.h>
19 #define IVMS_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */
20 #define IVMS_IMAP_SIZE (64 * 1024) /* size of mapped area */
22 #define IMAP_ADDR IVMS_IMMR_BASE /* phys. base address of IMMR area */
23 #define IMAP_SIZE IVMS_IMAP_SIZE /* mapped size of IMMR area */
25 #define PCMCIA_MEM_ADDR ((uint)0xFE100000)
26 #define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
28 #define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */
29 #define IDE0_INTERRUPT 10 /* = IRQ5 */
30 #define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */
31 #define PHY_INTERRUPT 12 /* = IRQ6 */
33 /* override the default number of IDE hardware interfaces */
34 #define MAX_HWIFS 1
37 * Definitions for IDE0 Interface
39 #define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */
40 #define IDE0_DATA_REG_OFFSET 0x0000
41 #define IDE0_ERROR_REG_OFFSET 0x0081
42 #define IDE0_NSECTOR_REG_OFFSET 0x0082
43 #define IDE0_SECTOR_REG_OFFSET 0x0083
44 #define IDE0_LCYL_REG_OFFSET 0x0084
45 #define IDE0_HCYL_REG_OFFSET 0x0085
46 #define IDE0_SELECT_REG_OFFSET 0x0086
47 #define IDE0_STATUS_REG_OFFSET 0x0087
48 #define IDE0_CONTROL_REG_OFFSET 0x0106
49 #define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
51 /* We don't use the 8259. */
52 #define NR_8259_INTS 0
54 #endif /* __ASM_IVMS8_H__ */
55 #endif /* __KERNEL__ */