include/asm-x86/io_32.h

   1 #ifndef _ASM_IO_H
   2 #define _ASM_IO_H
   3
   4 #include <linux/string.h>
   5 #include <linux/compiler.h>
   6
   7 /*
   8  * This file contains the definitions for the x86 IO instructions
   9  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  10  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  11  * versions of the single-IO instructions (inb_p/inw_p/..).
  12  *
  13  * This file is not meant to be obfuscating: it's just complicated
  14  * to (a) handle it all in a way that makes gcc able to optimize it
  15  * as well as possible and (b) trying to avoid writing the same thing
  16  * over and over again with slight variations and possibly making a
  17  * mistake somewhere.
  18  */
  19
  20 /*
  21  * Thanks to James van Artsdalen for a better timing-fix than
  22  * the two short jumps: using outb's to a nonexistent port seems
  23  * to guarantee better timings even on fast machines.
  24  *
  25  * On the other hand, I'd like to be sure of a non-existent port:
  26  * I feel a bit unsafe about using 0x80 (should be safe, though)
  27  *
  28  *              Linus
  29  */
  30
  31  /*
  32   *  Bit simplified and optimized by Jan Hubicka
  33   *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  34   *
  35   *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  36   *  isa_read[wl] and isa_write[wl] fixed
  37   *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  38   */
  39
  40 #define IO_SPACE_LIMIT 0xffff
  41
  42 #define XQUAD_PORTIO_BASE 0xfe400000
  43 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
  44
  45 #ifdef __KERNEL__
  46
  47 #include <asm-generic/iomap.h>
  48
  49 #include <linux/vmalloc.h>
  50
  51 /*
  52  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  53  * access
  54  */
  55 #define xlate_dev_mem_ptr(p)    __va(p)
  56
  57 /*
  58  * Convert a virtual cached pointer to an uncached pointer
  59  */
  60 #define xlate_dev_kmem_ptr(p)   p
  61
  62 /**
  63  *      virt_to_phys    -       map virtual addresses to physical
  64  *      @address: address to remap
  65  *
  66  *      The returned physical address is the physical (CPU) mapping for
  67  *      the memory address given. It is only valid to use this function on
  68  *      addresses directly mapped or allocated via kmalloc.
  69  *
  70  *      This function does not give bus mappings for DMA transfers. In
  71  *      almost all conceivable cases a device driver should not be using
  72  *      this function
  73  */
  74
  75 static inline unsigned long virt_to_phys(volatile void * address)
  76 {
  77         return __pa(address);
  78 }
  79
  80 /**
  81  *      phys_to_virt    -       map physical address to virtual
  82  *      @address: address to remap
  83  *
  84  *      The returned virtual address is a current CPU mapping for
  85  *      the memory address given. It is only valid to use this function on
  86  *      addresses that have a kernel mapping
  87  *
  88  *      This function does not handle bus mappings for DMA transfers. In
  89  *      almost all conceivable cases a device driver should not be using
  90  *      this function
  91  */
  92
  93 static inline void * phys_to_virt(unsigned long address)
  94 {
  95         return __va(address);
  96 }
  97
  98 /*
  99  * Change "struct page" to physical address.
 100  */
 101 #define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
 102
 103 /**
 104  * ioremap     -   map bus memory into CPU space
 105  * @offset:    bus address of the memory
 106  * @size:      size of the resource to map
 107  *
 108  * ioremap performs a platform specific sequence of operations to
 109  * make bus memory CPU accessible via the readb/readw/readl/writeb/
 110  * writew/writel functions and the other mmio helpers. The returned
 111  * address is not guaranteed to be usable directly as a virtual
 112  * address.
 113  *
 114  * If the area you are trying to map is a PCI BAR you should have a
 115  * look at pci_iomap().
 116  */
 117 extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size);
 118 extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size);
 119
 120 /*
 121  * The default ioremap() behavior is non-cached:
 122  */
 123 static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
 124 {
 125         return ioremap_nocache(offset, size);
 126 }
 127
 128 extern void iounmap(volatile void __iomem *addr);
 129
 130 /*
 131  * early_ioremap() and early_iounmap() are for temporary early boot-time
 132  * mappings, before the real ioremap() is functional.
 133  * A boot-time mapping is currently limited to at most 16 pages.
 134  */
 135 extern void early_ioremap_init(void);
 136 extern void early_ioremap_clear(void);
 137 extern void early_ioremap_reset(void);
 138 extern void *early_ioremap(unsigned long offset, unsigned long size);
 139 extern void early_iounmap(void *addr, unsigned long size);
 140 extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
 141
 142 /* Use early IO mappings for DMI because it's initialized early */
 143 #define dmi_ioremap early_ioremap
 144 #define dmi_iounmap early_iounmap
 145 #define dmi_alloc alloc_bootmem
 146
 147 /*
 148  * ISA I/O bus memory addresses are 1:1 with the physical address.
 149  */
 150 #define isa_virt_to_bus virt_to_phys
 151 #define isa_page_to_bus page_to_phys
 152 #define isa_bus_to_virt phys_to_virt
 153
 154 /*
 155  * However PCI ones are not necessarily 1:1 and therefore these interfaces
 156  * are forbidden in portable PCI drivers.
 157  *
 158  * Allow them on x86 for legacy drivers, though.
 159  */
 160 #define virt_to_bus virt_to_phys
 161 #define bus_to_virt phys_to_virt
 162
 163 /*
 164  * readX/writeX() are used to access memory mapped devices. On some
 165  * architectures the memory mapped IO stuff needs to be accessed
 166  * differently. On the x86 architecture, we just read/write the
 167  * memory location directly.
 168  */
 169
 170 static inline unsigned char readb(const volatile void __iomem *addr)
 171 {
 172         return *(volatile unsigned char __force *) addr;
 173 }
 174 static inline unsigned short readw(const volatile void __iomem *addr)
 175 {
 176         return *(volatile unsigned short __force *) addr;
 177 }
 178 static inline unsigned int readl(const volatile void __iomem *addr)
 179 {
 180         return *(volatile unsigned int __force *) addr;
 181 }
 182 #define readb_relaxed(addr) readb(addr)
 183 #define readw_relaxed(addr) readw(addr)
 184 #define readl_relaxed(addr) readl(addr)
 185 #define __raw_readb readb
 186 #define __raw_readw readw
 187 #define __raw_readl readl
 188
 189 static inline void writeb(unsigned char b, volatile void __iomem *addr)
 190 {
 191         *(volatile unsigned char __force *) addr = b;
 192 }
 193 static inline void writew(unsigned short b, volatile void __iomem *addr)
 194 {
 195         *(volatile unsigned short __force *) addr = b;
 196 }
 197 static inline void writel(unsigned int b, volatile void __iomem *addr)
 198 {
 199         *(volatile unsigned int __force *) addr = b;
 200 }
 201 #define __raw_writeb writeb
 202 #define __raw_writew writew
 203 #define __raw_writel writel
 204
 205 #define mmiowb()
 206
 207 static inline void
 208 memset_io(volatile void __iomem *addr, unsigned char val, int count)
 209 {
 210         memset((void __force *)addr, val, count);
 211 }
 212
 213 static inline void
 214 memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 215 {
 216         __memcpy(dst, (const void __force *)src, count);
 217 }
 218
 219 static inline void
 220 memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 221 {
 222         __memcpy((void __force *)dst, src, count);
 223 }
 224
 225 /*
 226  * ISA space is 'always mapped' on a typical x86 system, no need to
 227  * explicitly ioremap() it. The fact that the ISA IO space is mapped
 228  * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 229  * are physical addresses. The following constant pointer can be
 230  * used as the IO-area pointer (it can be iounmapped as well, so the
 231  * analogy with PCI is quite large):
 232  */
 233 #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
 234
 235 /*
 236  *      Cache management
 237  *
 238  *      This needed for two cases
 239  *      1. Out of order aware processors
 240  *      2. Accidentally out of order processors (PPro errata #51)
 241  */
 242
 243 #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
 244
 245 static inline void flush_write_buffers(void)
 246 {
 247         __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
 248 }
 249
 250 #else
 251
 252 #define flush_write_buffers() do { } while (0)
 253
 254 #endif
 255
 256 #endif /* __KERNEL__ */
 257
 258 extern void native_io_delay(void);
 259
 260 extern int io_delay_type;
 261 extern void io_delay_init(void);
 262
 263 #if defined(CONFIG_PARAVIRT)
 264 #include <asm/paravirt.h>
 265 #else
 266
 267 static inline void slow_down_io(void) {
 268         native_io_delay();
 269 #ifdef REALLY_SLOW_IO
 270         native_io_delay();
 271         native_io_delay();
 272         native_io_delay();
 273 #endif
 274 }
 275
 276 #endif
 277
 278 #ifdef CONFIG_X86_NUMAQ
 279 extern void *xquad_portio;    /* Where the IO area was mapped */
 280 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
 281 #define __BUILDIO(bwl,bw,type) \
 282 static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
 283         if (xquad_portio) \
 284                 write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
 285         else \
 286                 out##bwl##_local(value, port); \
 287 } \
 288 static inline void out##bwl(unsigned type value, int port) { \
 289         out##bwl##_quad(value, port, 0); \
 290 } \
 291 static inline unsigned type in##bwl##_quad(int port, int quad) { \
 292         if (xquad_portio) \
 293                 return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
 294         else \
 295                 return in##bwl##_local(port); \
 296 } \
 297 static inline unsigned type in##bwl(int port) { \
 298         return in##bwl##_quad(port, 0); \
 299 }
 300 #else
 301 #define __BUILDIO(bwl,bw,type) \
 302 static inline void out##bwl(unsigned type value, int port) { \
 303         out##bwl##_local(value, port); \
 304 } \
 305 static inline unsigned type in##bwl(int port) { \
 306         return in##bwl##_local(port); \
 307 }
 308 #endif
 309
 310
 311 #define BUILDIO(bwl,bw,type) \
 312 static inline void out##bwl##_local(unsigned type value, int port) { \
 313         __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
 314 } \
 315 static inline unsigned type in##bwl##_local(int port) { \
 316         unsigned type value; \
 317         __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
 318         return value; \
 319 } \
 320 static inline void out##bwl##_local_p(unsigned type value, int port) { \
 321         out##bwl##_local(value, port); \
 322         slow_down_io(); \
 323 } \
 324 static inline unsigned type in##bwl##_local_p(int port) { \
 325         unsigned type value = in##bwl##_local(port); \
 326         slow_down_io(); \
 327         return value; \
 328 } \
 329 __BUILDIO(bwl,bw,type) \
 330 static inline void out##bwl##_p(unsigned type value, int port) { \
 331         out##bwl(value, port); \
 332         slow_down_io(); \
 333 } \
 334 static inline unsigned type in##bwl##_p(int port) { \
 335         unsigned type value = in##bwl(port); \
 336         slow_down_io(); \
 337         return value; \
 338 } \
 339 static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
 340         __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
 341 } \
 342 static inline void ins##bwl(int port, void *addr, unsigned long count) { \
 343         __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
 344 }
 345
 346 BUILDIO(b,b,char)
 347 BUILDIO(w,w,short)
 348 BUILDIO(l,,int)
 349
 350 #endif