x86: arch/x86/mm/init_32.c cleanup
[wrt350n-kernel.git] / include / linux / dma-mapping.h
blob101a2d4636befbd1248b7642c38a87ff77243f07
1 #ifndef _ASM_LINUX_DMA_MAPPING_H
2 #define _ASM_LINUX_DMA_MAPPING_H
4 #include <linux/device.h>
5 #include <linux/err.h>
7 /* These definitions mirror those in pci.h, so they can be used
8 * interchangeably with their PCI_ counterparts */
9 enum dma_data_direction {
10 DMA_BIDIRECTIONAL = 0,
11 DMA_TO_DEVICE = 1,
12 DMA_FROM_DEVICE = 2,
13 DMA_NONE = 3,
16 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
19 * NOTE: do not use the below macros in new code and do not add new definitions
20 * here.
22 * Instead, just open-code DMA_BIT_MASK(n) within your driver
24 #define DMA_64BIT_MASK DMA_BIT_MASK(64)
25 #define DMA_48BIT_MASK DMA_BIT_MASK(48)
26 #define DMA_47BIT_MASK DMA_BIT_MASK(47)
27 #define DMA_40BIT_MASK DMA_BIT_MASK(40)
28 #define DMA_39BIT_MASK DMA_BIT_MASK(39)
29 #define DMA_35BIT_MASK DMA_BIT_MASK(35)
30 #define DMA_32BIT_MASK DMA_BIT_MASK(32)
31 #define DMA_31BIT_MASK DMA_BIT_MASK(31)
32 #define DMA_30BIT_MASK DMA_BIT_MASK(30)
33 #define DMA_29BIT_MASK DMA_BIT_MASK(29)
34 #define DMA_28BIT_MASK DMA_BIT_MASK(28)
35 #define DMA_24BIT_MASK DMA_BIT_MASK(24)
37 #define DMA_MASK_NONE 0x0ULL
39 static inline int valid_dma_direction(int dma_direction)
41 return ((dma_direction == DMA_BIDIRECTIONAL) ||
42 (dma_direction == DMA_TO_DEVICE) ||
43 (dma_direction == DMA_FROM_DEVICE));
46 static inline int is_device_dma_capable(struct device *dev)
48 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
51 #ifdef CONFIG_HAS_DMA
52 #include <asm/dma-mapping.h>
53 #else
54 #include <asm-generic/dma-mapping-broken.h>
55 #endif
57 /* Backwards compat, remove in 2.7.x */
58 #define dma_sync_single dma_sync_single_for_cpu
59 #define dma_sync_sg dma_sync_sg_for_cpu
61 extern u64 dma_get_required_mask(struct device *dev);
63 /* flags for the coherent memory api */
64 #define DMA_MEMORY_MAP 0x01
65 #define DMA_MEMORY_IO 0x02
66 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04
67 #define DMA_MEMORY_EXCLUSIVE 0x08
69 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
70 static inline int
71 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
72 dma_addr_t device_addr, size_t size, int flags)
74 return 0;
77 static inline void
78 dma_release_declared_memory(struct device *dev)
82 static inline void *
83 dma_mark_declared_memory_occupied(struct device *dev,
84 dma_addr_t device_addr, size_t size)
86 return ERR_PTR(-EBUSY);
88 #endif
91 * Managed DMA API
93 extern void *dmam_alloc_coherent(struct device *dev, size_t size,
94 dma_addr_t *dma_handle, gfp_t gfp);
95 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
96 dma_addr_t dma_handle);
97 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
98 dma_addr_t *dma_handle, gfp_t gfp);
99 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
100 dma_addr_t dma_handle);
101 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
102 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
103 dma_addr_t device_addr, size_t size,
104 int flags);
105 extern void dmam_release_declared_memory(struct device *dev);
106 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
107 static inline int dmam_declare_coherent_memory(struct device *dev,
108 dma_addr_t bus_addr, dma_addr_t device_addr,
109 size_t size, gfp_t gfp)
111 return 0;
114 static inline void dmam_release_declared_memory(struct device *dev)
117 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
119 #endif