[POWERPC] Add uartlite boot console driver for the zImage wrapper
[wrt350n-kernel.git] / lib / iomap.c
blob4d43f37c01544de2b19e46bd259bdbe3fc5b7caf
1 /*
2 * Implement the default iomap interfaces
4 * (C) Copyright 2004 Linus Torvalds
5 */
6 #include <linux/pci.h>
7 #include <linux/io.h>
9 #include <linux/module.h>
12 * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
13 * access or a MMIO access, these functions don't care. The info is
14 * encoded in the hardware mapping set up by the mapping functions
15 * (or the cookie itself, depending on implementation and hw).
17 * The generic routines don't assume any hardware mappings, and just
18 * encode the PIO/MMIO as part of the cookie. They coldly assume that
19 * the MMIO IO mappings are not in the low address range.
21 * Architectures for which this is not true can't use this generic
22 * implementation and should do their own copy.
25 #ifndef HAVE_ARCH_PIO_SIZE
27 * We encode the physical PIO addresses (0-0xffff) into the
28 * pointer by offsetting them with a constant (0x10000) and
29 * assuming that all the low addresses are always PIO. That means
30 * we can do some sanity checks on the low bits, and don't
31 * need to just take things for granted.
33 #define PIO_OFFSET 0x10000UL
34 #define PIO_MASK 0x0ffffUL
35 #define PIO_RESERVED 0x40000UL
36 #endif
39 * Ugly macros are a way of life.
41 #define VERIFY_PIO(port) BUG_ON((port & ~PIO_MASK) != PIO_OFFSET)
43 #define IO_COND(addr, is_pio, is_mmio) do { \
44 unsigned long port = (unsigned long __force)addr; \
45 if (port < PIO_RESERVED) { \
46 VERIFY_PIO(port); \
47 port &= PIO_MASK; \
48 is_pio; \
49 } else { \
50 is_mmio; \
51 } \
52 } while (0)
54 #ifndef pio_read16be
55 #define pio_read16be(port) swab16(inw(port))
56 #define pio_read32be(port) swab32(inl(port))
57 #endif
59 #ifndef mmio_read16be
60 #define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr))
61 #define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr))
62 #endif
64 unsigned int fastcall ioread8(void __iomem *addr)
66 IO_COND(addr, return inb(port), return readb(addr));
68 unsigned int fastcall ioread16(void __iomem *addr)
70 IO_COND(addr, return inw(port), return readw(addr));
72 unsigned int fastcall ioread16be(void __iomem *addr)
74 IO_COND(addr, return pio_read16be(port), return mmio_read16be(addr));
76 unsigned int fastcall ioread32(void __iomem *addr)
78 IO_COND(addr, return inl(port), return readl(addr));
80 unsigned int fastcall ioread32be(void __iomem *addr)
82 IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr));
84 EXPORT_SYMBOL(ioread8);
85 EXPORT_SYMBOL(ioread16);
86 EXPORT_SYMBOL(ioread16be);
87 EXPORT_SYMBOL(ioread32);
88 EXPORT_SYMBOL(ioread32be);
90 #ifndef pio_write16be
91 #define pio_write16be(val,port) outw(swab16(val),port)
92 #define pio_write32be(val,port) outl(swab32(val),port)
93 #endif
95 #ifndef mmio_write16be
96 #define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port)
97 #define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port)
98 #endif
100 void fastcall iowrite8(u8 val, void __iomem *addr)
102 IO_COND(addr, outb(val,port), writeb(val, addr));
104 void fastcall iowrite16(u16 val, void __iomem *addr)
106 IO_COND(addr, outw(val,port), writew(val, addr));
108 void fastcall iowrite16be(u16 val, void __iomem *addr)
110 IO_COND(addr, pio_write16be(val,port), mmio_write16be(val, addr));
112 void fastcall iowrite32(u32 val, void __iomem *addr)
114 IO_COND(addr, outl(val,port), writel(val, addr));
116 void fastcall iowrite32be(u32 val, void __iomem *addr)
118 IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr));
120 EXPORT_SYMBOL(iowrite8);
121 EXPORT_SYMBOL(iowrite16);
122 EXPORT_SYMBOL(iowrite16be);
123 EXPORT_SYMBOL(iowrite32);
124 EXPORT_SYMBOL(iowrite32be);
127 * These are the "repeat MMIO read/write" functions.
128 * Note the "__raw" accesses, since we don't want to
129 * convert to CPU byte order. We write in "IO byte
130 * order" (we also don't have IO barriers).
132 #ifndef mmio_insb
133 static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
135 while (--count >= 0) {
136 u8 data = __raw_readb(addr);
137 *dst = data;
138 dst++;
141 static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
143 while (--count >= 0) {
144 u16 data = __raw_readw(addr);
145 *dst = data;
146 dst++;
149 static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
151 while (--count >= 0) {
152 u32 data = __raw_readl(addr);
153 *dst = data;
154 dst++;
157 #endif
159 #ifndef mmio_outsb
160 static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
162 while (--count >= 0) {
163 __raw_writeb(*src, addr);
164 src++;
167 static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
169 while (--count >= 0) {
170 __raw_writew(*src, addr);
171 src++;
174 static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
176 while (--count >= 0) {
177 __raw_writel(*src, addr);
178 src++;
181 #endif
183 void fastcall ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
185 IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
187 void fastcall ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
189 IO_COND(addr, insw(port,dst,count), mmio_insw(addr, dst, count));
191 void fastcall ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
193 IO_COND(addr, insl(port,dst,count), mmio_insl(addr, dst, count));
195 EXPORT_SYMBOL(ioread8_rep);
196 EXPORT_SYMBOL(ioread16_rep);
197 EXPORT_SYMBOL(ioread32_rep);
199 void fastcall iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
201 IO_COND(addr, outsb(port, src, count), mmio_outsb(addr, src, count));
203 void fastcall iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
205 IO_COND(addr, outsw(port, src, count), mmio_outsw(addr, src, count));
207 void fastcall iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
209 IO_COND(addr, outsl(port, src,count), mmio_outsl(addr, src, count));
211 EXPORT_SYMBOL(iowrite8_rep);
212 EXPORT_SYMBOL(iowrite16_rep);
213 EXPORT_SYMBOL(iowrite32_rep);
215 /* Create a virtual mapping cookie for an IO port range */
216 void __iomem *ioport_map(unsigned long port, unsigned int nr)
218 if (port > PIO_MASK)
219 return NULL;
220 return (void __iomem *) (unsigned long) (port + PIO_OFFSET);
223 void ioport_unmap(void __iomem *addr)
225 /* Nothing to do */
227 EXPORT_SYMBOL(ioport_map);
228 EXPORT_SYMBOL(ioport_unmap);
230 /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
231 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
233 unsigned long start = pci_resource_start(dev, bar);
234 unsigned long len = pci_resource_len(dev, bar);
235 unsigned long flags = pci_resource_flags(dev, bar);
237 if (!len || !start)
238 return NULL;
239 if (maxlen && len > maxlen)
240 len = maxlen;
241 if (flags & IORESOURCE_IO)
242 return ioport_map(start, len);
243 if (flags & IORESOURCE_MEM) {
244 if (flags & IORESOURCE_CACHEABLE)
245 return ioremap(start, len);
246 return ioremap_nocache(start, len);
248 /* What? */
249 return NULL;
252 void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
254 IO_COND(addr, /* nothing */, iounmap(addr));
256 EXPORT_SYMBOL(pci_iomap);
257 EXPORT_SYMBOL(pci_iounmap);