2 * linux/arch/arm/mach-pxa/mfp.c
4 * PXA3xx Multi-Function Pin Support
6 * Copyright (C) 2007 Marvell Internation Ltd.
8 * 2007-08-21: eric miao <eric.miao@marvell.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
20 #include <linux/sysdev.h>
22 #include <asm/hardware.h>
23 #include <asm/arch/mfp.h>
24 #include <asm/arch/mfp-pxa3xx.h>
25 #include <asm/arch/pxa3xx-regs.h>
27 /* mfp_spin_lock is used to ensure that MFP register configuration
28 * (most likely a read-modify-write operation) is atomic, and that
29 * mfp_table[] is consistent
31 static DEFINE_SPINLOCK(mfp_spin_lock
);
33 static void __iomem
*mfpr_mmio_base
= (void __iomem
*)&__REG(MFPR_BASE
);
35 struct pxa3xx_mfp_pin
{
36 unsigned long config
; /* -1 for not configured */
37 unsigned long mfpr_off
; /* MFPRxx Register offset */
38 unsigned long mfpr_run
; /* Run-Mode Register Value */
39 unsigned long mfpr_lpm
; /* Low Power Mode Register Value */
42 static struct pxa3xx_mfp_pin mfp_table
[MFP_PIN_MAX
];
44 /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
45 const static unsigned long mfpr_lpm
[] = {
54 /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
55 const static unsigned long mfpr_pull
[] = {
62 /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
63 const static unsigned long mfpr_edge
[] = {
70 #define mfpr_readl(off) \
71 __raw_readl(mfpr_mmio_base + (off))
73 #define mfpr_writel(off, val) \
74 __raw_writel(val, mfpr_mmio_base + (off))
76 #define mfp_configured(p) ((p)->config != -1)
79 * perform a read-back of any MFPR register to make sure the
80 * previous writings are finished
82 #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
84 static inline void __mfp_config_run(struct pxa3xx_mfp_pin
*p
)
86 if (mfp_configured(p
))
87 mfpr_writel(p
->mfpr_off
, p
->mfpr_run
);
90 static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin
*p
)
92 if (mfp_configured(p
)) {
93 unsigned long mfpr_clr
= (p
->mfpr_run
& ~MFPR_EDGE_BOTH
) | MFPR_EDGE_CLEAR
;
94 if (mfpr_clr
!= p
->mfpr_run
)
95 mfpr_writel(p
->mfpr_off
, mfpr_clr
);
96 if (p
->mfpr_lpm
!= mfpr_clr
)
97 mfpr_writel(p
->mfpr_off
, p
->mfpr_lpm
);
101 void pxa3xx_mfp_config(unsigned long *mfp_cfgs
, int num
)
106 spin_lock_irqsave(&mfp_spin_lock
, flags
);
108 for (i
= 0; i
< num
; i
++, mfp_cfgs
++) {
109 unsigned long tmp
, c
= *mfp_cfgs
;
110 struct pxa3xx_mfp_pin
*p
;
111 int pin
, af
, drv
, lpm
, edge
, pull
;
114 BUG_ON(pin
>= MFP_PIN_MAX
);
119 lpm
= MFP_LPM_STATE(c
);
120 edge
= MFP_LPM_EDGE(c
);
123 /* run-mode pull settings will conflict with MFPR bits of
124 * low power mode state, calculate mfpr_run and mfpr_lpm
125 * individually if pull != MFP_PULL_NONE
127 tmp
= MFPR_AF_SEL(af
) | MFPR_DRIVE(drv
);
129 if (likely(pull
== MFP_PULL_NONE
)) {
130 p
->mfpr_run
= tmp
| mfpr_lpm
[lpm
] | mfpr_edge
[edge
];
131 p
->mfpr_lpm
= p
->mfpr_run
;
133 p
->mfpr_lpm
= tmp
| mfpr_lpm
[lpm
] | mfpr_edge
[edge
];
134 p
->mfpr_run
= tmp
| mfpr_pull
[pull
];
137 p
->config
= c
; __mfp_config_run(p
);
141 spin_unlock_irqrestore(&mfp_spin_lock
, flags
);
144 unsigned long pxa3xx_mfp_read(int mfp
)
146 unsigned long val
, flags
;
148 BUG_ON(mfp
>= MFP_PIN_MAX
);
150 spin_lock_irqsave(&mfp_spin_lock
, flags
);
151 val
= mfpr_readl(mfp_table
[mfp
].mfpr_off
);
152 spin_unlock_irqrestore(&mfp_spin_lock
, flags
);
157 void pxa3xx_mfp_write(int mfp
, unsigned long val
)
161 BUG_ON(mfp
>= MFP_PIN_MAX
);
163 spin_lock_irqsave(&mfp_spin_lock
, flags
);
164 mfpr_writel(mfp_table
[mfp
].mfpr_off
, val
);
166 spin_unlock_irqrestore(&mfp_spin_lock
, flags
);
169 void __init
pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map
*map
)
171 struct pxa3xx_mfp_addr_map
*p
;
172 unsigned long offset
, flags
;
175 spin_lock_irqsave(&mfp_spin_lock
, flags
);
177 for (p
= map
; p
->start
!= MFP_PIN_INVALID
; p
++) {
182 mfp_table
[i
].mfpr_off
= offset
;
183 mfp_table
[i
].mfpr_run
= 0;
184 mfp_table
[i
].mfpr_lpm
= 0;
186 } while ((i
<= p
->end
) && (p
->end
!= -1));
189 spin_unlock_irqrestore(&mfp_spin_lock
, flags
);
192 void __init
pxa3xx_init_mfp(void)
196 for (i
= 0; i
< ARRAY_SIZE(mfp_table
); i
++)
197 mfp_table
[i
].config
= -1;
202 * Configure the MFPs appropriately for suspend/resume.
203 * FIXME: this should probably depend on which system state we're
204 * entering - for instance, we might not want to place MFP pins in
205 * a pull-down mode if they're an active low chip select, and we're
206 * just entering standby.
208 static int pxa3xx_mfp_suspend(struct sys_device
*d
, pm_message_t state
)
212 for (pin
= 0; pin
< ARRAY_SIZE(mfp_table
); pin
++) {
213 struct pxa3xx_mfp_pin
*p
= &mfp_table
[pin
];
219 static int pxa3xx_mfp_resume(struct sys_device
*d
)
223 for (pin
= 0; pin
< ARRAY_SIZE(mfp_table
); pin
++) {
224 struct pxa3xx_mfp_pin
*p
= &mfp_table
[pin
];
228 /* clear RDH bit when MFP settings are restored
230 * NOTE: the last 3 bits DxS are write-1-to-clear so carefully
231 * preserve them here in case they will be referenced later
233 ASCR
&= ~(ASCR_RDH
| ASCR_D1S
| ASCR_D2S
| ASCR_D3S
);
238 static struct sysdev_class mfp_sysclass
= {
240 .suspend
= pxa3xx_mfp_suspend
,
241 .resume
= pxa3xx_mfp_resume
,
244 static struct sys_device mfp_device
= {
246 .cls
= &mfp_sysclass
,
249 static int __init
mfp_init_devicefs(void)
251 sysdev_class_register(&mfp_sysclass
);
252 return sysdev_register(&mfp_device
);
254 device_initcall(mfp_init_devicefs
);