| blob | 7aad135a44b0524d26b0dd3dcadad911b8a98934 |
1 /*
2 * Device Tree Source for IBM Ebony
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 */
14 / {
15 #address-cells = <2>;
16 #size-cells = <1>;
17 model = "ibm,ebony";
18 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/cpu@0>;
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 };
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
32 cpu@0 {
33 device_type = "cpu";
34 model = "PowerPC,440GP";
35 reg = <0>;
36 clock-frequency = <0>; // Filled in by zImage
37 timebase-frequency = <0>; // Filled in by zImage
38 i-cache-line-size = <20>;
39 d-cache-line-size = <20>;
40 i-cache-size = <8000>; /* 32 kB */
41 d-cache-size = <8000>; /* 32 kB */
42 dcr-controller;
43 dcr-access-method = "native";
44 };
45 };
47 memory {
48 device_type = "memory";
49 reg = <0 0 0>; // Filled in by zImage
50 };
52 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-440gp", "ibm,uic";
54 interrupt-controller;
55 cell-index = <0>;
56 dcr-reg = <0c0 009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
61 };
63 UIC1: interrupt-controller1 {
64 compatible = "ibm,uic-440gp", "ibm,uic";
65 interrupt-controller;
66 cell-index = <1>;
67 dcr-reg = <0d0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */
72 interrupt-parent = <&UIC0>;
73 };
75 CPC0: cpc {
76 compatible = "ibm,cpc-440gp";
77 dcr-reg = <0b0 003 0e0 010>;
78 // FIXME: anything else?
79 };
81 plb {
82 compatible = "ibm,plb-440gp", "ibm,plb4";
83 #address-cells = <2>;
84 #size-cells = <1>;
85 ranges;
86 clock-frequency = <0>; // Filled in by zImage
88 SDRAM0: memory-controller {
89 compatible = "ibm,sdram-440gp";
90 dcr-reg = <010 2>;
91 // FIXME: anything else?
92 };
94 SRAM0: sram {
95 compatible = "ibm,sram-440gp";
96 dcr-reg = <020 8 00a 1>;
97 };
99 DMA0: dma {
100 // FIXME: ???
101 compatible = "ibm,dma-440gp";
102 dcr-reg = <100 027>;
103 };
105 MAL0: mcmal {
106 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
107 dcr-reg = <180 62>;
108 num-tx-chans = <4>;
109 num-rx-chans = <4>;
110 interrupt-parent = <&MAL0>;
111 interrupts = <0 1 2 3 4>;
112 #interrupt-cells = <1>;
113 #address-cells = <0>;
114 #size-cells = <0>;
115 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
116 /*RXEOB*/ 1 &UIC0 b 4
117 /*SERR*/ 2 &UIC1 0 4
118 /*TXDE*/ 3 &UIC1 1 4
119 /*RXDE*/ 4 &UIC1 2 4>;
120 interrupt-map-mask = <ffffffff>;
121 };
123 POB0: opb {
124 compatible = "ibm,opb-440gp", "ibm,opb";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 /* Wish there was a nicer way of specifying a full 32-bit
128 range */
129 ranges = <00000000 1 00000000 80000000
130 80000000 1 80000000 80000000>;
131 dcr-reg = <090 00b>;
132 interrupt-parent = <&UIC1>;
133 interrupts = <7 4>;
134 clock-frequency = <0>; // Filled in by zImage
136 EBC0: ebc {
137 compatible = "ibm,ebc-440gp", "ibm,ebc";
138 dcr-reg = <012 2>;
139 #address-cells = <2>;
140 #size-cells = <1>;
141 clock-frequency = <0>; // Filled in by zImage
142 // ranges property is supplied by zImage
143 // based on firmware's configuration of the
144 // EBC bridge
145 interrupts = <5 4>;
146 interrupt-parent = <&UIC1>;
148 small-flash@0,80000 {
149 compatible = "jedec-flash";
150 bank-width = <1>;
151 reg = <0 80000 80000>;
152 #address-cells = <1>;
153 #size-cells = <1>;
154 partition@0 {
155 label = "OpenBIOS";
156 reg = <0 80000>;
157 read-only;
158 };
159 };
161 nvram@1,0 {
162 /* NVRAM & RTC */
163 compatible = "ds1743-nvram";
164 #bytes = <2000>;
165 reg = <1 0 2000>;
166 };
168 large-flash@2,0 {
169 compatible = "jedec-flash";
170 bank-width = <1>;
171 reg = <2 0 400000>;
172 #address-cells = <1>;
173 #size-cells = <1>;
174 partition@0 {
175 label = "fs";
176 reg = <0 380000>;
177 };
178 partition@380000 {
179 label = "firmware";
180 reg = <380000 80000>;
181 };
182 };
184 ir@3,0 {
185 reg = <3 0 10>;
186 };
188 fpga@7,0 {
189 compatible = "Ebony-FPGA";
190 reg = <7 0 10>;
191 virtual-reg = <e8300000>;
192 };
193 };
195 UART0: serial@40000200 {
196 device_type = "serial";
197 compatible = "ns16550";
198 reg = <40000200 8>;
199 virtual-reg = <e0000200>;
200 clock-frequency = <A8C000>;
201 current-speed = <2580>;
202 interrupt-parent = <&UIC0>;
203 interrupts = <0 4>;
204 };
206 UART1: serial@40000300 {
207 device_type = "serial";
208 compatible = "ns16550";
209 reg = <40000300 8>;
210 virtual-reg = <e0000300>;
211 clock-frequency = <A8C000>;
212 current-speed = <2580>;
213 interrupt-parent = <&UIC0>;
214 interrupts = <1 4>;
215 };
217 IIC0: i2c@40000400 {
218 /* FIXME */
219 device_type = "i2c";
220 compatible = "ibm,iic-440gp", "ibm,iic";
221 reg = <40000400 14>;
222 interrupt-parent = <&UIC0>;
223 interrupts = <2 4>;
224 };
225 IIC1: i2c@40000500 {
226 /* FIXME */
227 device_type = "i2c";
228 compatible = "ibm,iic-440gp", "ibm,iic";
229 reg = <40000500 14>;
230 interrupt-parent = <&UIC0>;
231 interrupts = <3 4>;
232 };
234 GPIO0: gpio@40000700 {
235 /* FIXME */
236 compatible = "ibm,gpio-440gp";
237 reg = <40000700 20>;
238 };
240 ZMII0: emac-zmii@40000780 {
241 compatible = "ibm,zmii-440gp", "ibm,zmii";
242 reg = <40000780 c>;
243 };
245 EMAC0: ethernet@40000800 {
246 linux,network-index = <0>;
247 device_type = "network";
248 compatible = "ibm,emac-440gp", "ibm,emac";
249 interrupt-parent = <&UIC1>;
250 interrupts = <1c 4 1d 4>;
251 reg = <40000800 70>;
252 local-mac-address = [000000000000]; // Filled in by zImage
253 mal-device = <&MAL0>;
254 mal-tx-channel = <0 1>;
255 mal-rx-channel = <0>;
256 cell-index = <0>;
257 max-frame-size = <5dc>;
258 rx-fifo-size = <1000>;
259 tx-fifo-size = <800>;
260 phy-mode = "rmii";
261 phy-map = <00000001>;
262 zmii-device = <&ZMII0>;
263 zmii-channel = <0>;
264 };
265 EMAC1: ethernet@40000900 {
266 linux,network-index = <1>;
267 device_type = "network";
268 compatible = "ibm,emac-440gp", "ibm,emac";
269 interrupt-parent = <&UIC1>;
270 interrupts = <1e 4 1f 4>;
271 reg = <40000900 70>;
272 local-mac-address = [000000000000]; // Filled in by zImage
273 mal-device = <&MAL0>;
274 mal-tx-channel = <2 3>;
275 mal-rx-channel = <1>;
276 cell-index = <1>;
277 max-frame-size = <5dc>;
278 rx-fifo-size = <1000>;
279 tx-fifo-size = <800>;
280 phy-mode = "rmii";
281 phy-map = <00000001>;
282 zmii-device = <&ZMII0>;
283 zmii-channel = <1>;
284 };
287 GPT0: gpt@40000a00 {
288 /* FIXME */
289 reg = <40000a00 d4>;
290 interrupt-parent = <&UIC0>;
291 interrupts = <12 4 13 4 14 4 15 4 16 4>;
292 };
294 };
296 PCIX0: pci@20ec00000 {
297 device_type = "pci";
298 #interrupt-cells = <1>;
299 #size-cells = <2>;
300 #address-cells = <3>;
301 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
302 primary;
303 reg = <2 0ec00000 8 /* Config space access */
304 0 0 0 /* no IACK cycles */
305 2 0ed00000 4 /* Special cycles */
306 2 0ec80000 f0 /* Internal registers */
307 2 0ec80100 fc>; /* Internal messaging registers */
309 /* Outbound ranges, one memory and one IO,
310 * later cannot be changed
311 */
312 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
313 01000000 0 00000000 00000002 08000000 0 00010000>;
315 /* Inbound 2GB range starting at 0 */
316 dma-ranges = <42000000 0 0 0 0 0 80000000>;
318 /* Ebony has all 4 IRQ pins tied together per slot */
319 interrupt-map-mask = <f800 0 0 0>;
320 interrupt-map = <
321 /* IDSEL 1 */
322 0800 0 0 0 &UIC0 17 8
324 /* IDSEL 2 */
325 1000 0 0 0 &UIC0 18 8
327 /* IDSEL 3 */
328 1800 0 0 0 &UIC0 19 8
330 /* IDSEL 4 */
331 2000 0 0 0 &UIC0 1a 8
332 >;
333 };
334 };
336 chosen {
337 linux,stdout-path = "/plb/opb/serial@40000200";
338 };
339 };