Initial commit
[wrt350n-kernel.git] / arch / powerpc / platforms / 82xx / mpc8272_ads.c
blob7d3018751988b4994d9024dca1dc38ce88b934f0
1 /*
2 * MPC8272 ADS board support
4 * Copyright 2007 Freescale Semiconductor, Inc.
5 * Author: Scott Wood <scottwood@freescale.com>
7 * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
8 * Copyright (c) 2006 MontaVista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/fsl_devices.h>
19 #include <linux/of_platform.h>
20 #include <linux/io.h>
22 #include <asm/cpm2.h>
23 #include <asm/udbg.h>
24 #include <asm/machdep.h>
25 #include <asm/time.h>
27 #include <platforms/82xx/pq2.h>
29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/cpm2_pic.h>
32 #include "pq2ads.h"
33 #include "pq2.h"
35 static void __init mpc8272_ads_pic_init(void)
37 struct device_node *np = of_find_compatible_node(NULL, NULL,
38 "fsl,cpm2-pic");
39 if (!np) {
40 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
41 return;
44 cpm2_pic_init(np);
45 of_node_put(np);
47 /* Initialize stuff for the 82xx CPLD IC and install demux */
48 pq2ads_pci_init_irq();
51 struct cpm_pin {
52 int port, pin, flags;
55 static struct cpm_pin mpc8272_ads_pins[] = {
56 /* SCC1 */
57 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
58 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
60 /* SCC4 */
61 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
62 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
64 /* FCC1 */
65 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
66 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
68 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
69 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
70 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
71 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
72 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
73 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
74 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
75 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
76 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
77 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
78 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
79 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
80 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
82 /* FCC2 */
83 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
84 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
85 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
86 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
87 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
88 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
89 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
90 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
91 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
93 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
94 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
95 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
96 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
97 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
101 static void __init init_ioports(void)
103 int i;
105 for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) {
106 struct cpm_pin *pin = &mpc8272_ads_pins[i];
107 cpm2_set_pin(pin->port, pin->pin, pin->flags);
110 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
111 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
112 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
113 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
114 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
115 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
116 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
117 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
120 static void __init mpc8272_ads_setup_arch(void)
122 struct device_node *np;
123 __be32 __iomem *bcsr;
125 if (ppc_md.progress)
126 ppc_md.progress("mpc8272_ads_setup_arch()", 0);
128 cpm2_reset();
130 np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
131 if (!np) {
132 printk(KERN_ERR "No bcsr in device tree\n");
133 return;
136 bcsr = of_iomap(np, 0);
137 of_node_put(np);
138 if (!bcsr) {
139 printk(KERN_ERR "Cannot map BCSR registers\n");
140 return;
143 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
144 setbits32(&bcsr[1], BCSR1_FETH_RST);
146 clrbits32(&bcsr[3], BCSR3_FETHIEN2);
147 setbits32(&bcsr[3], BCSR3_FETH2_RST);
149 iounmap(bcsr);
151 init_ioports();
152 pq2_init_pci();
154 if (ppc_md.progress)
155 ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0);
158 static struct of_device_id __initdata of_bus_ids[] = {
159 { .name = "soc", },
160 { .name = "cpm", },
161 { .name = "localbus", },
165 static int __init declare_of_platform_devices(void)
167 /* Publish the QE devices */
168 of_platform_bus_probe(NULL, of_bus_ids, NULL);
169 return 0;
171 machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
174 * Called very early, device-tree isn't unflattened
176 static int __init mpc8272_ads_probe(void)
178 unsigned long root = of_get_flat_dt_root();
179 return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
182 define_machine(mpc8272_ads)
184 .name = "Freescale MPC8272 ADS",
185 .probe = mpc8272_ads_probe,
186 .setup_arch = mpc8272_ads_setup_arch,
187 .init_IRQ = mpc8272_ads_pic_init,
188 .get_irq = cpm2_get_irq,
189 .calibrate_decr = generic_calibrate_decr,
190 .restart = pq2_restart,
191 .progress = udbg_progress,