| blob | efde6e178f6c22733322ac6c5048cdfed8c7e28b |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
52 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53 STACK_SIZE = 1 << STACK_SHIFT
55 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
57 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
58 _TIF_MCCK_PENDING)
60 #define BASED(name) name-system_call(%r13)
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 brasl %r14,trace_hardirqs_on
65 .endm
67 .macro TRACE_IRQS_OFF
68 brasl %r14,trace_hardirqs_off
69 .endm
71 .macro TRACE_IRQS_CHECK
72 tm SP_PSW(%r15),0x03 # irqs enabled?
73 jz 0f
74 brasl %r14,trace_hardirqs_on
75 j 1f
76 0: brasl %r14,trace_hardirqs_off
77 1:
78 .endm
79 #else
80 #define TRACE_IRQS_ON
81 #define TRACE_IRQS_OFF
82 #define TRACE_IRQS_CHECK
83 #endif
85 #ifdef CONFIG_LOCKDEP
86 .macro LOCKDEP_SYS_EXIT
87 tm SP_PSW+1(%r15),0x01 # returning to user ?
88 jz 0f
89 brasl %r14,lockdep_sys_exit
90 0:
91 .endm
92 #else
93 #define LOCKDEP_SYS_EXIT
94 #endif
96 .macro STORE_TIMER lc_offset
97 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
98 stpt \lc_offset
99 #endif
100 .endm
102 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
103 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
104 lg %r10,\lc_from
105 slg %r10,\lc_to
106 alg %r10,\lc_sum
107 stg %r10,\lc_sum
108 .endm
109 #endif
111 /*
112 * Register usage in interrupt handlers:
113 * R9 - pointer to current task structure
114 * R13 - pointer to literal pool
115 * R14 - return register for function calls
116 * R15 - kernel stack pointer
117 */
119 .macro SAVE_ALL_BASE savearea
120 stmg %r12,%r15,\savearea
121 larl %r13,system_call
122 .endm
124 .macro SAVE_ALL_SVC psworg,savearea
125 la %r12,\psworg
126 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
127 .endm
129 .macro SAVE_ALL_SYNC psworg,savearea
130 la %r12,\psworg
131 tm \psworg+1,0x01 # test problem state bit
132 jz 2f # skip stack setup save
133 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
134 #ifdef CONFIG_CHECK_STACK
135 j 3f
136 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
137 jz stack_overflow
138 3:
139 #endif
140 2:
141 .endm
143 .macro SAVE_ALL_ASYNC psworg,savearea
144 la %r12,\psworg
145 tm \psworg+1,0x01 # test problem state bit
146 jnz 1f # from user -> load kernel stack
147 clc \psworg+8(8),BASED(.Lcritical_end)
148 jhe 0f
149 clc \psworg+8(8),BASED(.Lcritical_start)
150 jl 0f
151 brasl %r14,cleanup_critical
152 tm 1(%r12),0x01 # retest problem state after cleanup
153 jnz 1f
154 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
155 slgr %r14,%r15
156 srag %r14,%r14,STACK_SHIFT
157 jz 2f
158 1: lg %r15,__LC_ASYNC_STACK # load async stack
159 #ifdef CONFIG_CHECK_STACK
160 j 3f
161 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
162 jz stack_overflow
163 3:
164 #endif
165 2:
166 .endm
168 .macro CREATE_STACK_FRAME psworg,savearea
169 aghi %r15,-SP_SIZE # make room for registers & psw
170 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
171 la %r12,\psworg
172 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
173 icm %r12,12,__LC_SVC_ILC
174 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
175 st %r12,SP_ILC(%r15)
176 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
177 la %r12,0
178 stg %r12,__SF_BACKCHAIN(%r15)
179 .endm
181 .macro RESTORE_ALL psworg,sync
182 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
183 .if !\sync
184 ni \psworg+1,0xfd # clear wait state bit
185 .endif
186 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
187 STORE_TIMER __LC_EXIT_TIMER
188 lpswe \psworg # back to caller
189 .endm
191 /*
192 * Scheduler resume function, called by switch_to
193 * gpr2 = (task_struct *) prev
194 * gpr3 = (task_struct *) next
195 * Returns:
196 * gpr2 = prev
197 */
198 .globl __switch_to
199 __switch_to:
200 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
201 jz __switch_to_noper # if not we're fine
202 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
203 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
204 je __switch_to_noper # we got away without bashing TLB's
205 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
206 __switch_to_noper:
207 lg %r4,__THREAD_info(%r2) # get thread_info of prev
208 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
209 jz __switch_to_no_mcck
210 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
211 lg %r4,__THREAD_info(%r3) # get thread_info of next
212 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
213 __switch_to_no_mcck:
214 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
215 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
216 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
217 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
218 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
219 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
220 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
221 stg %r3,__LC_THREAD_INFO
222 aghi %r3,STACK_SIZE
223 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
224 br %r14
226 __critical_start:
227 /*
228 * SVC interrupt handler routine. System calls are synchronous events and
229 * are executed with interrupts enabled.
230 */
232 .globl system_call
233 system_call:
234 STORE_TIMER __LC_SYNC_ENTER_TIMER
235 sysc_saveall:
236 SAVE_ALL_BASE __LC_SAVE_AREA
237 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
238 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
239 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
240 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
241 sysc_vtime:
242 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
243 sysc_stime:
244 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
245 sysc_update:
246 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
247 #endif
248 sysc_do_svc:
249 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
250 slag %r7,%r7,2 # *4 and test for svc 0
251 jnz sysc_nr_ok
252 # svc 0: system call number in %r1
253 cl %r1,BASED(.Lnr_syscalls)
254 jnl sysc_nr_ok
255 lgfr %r7,%r1 # clear high word in r1
256 slag %r7,%r7,2 # svc 0: system call number in %r1
257 sysc_nr_ok:
258 mvc SP_ARGS(8,%r15),SP_R7(%r15)
259 sysc_do_restart:
260 larl %r10,sys_call_table
261 #ifdef CONFIG_COMPAT
262 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
263 jno sysc_noemu
264 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
265 sysc_noemu:
266 #endif
267 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
268 lgf %r8,0(%r7,%r10) # load address of system call routine
269 jnz sysc_tracesys
270 basr %r14,%r8 # call sys_xxxx
271 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
273 sysc_return:
274 tm SP_PSW+1(%r15),0x01 # returning to user ?
275 jno sysc_restore
276 tm __TI_flags+7(%r9),_TIF_WORK_SVC
277 jnz sysc_work # there is work to do (signals etc.)
278 sysc_restore:
279 #ifdef CONFIG_TRACE_IRQFLAGS
280 larl %r1,sysc_restore_trace_psw
281 lpswe 0(%r1)
282 sysc_restore_trace:
283 TRACE_IRQS_CHECK
284 LOCKDEP_SYS_EXIT
285 #endif
286 sysc_leave:
287 RESTORE_ALL __LC_RETURN_PSW,1
288 sysc_done:
290 #ifdef CONFIG_TRACE_IRQFLAGS
291 .align 8
292 .globl sysc_restore_trace_psw
293 sysc_restore_trace_psw:
294 .quad 0, sysc_restore_trace
295 #endif
297 #
298 # recheck if there is more work to do
299 #
300 sysc_work_loop:
301 tm __TI_flags+7(%r9),_TIF_WORK_SVC
302 jz sysc_restore # there is no work to do
303 #
304 # One of the work bits is on. Find out which one.
305 #
306 sysc_work:
307 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
308 jo sysc_mcck_pending
309 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
310 jo sysc_reschedule
311 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
312 jnz sysc_sigpending
313 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
314 jo sysc_restart
315 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
316 jo sysc_singlestep
317 j sysc_restore
318 sysc_work_done:
320 #
321 # _TIF_NEED_RESCHED is set, call schedule
322 #
323 sysc_reschedule:
324 larl %r14,sysc_work_loop
325 jg schedule # return point is sysc_return
327 #
328 # _TIF_MCCK_PENDING is set, call handler
329 #
330 sysc_mcck_pending:
331 larl %r14,sysc_work_loop
332 jg s390_handle_mcck # TIF bit will be cleared by handler
334 #
335 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
336 #
337 sysc_sigpending:
338 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
339 la %r2,SP_PTREGS(%r15) # load pt_regs
340 brasl %r14,do_signal # call do_signal
341 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
342 jo sysc_restart
343 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
344 jo sysc_singlestep
345 j sysc_work_loop
347 #
348 # _TIF_RESTART_SVC is set, set up registers and restart svc
349 #
350 sysc_restart:
351 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
352 lg %r7,SP_R2(%r15) # load new svc number
353 slag %r7,%r7,2 # *4
354 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
355 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
356 j sysc_do_restart # restart svc
358 #
359 # _TIF_SINGLE_STEP is set, call do_single_step
360 #
361 sysc_singlestep:
362 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
363 lhi %r0,__LC_PGM_OLD_PSW
364 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
365 la %r2,SP_PTREGS(%r15) # address of register-save area
366 larl %r14,sysc_return # load adr. of system return
367 jg do_single_step # branch to do_sigtrap
369 #
370 # call syscall_trace before and after system call
371 # special linkage: %r12 contains the return address for trace_svc
372 #
373 sysc_tracesys:
374 la %r2,SP_PTREGS(%r15) # load pt_regs
375 la %r3,0
376 srl %r7,2
377 stg %r7,SP_R2(%r15)
378 brasl %r14,syscall_trace
379 lghi %r0,NR_syscalls
380 clg %r0,SP_R2(%r15)
381 jnh sysc_tracenogo
382 lg %r7,SP_R2(%r15) # strace might have changed the
383 sll %r7,2 # system call
384 lgf %r8,0(%r7,%r10)
385 sysc_tracego:
386 lmg %r3,%r6,SP_R3(%r15)
387 lg %r2,SP_ORIG_R2(%r15)
388 basr %r14,%r8 # call sys_xxx
389 stg %r2,SP_R2(%r15) # store return value
390 sysc_tracenogo:
391 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
392 jz sysc_return
393 la %r2,SP_PTREGS(%r15) # load pt_regs
394 la %r3,1
395 larl %r14,sysc_return # return point is sysc_return
396 jg syscall_trace
398 #
399 # a new process exits the kernel with ret_from_fork
400 #
401 .globl ret_from_fork
402 ret_from_fork:
403 lg %r13,__LC_SVC_NEW_PSW+8
404 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
405 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
406 jo 0f
407 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
408 0: brasl %r14,schedule_tail
409 TRACE_IRQS_ON
410 stosm 24(%r15),0x03 # reenable interrupts
411 j sysc_return
413 #
414 # kernel_execve function needs to deal with pt_regs that is not
415 # at the usual place
416 #
417 .globl kernel_execve
418 kernel_execve:
419 stmg %r12,%r15,96(%r15)
420 lgr %r14,%r15
421 aghi %r15,-SP_SIZE
422 stg %r14,__SF_BACKCHAIN(%r15)
423 la %r12,SP_PTREGS(%r15)
424 xc 0(__PT_SIZE,%r12),0(%r12)
425 lgr %r5,%r12
426 brasl %r14,do_execve
427 ltgfr %r2,%r2
428 je 0f
429 aghi %r15,SP_SIZE
430 lmg %r12,%r15,96(%r15)
431 br %r14
432 # execve succeeded.
433 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
434 lg %r15,__LC_KERNEL_STACK # load ksp
435 aghi %r15,-SP_SIZE # make room for registers & psw
436 lg %r13,__LC_SVC_NEW_PSW+8
437 lg %r9,__LC_THREAD_INFO
438 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
439 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
440 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
441 brasl %r14,execve_tail
442 j sysc_return
444 /*
445 * Program check handler routine
446 */
448 .globl pgm_check_handler
449 pgm_check_handler:
450 /*
451 * First we need to check for a special case:
452 * Single stepping an instruction that disables the PER event mask will
453 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
454 * For a single stepped SVC the program check handler gets control after
455 * the SVC new PSW has been loaded. But we want to execute the SVC first and
456 * then handle the PER event. Therefore we update the SVC old PSW to point
457 * to the pgm_check_handler and branch to the SVC handler after we checked
458 * if we have to load the kernel stack register.
459 * For every other possible cause for PER event without the PER mask set
460 * we just ignore the PER event (FIXME: is there anything we have to do
461 * for LPSW?).
462 */
463 STORE_TIMER __LC_SYNC_ENTER_TIMER
464 SAVE_ALL_BASE __LC_SAVE_AREA
465 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
466 jnz pgm_per # got per exception -> special case
467 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
468 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
469 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
470 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
471 jz pgm_no_vtime
472 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
473 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
474 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
475 pgm_no_vtime:
476 #endif
477 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
478 TRACE_IRQS_OFF
479 lgf %r3,__LC_PGM_ILC # load program interruption code
480 lghi %r8,0x7f
481 ngr %r8,%r3
482 pgm_do_call:
483 sll %r8,3
484 larl %r1,pgm_check_table
485 lg %r1,0(%r8,%r1) # load address of handler routine
486 la %r2,SP_PTREGS(%r15) # address of register-save area
487 larl %r14,sysc_return
488 br %r1 # branch to interrupt-handler
490 #
491 # handle per exception
492 #
493 pgm_per:
494 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
495 jnz pgm_per_std # ok, normal per event from user space
496 # ok its one of the special cases, now we need to find out which one
497 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
498 je pgm_svcper
499 # no interesting special case, ignore PER event
500 lmg %r12,%r15,__LC_SAVE_AREA
501 lpswe __LC_PGM_OLD_PSW
503 #
504 # Normal per exception
505 #
506 pgm_per_std:
507 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
508 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
509 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
510 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
511 jz pgm_no_vtime2
512 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
513 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
514 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
515 pgm_no_vtime2:
516 #endif
517 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
518 TRACE_IRQS_OFF
519 lg %r1,__TI_task(%r9)
520 tm SP_PSW+1(%r15),0x01 # kernel per event ?
521 jz kernel_per
522 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
523 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
524 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
525 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
526 lgf %r3,__LC_PGM_ILC # load program interruption code
527 lghi %r8,0x7f
528 ngr %r8,%r3 # clear per-event-bit and ilc
529 je sysc_return
530 j pgm_do_call
532 #
533 # it was a single stepped SVC that is causing all the trouble
534 #
535 pgm_svcper:
536 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
537 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
538 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
539 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
540 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
541 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
542 #endif
543 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
544 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
545 lg %r1,__TI_task(%r9)
546 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
547 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
548 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
549 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
550 TRACE_IRQS_ON
551 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
552 j sysc_do_svc
554 #
555 # per was called from kernel, must be kprobes
556 #
557 kernel_per:
558 lhi %r0,__LC_PGM_OLD_PSW
559 sth %r0,SP_TRAP(%r15) # set trap indication to pgm check
560 la %r2,SP_PTREGS(%r15) # address of register-save area
561 larl %r14,sysc_restore # load adr. of system ret, no work
562 jg do_single_step # branch to do_single_step
564 /*
565 * IO interrupt handler routine
566 */
567 .globl io_int_handler
568 io_int_handler:
569 STORE_TIMER __LC_ASYNC_ENTER_TIMER
570 stck __LC_INT_CLOCK
571 SAVE_ALL_BASE __LC_SAVE_AREA+32
572 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
573 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
574 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
575 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
576 jz io_no_vtime
577 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
578 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
579 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
580 io_no_vtime:
581 #endif
582 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
583 TRACE_IRQS_OFF
584 la %r2,SP_PTREGS(%r15) # address of register-save area
585 brasl %r14,do_IRQ # call standard irq handler
586 io_return:
587 tm SP_PSW+1(%r15),0x01 # returning to user ?
588 #ifdef CONFIG_PREEMPT
589 jno io_preempt # no -> check for preemptive scheduling
590 #else
591 jno io_restore # no-> skip resched & signal
592 #endif
593 tm __TI_flags+7(%r9),_TIF_WORK_INT
594 jnz io_work # there is work to do (signals etc.)
595 io_restore:
596 #ifdef CONFIG_TRACE_IRQFLAGS
597 larl %r1,io_restore_trace_psw
598 lpswe 0(%r1)
599 io_restore_trace:
600 TRACE_IRQS_CHECK
601 LOCKDEP_SYS_EXIT
602 #endif
603 io_leave:
604 RESTORE_ALL __LC_RETURN_PSW,0
605 io_done:
607 #ifdef CONFIG_TRACE_IRQFLAGS
608 .align 8
609 .globl io_restore_trace_psw
610 io_restore_trace_psw:
611 .quad 0, io_restore_trace
612 #endif
614 #ifdef CONFIG_PREEMPT
615 io_preempt:
616 icm %r0,15,__TI_precount(%r9)
617 jnz io_restore
618 # switch to kernel stack
619 lg %r1,SP_R15(%r15)
620 aghi %r1,-SP_SIZE
621 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
622 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
623 lgr %r15,%r1
624 io_resume_loop:
625 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
626 jno io_restore
627 larl %r14,io_resume_loop
628 jg preempt_schedule_irq
629 #endif
631 #
632 # switch to kernel stack, then check TIF bits
633 #
634 io_work:
635 lg %r1,__LC_KERNEL_STACK
636 aghi %r1,-SP_SIZE
637 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
638 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
639 lgr %r15,%r1
640 #
641 # One of the work bits is on. Find out which one.
642 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
643 # and _TIF_MCCK_PENDING
644 #
645 io_work_loop:
646 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
647 jo io_mcck_pending
648 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
649 jo io_reschedule
650 tm __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
651 jnz io_sigpending
652 j io_restore
653 io_work_done:
655 #
656 # _TIF_MCCK_PENDING is set, call handler
657 #
658 io_mcck_pending:
659 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
660 j io_work_loop
662 #
663 # _TIF_NEED_RESCHED is set, call schedule
664 #
665 io_reschedule:
666 TRACE_IRQS_ON
667 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
668 brasl %r14,schedule # call scheduler
669 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
670 TRACE_IRQS_OFF
671 tm __TI_flags+7(%r9),_TIF_WORK_INT
672 jz io_restore # there is no work to do
673 j io_work_loop
675 #
676 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
677 #
678 io_sigpending:
679 TRACE_IRQS_ON
680 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
681 la %r2,SP_PTREGS(%r15) # load pt_regs
682 brasl %r14,do_signal # call do_signal
683 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
684 TRACE_IRQS_OFF
685 j io_work_loop
687 /*
688 * External interrupt handler routine
689 */
690 .globl ext_int_handler
691 ext_int_handler:
692 STORE_TIMER __LC_ASYNC_ENTER_TIMER
693 stck __LC_INT_CLOCK
694 SAVE_ALL_BASE __LC_SAVE_AREA+32
695 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
696 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
697 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
698 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
699 jz ext_no_vtime
700 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
701 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
702 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
703 ext_no_vtime:
704 #endif
705 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
706 TRACE_IRQS_OFF
707 la %r2,SP_PTREGS(%r15) # address of register-save area
708 llgh %r3,__LC_EXT_INT_CODE # get interruption code
709 brasl %r14,do_extint
710 j io_return
712 __critical_end:
714 /*
715 * Machine check handler routines
716 */
717 .globl mcck_int_handler
718 mcck_int_handler:
719 la %r1,4095 # revalidate r1
720 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
721 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
722 SAVE_ALL_BASE __LC_SAVE_AREA+64
723 la %r12,__LC_MCK_OLD_PSW
724 tm __LC_MCCK_CODE,0x80 # system damage?
725 jo mcck_int_main # yes -> rest of mcck code invalid
726 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
727 la %r14,4095
728 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
729 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
730 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
731 jo 1f
732 la %r14,__LC_SYNC_ENTER_TIMER
733 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
734 jl 0f
735 la %r14,__LC_ASYNC_ENTER_TIMER
736 0: clc 0(8,%r14),__LC_EXIT_TIMER
737 jl 0f
738 la %r14,__LC_EXIT_TIMER
739 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
740 jl 0f
741 la %r14,__LC_LAST_UPDATE_TIMER
742 0: spt 0(%r14)
743 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
744 1:
745 #endif
746 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
747 jno mcck_int_main # no -> skip cleanup critical
748 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
749 jnz mcck_int_main # from user -> load kernel stack
750 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
751 jhe mcck_int_main
752 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
753 jl mcck_int_main
754 brasl %r14,cleanup_critical
755 mcck_int_main:
756 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
757 slgr %r14,%r15
758 srag %r14,%r14,PAGE_SHIFT
759 jz 0f
760 lg %r15,__LC_PANIC_STACK # load panic stack
761 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
762 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
763 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
764 jno mcck_no_vtime # no -> no timer update
765 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
766 jz mcck_no_vtime
767 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
768 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
769 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
770 mcck_no_vtime:
771 #endif
772 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
773 la %r2,SP_PTREGS(%r15) # load pt_regs
774 brasl %r14,s390_do_machine_check
775 tm SP_PSW+1(%r15),0x01 # returning to user ?
776 jno mcck_return
777 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
778 aghi %r1,-SP_SIZE
779 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
780 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
781 lgr %r15,%r1
782 stosm __SF_EMPTY(%r15),0x04 # turn dat on
783 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
784 jno mcck_return
785 TRACE_IRQS_OFF
786 brasl %r14,s390_handle_mcck
787 TRACE_IRQS_ON
788 mcck_return:
789 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
790 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
791 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
792 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
793 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
794 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
795 jno 0f
796 stpt __LC_EXIT_TIMER
797 0:
798 #endif
799 lpswe __LC_RETURN_MCCK_PSW # back to caller
801 /*
802 * Restart interruption handler, kick starter for additional CPUs
803 */
804 #ifdef CONFIG_SMP
805 __CPUINIT
806 .globl restart_int_handler
807 restart_int_handler:
808 lg %r15,__LC_SAVE_AREA+120 # load ksp
809 lghi %r10,__LC_CREGS_SAVE_AREA
810 lctlg %c0,%c15,0(%r10) # get new ctl regs
811 lghi %r10,__LC_AREGS_SAVE_AREA
812 lam %a0,%a15,0(%r10)
813 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
814 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
815 jg start_secondary
816 .previous
817 #else
818 /*
819 * If we do not run with SMP enabled, let the new CPU crash ...
820 */
821 .globl restart_int_handler
822 restart_int_handler:
823 basr %r1,0
824 restart_base:
825 lpswe restart_crash-restart_base(%r1)
826 .align 8
827 restart_crash:
828 .long 0x000a0000,0x00000000,0x00000000,0x00000000
829 restart_go:
830 #endif
832 #ifdef CONFIG_CHECK_STACK
833 /*
834 * The synchronous or the asynchronous stack overflowed. We are dead.
835 * No need to properly save the registers, we are going to panic anyway.
836 * Setup a pt_regs so that show_trace can provide a good call trace.
837 */
838 stack_overflow:
839 lg %r15,__LC_PANIC_STACK # change to panic stack
840 aghi %r15,-SP_SIZE
841 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
842 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
843 la %r1,__LC_SAVE_AREA
844 chi %r12,__LC_SVC_OLD_PSW
845 je 0f
846 chi %r12,__LC_PGM_OLD_PSW
847 je 0f
848 la %r1,__LC_SAVE_AREA+32
849 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
850 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
851 la %r2,SP_PTREGS(%r15) # load pt_regs
852 jg kernel_stack_overflow
853 #endif
855 cleanup_table_system_call:
856 .quad system_call, sysc_do_svc
857 cleanup_table_sysc_return:
858 .quad sysc_return, sysc_leave
859 cleanup_table_sysc_leave:
860 .quad sysc_leave, sysc_done
861 cleanup_table_sysc_work_loop:
862 .quad sysc_work_loop, sysc_work_done
863 cleanup_table_io_return:
864 .quad io_return, io_leave
865 cleanup_table_io_leave:
866 .quad io_leave, io_done
867 cleanup_table_io_work_loop:
868 .quad io_work_loop, io_work_done
870 cleanup_critical:
871 clc 8(8,%r12),BASED(cleanup_table_system_call)
872 jl 0f
873 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
874 jl cleanup_system_call
875 0:
876 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
877 jl 0f
878 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
879 jl cleanup_sysc_return
880 0:
881 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
882 jl 0f
883 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
884 jl cleanup_sysc_leave
885 0:
886 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
887 jl 0f
888 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
889 jl cleanup_sysc_return
890 0:
891 clc 8(8,%r12),BASED(cleanup_table_io_return)
892 jl 0f
893 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
894 jl cleanup_io_return
895 0:
896 clc 8(8,%r12),BASED(cleanup_table_io_leave)
897 jl 0f
898 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
899 jl cleanup_io_leave
900 0:
901 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
902 jl 0f
903 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
904 jl cleanup_io_return
905 0:
906 br %r14
908 cleanup_system_call:
909 mvc __LC_RETURN_PSW(16),0(%r12)
910 cghi %r12,__LC_MCK_OLD_PSW
911 je 0f
912 la %r12,__LC_SAVE_AREA+32
913 j 1f
914 0: la %r12,__LC_SAVE_AREA+64
915 1:
916 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
917 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
918 jh 0f
919 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
920 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
921 jhe cleanup_vtime
922 #endif
923 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
924 jh 0f
925 mvc __LC_SAVE_AREA(32),0(%r12)
926 0: stg %r13,8(%r12)
927 stg %r12,__LC_SAVE_AREA+96 # argh
928 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
929 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
930 lg %r12,__LC_SAVE_AREA+96 # argh
931 stg %r15,24(%r12)
932 llgh %r7,__LC_SVC_INT_CODE
933 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
934 cleanup_vtime:
935 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
936 jhe cleanup_stime
937 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
938 cleanup_stime:
939 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
940 jh cleanup_update
941 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
942 cleanup_update:
943 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
944 #endif
945 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
946 la %r12,__LC_RETURN_PSW
947 br %r14
948 cleanup_system_call_insn:
949 .quad sysc_saveall
950 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
951 .quad system_call
952 .quad sysc_vtime
953 .quad sysc_stime
954 .quad sysc_update
955 #endif
957 cleanup_sysc_return:
958 mvc __LC_RETURN_PSW(8),0(%r12)
959 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
960 la %r12,__LC_RETURN_PSW
961 br %r14
963 cleanup_sysc_leave:
964 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
965 je 2f
966 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
967 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
968 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
969 je 2f
970 #endif
971 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
972 cghi %r12,__LC_MCK_OLD_PSW
973 jne 0f
974 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
975 j 1f
976 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
977 1: lmg %r0,%r11,SP_R0(%r15)
978 lg %r15,SP_R15(%r15)
979 2: la %r12,__LC_RETURN_PSW
980 br %r14
981 cleanup_sysc_leave_insn:
982 .quad sysc_done - 4
983 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
984 .quad sysc_done - 8
985 #endif
987 cleanup_io_return:
988 mvc __LC_RETURN_PSW(8),0(%r12)
989 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
990 la %r12,__LC_RETURN_PSW
991 br %r14
993 cleanup_io_leave:
994 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
995 je 2f
996 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
997 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
998 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
999 je 2f
1000 #endif
1001 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1002 cghi %r12,__LC_MCK_OLD_PSW
1003 jne 0f
1004 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1005 j 1f
1006 0: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
1007 1: lmg %r0,%r11,SP_R0(%r15)
1008 lg %r15,SP_R15(%r15)
1009 2: la %r12,__LC_RETURN_PSW
1010 br %r14
1011 cleanup_io_leave_insn:
1012 .quad io_done - 4
1013 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1014 .quad io_done - 8
1015 #endif
1017 /*
1018 * Integer constants
1019 */
1020 .align 4
1021 .Lconst:
1022 .Lnr_syscalls: .long NR_syscalls
1023 .L0x0130: .short 0x130
1024 .L0x0140: .short 0x140
1025 .L0x0150: .short 0x150
1026 .L0x0160: .short 0x160
1027 .L0x0170: .short 0x170
1028 .Lcritical_start:
1029 .quad __critical_start
1030 .Lcritical_end:
1031 .quad __critical_end
1033 .section .rodata, "a"
1034 #define SYSCALL(esa,esame,emu) .long esame
1035 sys_call_table:
1036 #include "syscalls.S"
1037 #undef SYSCALL
1039 #ifdef CONFIG_COMPAT
1041 #define SYSCALL(esa,esame,emu) .long emu
1042 sys_call_table_emu:
1043 #include "syscalls.S"
1044 #undef SYSCALL
1045 #endif