2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
12 * QDI QD6500/QD6580 EIDE controller fast support
14 * Please set local bus speed using kernel parameter idebus
15 * for example, "idebus=33" stands for 33Mhz VLbus
16 * To activate controller support, use "ide0=qd65xx"
17 * To enable tuning, use "hda=autotune hdb=autotune"
18 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
22 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
23 * Samuel Thibault <samuel.thibault@fnac.net>
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/delay.h>
30 #include <linux/timer.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/hdreg.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
37 #include <asm/system.h>
43 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
44 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
45 * -- qd6500 is a single IDE interface
46 * -- qd6580 is a dual IDE interface
48 * More research on qd6580 being done by willmore@cig.mot.com (David)
49 * More Information given by Petr Soucek (petr@ryston.cz)
50 * http://www.ryston.cz/petr/vlb
57 * base+0x01: Config (R/O)
59 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
60 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
61 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
62 * bit 3: qd6500: 1 = disabled, 0 = enabled
66 * qd6580: either 1010 or 0101
69 * base+0x02: Timer2 (qd6580 only)
72 * base+0x03: Control (qd6580 only)
74 * bits 0-3 must always be set 1
75 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
76 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
77 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
78 * channel 1 for hdc & hdd
79 * bit 1 : 1 = only disks on primary port
80 * 0 = disks & ATAPI devices on primary port
82 * bit 5 : status, but of what ?
83 * bit 6 : always set 1 by dos driver
84 * bit 7 : set 1 for non-ATAPI devices on primary port
85 * (maybe read-ahead and post-write buffer ?)
88 static int timings
[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
93 * This routine is invoked from ide.c to prepare for access to a given drive.
96 static void qd_select (ide_drive_t
*drive
)
98 u8 index
= (( (QD_TIMREG(drive
)) & 0x80 ) >> 7) |
99 (QD_TIMREG(drive
) & 0x02);
101 if (timings
[index
] != QD_TIMING(drive
))
102 outb(timings
[index
] = QD_TIMING(drive
), QD_TIMREG(drive
));
106 * qd6500_compute_timing
108 * computes the timing value where
109 * lower nibble represents active time, in count of VLB clocks
110 * upper nibble represents recovery time, in count of VLB clocks
113 static u8
qd6500_compute_timing (ide_hwif_t
*hwif
, int active_time
, int recovery_time
)
115 u8 active_cycle
,recovery_cycle
;
117 if (system_bus_clock()<=33) {
118 active_cycle
= 9 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 9);
119 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 0, 15);
121 active_cycle
= 8 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 1, 8);
122 recovery_cycle
= 18 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 3, 18);
125 return((recovery_cycle
<<4) | 0x08 | active_cycle
);
129 * qd6580_compute_timing
134 static u8
qd6580_compute_timing (int active_time
, int recovery_time
)
136 u8 active_cycle
= 17 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 17);
137 u8 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 2, 15);
139 return((recovery_cycle
<<4) | active_cycle
);
145 * tries to find timing from dos driver's table
148 static int qd_find_disk_type (ide_drive_t
*drive
,
149 int *active_time
, int *recovery_time
)
151 struct qd65xx_timing_s
*p
;
154 if (!*drive
->id
->model
) return 0;
156 strncpy(model
,drive
->id
->model
,40);
157 ide_fixstring(model
,40,1); /* byte-swap */
159 for (p
= qd65xx_timing
; p
->offset
!= -1 ; p
++) {
160 if (!strncmp(p
->model
, model
+p
->offset
, 4)) {
161 printk(KERN_DEBUG
"%s: listed !\n", drive
->name
);
162 *active_time
= p
->active
;
163 *recovery_time
= p
->recovery
;
173 * check whether timings don't conflict
176 static int qd_timing_ok (ide_drive_t drives
[])
178 return (IDE_IMPLY(drives
[0].present
&& drives
[1].present
,
179 IDE_IMPLY(QD_TIMREG(drives
) == QD_TIMREG(drives
+1),
180 QD_TIMING(drives
) == QD_TIMING(drives
+1))));
181 /* if same timing register, must be same timing */
187 * records the timing, and enables selectproc as needed
190 static void qd_set_timing (ide_drive_t
*drive
, u8 timing
)
192 ide_hwif_t
*hwif
= HWIF(drive
);
194 drive
->drive_data
&= 0xff00;
195 drive
->drive_data
|= timing
;
196 if (qd_timing_ok(hwif
->drives
)) {
197 qd_select(drive
); /* selects once */
198 hwif
->selectproc
= NULL
;
200 hwif
->selectproc
= &qd_select
;
202 printk(KERN_DEBUG
"%s: %#x\n", drive
->name
, timing
);
205 static void qd6500_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
207 int active_time
= 175;
208 int recovery_time
= 415; /* worst case values from the dos driver */
211 * FIXME: use "pio" value
213 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)
214 && drive
->id
->tPIO
&& (drive
->id
->field_valid
& 0x02)
215 && drive
->id
->eide_pio
>= 240) {
217 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,
220 recovery_time
= drive
->id
->eide_pio
- 120;
223 qd_set_timing(drive
, qd6500_compute_timing(HWIF(drive
), active_time
, recovery_time
));
226 static void qd6580_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
228 int base
= HWIF(drive
)->select_data
;
229 unsigned int cycle_time
;
230 int active_time
= 175;
231 int recovery_time
= 415; /* worst case values from the dos driver */
233 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)) {
234 cycle_time
= ide_pio_cycle_time(drive
, pio
);
239 if (cycle_time
>= 110) {
241 recovery_time
= cycle_time
- 102;
243 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
246 if (cycle_time
>= 69) {
248 recovery_time
= cycle_time
- 61;
250 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
253 if (cycle_time
>= 180) {
255 recovery_time
= cycle_time
- 120;
257 active_time
= ide_pio_timings
[pio
].active_time
;
258 recovery_time
= cycle_time
- active_time
;
261 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,pio
);
264 if (!HWIF(drive
)->channel
&& drive
->media
!= ide_disk
) {
265 outb(0x5f, QD_CONTROL_PORT
);
266 printk(KERN_WARNING
"%s: ATAPI: disabled read-ahead FIFO "
267 "and post-write buffer on %s.\n",
268 drive
->name
, HWIF(drive
)->name
);
271 qd_set_timing(drive
, qd6580_compute_timing(active_time
, recovery_time
));
277 * tests if the given port is a register
280 static int __init
qd_testreg(int port
)
285 local_irq_save(flags
);
286 savereg
= inb_p(port
);
287 outb_p(QD_TESTVAL
, port
); /* safe value */
288 readreg
= inb_p(port
);
290 local_irq_restore(flags
);
292 if (savereg
== QD_TESTVAL
) {
293 printk(KERN_ERR
"Outch ! the probe for qd65xx isn't reliable !\n");
294 printk(KERN_ERR
"Please contact maintainers to tell about your hardware\n");
295 printk(KERN_ERR
"Assuming qd65xx is not present.\n");
299 return (readreg
!= QD_TESTVAL
);
305 * called to setup an ata channel : adjusts attributes & links for tuning
308 static void __init
qd_setup(ide_hwif_t
*hwif
, int base
, int config
)
310 hwif
->select_data
= base
;
311 hwif
->config_data
= config
;
314 static void __init
qd6500_port_init_devs(ide_hwif_t
*hwif
)
316 u8 base
= hwif
->select_data
, config
= QD_CONFIG(hwif
);
318 hwif
->drives
[0].drive_data
= QD6500_DEF_DATA
;
319 hwif
->drives
[1].drive_data
= QD6500_DEF_DATA
;
322 static void __init
qd6580_port_init_devs(ide_hwif_t
*hwif
)
325 u8 base
= hwif
->select_data
, config
= QD_CONFIG(hwif
);
327 if (QD_CONTROL(hwif
) & QD_CONTR_SEC_DISABLED
) {
328 t1
= QD6580_DEF_DATA
;
329 t2
= QD6580_DEF_DATA2
;
331 t2
= t1
= hwif
->channel
? QD6580_DEF_DATA2
: QD6580_DEF_DATA
;
333 hwif
->drives
[0].drive_data
= t1
;
334 hwif
->drives
[1].drive_data
= t2
;
340 * called to unsetup an ata channel : back to default values, unlinks tuning
343 static void __exit qd_unsetup(ide_hwif_t *hwif)
345 u8 config = hwif->config_data;
346 int base = hwif->select_data;
347 void *set_pio_mode = (void *)hwif->set_pio_mode;
349 if (hwif->chipset != ide_qd65xx)
352 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
354 hwif->selectproc = NULL;
355 hwif->set_pio_mode = NULL;
357 if (set_pio_mode == (void *)qd6500_set_pio_mode) {
358 // will do it for both
359 outb(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
360 } else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
361 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
362 outb(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
363 outb(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
365 outb(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
368 printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
369 printk(KERN_WARNING "keeping settings !\n");
374 static const struct ide_port_info qd65xx_port_info __initdata
= {
375 .chipset
= ide_qd65xx
,
376 .host_flags
= IDE_HFLAG_IO_32BIT
|
378 IDE_HFLAG_NO_AUTOTUNE
,
379 .pio_mask
= ATA_PIO4
,
385 * looks at the specified baseport, and if qd found, registers & initialises it
386 * return 1 if another qd may be probed
389 static int __init
qd_probe(int base
)
392 u8 idx
[4] = { 0xff, 0xff, 0xff, 0xff };
396 config
= inb(QD_CONFIG_PORT
);
398 if (! ((config
& QD_CONFIG_BASEPORT
) >> 1 == (base
== 0xb0)) )
401 unit
= ! (config
& QD_CONFIG_IDE_BASEPORT
);
403 if ((config
& 0xf0) == QD_CONFIG_QD6500
) {
405 if (qd_testreg(base
)) return 1; /* bad register */
409 hwif
= &ide_hwifs
[unit
];
410 printk(KERN_NOTICE
"%s: qd6500 at %#x\n", hwif
->name
, base
);
411 printk(KERN_DEBUG
"qd6500: config=%#x, ID3=%u\n",
414 if (config
& QD_CONFIG_DISABLED
) {
415 printk(KERN_WARNING
"qd6500 is disabled !\n");
419 qd_setup(hwif
, base
, config
);
421 hwif
->port_init_devs
= qd6500_port_init_devs
;
422 hwif
->set_pio_mode
= &qd6500_set_pio_mode
;
426 ide_device_add(idx
, &qd65xx_port_info
);
431 if (((config
& 0xf0) == QD_CONFIG_QD6580_A
) ||
432 ((config
& 0xf0) == QD_CONFIG_QD6580_B
)) {
436 if (qd_testreg(base
) || qd_testreg(base
+0x02)) return 1;
441 control
= inb(QD_CONTROL_PORT
);
443 printk(KERN_NOTICE
"qd6580 at %#x\n", base
);
444 printk(KERN_DEBUG
"qd6580: config=%#x, control=%#x, ID3=%u\n",
445 config
, control
, QD_ID3
);
447 if (control
& QD_CONTR_SEC_DISABLED
) {
448 /* secondary disabled */
450 hwif
= &ide_hwifs
[unit
];
451 printk(KERN_INFO
"%s: qd6580: single IDE board\n",
454 qd_setup(hwif
, base
, config
| (control
<< 8));
456 hwif
->port_init_devs
= qd6580_port_init_devs
;
457 hwif
->set_pio_mode
= &qd6580_set_pio_mode
;
461 ide_device_add(idx
, &qd65xx_port_info
);
463 outb(QD_DEF_CONTR
, QD_CONTROL_PORT
);
469 hwif
= &ide_hwifs
[0];
470 mate
= &ide_hwifs
[1];
471 /* secondary enabled */
472 printk(KERN_INFO
"%s&%s: qd6580: dual IDE board\n",
473 hwif
->name
, mate
->name
);
475 qd_setup(hwif
, base
, config
| (control
<< 8));
477 hwif
->port_init_devs
= qd6580_port_init_devs
;
478 hwif
->set_pio_mode
= &qd6580_set_pio_mode
;
480 qd_setup(mate
, base
, config
| (control
<< 8));
482 mate
->port_init_devs
= qd6580_port_init_devs
;
483 mate
->set_pio_mode
= &qd6580_set_pio_mode
;
488 ide_device_add(idx
, &qd65xx_port_info
);
490 outb(QD_DEF_CONTR
, QD_CONTROL_PORT
);
492 return 0; /* no other qd65xx possible */
495 /* no qd65xx found */
499 int probe_qd65xx
= 0;
501 module_param_named(probe
, probe_qd65xx
, bool, 0);
502 MODULE_PARM_DESC(probe
, "probe for QD65xx chipsets");
504 static int __init
qd65xx_init(void)
506 if (probe_qd65xx
== 0)
511 if (ide_hwifs
[0].chipset
!= ide_qd65xx
&&
512 ide_hwifs
[1].chipset
!= ide_qd65xx
)
517 module_init(qd65xx_init
);
519 MODULE_AUTHOR("Samuel Thibault");
520 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
521 MODULE_LICENSE("GPL");