Initial commit
[wrt350n-kernel.git] / drivers / ide / pci / cmd640.c
blobbd24dad3cfc6b2a82c990120ff7e10ac567599ab
1 /*
2 * Copyright (C) 1995-1996 Linus Torvalds & authors (see below)
3 */
5 /*
6 * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov)
7 * mlord@pobox.com (Mark Lord)
9 * See linux/MAINTAINERS for address of current maintainer.
11 * This file provides support for the advanced features and bugs
12 * of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
14 * These chips are basically fucked by design, and getting this driver
15 * to work on every motherboard design that uses this screwed chip seems
16 * bloody well impossible. However, we're still trying.
18 * Version 0.97 worked for everybody.
20 * User feedback is essential. Many thanks to the beta test team:
22 * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
23 * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
24 * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
25 * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
26 * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
27 * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
28 * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
29 * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
30 * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
31 * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
32 * liug@mama.indstate.edu, and others.
34 * Version 0.01 Initial version, hacked out of ide.c,
35 * and #include'd rather than compiled separately.
36 * This will get cleaned up in a subsequent release.
38 * Version 0.02 Fixes for vlb initialization code, enable prefetch
39 * for versions 'B' and 'C' of chip by default,
40 * some code cleanup.
42 * Version 0.03 Added reset of secondary interface,
43 * and black list for devices which are not compatible
44 * with prefetch mode. Separate function for setting
45 * prefetch is added, possibly it will be called some
46 * day from ioctl processing code.
48 * Version 0.04 Now configs/compiles separate from ide.c
50 * Version 0.05 Major rewrite of interface timing code.
51 * Added new function cmd640_set_mode to set PIO mode
52 * from ioctl call. New drives added to black list.
54 * Version 0.06 More code cleanup. Prefetch is enabled only for
55 * detected hard drives, not included in prefetch
56 * black list.
58 * Version 0.07 Changed to more conservative drive tuning policy.
59 * Unknown drives, which report PIO < 4 are set to
60 * (reported_PIO - 1) if it is supported, or to PIO0.
61 * List of known drives extended by info provided by
62 * CMD at their ftp site.
64 * Version 0.08 Added autotune/noautotune support.
66 * Version 0.09 Try to be smarter about 2nd port enabling.
67 * Version 0.10 Be nice and don't reset 2nd port.
68 * Version 0.11 Try to handle more weird situations.
70 * Version 0.12 Lots of bug fixes from Laszlo Peter
71 * irq unmasking disabled for reliability.
72 * try to be even smarter about the second port.
73 * tidy up source code formatting.
74 * Version 0.13 permit irq unmasking again.
75 * Version 0.90 massive code cleanup, some bugs fixed.
76 * defaults all drives to PIO mode0, prefetch off.
77 * autotune is OFF by default, with compile time flag.
78 * prefetch can be turned OFF/ON using "hdparm -p8/-p9"
79 * (requires hdparm-3.1 or newer)
80 * Version 0.91 first release to linux-kernel list.
81 * Version 0.92 move initial reg dump to separate callable function
82 * change "readahead" to "prefetch" to avoid confusion
83 * Version 0.95 respect original BIOS timings unless autotuning.
84 * tons of code cleanup and rearrangement.
85 * added CONFIG_BLK_DEV_CMD640_ENHANCED option
86 * prevent use of unmask when prefetch is on
87 * Version 0.96 prevent use of io_32bit when prefetch is off
88 * Version 0.97 fix VLB secondary interface for sjd@slip.net
89 * other minor tune-ups: 0.96 was very good.
90 * Version 0.98 ignore PCI version when disabled by BIOS
91 * Version 0.99 display setup/active/recovery clocks with PIO mode
92 * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems
93 * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7"
94 * ("fast" is necessary for 32bit I/O in some systems)
95 * Version 1.02 fix bug that resulted in slow "setup times"
96 * (patch courtesy of Zoltan Hidvegi)
99 #define CMD640_PREFETCH_MASKS 1
101 //#define CMD640_DUMP_REGS
103 #include <linux/types.h>
104 #include <linux/kernel.h>
105 #include <linux/delay.h>
106 #include <linux/hdreg.h>
107 #include <linux/ide.h>
108 #include <linux/init.h>
110 #include <asm/io.h>
113 * This flag is set in ide.c by the parameter: ide0=cmd640_vlb
115 int cmd640_vlb = 0;
118 * CMD640 specific registers definition.
121 #define VID 0x00
122 #define DID 0x02
123 #define PCMD 0x04
124 #define PCMD_ENA 0x01
125 #define PSTTS 0x06
126 #define REVID 0x08
127 #define PROGIF 0x09
128 #define SUBCL 0x0a
129 #define BASCL 0x0b
130 #define BaseA0 0x10
131 #define BaseA1 0x14
132 #define BaseA2 0x18
133 #define BaseA3 0x1c
134 #define INTLINE 0x3c
135 #define INPINE 0x3d
137 #define CFR 0x50
138 #define CFR_DEVREV 0x03
139 #define CFR_IDE01INTR 0x04
140 #define CFR_DEVID 0x18
141 #define CFR_AT_VESA_078h 0x20
142 #define CFR_DSA1 0x40
143 #define CFR_DSA0 0x80
145 #define CNTRL 0x51
146 #define CNTRL_DIS_RA0 0x40
147 #define CNTRL_DIS_RA1 0x80
148 #define CNTRL_ENA_2ND 0x08
150 #define CMDTIM 0x52
151 #define ARTTIM0 0x53
152 #define DRWTIM0 0x54
153 #define ARTTIM1 0x55
154 #define DRWTIM1 0x56
155 #define ARTTIM23 0x57
156 #define ARTTIM23_DIS_RA2 0x04
157 #define ARTTIM23_DIS_RA3 0x08
158 #define DRWTIM23 0x58
159 #define BRST 0x59
162 * Registers and masks for easy access by drive index:
164 static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
165 static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
167 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
169 static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
170 static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
173 * Current cmd640 timing values for each drive.
174 * The defaults for each are the slowest possible timings.
176 static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */
177 static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */
178 static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
180 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
182 static DEFINE_SPINLOCK(cmd640_lock);
185 * These are initialized to point at the devices we control
187 static ide_hwif_t *cmd_hwif0, *cmd_hwif1;
188 static ide_drive_t *cmd_drives[4];
191 * Interface to access cmd640x registers
193 static unsigned int cmd640_key;
194 static void (*__put_cmd640_reg)(u16 reg, u8 val);
195 static u8 (*__get_cmd640_reg)(u16 reg);
198 * This is read from the CFR reg, and is used in several places.
200 static unsigned int cmd640_chip_version;
203 * The CMD640x chip does not support DWORD config write cycles, but some
204 * of the BIOSes use them to implement the config services.
205 * Therefore, we must use direct IO instead.
208 /* PCI method 1 access */
210 static void put_cmd640_reg_pci1 (u16 reg, u8 val)
212 outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
213 outb_p(val, (reg & 3) | 0xcfc);
216 static u8 get_cmd640_reg_pci1 (u16 reg)
218 outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
219 return inb_p((reg & 3) | 0xcfc);
222 /* PCI method 2 access (from CMD datasheet) */
224 static void put_cmd640_reg_pci2 (u16 reg, u8 val)
226 outb_p(0x10, 0xcf8);
227 outb_p(val, cmd640_key + reg);
228 outb_p(0, 0xcf8);
231 static u8 get_cmd640_reg_pci2 (u16 reg)
233 u8 b;
235 outb_p(0x10, 0xcf8);
236 b = inb_p(cmd640_key + reg);
237 outb_p(0, 0xcf8);
238 return b;
241 /* VLB access */
243 static void put_cmd640_reg_vlb (u16 reg, u8 val)
245 outb_p(reg, cmd640_key);
246 outb_p(val, cmd640_key + 4);
249 static u8 get_cmd640_reg_vlb (u16 reg)
251 outb_p(reg, cmd640_key);
252 return inb_p(cmd640_key + 4);
255 static u8 get_cmd640_reg(u16 reg)
257 unsigned long flags;
258 u8 b;
260 spin_lock_irqsave(&cmd640_lock, flags);
261 b = __get_cmd640_reg(reg);
262 spin_unlock_irqrestore(&cmd640_lock, flags);
263 return b;
266 static void put_cmd640_reg(u16 reg, u8 val)
268 unsigned long flags;
270 spin_lock_irqsave(&cmd640_lock, flags);
271 __put_cmd640_reg(reg,val);
272 spin_unlock_irqrestore(&cmd640_lock, flags);
275 static int __init match_pci_cmd640_device (void)
277 const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
278 unsigned int i;
279 for (i = 0; i < 4; i++) {
280 if (get_cmd640_reg(i) != ven_dev[i])
281 return 0;
283 #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
284 if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
285 printk("ide: cmd640 on PCI disabled by BIOS\n");
286 return 0;
288 #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
289 return 1; /* success */
293 * Probe for CMD640x -- pci method 1
295 static int __init probe_for_cmd640_pci1 (void)
297 __get_cmd640_reg = get_cmd640_reg_pci1;
298 __put_cmd640_reg = put_cmd640_reg_pci1;
299 for (cmd640_key = 0x80000000;
300 cmd640_key <= 0x8000f800;
301 cmd640_key += 0x800) {
302 if (match_pci_cmd640_device())
303 return 1; /* success */
305 return 0;
309 * Probe for CMD640x -- pci method 2
311 static int __init probe_for_cmd640_pci2 (void)
313 __get_cmd640_reg = get_cmd640_reg_pci2;
314 __put_cmd640_reg = put_cmd640_reg_pci2;
315 for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
316 if (match_pci_cmd640_device())
317 return 1; /* success */
319 return 0;
323 * Probe for CMD640x -- vlb
325 static int __init probe_for_cmd640_vlb (void)
327 u8 b;
329 __get_cmd640_reg = get_cmd640_reg_vlb;
330 __put_cmd640_reg = put_cmd640_reg_vlb;
331 cmd640_key = 0x178;
332 b = get_cmd640_reg(CFR);
333 if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
334 cmd640_key = 0x78;
335 b = get_cmd640_reg(CFR);
336 if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
337 return 0;
339 return 1; /* success */
343 * Returns 1 if an IDE interface/drive exists at 0x170,
344 * Returns 0 otherwise.
346 static int __init secondary_port_responding (void)
348 unsigned long flags;
350 spin_lock_irqsave(&cmd640_lock, flags);
352 outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */
353 udelay(100);
354 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
355 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
356 udelay(100);
357 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
358 spin_unlock_irqrestore(&cmd640_lock, flags);
359 return 0; /* nothing responded */
362 spin_unlock_irqrestore(&cmd640_lock, flags);
363 return 1; /* success */
366 #ifdef CMD640_DUMP_REGS
368 * Dump out all cmd640 registers. May be called from ide.c
370 static void cmd640_dump_regs (void)
372 unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
374 /* Dump current state of chip registers */
375 printk("ide: cmd640 internal register dump:");
376 for (; reg <= 0x59; reg++) {
377 if (!(reg & 0x0f))
378 printk("\n%04x:", reg);
379 printk(" %02x", get_cmd640_reg(reg));
381 printk("\n");
383 #endif
386 * Check whether prefetch is on for a drive,
387 * and initialize the unmask flags for safe operation.
389 static void __init check_prefetch (unsigned int index)
391 ide_drive_t *drive = cmd_drives[index];
392 u8 b = get_cmd640_reg(prefetch_regs[index]);
394 if (b & prefetch_masks[index]) { /* is prefetch off? */
395 drive->no_unmask = 0;
396 drive->no_io_32bit = 1;
397 drive->io_32bit = 0;
398 } else {
399 #if CMD640_PREFETCH_MASKS
400 drive->no_unmask = 1;
401 drive->unmask = 0;
402 #endif
403 drive->no_io_32bit = 0;
408 * Figure out which devices we control
410 static void __init setup_device_ptrs (void)
412 unsigned int i;
414 cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */
415 cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */
416 for (i = 0; i < MAX_HWIFS; i++) {
417 ide_hwif_t *hwif = &ide_hwifs[i];
418 if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) {
419 if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0)
420 cmd_hwif0 = hwif;
421 else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170)
422 cmd_hwif1 = hwif;
425 cmd_drives[0] = &cmd_hwif0->drives[0];
426 cmd_drives[1] = &cmd_hwif0->drives[1];
427 cmd_drives[2] = &cmd_hwif1->drives[0];
428 cmd_drives[3] = &cmd_hwif1->drives[1];
431 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
434 * Sets prefetch mode for a drive.
436 static void set_prefetch_mode (unsigned int index, int mode)
438 ide_drive_t *drive = cmd_drives[index];
439 unsigned long flags;
440 int reg = prefetch_regs[index];
441 u8 b;
443 spin_lock_irqsave(&cmd640_lock, flags);
444 b = __get_cmd640_reg(reg);
445 if (mode) { /* want prefetch on? */
446 #if CMD640_PREFETCH_MASKS
447 drive->no_unmask = 1;
448 drive->unmask = 0;
449 #endif
450 drive->no_io_32bit = 0;
451 b &= ~prefetch_masks[index]; /* enable prefetch */
452 } else {
453 drive->no_unmask = 0;
454 drive->no_io_32bit = 1;
455 drive->io_32bit = 0;
456 b |= prefetch_masks[index]; /* disable prefetch */
458 __put_cmd640_reg(reg, b);
459 spin_unlock_irqrestore(&cmd640_lock, flags);
463 * Dump out current drive clocks settings
465 static void display_clocks (unsigned int index)
467 u8 active_count, recovery_count;
469 active_count = active_counts[index];
470 if (active_count == 1)
471 ++active_count;
472 recovery_count = recovery_counts[index];
473 if (active_count > 3 && recovery_count == 1)
474 ++recovery_count;
475 if (cmd640_chip_version > 1)
476 recovery_count += 1; /* cmd640b uses (count + 1)*/
477 printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
481 * Pack active and recovery counts into single byte representation
482 * used by controller
484 static inline u8 pack_nibbles (u8 upper, u8 lower)
486 return ((upper & 0x0f) << 4) | (lower & 0x0f);
490 * This routine retrieves the initial drive timings from the chipset.
492 static void __init retrieve_drive_counts (unsigned int index)
494 u8 b;
497 * Get the internal setup timing, and convert to clock count
499 b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
500 switch (b) {
501 case 0x00: b = 4; break;
502 case 0x80: b = 3; break;
503 case 0x40: b = 2; break;
504 default: b = 5; break;
506 setup_counts[index] = b;
509 * Get the active/recovery counts
511 b = get_cmd640_reg(drwtim_regs[index]);
512 active_counts[index] = (b >> 4) ? (b >> 4) : 0x10;
513 recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
518 * This routine writes the prepared setup/active/recovery counts
519 * for a drive into the cmd640 chipset registers to active them.
521 static void program_drive_counts (unsigned int index)
523 unsigned long flags;
524 u8 setup_count = setup_counts[index];
525 u8 active_count = active_counts[index];
526 u8 recovery_count = recovery_counts[index];
529 * Set up address setup count and drive read/write timing registers.
530 * Primary interface has individual count/timing registers for
531 * each drive. Secondary interface has one common set of registers,
532 * so we merge the timings, using the slowest value for each timing.
534 if (index > 1) {
535 unsigned int mate;
536 if (cmd_drives[mate = index ^ 1]->present) {
537 if (setup_count < setup_counts[mate])
538 setup_count = setup_counts[mate];
539 if (active_count < active_counts[mate])
540 active_count = active_counts[mate];
541 if (recovery_count < recovery_counts[mate])
542 recovery_count = recovery_counts[mate];
547 * Convert setup_count to internal chipset representation
549 switch (setup_count) {
550 case 4: setup_count = 0x00; break;
551 case 3: setup_count = 0x80; break;
552 case 1:
553 case 2: setup_count = 0x40; break;
554 default: setup_count = 0xc0; /* case 5 */
558 * Now that everything is ready, program the new timings
560 spin_lock_irqsave(&cmd640_lock, flags);
562 * Program the address_setup clocks into ARTTIM reg,
563 * and then the active/recovery counts into the DRWTIM reg
564 * (this converts counts of 16 into counts of zero -- okay).
566 setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
567 __put_cmd640_reg(arttim_regs[index], setup_count);
568 __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
569 spin_unlock_irqrestore(&cmd640_lock, flags);
573 * Set a specific pio_mode for a drive
575 static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle_time)
577 int setup_time, active_time, recovery_time, clock_time;
578 u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
579 int bus_speed = system_bus_clock();
581 if (pio_mode > 5)
582 pio_mode = 5;
583 setup_time = ide_pio_timings[pio_mode].setup_time;
584 active_time = ide_pio_timings[pio_mode].active_time;
585 recovery_time = cycle_time - (setup_time + active_time);
586 clock_time = 1000 / bus_speed;
587 cycle_count = (cycle_time + clock_time - 1) / clock_time;
589 setup_count = (setup_time + clock_time - 1) / clock_time;
591 active_count = (active_time + clock_time - 1) / clock_time;
592 if (active_count < 2)
593 active_count = 2; /* minimum allowed by cmd640 */
595 recovery_count = (recovery_time + clock_time - 1) / clock_time;
596 recovery_count2 = cycle_count - (setup_count + active_count);
597 if (recovery_count2 > recovery_count)
598 recovery_count = recovery_count2;
599 if (recovery_count < 2)
600 recovery_count = 2; /* minimum allowed by cmd640 */
601 if (recovery_count > 17) {
602 active_count += recovery_count - 17;
603 recovery_count = 17;
605 if (active_count > 16)
606 active_count = 16; /* maximum allowed by cmd640 */
607 if (cmd640_chip_version > 1)
608 recovery_count -= 1; /* cmd640b uses (count + 1)*/
609 if (recovery_count > 16)
610 recovery_count = 16; /* maximum allowed by cmd640 */
612 setup_counts[index] = setup_count;
613 active_counts[index] = active_count;
614 recovery_counts[index] = recovery_count;
617 * In a perfect world, we might set the drive pio mode here
618 * (using WIN_SETFEATURE) before continuing.
620 * But we do not, because:
621 * 1) this is the wrong place to do it (proper is do_special() in ide.c)
622 * 2) in practice this is rarely, if ever, necessary
624 program_drive_counts (index);
627 static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
629 unsigned int index = 0, cycle_time;
630 u8 b;
632 while (drive != cmd_drives[index]) {
633 if (++index > 3) {
634 printk(KERN_ERR "%s: bad news in %s\n",
635 drive->name, __FUNCTION__);
636 return;
639 switch (pio) {
640 case 6: /* set fast-devsel off */
641 case 7: /* set fast-devsel on */
642 b = get_cmd640_reg(CNTRL) & ~0x27;
643 if (pio & 1)
644 b |= 0x27;
645 put_cmd640_reg(CNTRL, b);
646 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis");
647 return;
649 case 8: /* set prefetch off */
650 case 9: /* set prefetch on */
651 set_prefetch_mode(index, pio & 1);
652 printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis");
653 return;
656 cycle_time = ide_pio_cycle_time(drive, pio);
657 cmd640_set_mode(index, pio, cycle_time);
659 printk("%s: selected cmd640 PIO mode%d (%dns)",
660 drive->name, pio, cycle_time);
662 display_clocks(index);
665 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
667 static int pci_conf1(void)
669 unsigned long flags;
670 u32 tmp;
672 spin_lock_irqsave(&cmd640_lock, flags);
673 outb(0x01, 0xCFB);
674 tmp = inl(0xCF8);
675 outl(0x80000000, 0xCF8);
676 if (inl(0xCF8) == 0x80000000) {
677 outl(tmp, 0xCF8);
678 spin_unlock_irqrestore(&cmd640_lock, flags);
679 return 1;
681 outl(tmp, 0xCF8);
682 spin_unlock_irqrestore(&cmd640_lock, flags);
683 return 0;
686 static int pci_conf2(void)
688 unsigned long flags;
690 spin_lock_irqsave(&cmd640_lock, flags);
691 outb(0x00, 0xCFB);
692 outb(0x00, 0xCF8);
693 outb(0x00, 0xCFA);
694 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
695 spin_unlock_irqrestore(&cmd640_lock, flags);
696 return 1;
698 spin_unlock_irqrestore(&cmd640_lock, flags);
699 return 0;
702 static const struct ide_port_info cmd640_port_info __initdata = {
703 .chipset = ide_cmd640,
704 .host_flags = IDE_HFLAG_SERIALIZE |
705 IDE_HFLAG_NO_DMA |
706 IDE_HFLAG_NO_AUTOTUNE |
707 IDE_HFLAG_ABUSE_PREFETCH |
708 IDE_HFLAG_ABUSE_FAST_DEVSEL,
709 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
710 .pio_mask = ATA_PIO5,
711 #endif
715 * Probe for a cmd640 chipset, and initialize it if found.
717 static int __init cmd640x_init(void)
719 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
720 int second_port_toggled = 0;
721 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
722 int second_port_cmd640 = 0;
723 const char *bus_type, *port2;
724 unsigned int index;
725 u8 b, cfr;
726 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
728 if (cmd640_vlb && probe_for_cmd640_vlb()) {
729 bus_type = "VLB";
730 } else {
731 cmd640_vlb = 0;
732 /* Find out what kind of PCI probing is supported otherwise
733 Justin Gibbs will sulk.. */
734 if (pci_conf1() && probe_for_cmd640_pci1())
735 bus_type = "PCI (type1)";
736 else if (pci_conf2() && probe_for_cmd640_pci2())
737 bus_type = "PCI (type2)";
738 else
739 return 0;
742 * Undocumented magic (there is no 0x5b reg in specs)
744 put_cmd640_reg(0x5b, 0xbd);
745 if (get_cmd640_reg(0x5b) != 0xbd) {
746 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
747 return 0;
749 put_cmd640_reg(0x5b, 0);
751 #ifdef CMD640_DUMP_REGS
752 cmd640_dump_regs();
753 #endif
756 * Documented magic begins here
758 cfr = get_cmd640_reg(CFR);
759 cmd640_chip_version = cfr & CFR_DEVREV;
760 if (cmd640_chip_version == 0) {
761 printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
762 return 0;
766 * Initialize data for primary port
768 setup_device_ptrs ();
769 printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n",
770 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
771 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
772 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
773 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
775 idx[0] = cmd_hwif0->index;
778 * Ensure compatibility by always using the slowest timings
779 * for access to the drive's command register block,
780 * and reset the prefetch burstsize to default (512 bytes).
782 * Maybe we need a way to NOT do these on *some* systems?
784 put_cmd640_reg(CMDTIM, 0);
785 put_cmd640_reg(BRST, 0x40);
788 * Try to enable the secondary interface, if not already enabled
790 if (cmd_hwif1->noprobe) {
791 port2 = "not probed";
792 } else {
793 b = get_cmd640_reg(CNTRL);
794 if (secondary_port_responding()) {
795 if ((b & CNTRL_ENA_2ND)) {
796 second_port_cmd640 = 1;
797 port2 = "okay";
798 } else if (cmd640_vlb) {
799 second_port_cmd640 = 1;
800 port2 = "alive";
801 } else
802 port2 = "not cmd640";
803 } else {
804 put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
805 if (secondary_port_responding()) {
806 second_port_cmd640 = 1;
807 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
808 second_port_toggled = 1;
809 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
810 port2 = "enabled";
811 } else {
812 put_cmd640_reg(CNTRL, b); /* restore original setting */
813 port2 = "not responding";
819 * Initialize data for secondary cmd640 port, if enabled
821 if (second_port_cmd640) {
822 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
823 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
824 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
826 idx[1] = cmd_hwif1->index;
828 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
829 second_port_cmd640 ? "" : "not ", port2);
832 * Establish initial timings/prefetch for all drives.
833 * Do not unnecessarily disturb any prior BIOS setup of these.
835 for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
836 ide_drive_t *drive = cmd_drives[index];
837 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
838 if (drive->autotune || ((index > 1) && second_port_toggled)) {
840 * Reset timing to the slowest speed and turn off prefetch.
841 * This way, the drive identify code has a better chance.
843 setup_counts [index] = 4; /* max possible */
844 active_counts [index] = 16; /* max possible */
845 recovery_counts [index] = 16; /* max possible */
846 program_drive_counts (index);
847 set_prefetch_mode (index, 0);
848 printk("cmd640: drive%d timings/prefetch cleared\n", index);
849 } else {
851 * Record timings/prefetch without changing them.
852 * This preserves any prior BIOS setup.
854 retrieve_drive_counts (index);
855 check_prefetch (index);
856 printk("cmd640: drive%d timings/prefetch(%s) preserved",
857 index, drive->no_io_32bit ? "off" : "on");
858 display_clocks(index);
860 #else
862 * Set the drive unmask flags to match the prefetch setting
864 check_prefetch (index);
865 printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
866 index, drive->no_io_32bit ? "off" : "on");
867 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
870 #ifdef CMD640_DUMP_REGS
871 cmd640_dump_regs();
872 #endif
874 ide_device_add(idx, &cmd640_port_info);
876 return 1;
879 module_param_named(probe_vlb, cmd640_vlb, bool, 0);
880 MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
882 module_init(cmd640x_init);