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[wrt350n-kernel.git] / drivers / infiniband / hw / nes / nes.h
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1 /*
2 * Copyright (c) 2006 - 2008 NetEffect, Inc. All rights reserved.
3 * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
34 #ifndef __NES_H
35 #define __NES_H
37 #include <linux/netdevice.h>
38 #include <linux/inetdevice.h>
39 #include <linux/spinlock.h>
40 #include <linux/kernel.h>
41 #include <linux/delay.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/workqueue.h>
45 #include <linux/slab.h>
46 #include <asm/semaphore.h>
47 #include <linux/version.h>
48 #include <asm/io.h>
49 #include <linux/crc32c.h>
51 #include <rdma/ib_smi.h>
52 #include <rdma/ib_verbs.h>
53 #include <rdma/ib_pack.h>
54 #include <rdma/rdma_cm.h>
55 #include <rdma/iw_cm.h>
57 #define NES_SEND_FIRST_WRITE
59 #define QUEUE_DISCONNECTS
61 #define DRV_BUILD "1"
63 #define DRV_NAME "iw_nes"
64 #define DRV_VERSION "1.0 KO Build " DRV_BUILD
65 #define PFX DRV_NAME ": "
68 * NetEffect PCI vendor id and NE010 PCI device id.
70 #ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
71 #define PCI_VENDOR_ID_NETEFFECT 0x1678
72 #define PCI_DEVICE_ID_NETEFFECT_NE020 0x0100
73 #endif
75 #define NE020_REV 4
76 #define NE020_REV1 5
78 #define BAR_0 0
79 #define BAR_1 2
81 #define RX_BUF_SIZE (1536 + 8)
82 #define NES_REG0_SIZE (4 * 1024)
83 #define NES_TX_TIMEOUT (6*HZ)
84 #define NES_FIRST_QPN 64
85 #define NES_SW_CONTEXT_ALIGN 1024
87 #define NES_NIC_MAX_NICS 16
88 #define NES_MAX_ARP_TABLE_SIZE 4096
90 #define NES_NIC_CEQ_SIZE 8
91 /* NICs will be on a separate CQ */
92 #define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
94 #define NES_MAX_PORT_COUNT 4
96 #define MAX_DPC_ITERATIONS 128
98 #define NES_CQP_REQUEST_NO_DOORBELL_RING 0
99 #define NES_CQP_REQUEST_RING_DOORBELL 1
101 #define NES_DRV_OPT_ENABLE_MPA_VER_0 0x00000001
102 #define NES_DRV_OPT_DISABLE_MPA_CRC 0x00000002
103 #define NES_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
104 #define NES_DRV_OPT_DISABLE_INTF 0x00000008
105 #define NES_DRV_OPT_ENABLE_MSI 0x00000010
106 #define NES_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
107 #define NES_DRV_OPT_SUPRESS_OPTION_BC 0x00000040
108 #define NES_DRV_OPT_NO_INLINE_DATA 0x00000080
109 #define NES_DRV_OPT_DISABLE_INT_MOD 0x00000100
110 #define NES_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
112 #define NES_AEQ_EVENT_TIMEOUT 2500
113 #define NES_DISCONNECT_EVENT_TIMEOUT 2000
115 /* debug levels */
116 /* must match userspace */
117 #define NES_DBG_HW 0x00000001
118 #define NES_DBG_INIT 0x00000002
119 #define NES_DBG_ISR 0x00000004
120 #define NES_DBG_PHY 0x00000008
121 #define NES_DBG_NETDEV 0x00000010
122 #define NES_DBG_CM 0x00000020
123 #define NES_DBG_CM1 0x00000040
124 #define NES_DBG_NIC_RX 0x00000080
125 #define NES_DBG_NIC_TX 0x00000100
126 #define NES_DBG_CQP 0x00000200
127 #define NES_DBG_MMAP 0x00000400
128 #define NES_DBG_MR 0x00000800
129 #define NES_DBG_PD 0x00001000
130 #define NES_DBG_CQ 0x00002000
131 #define NES_DBG_QP 0x00004000
132 #define NES_DBG_MOD_QP 0x00008000
133 #define NES_DBG_AEQ 0x00010000
134 #define NES_DBG_IW_RX 0x00020000
135 #define NES_DBG_IW_TX 0x00040000
136 #define NES_DBG_SHUTDOWN 0x00080000
137 #define NES_DBG_RSVD1 0x10000000
138 #define NES_DBG_RSVD2 0x20000000
139 #define NES_DBG_RSVD3 0x40000000
140 #define NES_DBG_RSVD4 0x80000000
141 #define NES_DBG_ALL 0xffffffff
143 #ifdef CONFIG_INFINIBAND_NES_DEBUG
144 #define nes_debug(level, fmt, args...) \
145 if (level & nes_debug_level) \
146 printk(KERN_ERR PFX "%s[%u]: " fmt, __FUNCTION__, __LINE__, ##args)
148 #define assert(expr) \
149 if (!(expr)) { \
150 printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n", \
151 #expr, __FILE__, __FUNCTION__, __LINE__); \
154 #define NES_EVENT_TIMEOUT 1200000
155 #else
156 #define nes_debug(level, fmt, args...)
157 #define assert(expr) do {} while (0)
159 #define NES_EVENT_TIMEOUT 100000
160 #endif
162 #include "nes_hw.h"
163 #include "nes_verbs.h"
164 #include "nes_context.h"
165 #include "nes_user.h"
166 #include "nes_cm.h"
168 extern int max_mtu;
169 extern int nics_per_function;
170 #define max_frame_len (max_mtu+ETH_HLEN)
171 extern int interrupt_mod_interval;
172 extern int nes_if_count;
173 extern int mpa_version;
174 extern int disable_mpa_crc;
175 extern unsigned int send_first;
176 extern unsigned int nes_drv_opt;
177 extern unsigned int nes_debug_level;
179 extern struct list_head nes_adapter_list;
180 extern struct list_head nes_dev_list;
182 extern struct nes_cm_core *g_cm_core;
184 extern atomic_t cm_connects;
185 extern atomic_t cm_accepts;
186 extern atomic_t cm_disconnects;
187 extern atomic_t cm_closes;
188 extern atomic_t cm_connecteds;
189 extern atomic_t cm_connect_reqs;
190 extern atomic_t cm_rejects;
191 extern atomic_t mod_qp_timouts;
192 extern atomic_t qps_created;
193 extern atomic_t qps_destroyed;
194 extern atomic_t sw_qps_destroyed;
195 extern u32 mh_detected;
196 extern u32 mh_pauses_sent;
197 extern u32 cm_packets_sent;
198 extern u32 cm_packets_bounced;
199 extern u32 cm_packets_created;
200 extern u32 cm_packets_received;
201 extern u32 cm_packets_dropped;
202 extern u32 cm_packets_retrans;
203 extern u32 cm_listens_created;
204 extern u32 cm_listens_destroyed;
205 extern u32 cm_backlog_drops;
206 extern atomic_t cm_loopbacks;
207 extern atomic_t cm_nodes_created;
208 extern atomic_t cm_nodes_destroyed;
209 extern atomic_t cm_accel_dropped_pkts;
210 extern atomic_t cm_resets_recvd;
212 extern u32 crit_err_count;
213 extern u32 int_mod_timer_init;
214 extern u32 int_mod_cq_depth_256;
215 extern u32 int_mod_cq_depth_128;
216 extern u32 int_mod_cq_depth_32;
217 extern u32 int_mod_cq_depth_24;
218 extern u32 int_mod_cq_depth_16;
219 extern u32 int_mod_cq_depth_4;
220 extern u32 int_mod_cq_depth_1;
222 extern atomic_t cqp_reqs_allocated;
223 extern atomic_t cqp_reqs_freed;
224 extern atomic_t cqp_reqs_dynallocated;
225 extern atomic_t cqp_reqs_dynfreed;
226 extern atomic_t cqp_reqs_queued;
227 extern atomic_t cqp_reqs_redriven;
230 struct nes_device {
231 struct nes_adapter *nesadapter;
232 void __iomem *regs;
233 void __iomem *index_reg;
234 struct pci_dev *pcidev;
235 struct net_device *netdev[NES_NIC_MAX_NICS];
236 u64 link_status_interrupts;
237 struct tasklet_struct dpc_tasklet;
238 spinlock_t indexed_regs_lock;
239 unsigned long csr_start;
240 unsigned long doorbell_region;
241 unsigned long doorbell_start;
242 unsigned long mac_tx_errors;
243 unsigned long mac_pause_frames_sent;
244 unsigned long mac_pause_frames_received;
245 unsigned long mac_rx_errors;
246 unsigned long mac_rx_crc_errors;
247 unsigned long mac_rx_symbol_err_frames;
248 unsigned long mac_rx_jabber_frames;
249 unsigned long mac_rx_oversized_frames;
250 unsigned long mac_rx_short_frames;
251 unsigned long port_rx_discards;
252 unsigned long port_tx_discards;
253 unsigned int mac_index;
254 unsigned int nes_stack_start;
256 /* Control Structures */
257 void *cqp_vbase;
258 dma_addr_t cqp_pbase;
259 u32 cqp_mem_size;
260 u8 ceq_index;
261 u8 nic_ceq_index;
262 struct nes_hw_cqp cqp;
263 struct nes_hw_cq ccq;
264 struct list_head cqp_avail_reqs;
265 struct list_head cqp_pending_reqs;
266 struct nes_cqp_request *nes_cqp_requests;
268 u32 int_req;
269 u32 int_stat;
270 u32 timer_int_req;
271 u32 timer_only_int_count;
272 u32 intf_int_req;
273 u32 last_mac_tx_pauses;
274 u32 last_used_chunks_tx;
275 struct list_head list;
277 u16 base_doorbell_index;
278 u16 currcq_count;
279 u16 deepcq_count;
280 u8 msi_enabled;
281 u8 netdev_count;
282 u8 napi_isr_ran;
283 u8 disable_rx_flow_control;
284 u8 disable_tx_flow_control;
288 static inline void
289 set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
291 wqe_words[index] = cpu_to_le32((u32) ((unsigned long)value));
292 wqe_words[index + 1] = cpu_to_le32((u32)(upper_32_bits((unsigned long)value)));
295 static inline void
296 set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
298 wqe_words[index] = cpu_to_le32(value);
301 static inline void
302 nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
304 set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_COMP_CTX_LOW_IDX,
305 (u64)((unsigned long) &nesdev->cqp));
306 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX] = 0;
307 cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX] = 0;
308 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
309 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX] = 0;
310 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX] = 0;
311 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX] = 0;
312 cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX] = 0;
315 static inline void
316 nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
318 u32 value;
319 value = ((u32)((unsigned long) nesqp)) | head;
320 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
321 (u32)(upper_32_bits((unsigned long)(nesqp))));
322 set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
325 /* Read from memory-mapped device */
326 static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
328 unsigned long flags;
329 void __iomem *addr = nesdev->index_reg;
330 u32 value;
332 spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
334 writel(reg_index, addr);
335 value = readl((void __iomem *)addr + 4);
337 spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
338 return value;
341 static inline u32 nes_read32(const void __iomem *addr)
343 return readl(addr);
346 static inline u16 nes_read16(const void __iomem *addr)
348 return readw(addr);
351 static inline u8 nes_read8(const void __iomem *addr)
353 return readb(addr);
356 /* Write to memory-mapped device */
357 static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
359 unsigned long flags;
360 void __iomem *addr = nesdev->index_reg;
362 spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
364 writel(reg_index, addr);
365 writel(val, (void __iomem *)addr + 4);
367 spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
370 static inline void nes_write32(void __iomem *addr, u32 val)
372 writel(val, addr);
375 static inline void nes_write16(void __iomem *addr, u16 val)
377 writew(val, addr);
380 static inline void nes_write8(void __iomem *addr, u8 val)
382 writeb(val, addr);
387 static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
388 unsigned long *resource_array, u32 max_resources,
389 u32 *req_resource_num, u32 *next)
391 unsigned long flags;
392 u32 resource_num;
394 spin_lock_irqsave(&nesadapter->resource_lock, flags);
396 resource_num = find_next_zero_bit(resource_array, max_resources, *next);
397 if (resource_num >= max_resources) {
398 resource_num = find_first_zero_bit(resource_array, max_resources);
399 if (resource_num >= max_resources) {
400 printk(KERN_ERR PFX "%s: No available resourcess.\n", __FUNCTION__);
401 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
402 return -EMFILE;
405 set_bit(resource_num, resource_array);
406 *next = resource_num+1;
407 if (*next == max_resources) {
408 *next = 0;
410 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
411 *req_resource_num = resource_num;
413 return 0;
416 static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
417 unsigned long *resource_array, u32 resource_num)
419 unsigned long flags;
420 int bit_is_set;
422 spin_lock_irqsave(&nesadapter->resource_lock, flags);
424 bit_is_set = test_bit(resource_num, resource_array);
425 nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
426 resource_num, (bit_is_set ? "": " not"));
427 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
429 return bit_is_set;
432 static inline void nes_free_resource(struct nes_adapter *nesadapter,
433 unsigned long *resource_array, u32 resource_num)
435 unsigned long flags;
437 spin_lock_irqsave(&nesadapter->resource_lock, flags);
438 clear_bit(resource_num, resource_array);
439 spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
442 static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
444 return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
447 static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
449 return container_of(ibpd, struct nes_pd, ibpd);
452 static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
454 return container_of(ibucontext, struct nes_ucontext, ibucontext);
457 static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
459 return container_of(ibmr, struct nes_mr, ibmr);
462 static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
464 return container_of(ibfmr, struct nes_mr, ibfmr);
467 static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
469 return container_of(ibmw, struct nes_mr, ibmw);
472 static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
474 return container_of(nesmr, struct nes_fmr, nesmr);
477 static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
479 return container_of(ibcq, struct nes_cq, ibcq);
482 static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
484 return container_of(ibqp, struct nes_qp, ibqp);
489 /* nes.c */
490 void nes_add_ref(struct ib_qp *);
491 void nes_rem_ref(struct ib_qp *);
492 struct ib_qp *nes_get_qp(struct ib_device *, int);
495 /* nes_hw.c */
496 struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
497 void nes_nic_init_timer_defaults(struct nes_device *, u8);
498 unsigned int nes_reset_adapter_ne020(struct nes_device *, u8 *);
499 int nes_init_serdes(struct nes_device *, u8, u8, u8);
500 void nes_init_csr_ne020(struct nes_device *, u8, u8);
501 void nes_destroy_adapter(struct nes_adapter *);
502 int nes_init_cqp(struct nes_device *);
503 int nes_init_phy(struct nes_device *);
504 int nes_init_nic_qp(struct nes_device *, struct net_device *);
505 void nes_destroy_nic_qp(struct nes_vnic *);
506 int nes_napi_isr(struct nes_device *);
507 void nes_dpc(unsigned long);
508 void nes_process_ceq(struct nes_device *, struct nes_hw_ceq *);
509 void nes_process_aeq(struct nes_device *, struct nes_hw_aeq *);
510 void nes_process_mac_intr(struct nes_device *, u32);
511 void nes_nic_napi_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
512 void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
513 void nes_cqp_ce_handler(struct nes_device *, struct nes_hw_cq *);
514 void nes_process_iwarp_aeqe(struct nes_device *, struct nes_hw_aeqe *);
515 void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
516 int nes_destroy_cqp(struct nes_device *);
517 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
519 /* nes_nic.c */
520 void nes_netdev_set_multicast_list(struct net_device *);
521 void nes_netdev_exit(struct nes_vnic *);
522 struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
523 void nes_netdev_destroy(struct net_device *);
524 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
526 /* nes_cm.c */
527 void *nes_cm_create(struct net_device *);
528 int nes_cm_recv(struct sk_buff *, struct net_device *);
529 void nes_update_arp(unsigned char *, u32, u32, u16, u16);
530 void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
531 void nes_sock_release(struct nes_qp *, unsigned long *);
532 struct nes_cm_core *nes_cm_alloc_core(void);
533 void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
534 int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
535 int nes_cm_disconn(struct nes_qp *);
536 void nes_cm_disconn_worker(void *);
538 /* nes_verbs.c */
539 int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32);
540 int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
541 struct nes_ib_device *nes_init_ofa_device(struct net_device *);
542 void nes_destroy_ofa_device(struct nes_ib_device *);
543 int nes_register_ofa_device(struct nes_ib_device *);
544 void nes_unregister_ofa_device(struct nes_ib_device *);
546 /* nes_util.c */
547 int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
548 void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
549 void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
550 void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16);
551 void nes_read_10G_phy_reg(struct nes_device *, u16, u8);
552 struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
553 void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *, int);
554 int nes_arp_table(struct nes_device *, u32, u8 *, u32);
555 void nes_mh_fix(unsigned long);
556 void nes_clc(unsigned long);
557 void nes_dump_mem(unsigned int, void *, int);
558 u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
560 #endif /* __NES_H */