Initial commit
[wrt350n-kernel.git] / include / asm-arm / arch-ns9xxx / irqs.h
blob25d8d28b27f3b131ec5a943619caaf50e86b2643
1 /*
2 * include/asm-arm/arch-ns9xxx/irqs.h
4 * Copyright (C) 2006 by Digi International Inc.
5 * All rights reserved.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 #ifndef __ASM_ARCH_IRQS_H
12 #define __ASM_ARCH_IRQS_H
14 #define IRQ_WATCHDOG 0
15 #define IRQ_AHBBUSERR 1
16 #define IRQ_BBUSAGG 2
17 /* irq 3 is reserved for NS9360 */
18 #define IRQ_ETHRX 4
19 #define IRQ_ETHTX 5
20 #define IRQ_ETHPHY 6
21 #define IRQ_LCD 7
22 #define IRQ_SERBRX 8
23 #define IRQ_SERBTX 9
24 #define IRQ_SERARX 10
25 #define IRQ_SERATX 11
26 #define IRQ_SERCRX 12
27 #define IRQ_SERCTX 13
28 #define IRQ_I2C 14
29 #define IRQ_BBUSDMA 15
30 #define IRQ_TIMER0 16
31 #define IRQ_TIMER1 17
32 #define IRQ_TIMER2 18
33 #define IRQ_TIMER3 19
34 #define IRQ_TIMER4 20
35 #define IRQ_TIMER5 21
36 #define IRQ_TIMER6 22
37 #define IRQ_TIMER7 23
38 #define IRQ_RTC 24
39 #define IRQ_USBHOST 25
40 #define IRQ_USBDEVICE 26
41 #define IRQ_IEEE1284 27
42 #define IRQ_EXT0 28
43 #define IRQ_EXT1 29
44 #define IRQ_EXT2 30
45 #define IRQ_EXT3 31
47 #define BBUS_IRQ(irq) (32 + irq)
49 #define IRQ_BBUS_DMA BBUS_IRQ(0)
50 #define IRQ_BBUS_SERBRX BBUS_IRQ(2)
51 #define IRQ_BBUS_SERBTX BBUS_IRQ(3)
52 #define IRQ_BBUS_SERARX BBUS_IRQ(4)
53 #define IRQ_BBUS_SERATX BBUS_IRQ(5)
54 #define IRQ_BBUS_SERCRX BBUS_IRQ(6)
55 #define IRQ_BBUS_SERCTX BBUS_IRQ(7)
56 #define IRQ_BBUS_SERDRX BBUS_IRQ(8)
57 #define IRQ_BBUS_SERDTX BBUS_IRQ(9)
58 #define IRQ_BBUS_I2C BBUS_IRQ(10)
59 #define IRQ_BBUS_1284 BBUS_IRQ(11)
60 #define IRQ_BBUS_UTIL BBUS_IRQ(12)
61 #define IRQ_BBUS_RTC BBUS_IRQ(13)
62 #define IRQ_BBUS_USBHST BBUS_IRQ(14)
63 #define IRQ_BBUS_USBDEV BBUS_IRQ(15)
64 #define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24)
65 #define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25)
68 * these Interrupts are specific for the a9m9750dev board.
69 * They are generated by an FPGA that interrupts the CPU on
70 * IRQ_EXT2
72 #define FPGA_IRQ(irq) (64 + irq)
74 #define IRQ_FPGA_UARTA FPGA_IRQ(0)
75 #define IRQ_FPGA_UARTB FPGA_IRQ(1)
76 #define IRQ_FPGA_UARTC FPGA_IRQ(2)
77 #define IRQ_FPGA_UARTD FPGA_IRQ(3)
78 #define IRQ_FPGA_TOUCH FPGA_IRQ(4)
79 #define IRQ_FPGA_CF FPGA_IRQ(5)
80 #define IRQ_FPGA_CAN0 FPGA_IRQ(6)
81 #define IRQ_FPGA_CAN1 FPGA_IRQ(7)
83 #define NR_IRQS 72
85 #endif /* __ASM_ARCH_IRQS_H */