Initial commit
[wrt350n-kernel.git] / include / asm-arm / arch-s3c2400 / map.h
blob1184d907b31e540b806216bdc89c4270d93dddea
1 /* linux/include/asm-arm/arch-s3c2400/map.h
3 * Copyright 2003,2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * Copyright 2003, Lucas Correia Villa Real
9 * S3C2400 - Memory map definitions
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #define S3C2400_PA_MEMCTRL (0x14000000)
17 #define S3C2400_PA_USBHOST (0x14200000)
18 #define S3C2400_PA_IRQ (0x14400000)
19 #define S3C2400_PA_DMA (0x14600000)
20 #define S3C2400_PA_CLKPWR (0x14800000)
21 #define S3C2400_PA_LCD (0x14A00000)
22 #define S3C2400_PA_UART (0x15000000)
23 #define S3C2400_PA_TIMER (0x15100000)
24 #define S3C2400_PA_USBDEV (0x15200140)
25 #define S3C2400_PA_WATCHDOG (0x15300000)
26 #define S3C2400_PA_IIC (0x15400000)
27 #define S3C2400_PA_IIS (0x15508000)
28 #define S3C2400_PA_GPIO (0x15600000)
29 #define S3C2400_PA_RTC (0x15700040)
30 #define S3C2400_PA_ADC (0x15800000)
31 #define S3C2400_PA_SPI (0x15900000)
33 #define S3C2400_PA_MMC (0x15A00000)
34 #define S3C2400_SZ_MMC SZ_1M
36 /* physical addresses of all the chip-select areas */
38 #define S3C2400_CS0 (0x00000000)
39 #define S3C2400_CS1 (0x02000000)
40 #define S3C2400_CS2 (0x04000000)
41 #define S3C2400_CS3 (0x06000000)
42 #define S3C2400_CS4 (0x08000000)
43 #define S3C2400_CS5 (0x0A000000)
44 #define S3C2400_CS6 (0x0C000000)
45 #define S3C2400_CS7 (0x0E000000)
47 #define S3C2400_SDRAM_PA (S3C2400_CS6)
49 /* Use a single interface for common resources between S3C24XX cpus */
51 #define S3C24XX_PA_IRQ S3C2400_PA_IRQ
52 #define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL
53 #define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST
54 #define S3C24XX_PA_DMA S3C2400_PA_DMA
55 #define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR
56 #define S3C24XX_PA_LCD S3C2400_PA_LCD
57 #define S3C24XX_PA_UART S3C2400_PA_UART
58 #define S3C24XX_PA_TIMER S3C2400_PA_TIMER
59 #define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV
60 #define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG
61 #define S3C24XX_PA_IIC S3C2400_PA_IIC
62 #define S3C24XX_PA_IIS S3C2400_PA_IIS
63 #define S3C24XX_PA_GPIO S3C2400_PA_GPIO
64 #define S3C24XX_PA_RTC S3C2400_PA_RTC
65 #define S3C24XX_PA_ADC S3C2400_PA_ADC
66 #define S3C24XX_PA_SPI S3C2400_PA_SPI