Initial commit
[wrt350n-kernel.git] / include / asm-cris / arch-v32 / io.h
blob6b38912f29ba4460b3458fe376720c9a62bf911f
1 #ifndef _ASM_ARCH_CRIS_IO_H
2 #define _ASM_ARCH_CRIS_IO_H
4 #include <linux/spinlock.h>
5 #include <hwregs/reg_map.h>
6 #include <hwregs/reg_rdwr.h>
7 #include <hwregs/gio_defs.h>
9 enum crisv32_io_dir
11 crisv32_io_dir_in = 0,
12 crisv32_io_dir_out = 1
15 struct crisv32_ioport
17 volatile unsigned long *oe;
18 volatile unsigned long *data;
19 volatile unsigned long *data_in;
20 unsigned int pin_count;
21 spinlock_t lock;
24 struct crisv32_iopin
26 struct crisv32_ioport* port;
27 int bit;
30 extern struct crisv32_ioport crisv32_ioports[];
32 extern struct crisv32_iopin crisv32_led1_green;
33 extern struct crisv32_iopin crisv32_led1_red;
34 extern struct crisv32_iopin crisv32_led2_green;
35 extern struct crisv32_iopin crisv32_led2_red;
36 extern struct crisv32_iopin crisv32_led3_green;
37 extern struct crisv32_iopin crisv32_led3_red;
39 extern struct crisv32_iopin crisv32_led_net0_green;
40 extern struct crisv32_iopin crisv32_led_net0_red;
41 extern struct crisv32_iopin crisv32_led_net1_green;
42 extern struct crisv32_iopin crisv32_led_net1_red;
44 static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val)
46 long flags;
47 spin_lock_irqsave(&iopin->port->lock, flags);
49 if (val)
50 *iopin->port->data |= iopin->bit;
51 else
52 *iopin->port->data &= ~iopin->bit;
54 spin_unlock_irqrestore(&iopin->port->lock, flags);
57 static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin,
58 enum crisv32_io_dir dir)
60 long flags;
61 spin_lock_irqsave(&iopin->port->lock, flags);
63 if (dir == crisv32_io_dir_in)
64 *iopin->port->oe &= ~iopin->bit;
65 else
66 *iopin->port->oe |= iopin->bit;
68 spin_unlock_irqrestore(&iopin->port->lock, flags);
71 static inline int crisv32_io_rd(struct crisv32_iopin* iopin)
73 return ((*iopin->port->data_in & iopin->bit) ? 1 : 0);
76 int crisv32_io_get(struct crisv32_iopin* iopin,
77 unsigned int port, unsigned int pin);
78 int crisv32_io_get_name(struct crisv32_iopin* iopin,
79 const char *name);
81 #define CRIS_LED_OFF 0x00
82 #define CRIS_LED_GREEN 0x01
83 #define CRIS_LED_RED 0x02
84 #define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
86 #if (defined(CONFIG_ETRAX_NBR_LED_GRP_ONE) || defined(CONFIG_ETRAX_NBR_LED_GRP_TWO))
87 #define CRIS_LED_NETWORK_GRP0_SET(x) \
88 do { \
89 CRIS_LED_NETWORK_GRP0_SET_G((x) & CRIS_LED_GREEN); \
90 CRIS_LED_NETWORK_GRP0_SET_R((x) & CRIS_LED_RED); \
91 } while (0)
92 #else
93 #define CRIS_LED_NETWORK_GRP0_SET(x) while (0) {}
94 #endif
96 #define CRIS_LED_NETWORK_GRP0_SET_G(x) \
97 crisv32_io_set(&crisv32_led_net0_green, !(x));
99 #define CRIS_LED_NETWORK_GRP0_SET_R(x) \
100 crisv32_io_set(&crisv32_led_net0_red, !(x));
102 #if defined(CONFIG_ETRAX_NBR_LED_GRP_TWO)
103 #define CRIS_LED_NETWORK_GRP1_SET(x) \
104 do { \
105 CRIS_LED_NETWORK_GRP1_SET_G((x) & CRIS_LED_GREEN); \
106 CRIS_LED_NETWORK_GRP1_SET_R((x) & CRIS_LED_RED); \
107 } while (0)
108 #else
109 #define CRIS_LED_NETWORK_GRP1_SET(x) while (0) {}
110 #endif
112 #define CRIS_LED_NETWORK_GRP1_SET_G(x) \
113 crisv32_io_set(&crisv32_led_net1_green, !(x));
115 #define CRIS_LED_NETWORK_GRP1_SET_R(x) \
116 crisv32_io_set(&crisv32_led_net1_red, !(x));
118 #define CRIS_LED_ACTIVE_SET(x) \
119 do { \
120 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
121 CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
122 } while (0)
124 #define CRIS_LED_ACTIVE_SET_G(x) \
125 crisv32_io_set(&crisv32_led2_green, !(x));
126 #define CRIS_LED_ACTIVE_SET_R(x) \
127 crisv32_io_set(&crisv32_led2_red, !(x));
128 #define CRIS_LED_DISK_WRITE(x) \
129 do{\
130 crisv32_io_set(&crisv32_led3_green, !(x)); \
131 crisv32_io_set(&crisv32_led3_red, !(x)); \
132 }while(0)
133 #define CRIS_LED_DISK_READ(x) \
134 crisv32_io_set(&crisv32_led3_green, !(x));
136 #endif