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Initial commit
[wrt350n-kernel.git] / sound / i2c / other / ak4114.c
blob15061bd72776a0eacbb418d7abb1125bda5398cf
1 /*
2 * Routines for control of the AK4114 via I2C and 4-wire serial interface
3 * IEC958 (S/PDIF) receiver by Asahi Kasei
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23 #include <linux/slab.h>
24 #include <linux/delay.h>
25 #include <sound/core.h>
26 #include <sound/control.h>
27 #include <sound/pcm.h>
28 #include <sound/ak4114.h>
29 #include <sound/asoundef.h>
30
31 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
32 MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
33 MODULE_LICENSE("GPL");
34
35 #define AK4114_ADDR 0x00 /* fixed address */
36
37 static void ak4114_stats(struct work_struct *work);
38 static void ak4114_init_regs(struct ak4114 *chip);
39
40 static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
41 {
42 ak4114->write(ak4114->private_data, reg, val);
43 if (reg <= AK4114_REG_INT1_MASK)
44 ak4114->regmap[reg] = val;
45 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
46 ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
47 }
48
49 static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
50 {
51 return ak4114->read(ak4114->private_data, reg);
52 }
53
54 #if 0
55 static void reg_dump(struct ak4114 *ak4114)
56 {
57 int i;
58
59 printk(KERN_DEBUG "AK4114 REG DUMP:\n");
60 for (i = 0; i < 0x20; i++)
61 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < sizeof(ak4114->regmap) ? ak4114->regmap[i] : 0);
62 }
63 #endif
64
65 static void snd_ak4114_free(struct ak4114 *chip)
66 {
67 chip->init = 1; /* don't schedule new work */
68 mb();
69 cancel_delayed_work(&chip->work);
70 flush_scheduled_work();
71 kfree(chip);
72 }
73
74 static int snd_ak4114_dev_free(struct snd_device *device)
75 {
76 struct ak4114 *chip = device->device_data;
77 snd_ak4114_free(chip);
78 return 0;
79 }
80
81 int snd_ak4114_create(struct snd_card *card,
82 ak4114_read_t *read, ak4114_write_t *write,
83 const unsigned char pgm[7], const unsigned char txcsb[5],
84 void *private_data, struct ak4114 **r_ak4114)
85 {
86 struct ak4114 *chip;
87 int err = 0;
88 unsigned char reg;
89 static struct snd_device_ops ops = {
90 .dev_free = snd_ak4114_dev_free,
91 };
92
93 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
94 if (chip == NULL)
95 return -ENOMEM;
96 spin_lock_init(&chip->lock);
97 chip->card = card;
98 chip->read = read;
99 chip->write = write;
100 chip->private_data = private_data;
101 INIT_DELAYED_WORK(&chip->work, ak4114_stats);
102
103 for (reg = 0; reg < 7; reg++)
104 chip->regmap[reg] = pgm[reg];
105 for (reg = 0; reg < 5; reg++)
106 chip->txcsb[reg] = txcsb[reg];
107
108 ak4114_init_regs(chip);
109
110 chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
111 chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
112
113 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
114 goto __fail;
115
116 if (r_ak4114)
117 *r_ak4114 = chip;
118 return 0;
119
120 __fail:
121 snd_ak4114_free(chip);
122 return err < 0 ? err : -EIO;
123 }
124
125 void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
126 {
127 if (reg <= AK4114_REG_INT1_MASK)
128 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
129 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
130 reg_write(chip, reg,
131 (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
132 }
133
134 static void ak4114_init_regs(struct ak4114 *chip)
135 {
136 unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
137
138 /* bring the chip to reset state and powerdown state */
139 reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
140 udelay(200);
141 /* release reset, but leave powerdown */
142 reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
143 udelay(200);
144 for (reg = 1; reg < 7; reg++)
145 reg_write(chip, reg, chip->regmap[reg]);
146 for (reg = 0; reg < 5; reg++)
147 reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
148 /* release powerdown, everything is initialized now */
149 reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
150 }
151
152 void snd_ak4114_reinit(struct ak4114 *chip)
153 {
154 chip->init = 1;
155 mb();
156 flush_scheduled_work();
157 ak4114_init_regs(chip);
158 /* bring up statistics / event queing */
159 chip->init = 0;
160 if (chip->kctls[0])
161 schedule_delayed_work(&chip->work, HZ / 10);
162 }
163
164 static unsigned int external_rate(unsigned char rcs1)
165 {
166 switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
167 case AK4114_FS_32000HZ: return 32000;
168 case AK4114_FS_44100HZ: return 44100;
169 case AK4114_FS_48000HZ: return 48000;
170 case AK4114_FS_88200HZ: return 88200;
171 case AK4114_FS_96000HZ: return 96000;
172 case AK4114_FS_176400HZ: return 176400;
173 case AK4114_FS_192000HZ: return 192000;
174 default: return 0;
175 }
176 }
177
178 static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
179 struct snd_ctl_elem_info *uinfo)
180 {
181 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
182 uinfo->count = 1;
183 uinfo->value.integer.min = 0;
184 uinfo->value.integer.max = LONG_MAX;
185 return 0;
186 }
187
188 static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
189 struct snd_ctl_elem_value *ucontrol)
190 {
191 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
192 long *ptr;
193
194 spin_lock_irq(&chip->lock);
195 ptr = (long *)(((char *)chip) + kcontrol->private_value);
196 ucontrol->value.integer.value[0] = *ptr;
197 *ptr = 0;
198 spin_unlock_irq(&chip->lock);
199 return 0;
200 }
201
202 #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
203
204 static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
205 struct snd_ctl_elem_value *ucontrol)
206 {
207 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
208 unsigned char reg = kcontrol->private_value & 0xff;
209 unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
210 unsigned char inv = (kcontrol->private_value >> 31) & 1;
211
212 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
213 return 0;
214 }
215
216 static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
217 struct snd_ctl_elem_info *uinfo)
218 {
219 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
220 uinfo->count = 1;
221 uinfo->value.integer.min = 0;
222 uinfo->value.integer.max = 192000;
223 return 0;
224 }
225
226 static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
227 struct snd_ctl_elem_value *ucontrol)
228 {
229 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
230
231 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
232 return 0;
233 }
234
235 static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
236 {
237 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
238 uinfo->count = 1;
239 return 0;
240 }
241
242 static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
243 struct snd_ctl_elem_value *ucontrol)
244 {
245 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
246 unsigned i;
247
248 for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
249 ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
250 return 0;
251 }
252
253 static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
254 struct snd_ctl_elem_value *ucontrol)
255 {
256 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
257 unsigned i;
258
259 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
260 ucontrol->value.iec958.status[i] = chip->txcsb[i];
261 return 0;
262 }
263
264 static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
265 struct snd_ctl_elem_value *ucontrol)
266 {
267 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
268 unsigned i;
269
270 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
271 reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
272 return 0;
273 }
274
275 static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
276 {
277 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
278 uinfo->count = 1;
279 return 0;
280 }
281
282 static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
283 struct snd_ctl_elem_value *ucontrol)
284 {
285 memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
286 return 0;
287 }
288
289 static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
290 {
291 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
292 uinfo->value.integer.min = 0;
293 uinfo->value.integer.max = 0xffff;
294 uinfo->count = 4;
295 return 0;
296 }
297
298 static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
299 struct snd_ctl_elem_value *ucontrol)
300 {
301 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
302 unsigned short tmp;
303
304 ucontrol->value.integer.value[0] = 0xf8f2;
305 ucontrol->value.integer.value[1] = 0x4e1f;
306 tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
307 ucontrol->value.integer.value[2] = tmp;
308 tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
309 ucontrol->value.integer.value[3] = tmp;
310 return 0;
311 }
312
313 static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
314 {
315 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
316 uinfo->count = AK4114_REG_QSUB_SIZE;
317 return 0;
318 }
319
320 static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
321 struct snd_ctl_elem_value *ucontrol)
322 {
323 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
324 unsigned i;
325
326 for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
327 ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
328 return 0;
329 }
330
331 /* Don't forget to change AK4114_CONTROLS define!!! */
332 static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
333 {
334 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
335 .name = "IEC958 Parity Errors",
336 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
337 .info = snd_ak4114_in_error_info,
338 .get = snd_ak4114_in_error_get,
339 .private_value = offsetof(struct ak4114, parity_errors),
340 },
341 {
342 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
343 .name = "IEC958 V-Bit Errors",
344 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
345 .info = snd_ak4114_in_error_info,
346 .get = snd_ak4114_in_error_get,
347 .private_value = offsetof(struct ak4114, v_bit_errors),
348 },
349 {
350 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
351 .name = "IEC958 C-CRC Errors",
352 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
353 .info = snd_ak4114_in_error_info,
354 .get = snd_ak4114_in_error_get,
355 .private_value = offsetof(struct ak4114, ccrc_errors),
356 },
357 {
358 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
359 .name = "IEC958 Q-CRC Errors",
360 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
361 .info = snd_ak4114_in_error_info,
362 .get = snd_ak4114_in_error_get,
363 .private_value = offsetof(struct ak4114, qcrc_errors),
364 },
365 {
366 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
367 .name = "IEC958 External Rate",
368 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
369 .info = snd_ak4114_rate_info,
370 .get = snd_ak4114_rate_get,
371 },
372 {
373 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
374 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
375 .access = SNDRV_CTL_ELEM_ACCESS_READ,
376 .info = snd_ak4114_spdif_mask_info,
377 .get = snd_ak4114_spdif_mask_get,
378 },
379 {
380 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
381 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
382 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
383 .info = snd_ak4114_spdif_info,
384 .get = snd_ak4114_spdif_playback_get,
385 .put = snd_ak4114_spdif_playback_put,
386 },
387 {
388 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
389 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
390 .access = SNDRV_CTL_ELEM_ACCESS_READ,
391 .info = snd_ak4114_spdif_mask_info,
392 .get = snd_ak4114_spdif_mask_get,
393 },
394 {
395 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
396 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
397 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
398 .info = snd_ak4114_spdif_info,
399 .get = snd_ak4114_spdif_get,
400 },
401 {
402 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
403 .name = "IEC958 Preample Capture Default",
404 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
405 .info = snd_ak4114_spdif_pinfo,
406 .get = snd_ak4114_spdif_pget,
407 },
408 {
409 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
410 .name = "IEC958 Q-subcode Capture Default",
411 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
412 .info = snd_ak4114_spdif_qinfo,
413 .get = snd_ak4114_spdif_qget,
414 },
415 {
416 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
417 .name = "IEC958 Audio",
418 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
419 .info = snd_ak4114_in_bit_info,
420 .get = snd_ak4114_in_bit_get,
421 .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
422 },
423 {
424 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
425 .name = "IEC958 Non-PCM Bitstream",
426 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
427 .info = snd_ak4114_in_bit_info,
428 .get = snd_ak4114_in_bit_get,
429 .private_value = (6<<8) | AK4114_REG_RCS0,
430 },
431 {
432 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
433 .name = "IEC958 DTS Bitstream",
434 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
435 .info = snd_ak4114_in_bit_info,
436 .get = snd_ak4114_in_bit_get,
437 .private_value = (3<<8) | AK4114_REG_RCS0,
438 },
439 {
440 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
441 .name = "IEC958 PPL Lock Status",
442 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
443 .info = snd_ak4114_in_bit_info,
444 .get = snd_ak4114_in_bit_get,
445 .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
446 }
447 };
448
449 int snd_ak4114_build(struct ak4114 *ak4114,
450 struct snd_pcm_substream *ply_substream,
451 struct snd_pcm_substream *cap_substream)
452 {
453 struct snd_kcontrol *kctl;
454 unsigned int idx;
455 int err;
456
457 snd_assert(cap_substream, return -EINVAL);
458 ak4114->playback_substream = ply_substream;
459 ak4114->capture_substream = cap_substream;
460 for (idx = 0; idx < AK4114_CONTROLS; idx++) {
461 kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
462 if (kctl == NULL)
463 return -ENOMEM;
464 if (strstr(kctl->id.name, "Playback")) {
465 if (ply_substream == NULL) {
466 snd_ctl_free_one(kctl);
467 ak4114->kctls[idx] = NULL;
468 continue;
469 }
470 kctl->id.device = ply_substream->pcm->device;
471 kctl->id.subdevice = ply_substream->number;
472 } else {
473 kctl->id.device = cap_substream->pcm->device;
474 kctl->id.subdevice = cap_substream->number;
475 }
476 err = snd_ctl_add(ak4114->card, kctl);
477 if (err < 0)
478 return err;
479 ak4114->kctls[idx] = kctl;
480 }
481 /* trigger workq */
482 schedule_delayed_work(&ak4114->work, HZ / 10);
483 return 0;
484 }
485
486 /* notify kcontrols if any parameters are changed */
487 static void ak4114_notify(struct ak4114 *ak4114,
488 unsigned char rcs0, unsigned char rcs1,
489 unsigned char c0, unsigned char c1)
490 {
491 if (!ak4114->kctls[0])
492 return;
493
494 if (rcs0 & AK4114_PAR)
495 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
496 &ak4114->kctls[0]->id);
497 if (rcs0 & AK4114_V)
498 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
499 &ak4114->kctls[1]->id);
500 if (rcs1 & AK4114_CCRC)
501 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
502 &ak4114->kctls[2]->id);
503 if (rcs1 & AK4114_QCRC)
504 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
505 &ak4114->kctls[3]->id);
506
507 /* rate change */
508 if (c1 & 0xf0)
509 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
510 &ak4114->kctls[4]->id);
511
512 if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
513 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
514 &ak4114->kctls[9]->id);
515 if (c0 & AK4114_QINT)
516 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
517 &ak4114->kctls[10]->id);
518
519 if (c0 & AK4114_AUDION)
520 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
521 &ak4114->kctls[11]->id);
522 if (c0 & AK4114_AUTO)
523 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
524 &ak4114->kctls[12]->id);
525 if (c0 & AK4114_DTSCD)
526 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
527 &ak4114->kctls[13]->id);
528 if (c0 & AK4114_UNLCK)
529 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
530 &ak4114->kctls[14]->id);
531 }
532
533 int snd_ak4114_external_rate(struct ak4114 *ak4114)
534 {
535 unsigned char rcs1;
536
537 rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
538 return external_rate(rcs1);
539 }
540
541 int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
542 {
543 struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
544 unsigned long _flags;
545 int res = 0;
546 unsigned char rcs0, rcs1;
547 unsigned char c0, c1;
548
549 rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
550 if (flags & AK4114_CHECK_NO_STAT)
551 goto __rate;
552 rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
553 spin_lock_irqsave(&ak4114->lock, _flags);
554 if (rcs0 & AK4114_PAR)
555 ak4114->parity_errors++;
556 if (rcs1 & AK4114_V)
557 ak4114->v_bit_errors++;
558 if (rcs1 & AK4114_CCRC)
559 ak4114->ccrc_errors++;
560 if (rcs1 & AK4114_QCRC)
561 ak4114->qcrc_errors++;
562 c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
563 (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
564 c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
565 ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
566 ak4114->rcs1 = rcs1;
567 spin_unlock_irqrestore(&ak4114->lock, _flags);
568
569 ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
570 if (ak4114->change_callback && (c0 | c1) != 0)
571 ak4114->change_callback(ak4114, c0, c1);
572
573 __rate:
574 /* compare rate */
575 res = external_rate(rcs1);
576 if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
577 snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
578 if (snd_pcm_running(ak4114->capture_substream)) {
579 // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
580 snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
581 res = 1;
582 }
583 snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
584 }
585 return res;
586 }
587
588 static void ak4114_stats(struct work_struct *work)
589 {
590 struct ak4114 *chip = container_of(work, struct ak4114, work.work);
591
592 if (!chip->init)
593 snd_ak4114_check_rate_and_errors(chip, 0);
594
595 schedule_delayed_work(&chip->work, HZ / 10);
596 }
597
598 EXPORT_SYMBOL(snd_ak4114_create);
599 EXPORT_SYMBOL(snd_ak4114_reg_write);
600 EXPORT_SYMBOL(snd_ak4114_reinit);
601 EXPORT_SYMBOL(snd_ak4114_build);
602 EXPORT_SYMBOL(snd_ak4114_external_rate);
603 EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);
WRT350N Kernel Patches