drivers/serial/sh-sci.c

   1 /*
   2  * drivers/serial/sh-sci.c
   3  *
   4  * SuperH on-chip serial module support.  (SCI with no FIFO / with FIFO)
   5  *
   6  *  Copyright (C) 2002 - 2006  Paul Mundt
   7  *  Modified to support SH7720 SCIF. Markus Brunner, Mark Jonas (Jul 2007).
   8  *
   9  * based off of the old drivers/char/sh-sci.c by:
  10  *
  11  *   Copyright (C) 1999, 2000  Niibe Yutaka
  12  *   Copyright (C) 2000  Sugioka Toshinobu
  13  *   Modified to support multiple serial ports. Stuart Menefy (May 2000).
  14  *   Modified to support SecureEdge. David McCullough (2002)
  15  *   Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
  16  *   Removed SH7300 support (Jul 2007).
  17  *
  18  * This file is subject to the terms and conditions of the GNU General Public
  19  * License.  See the file "COPYING" in the main directory of this archive
  20  * for more details.
  21  */
  22 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  23 #define SUPPORT_SYSRQ
  24 #endif
  25
  26 #undef DEBUG
  27
  28 #include <linux/module.h>
  29 #include <linux/errno.h>
  30 #include <linux/timer.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/tty.h>
  33 #include <linux/tty_flip.h>
  34 #include <linux/serial.h>
  35 #include <linux/major.h>
  36 #include <linux/string.h>
  37 #include <linux/sysrq.h>
  38 #include <linux/ioport.h>
  39 #include <linux/mm.h>
  40 #include <linux/init.h>
  41 #include <linux/delay.h>
  42 #include <linux/console.h>
  43 #include <linux/platform_device.h>
  44
  45 #ifdef CONFIG_CPU_FREQ
  46 #include <linux/notifier.h>
  47 #include <linux/cpufreq.h>
  48 #endif
  49
  50 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
  51 #include <linux/ctype.h>
  52 #include <asm/clock.h>
  53 #include <asm/sh_bios.h>
  54 #include <asm/kgdb.h>
  55 #endif
  56
  57 #include <asm/sci.h>
  58 #include "sh-sci.h"
  59
  60 struct sci_port {
  61         struct uart_port        port;
  62
  63         /* Port type */
  64         unsigned int            type;
  65
  66         /* Port IRQs: ERI, RXI, TXI, BRI (optional) */
  67         unsigned int            irqs[SCIx_NR_IRQS];
  68
  69         /* Port pin configuration */
  70         void                    (*init_pins)(struct uart_port *port,
  71                                              unsigned int cflag);
  72
  73         /* Port enable callback */
  74         void                    (*enable)(struct uart_port *port);
  75
  76         /* Port disable callback */
  77         void                    (*disable)(struct uart_port *port);
  78
  79         /* Break timer */
  80         struct timer_list       break_timer;
  81         int                     break_flag;
  82
  83 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
  84         /* Port clock */
  85         struct clk              *clk;
  86 #endif
  87 };
  88
  89 #ifdef CONFIG_SH_KGDB
  90 static struct sci_port *kgdb_sci_port;
  91 #endif
  92
  93 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
  94 static struct sci_port *serial_console_port;
  95 #endif
  96
  97 /* Function prototypes */
  98 static void sci_stop_tx(struct uart_port *port);
  99
 100 #define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
 101
 102 static struct sci_port sci_ports[SCI_NPORTS];
 103 static struct uart_driver sci_uart_driver;
 104
 105 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
 106     defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
 107 static inline void handle_error(struct uart_port *port)
 108 {
 109         /* Clear error flags */
 110         sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
 111 }
 112
 113 static int get_char(struct uart_port *port)
 114 {
 115         unsigned long flags;
 116         unsigned short status;
 117         int c;
 118
 119         spin_lock_irqsave(&port->lock, flags);
 120         do {
 121                 status = sci_in(port, SCxSR);
 122                 if (status & SCxSR_ERRORS(port)) {
 123                         handle_error(port);
 124                         continue;
 125                 }
 126         } while (!(status & SCxSR_RDxF(port)));
 127         c = sci_in(port, SCxRDR);
 128         sci_in(port, SCxSR);            /* Dummy read */
 129         sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 130         spin_unlock_irqrestore(&port->lock, flags);
 131
 132         return c;
 133 }
 134 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
 135
 136 #if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
 137 static void put_char(struct uart_port *port, char c)
 138 {
 139         unsigned long flags;
 140         unsigned short status;
 141
 142         spin_lock_irqsave(&port->lock, flags);
 143
 144         do {
 145                 status = sci_in(port, SCxSR);
 146         } while (!(status & SCxSR_TDxE(port)));
 147
 148         sci_out(port, SCxTDR, c);
 149         sci_in(port, SCxSR);            /* Dummy read */
 150         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 151
 152         spin_unlock_irqrestore(&port->lock, flags);
 153 }
 154 #endif
 155
 156 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
 157 static void put_string(struct sci_port *sci_port, const char *buffer, int count)
 158 {
 159         struct uart_port *port = &sci_port->port;
 160         const unsigned char *p = buffer;
 161         int i;
 162
 163 #if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
 164         int checksum;
 165         int usegdb=0;
 166
 167 #ifdef CONFIG_SH_STANDARD_BIOS
 168         /* This call only does a trap the first time it is
 169          * called, and so is safe to do here unconditionally
 170          */
 171         usegdb |= sh_bios_in_gdb_mode();
 172 #endif
 173 #ifdef CONFIG_SH_KGDB
 174         usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
 175 #endif
 176
 177         if (usegdb) {
 178             /*  $<packet info>#<checksum>. */
 179             do {
 180                 unsigned char c;
 181                 put_char(port, '$');
 182                 put_char(port, 'O'); /* 'O'utput to console */
 183                 checksum = 'O';
 184
 185                 for (i=0; i<count; i++) { /* Don't use run length encoding */
 186                         int h, l;
 187
 188                         c = *p++;
 189                         h = highhex(c);
 190                         l = lowhex(c);
 191                         put_char(port, h);
 192                         put_char(port, l);
 193                         checksum += h + l;
 194                 }
 195                 put_char(port, '#');
 196                 put_char(port, highhex(checksum));
 197                 put_char(port, lowhex(checksum));
 198             } while  (get_char(port) != '+');
 199         } else
 200 #endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
 201         for (i=0; i<count; i++) {
 202                 if (*p == 10)
 203                         put_char(port, '\r');
 204                 put_char(port, *p++);
 205         }
 206 }
 207 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
 208
 209 #ifdef CONFIG_SH_KGDB
 210 static int kgdb_sci_getchar(void)
 211 {
 212         int c;
 213
 214         /* Keep trying to read a character, this could be neater */
 215         while ((c = get_char(&kgdb_sci_port->port)) < 0)
 216                 cpu_relax();
 217
 218         return c;
 219 }
 220
 221 static inline void kgdb_sci_putchar(int c)
 222 {
 223         put_char(&kgdb_sci_port->port, c);
 224 }
 225 #endif /* CONFIG_SH_KGDB */
 226
 227 #if defined(__H8300S__)
 228 enum { sci_disable, sci_enable };
 229
 230 static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
 231 {
 232         volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
 233         int ch = (port->mapbase  - SMR0) >> 3;
 234         unsigned char mask = 1 << (ch+1);
 235
 236         if (ctrl == sci_disable) {
 237                 *mstpcrl |= mask;
 238         } else {
 239                 *mstpcrl &= ~mask;
 240         }
 241 }
 242
 243 static inline void h8300_sci_enable(struct uart_port *port)
 244 {
 245         h8300_sci_config(port, sci_enable);
 246 }
 247
 248 static inline void h8300_sci_disable(struct uart_port *port)
 249 {
 250         h8300_sci_config(port, sci_disable);
 251 }
 252 #endif
 253
 254 #if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
 255     defined(__H8300H__) || defined(__H8300S__)
 256 static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
 257 {
 258         int ch = (port->mapbase - SMR0) >> 3;
 259
 260         /* set DDR regs */
 261         H8300_GPIO_DDR(h8300_sci_pins[ch].port,
 262                        h8300_sci_pins[ch].rx,
 263                        H8300_GPIO_INPUT);
 264         H8300_GPIO_DDR(h8300_sci_pins[ch].port,
 265                        h8300_sci_pins[ch].tx,
 266                        H8300_GPIO_OUTPUT);
 267
 268         /* tx mark output*/
 269         H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
 270 }
 271 #else
 272 #define sci_init_pins_sci NULL
 273 #endif
 274
 275 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
 276 static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
 277 {
 278         unsigned int fcr_val = 0;
 279
 280         if (cflag & CRTSCTS)
 281                 fcr_val |= SCFCR_MCE;
 282
 283         sci_out(port, SCFCR, fcr_val);
 284 }
 285 #else
 286 #define sci_init_pins_irda NULL
 287 #endif
 288
 289 #ifdef SCI_ONLY
 290 #define sci_init_pins_scif NULL
 291 #endif
 292
 293 #if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
 294 #if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
 295 static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
 296 {
 297         unsigned int fcr_val = 0;
 298
 299         set_sh771x_scif_pfc(port);
 300         if (cflag & CRTSCTS) {
 301                 fcr_val |= SCFCR_MCE;
 302         }
 303         sci_out(port, SCFCR, fcr_val);
 304 }
 305 #elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
 306 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 307 {
 308         unsigned int fcr_val = 0;
 309         unsigned short data;
 310
 311         if (cflag & CRTSCTS) {
 312                 /* enable RTS/CTS */
 313                 if (port->mapbase == 0xa4430000) { /* SCIF0 */
 314                         /* Clear PTCR bit 9-2; enable all scif pins but sck */
 315                         data = ctrl_inw(PORT_PTCR);
 316                         ctrl_outw((data & 0xfc03), PORT_PTCR);
 317                 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
 318                         /* Clear PVCR bit 9-2 */
 319                         data = ctrl_inw(PORT_PVCR);
 320                         ctrl_outw((data & 0xfc03), PORT_PVCR);
 321                 }
 322                 fcr_val |= SCFCR_MCE;
 323         } else {
 324                 if (port->mapbase == 0xa4430000) { /* SCIF0 */
 325                         /* Clear PTCR bit 5-2; enable only tx and rx  */
 326                         data = ctrl_inw(PORT_PTCR);
 327                         ctrl_outw((data & 0xffc3), PORT_PTCR);
 328                 } else if (port->mapbase == 0xa4438000) { /* SCIF1 */
 329                         /* Clear PVCR bit 5-2 */
 330                         data = ctrl_inw(PORT_PVCR);
 331                         ctrl_outw((data & 0xffc3), PORT_PVCR);
 332                 }
 333         }
 334         sci_out(port, SCFCR, fcr_val);
 335 }
 336
 337 #elif defined(CONFIG_CPU_SH3)
 338 /* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
 339 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 340 {
 341         unsigned int fcr_val = 0;
 342         unsigned short data;
 343
 344         /* We need to set SCPCR to enable RTS/CTS */
 345         data = ctrl_inw(SCPCR);
 346         /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
 347         ctrl_outw(data & 0x0fcf, SCPCR);
 348
 349         if (cflag & CRTSCTS)
 350                 fcr_val |= SCFCR_MCE;
 351         else {
 352                 /* We need to set SCPCR to enable RTS/CTS */
 353                 data = ctrl_inw(SCPCR);
 354                 /* Clear out SCP7MD1,0, SCP4MD1,0,
 355                    Set SCP6MD1,0 = {01} (output)  */
 356                 ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
 357
 358                 data = ctrl_inb(SCPDR);
 359                 /* Set /RTS2 (bit6) = 0 */
 360                 ctrl_outb(data & 0xbf, SCPDR);
 361         }
 362
 363         sci_out(port, SCFCR, fcr_val);
 364 }
 365 #elif defined(CONFIG_CPU_SUBTYPE_SH7722)
 366 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 367 {
 368         unsigned int fcr_val = 0;
 369
 370         if (cflag & CRTSCTS) {
 371                 fcr_val |= SCFCR_MCE;
 372
 373                 ctrl_outw(0x0000, PORT_PSCR);
 374         } else {
 375                 unsigned short data;
 376
 377                 data = ctrl_inw(PORT_PSCR);
 378                 data &= 0x033f;
 379                 data |= 0x0400;
 380                 ctrl_outw(data, PORT_PSCR);
 381
 382                 ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0);
 383         }
 384
 385         sci_out(port, SCFCR, fcr_val);
 386 }
 387 #else
 388 /* For SH7750 */
 389 static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
 390 {
 391         unsigned int fcr_val = 0;
 392
 393         if (cflag & CRTSCTS) {
 394                 fcr_val |= SCFCR_MCE;
 395         } else {
 396 #ifdef CONFIG_CPU_SUBTYPE_SH7343
 397                 /* Nothing */
 398 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
 399       defined(CONFIG_CPU_SUBTYPE_SH7780) || \
 400       defined(CONFIG_CPU_SUBTYPE_SH7785) || \
 401       defined(CONFIG_CPU_SUBTYPE_SHX3)
 402                 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
 403 #else
 404                 ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
 405 #endif
 406         }
 407         sci_out(port, SCFCR, fcr_val);
 408 }
 409 #endif
 410
 411 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
 412     defined(CONFIG_CPU_SUBTYPE_SH7763) || \
 413     defined(CONFIG_CPU_SUBTYPE_SH7780) || \
 414     defined(CONFIG_CPU_SUBTYPE_SH7785)
 415 static inline int scif_txroom(struct uart_port *port)
 416 {
 417         return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
 418 }
 419
 420 static inline int scif_rxroom(struct uart_port *port)
 421 {
 422         return sci_in(port, SCRFDR) & 0x7f;
 423 }
 424 #else
 425 static inline int scif_txroom(struct uart_port *port)
 426 {
 427         return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
 428 }
 429
 430 static inline int scif_rxroom(struct uart_port *port)
 431 {
 432         return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
 433 }
 434 #endif
 435 #endif /* SCIF_ONLY || SCI_AND_SCIF */
 436
 437 static inline int sci_txroom(struct uart_port *port)
 438 {
 439         return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
 440 }
 441
 442 static inline int sci_rxroom(struct uart_port *port)
 443 {
 444         return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
 445 }
 446
 447 /* ********************************************************************** *
 448  *                   the interrupt related routines                       *
 449  * ********************************************************************** */
 450
 451 static void sci_transmit_chars(struct uart_port *port)
 452 {
 453         struct circ_buf *xmit = &port->info->xmit;
 454         unsigned int stopped = uart_tx_stopped(port);
 455         unsigned short status;
 456         unsigned short ctrl;
 457         int count;
 458
 459         status = sci_in(port, SCxSR);
 460         if (!(status & SCxSR_TDxE(port))) {
 461                 ctrl = sci_in(port, SCSCR);
 462                 if (uart_circ_empty(xmit)) {
 463                         ctrl &= ~SCI_CTRL_FLAGS_TIE;
 464                 } else {
 465                         ctrl |= SCI_CTRL_FLAGS_TIE;
 466                 }
 467                 sci_out(port, SCSCR, ctrl);
 468                 return;
 469         }
 470
 471 #ifndef SCI_ONLY
 472         if (port->type == PORT_SCIF)
 473                 count = scif_txroom(port);
 474         else
 475 #endif
 476                 count = sci_txroom(port);
 477
 478         do {
 479                 unsigned char c;
 480
 481                 if (port->x_char) {
 482                         c = port->x_char;
 483                         port->x_char = 0;
 484                 } else if (!uart_circ_empty(xmit) && !stopped) {
 485                         c = xmit->buf[xmit->tail];
 486                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 487                 } else {
 488                         break;
 489                 }
 490
 491                 sci_out(port, SCxTDR, c);
 492
 493                 port->icount.tx++;
 494         } while (--count > 0);
 495
 496         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 497
 498         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 499                 uart_write_wakeup(port);
 500         if (uart_circ_empty(xmit)) {
 501                 sci_stop_tx(port);
 502         } else {
 503                 ctrl = sci_in(port, SCSCR);
 504
 505 #if !defined(SCI_ONLY)
 506                 if (port->type == PORT_SCIF) {
 507                         sci_in(port, SCxSR); /* Dummy read */
 508                         sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
 509                 }
 510 #endif
 511
 512                 ctrl |= SCI_CTRL_FLAGS_TIE;
 513                 sci_out(port, SCSCR, ctrl);
 514         }
 515 }
 516
 517 /* On SH3, SCIF may read end-of-break as a space->mark char */
 518 #define STEPFN(c)  ({int __c=(c); (((__c-1)|(__c)) == -1); })
 519
 520 static inline void sci_receive_chars(struct uart_port *port)
 521 {
 522         struct sci_port *sci_port = (struct sci_port *)port;
 523         struct tty_struct *tty = port->info->tty;
 524         int i, count, copied = 0;
 525         unsigned short status;
 526         unsigned char flag;
 527
 528         status = sci_in(port, SCxSR);
 529         if (!(status & SCxSR_RDxF(port)))
 530                 return;
 531
 532         while (1) {
 533 #if !defined(SCI_ONLY)
 534                 if (port->type == PORT_SCIF)
 535                         count = scif_rxroom(port);
 536                 else
 537 #endif
 538                         count = sci_rxroom(port);
 539
 540                 /* Don't copy more bytes than there is room for in the buffer */
 541                 count = tty_buffer_request_room(tty, count);
 542
 543                 /* If for any reason we can't copy more data, we're done! */
 544                 if (count == 0)
 545                         break;
 546
 547                 if (port->type == PORT_SCI) {
 548                         char c = sci_in(port, SCxRDR);
 549                         if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
 550                                 count = 0;
 551                         else {
 552                                 tty_insert_flip_char(tty, c, TTY_NORMAL);
 553                         }
 554                 } else {
 555                         for (i=0; i<count; i++) {
 556                                 char c = sci_in(port, SCxRDR);
 557                                 status = sci_in(port, SCxSR);
 558 #if defined(CONFIG_CPU_SH3)
 559                                 /* Skip "chars" during break */
 560                                 if (sci_port->break_flag) {
 561                                         if ((c == 0) &&
 562                                             (status & SCxSR_FER(port))) {
 563                                                 count--; i--;
 564                                                 continue;
 565                                         }
 566
 567                                         /* Nonzero => end-of-break */
 568                                         pr_debug("scif: debounce<%02x>\n", c);
 569                                         sci_port->break_flag = 0;
 570
 571                                         if (STEPFN(c)) {
 572                                                 count--; i--;
 573                                                 continue;
 574                                         }
 575                                 }
 576 #endif /* CONFIG_CPU_SH3 */
 577                                 if (uart_handle_sysrq_char(port, c)) {
 578                                         count--; i--;
 579                                         continue;
 580                                 }
 581
 582                                 /* Store data and status */
 583                                 if (status&SCxSR_FER(port)) {
 584                                         flag = TTY_FRAME;
 585                                         pr_debug("sci: frame error\n");
 586                                 } else if (status&SCxSR_PER(port)) {
 587                                         flag = TTY_PARITY;
 588                                         pr_debug("sci: parity error\n");
 589                                 } else
 590                                         flag = TTY_NORMAL;
 591                                 tty_insert_flip_char(tty, c, flag);
 592                         }
 593                 }
 594
 595                 sci_in(port, SCxSR); /* dummy read */
 596                 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 597
 598                 copied += count;
 599                 port->icount.rx += count;
 600         }
 601
 602         if (copied) {
 603                 /* Tell the rest of the system the news. New characters! */
 604                 tty_flip_buffer_push(tty);
 605         } else {
 606                 sci_in(port, SCxSR); /* dummy read */
 607                 sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 608         }
 609 }
 610
 611 #define SCI_BREAK_JIFFIES (HZ/20)
 612 /* The sci generates interrupts during the break,
 613  * 1 per millisecond or so during the break period, for 9600 baud.
 614  * So dont bother disabling interrupts.
 615  * But dont want more than 1 break event.
 616  * Use a kernel timer to periodically poll the rx line until
 617  * the break is finished.
 618  */
 619 static void sci_schedule_break_timer(struct sci_port *port)
 620 {
 621         port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
 622         add_timer(&port->break_timer);
 623 }
 624 /* Ensure that two consecutive samples find the break over. */
 625 static void sci_break_timer(unsigned long data)
 626 {
 627         struct sci_port *port = (struct sci_port *)data;
 628
 629         if (sci_rxd_in(&port->port) == 0) {
 630                 port->break_flag = 1;
 631                 sci_schedule_break_timer(port);
 632         } else if (port->break_flag == 1) {
 633                 /* break is over. */
 634                 port->break_flag = 2;
 635                 sci_schedule_break_timer(port);
 636         } else
 637                 port->break_flag = 0;
 638 }
 639
 640 static inline int sci_handle_errors(struct uart_port *port)
 641 {
 642         int copied = 0;
 643         unsigned short status = sci_in(port, SCxSR);
 644         struct tty_struct *tty = port->info->tty;
 645
 646         if (status & SCxSR_ORER(port)) {
 647                 /* overrun error */
 648                 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
 649                         copied++;
 650                 pr_debug("sci: overrun error\n");
 651         }
 652
 653         if (status & SCxSR_FER(port)) {
 654                 if (sci_rxd_in(port) == 0) {
 655                         /* Notify of BREAK */
 656                         struct sci_port *sci_port = (struct sci_port *)port;
 657
 658                         if (!sci_port->break_flag) {
 659                                 sci_port->break_flag = 1;
 660                                 sci_schedule_break_timer(sci_port);
 661
 662                                 /* Do sysrq handling. */
 663                                 if (uart_handle_break(port))
 664                                         return 0;
 665                                 pr_debug("sci: BREAK detected\n");
 666                                 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
 667                                         copied++;
 668                        }
 669                 } else {
 670                         /* frame error */
 671                         if (tty_insert_flip_char(tty, 0, TTY_FRAME))
 672                                 copied++;
 673                         pr_debug("sci: frame error\n");
 674                 }
 675         }
 676
 677         if (status & SCxSR_PER(port)) {
 678                 /* parity error */
 679                 if (tty_insert_flip_char(tty, 0, TTY_PARITY))
 680                         copied++;
 681                 pr_debug("sci: parity error\n");
 682         }
 683
 684         if (copied)
 685                 tty_flip_buffer_push(tty);
 686
 687         return copied;
 688 }
 689
 690 static inline int sci_handle_breaks(struct uart_port *port)
 691 {
 692         int copied = 0;
 693         unsigned short status = sci_in(port, SCxSR);
 694         struct tty_struct *tty = port->info->tty;
 695         struct sci_port *s = &sci_ports[port->line];
 696
 697         if (uart_handle_break(port))
 698                 return 0;
 699
 700         if (!s->break_flag && status & SCxSR_BRK(port)) {
 701 #if defined(CONFIG_CPU_SH3)
 702                 /* Debounce break */
 703                 s->break_flag = 1;
 704 #endif
 705                 /* Notify of BREAK */
 706                 if (tty_insert_flip_char(tty, 0, TTY_BREAK))
 707                         copied++;
 708                 pr_debug("sci: BREAK detected\n");
 709         }
 710
 711 #if defined(SCIF_ORER)
 712         /* XXX: Handle SCIF overrun error */
 713         if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
 714                 sci_out(port, SCLSR, 0);
 715                 if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
 716                         copied++;
 717                         pr_debug("sci: overrun error\n");
 718                 }
 719         }
 720 #endif
 721
 722         if (copied)
 723                 tty_flip_buffer_push(tty);
 724
 725         return copied;
 726 }
 727
 728 static irqreturn_t sci_rx_interrupt(int irq, void *port)
 729 {
 730         /* I think sci_receive_chars has to be called irrespective
 731          * of whether the I_IXOFF is set, otherwise, how is the interrupt
 732          * to be disabled?
 733          */
 734         sci_receive_chars(port);
 735
 736         return IRQ_HANDLED;
 737 }
 738
 739 static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
 740 {
 741         struct uart_port *port = ptr;
 742
 743         spin_lock_irq(&port->lock);
 744         sci_transmit_chars(port);
 745         spin_unlock_irq(&port->lock);
 746
 747         return IRQ_HANDLED;
 748 }
 749
 750 static irqreturn_t sci_er_interrupt(int irq, void *ptr)
 751 {
 752         struct uart_port *port = ptr;
 753
 754         /* Handle errors */
 755         if (port->type == PORT_SCI) {
 756                 if (sci_handle_errors(port)) {
 757                         /* discard character in rx buffer */
 758                         sci_in(port, SCxSR);
 759                         sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
 760                 }
 761         } else {
 762 #if defined(SCIF_ORER)
 763                 if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
 764                         struct tty_struct *tty = port->info->tty;
 765
 766                         sci_out(port, SCLSR, 0);
 767                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 768                         tty_flip_buffer_push(tty);
 769                         pr_debug("scif: overrun error\n");
 770                 }
 771 #endif
 772                 sci_rx_interrupt(irq, ptr);
 773         }
 774
 775         sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
 776
 777         /* Kick the transmission */
 778         sci_tx_interrupt(irq, ptr);
 779
 780         return IRQ_HANDLED;
 781 }
 782
 783 static irqreturn_t sci_br_interrupt(int irq, void *ptr)
 784 {
 785         struct uart_port *port = ptr;
 786
 787         /* Handle BREAKs */
 788         sci_handle_breaks(port);
 789         sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
 790
 791         return IRQ_HANDLED;
 792 }
 793
 794 static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
 795 {
 796         unsigned short ssr_status, scr_status;
 797         struct uart_port *port = ptr;
 798
 799         ssr_status = sci_in(port,SCxSR);
 800         scr_status = sci_in(port,SCSCR);
 801
 802         /* Tx Interrupt */
 803         if ((ssr_status & 0x0020) && (scr_status & 0x0080))
 804                 sci_tx_interrupt(irq, ptr);
 805         /* Rx Interrupt */
 806         if ((ssr_status & 0x0002) && (scr_status & 0x0040))
 807                 sci_rx_interrupt(irq, ptr);
 808         /* Error Interrupt */
 809         if ((ssr_status & 0x0080) && (scr_status & 0x0400))
 810                 sci_er_interrupt(irq, ptr);
 811         /* Break Interrupt */
 812         if ((ssr_status & 0x0010) && (scr_status & 0x0200))
 813                 sci_br_interrupt(irq, ptr);
 814
 815         return IRQ_HANDLED;
 816 }
 817
 818 #ifdef CONFIG_CPU_FREQ
 819 /*
 820  * Here we define a transistion notifier so that we can update all of our
 821  * ports' baud rate when the peripheral clock changes.
 822  */
 823 static int sci_notifier(struct notifier_block *self,
 824                         unsigned long phase, void *p)
 825 {
 826         struct cpufreq_freqs *freqs = p;
 827         int i;
 828
 829         if ((phase == CPUFREQ_POSTCHANGE) ||
 830             (phase == CPUFREQ_RESUMECHANGE)){
 831                 for (i = 0; i < SCI_NPORTS; i++) {
 832                         struct uart_port *port = &sci_ports[i].port;
 833                         struct clk *clk;
 834
 835                         /*
 836                          * Update the uartclk per-port if frequency has
 837                          * changed, since it will no longer necessarily be
 838                          * consistent with the old frequency.
 839                          *
 840                          * Really we want to be able to do something like
 841                          * uart_change_speed() or something along those lines
 842                          * here to implicitly reset the per-port baud rate..
 843                          *
 844                          * Clean this up later..
 845                          */
 846                         clk = clk_get(NULL, "module_clk");
 847                         port->uartclk = clk_get_rate(clk) * 16;
 848                         clk_put(clk);
 849                 }
 850
 851                 printk(KERN_INFO "%s: got a postchange notification "
 852                        "for cpu %d (old %d, new %d)\n",
 853                        __FUNCTION__, freqs->cpu, freqs->old, freqs->new);
 854         }
 855
 856         return NOTIFY_OK;
 857 }
 858
 859 static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
 860 #endif /* CONFIG_CPU_FREQ */
 861
 862 static int sci_request_irq(struct sci_port *port)
 863 {
 864         int i;
 865         irqreturn_t (*handlers[4])(int irq, void *ptr) = {
 866                 sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
 867                 sci_br_interrupt,
 868         };
 869         const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
 870                                "SCI Transmit Data Empty", "SCI Break" };
 871
 872         if (port->irqs[0] == port->irqs[1]) {
 873                 if (!port->irqs[0]) {
 874                         printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
 875                         return -ENODEV;
 876                 }
 877
 878                 if (request_irq(port->irqs[0], sci_mpxed_interrupt,
 879                                 IRQF_DISABLED, "sci", port)) {
 880                         printk(KERN_ERR "sci: Cannot allocate irq.\n");
 881                         return -ENODEV;
 882                 }
 883         } else {
 884                 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
 885                         if (!port->irqs[i])
 886                                 continue;
 887                         if (request_irq(port->irqs[i], handlers[i],
 888                                         IRQF_DISABLED, desc[i], port)) {
 889                                 printk(KERN_ERR "sci: Cannot allocate irq.\n");
 890                                 return -ENODEV;
 891                         }
 892                 }
 893         }
 894
 895         return 0;
 896 }
 897
 898 static void sci_free_irq(struct sci_port *port)
 899 {
 900         int i;
 901
 902         if (port->irqs[0] == port->irqs[1]) {
 903                 if (!port->irqs[0])
 904                         printk("sci: sci_free_irq error\n");
 905                 else
 906                         free_irq(port->irqs[0], port);
 907         } else {
 908                 for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
 909                         if (!port->irqs[i])
 910                                 continue;
 911
 912                         free_irq(port->irqs[i], port);
 913                 }
 914         }
 915 }
 916
 917 static unsigned int sci_tx_empty(struct uart_port *port)
 918 {
 919         /* Can't detect */
 920         return TIOCSER_TEMT;
 921 }
 922
 923 static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
 924 {
 925         /* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
 926         /* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
 927         /* If you have signals for DTR and DCD, please implement here. */
 928 }
 929
 930 static unsigned int sci_get_mctrl(struct uart_port *port)
 931 {
 932         /* This routine is used for geting signals of: DTR, DCD, DSR, RI,
 933            and CTS/RTS */
 934
 935         return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
 936 }
 937
 938 static void sci_start_tx(struct uart_port *port)
 939 {
 940         unsigned short ctrl;
 941
 942         /* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
 943         ctrl = sci_in(port, SCSCR);
 944         ctrl |= SCI_CTRL_FLAGS_TIE;
 945         sci_out(port, SCSCR, ctrl);
 946 }
 947
 948 static void sci_stop_tx(struct uart_port *port)
 949 {
 950         unsigned short ctrl;
 951
 952         /* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
 953         ctrl = sci_in(port, SCSCR);
 954         ctrl &= ~SCI_CTRL_FLAGS_TIE;
 955         sci_out(port, SCSCR, ctrl);
 956 }
 957
 958 static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
 959 {
 960         unsigned short ctrl;
 961
 962         /* Set RIE (Receive Interrupt Enable) bit in SCSCR */
 963         ctrl = sci_in(port, SCSCR);
 964         ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
 965         sci_out(port, SCSCR, ctrl);
 966 }
 967
 968 static void sci_stop_rx(struct uart_port *port)
 969 {
 970         unsigned short ctrl;
 971
 972         /* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
 973         ctrl = sci_in(port, SCSCR);
 974         ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
 975         sci_out(port, SCSCR, ctrl);
 976 }
 977
 978 static void sci_enable_ms(struct uart_port *port)
 979 {
 980         /* Nothing here yet .. */
 981 }
 982
 983 static void sci_break_ctl(struct uart_port *port, int break_state)
 984 {
 985         /* Nothing here yet .. */
 986 }
 987
 988 static int sci_startup(struct uart_port *port)
 989 {
 990         struct sci_port *s = &sci_ports[port->line];
 991
 992         if (s->enable)
 993                 s->enable(port);
 994
 995 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
 996         s->clk = clk_get(NULL, "module_clk");
 997 #endif
 998
 999         sci_request_irq(s);
1000         sci_start_tx(port);
1001         sci_start_rx(port, 1);
1002
1003         return 0;
1004 }
1005
1006 static void sci_shutdown(struct uart_port *port)
1007 {
1008         struct sci_port *s = &sci_ports[port->line];
1009
1010         sci_stop_rx(port);
1011         sci_stop_tx(port);
1012         sci_free_irq(s);
1013
1014         if (s->disable)
1015                 s->disable(port);
1016
1017 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1018         clk_put(s->clk);
1019         s->clk = NULL;
1020 #endif
1021 }
1022
1023 static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
1024                             struct ktermios *old)
1025 {
1026         struct sci_port *s = &sci_ports[port->line];
1027         unsigned int status, baud, smr_val;
1028         int t;
1029
1030         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1031
1032         switch (baud) {
1033                 case 0:
1034                         t = -1;
1035                         break;
1036                 default:
1037                 {
1038 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1039                         t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
1040 #else
1041                         t = SCBRR_VALUE(baud);
1042 #endif
1043                         break;
1044                 }
1045         }
1046
1047         do {
1048                 status = sci_in(port, SCxSR);
1049         } while (!(status & SCxSR_TEND(port)));
1050
1051         sci_out(port, SCSCR, 0x00);     /* TE=0, RE=0, CKE1=0 */
1052
1053 #if !defined(SCI_ONLY)
1054         if (port->type == PORT_SCIF)
1055                 sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
1056 #endif
1057
1058         smr_val = sci_in(port, SCSMR) & 3;
1059         if ((termios->c_cflag & CSIZE) == CS7)
1060                 smr_val |= 0x40;
1061         if (termios->c_cflag & PARENB)
1062                 smr_val |= 0x20;
1063         if (termios->c_cflag & PARODD)
1064                 smr_val |= 0x30;
1065         if (termios->c_cflag & CSTOPB)
1066                 smr_val |= 0x08;
1067
1068         uart_update_timeout(port, termios->c_cflag, baud);
1069
1070         sci_out(port, SCSMR, smr_val);
1071
1072         if (t > 0) {
1073                 if(t >= 256) {
1074                         sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
1075                         t >>= 2;
1076                 } else {
1077                         sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
1078                 }
1079                 sci_out(port, SCBRR, t);
1080                 udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
1081         }
1082
1083         if (likely(s->init_pins))
1084                 s->init_pins(port, termios->c_cflag);
1085
1086         sci_out(port, SCSCR, SCSCR_INIT(port));
1087
1088         if ((termios->c_cflag & CREAD) != 0)
1089               sci_start_rx(port,0);
1090 }
1091
1092 static const char *sci_type(struct uart_port *port)
1093 {
1094         switch (port->type) {
1095                 case PORT_SCI:  return "sci";
1096                 case PORT_SCIF: return "scif";
1097                 case PORT_IRDA: return "irda";
1098         }
1099
1100         return 0;
1101 }
1102
1103 static void sci_release_port(struct uart_port *port)
1104 {
1105         /* Nothing here yet .. */
1106 }
1107
1108 static int sci_request_port(struct uart_port *port)
1109 {
1110         /* Nothing here yet .. */
1111         return 0;
1112 }
1113
1114 static void sci_config_port(struct uart_port *port, int flags)
1115 {
1116         struct sci_port *s = &sci_ports[port->line];
1117
1118         port->type = s->type;
1119
1120         switch (port->type) {
1121         case PORT_SCI:
1122                 s->init_pins = sci_init_pins_sci;
1123                 break;
1124         case PORT_SCIF:
1125                 s->init_pins = sci_init_pins_scif;
1126                 break;
1127         case PORT_IRDA:
1128                 s->init_pins = sci_init_pins_irda;
1129                 break;
1130         }
1131
1132 #if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
1133         if (port->mapbase == 0)
1134                 port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
1135
1136         port->membase = (void __iomem *)port->mapbase;
1137 #endif
1138 }
1139
1140 static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
1141 {
1142         struct sci_port *s = &sci_ports[port->line];
1143
1144         if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
1145                 return -EINVAL;
1146         if (ser->baud_base < 2400)
1147                 /* No paper tape reader for Mitch.. */
1148                 return -EINVAL;
1149
1150         return 0;
1151 }
1152
1153 static struct uart_ops sci_uart_ops = {
1154         .tx_empty       = sci_tx_empty,
1155         .set_mctrl      = sci_set_mctrl,
1156         .get_mctrl      = sci_get_mctrl,
1157         .start_tx       = sci_start_tx,
1158         .stop_tx        = sci_stop_tx,
1159         .stop_rx        = sci_stop_rx,
1160         .enable_ms      = sci_enable_ms,
1161         .break_ctl      = sci_break_ctl,
1162         .startup        = sci_startup,
1163         .shutdown       = sci_shutdown,
1164         .set_termios    = sci_set_termios,
1165         .type           = sci_type,
1166         .release_port   = sci_release_port,
1167         .request_port   = sci_request_port,
1168         .config_port    = sci_config_port,
1169         .verify_port    = sci_verify_port,
1170 };
1171
1172 static void __init sci_init_ports(void)
1173 {
1174         static int first = 1;
1175         int i;
1176
1177         if (!first)
1178                 return;
1179
1180         first = 0;
1181
1182         for (i = 0; i < SCI_NPORTS; i++) {
1183                 sci_ports[i].port.ops           = &sci_uart_ops;
1184                 sci_ports[i].port.iotype        = UPIO_MEM;
1185                 sci_ports[i].port.line          = i;
1186                 sci_ports[i].port.fifosize      = 1;
1187
1188 #if defined(__H8300H__) || defined(__H8300S__)
1189 #ifdef __H8300S__
1190                 sci_ports[i].enable     = h8300_sci_enable;
1191                 sci_ports[i].disable    = h8300_sci_disable;
1192 #endif
1193                 sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
1194 #elif defined(CONFIG_SUPERH64)
1195                 sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
1196 #else
1197                 /*
1198                  * XXX: We should use a proper SCI/SCIF clock
1199                  */
1200                 {
1201                         struct clk *clk = clk_get(NULL, "module_clk");
1202                         sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
1203                         clk_put(clk);
1204                 }
1205 #endif
1206
1207                 sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
1208                 sci_ports[i].break_timer.function = sci_break_timer;
1209
1210                 init_timer(&sci_ports[i].break_timer);
1211         }
1212 }
1213
1214 int __init early_sci_setup(struct uart_port *port)
1215 {
1216         if (unlikely(port->line > SCI_NPORTS))
1217                 return -ENODEV;
1218
1219         sci_init_ports();
1220
1221         sci_ports[port->line].port.membase      = port->membase;
1222         sci_ports[port->line].port.mapbase      = port->mapbase;
1223         sci_ports[port->line].port.type         = port->type;
1224
1225         return 0;
1226 }
1227
1228 #ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
1229 /*
1230  *      Print a string to the serial port trying not to disturb
1231  *      any possible real use of the port...
1232  */
1233 static void serial_console_write(struct console *co, const char *s,
1234                                  unsigned count)
1235 {
1236         put_string(serial_console_port, s, count);
1237 }
1238
1239 static int __init serial_console_setup(struct console *co, char *options)
1240 {
1241         struct uart_port *port;
1242         int baud = 115200;
1243         int bits = 8;
1244         int parity = 'n';
1245         int flow = 'n';
1246         int ret;
1247
1248         /*
1249          * Check whether an invalid uart number has been specified, and
1250          * if so, search for the first available port that does have
1251          * console support.
1252          */
1253         if (co->index >= SCI_NPORTS)
1254                 co->index = 0;
1255
1256         serial_console_port = &sci_ports[co->index];
1257         port = &serial_console_port->port;
1258
1259         /*
1260          * Also need to check port->type, we don't actually have any
1261          * UPIO_PORT ports, but uart_report_port() handily misreports
1262          * it anyways if we don't have a port available by the time this is
1263          * called.
1264          */
1265         if (!port->type)
1266                 return -ENODEV;
1267         if (!port->membase || !port->mapbase)
1268                 return -ENODEV;
1269
1270         port->type = serial_console_port->type;
1271
1272 #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
1273         if (!serial_console_port->clk)
1274                 serial_console_port->clk = clk_get(NULL, "module_clk");
1275 #endif
1276
1277         if (port->flags & UPF_IOREMAP)
1278                 sci_config_port(port, 0);
1279
1280         if (serial_console_port->enable)
1281                 serial_console_port->enable(port);
1282
1283         if (options)
1284                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1285
1286         ret = uart_set_options(port, co, baud, parity, bits, flow);
1287 #if defined(__H8300H__) || defined(__H8300S__)
1288         /* disable rx interrupt */
1289         if (ret == 0)
1290                 sci_stop_rx(port);
1291 #endif
1292         return ret;
1293 }
1294
1295 static struct console serial_console = {
1296         .name           = "ttySC",
1297         .device         = uart_console_device,
1298         .write          = serial_console_write,
1299         .setup          = serial_console_setup,
1300         .flags          = CON_PRINTBUFFER,
1301         .index          = -1,
1302         .data           = &sci_uart_driver,
1303 };
1304
1305 static int __init sci_console_init(void)
1306 {
1307         sci_init_ports();
1308         register_console(&serial_console);
1309         return 0;
1310 }
1311 console_initcall(sci_console_init);
1312 #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
1313
1314 #ifdef CONFIG_SH_KGDB_CONSOLE
1315 /*
1316  * FIXME: Most of this can go away.. at the moment, we rely on
1317  * arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
1318  * most of that can easily be done here instead.
1319  *
1320  * For the time being, just accept the values that were parsed earlier..
1321  */
1322 static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
1323                                             int *parity, int *bits)
1324 {
1325         *baud = kgdb_baud;
1326         *parity = tolower(kgdb_parity);
1327         *bits = kgdb_bits - '0';
1328 }
1329
1330 /*
1331  * The naming here is somewhat misleading, since kgdb_console_setup() takes
1332  * care of the early-on initialization for kgdb, regardless of whether we
1333  * actually use kgdb as a console or not.
1334  *
1335  * On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
1336  */
1337 int __init kgdb_console_setup(struct console *co, char *options)
1338 {
1339         struct uart_port *port = &sci_ports[kgdb_portnum].port;
1340         int baud = 38400;
1341         int bits = 8;
1342         int parity = 'n';
1343         int flow = 'n';
1344
1345         if (co->index != kgdb_portnum)
1346                 co->index = kgdb_portnum;
1347
1348         kgdb_sci_port = &sci_ports[co->index];
1349         port = &kgdb_sci_port->port;
1350
1351         /*
1352          * Also need to check port->type, we don't actually have any
1353          * UPIO_PORT ports, but uart_report_port() handily misreports
1354          * it anyways if we don't have a port available by the time this is
1355          * called.
1356          */
1357         if (!port->type)
1358                 return -ENODEV;
1359         if (!port->membase || !port->mapbase)
1360                 return -ENODEV;
1361
1362         if (options)
1363                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1364         else
1365                 kgdb_console_get_options(port, &baud, &parity, &bits);
1366
1367         kgdb_getchar = kgdb_sci_getchar;
1368         kgdb_putchar = kgdb_sci_putchar;
1369
1370         return uart_set_options(port, co, baud, parity, bits, flow);
1371 }
1372
1373 static struct console kgdb_console = {
1374         .name           = "ttySC",
1375         .device         = uart_console_device,
1376         .write          = kgdb_console_write,
1377         .setup          = kgdb_console_setup,
1378         .flags          = CON_PRINTBUFFER,
1379         .index          = -1,
1380         .data           = &sci_uart_driver,
1381 };
1382
1383 /* Register the KGDB console so we get messages (d'oh!) */
1384 static int __init kgdb_console_init(void)
1385 {
1386         sci_init_ports();
1387         register_console(&kgdb_console);
1388         return 0;
1389 }
1390 console_initcall(kgdb_console_init);
1391 #endif /* CONFIG_SH_KGDB_CONSOLE */
1392
1393 #if defined(CONFIG_SH_KGDB_CONSOLE)
1394 #define SCI_CONSOLE     &kgdb_console
1395 #elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
1396 #define SCI_CONSOLE     &serial_console
1397 #else
1398 #define SCI_CONSOLE     0
1399 #endif
1400
1401 static char banner[] __initdata =
1402         KERN_INFO "SuperH SCI(F) driver initialized\n";
1403
1404 static struct uart_driver sci_uart_driver = {
1405         .owner          = THIS_MODULE,
1406         .driver_name    = "sci",
1407         .dev_name       = "ttySC",
1408         .major          = SCI_MAJOR,
1409         .minor          = SCI_MINOR_START,
1410         .nr             = SCI_NPORTS,
1411         .cons           = SCI_CONSOLE,
1412 };
1413
1414 /*
1415  * Register a set of serial devices attached to a platform device.  The
1416  * list is terminated with a zero flags entry, which means we expect
1417  * all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
1418  * remapping (such as sh64) should also set UPF_IOREMAP.
1419  */
1420 static int __devinit sci_probe(struct platform_device *dev)
1421 {
1422         struct plat_sci_port *p = dev->dev.platform_data;
1423         int i;
1424
1425         for (i = 0; p && p->flags != 0; p++, i++) {
1426                 struct sci_port *sciport = &sci_ports[i];
1427
1428                 /* Sanity check */
1429                 if (unlikely(i == SCI_NPORTS)) {
1430                         dev_notice(&dev->dev, "Attempting to register port "
1431                                    "%d when only %d are available.\n",
1432                                    i+1, SCI_NPORTS);
1433                         dev_notice(&dev->dev, "Consider bumping "
1434                                    "CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
1435                         break;
1436                 }
1437
1438                 sciport->port.mapbase   = p->mapbase;
1439
1440                 /*
1441                  * For the simple (and majority of) cases where we don't need
1442                  * to do any remapping, just cast the cookie directly.
1443                  */
1444                 if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
1445                         p->membase = (void __iomem *)p->mapbase;
1446
1447                 sciport->port.membase   = p->membase;
1448
1449                 sciport->port.irq       = p->irqs[SCIx_TXI_IRQ];
1450                 sciport->port.flags     = p->flags;
1451                 sciport->port.dev       = &dev->dev;
1452
1453                 sciport->type           = sciport->port.type = p->type;
1454
1455                 memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
1456
1457                 uart_add_one_port(&sci_uart_driver, &sciport->port);
1458         }
1459
1460 #if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
1461         kgdb_sci_port   = &sci_ports[kgdb_portnum];
1462         kgdb_getchar    = kgdb_sci_getchar;
1463         kgdb_putchar    = kgdb_sci_putchar;
1464 #endif
1465
1466 #ifdef CONFIG_CPU_FREQ
1467         cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
1468         dev_info(&dev->dev, "CPU frequency notifier registered\n");
1469 #endif
1470
1471 #ifdef CONFIG_SH_STANDARD_BIOS
1472         sh_bios_gdb_detach();
1473 #endif
1474
1475         return 0;
1476 }
1477
1478 static int __devexit sci_remove(struct platform_device *dev)
1479 {
1480         int i;
1481
1482         for (i = 0; i < SCI_NPORTS; i++)
1483                 uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
1484
1485         return 0;
1486 }
1487
1488 static int sci_suspend(struct platform_device *dev, pm_message_t state)
1489 {
1490         int i;
1491
1492         for (i = 0; i < SCI_NPORTS; i++) {
1493                 struct sci_port *p = &sci_ports[i];
1494
1495                 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1496                         uart_suspend_port(&sci_uart_driver, &p->port);
1497         }
1498
1499         return 0;
1500 }
1501
1502 static int sci_resume(struct platform_device *dev)
1503 {
1504         int i;
1505
1506         for (i = 0; i < SCI_NPORTS; i++) {
1507                 struct sci_port *p = &sci_ports[i];
1508
1509                 if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
1510                         uart_resume_port(&sci_uart_driver, &p->port);
1511         }
1512
1513         return 0;
1514 }
1515
1516 static struct platform_driver sci_driver = {
1517         .probe          = sci_probe,
1518         .remove         = __devexit_p(sci_remove),
1519         .suspend        = sci_suspend,
1520         .resume         = sci_resume,
1521         .driver         = {
1522                 .name   = "sh-sci",
1523                 .owner  = THIS_MODULE,
1524         },
1525 };
1526
1527 static int __init sci_init(void)
1528 {
1529         int ret;
1530
1531         printk(banner);
1532
1533         sci_init_ports();
1534
1535         ret = uart_register_driver(&sci_uart_driver);
1536         if (likely(ret == 0)) {
1537                 ret = platform_driver_register(&sci_driver);
1538                 if (unlikely(ret))
1539                         uart_unregister_driver(&sci_uart_driver);
1540         }
1541
1542         return ret;
1543 }
1544
1545 static void __exit sci_exit(void)
1546 {
1547         platform_driver_unregister(&sci_driver);
1548         uart_unregister_driver(&sci_uart_driver);
1549 }
1550
1551 module_init(sci_init);
1552 module_exit(sci_exit);
1553
1554 MODULE_LICENSE("GPL");