2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
22 #include <asm/sn/sn_feature_sets.h>
24 static void force_interrupt(int irq
);
25 static void register_intr_pda(struct sn_irq_info
*sn_irq_info
);
26 static void unregister_intr_pda(struct sn_irq_info
*sn_irq_info
);
28 int sn_force_interrupt_flag
= 1;
29 extern int sn_ioif_inited
;
30 struct list_head
**sn_irq_lh
;
31 static DEFINE_SPINLOCK(sn_irq_info_lock
); /* non-IRQ lock */
33 u64
sn_intr_alloc(nasid_t local_nasid
, int local_widget
,
34 struct sn_irq_info
*sn_irq_info
,
35 int req_irq
, nasid_t req_nasid
,
38 struct ia64_sal_retval ret_stuff
;
42 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
43 (u64
) SAL_INTR_ALLOC
, (u64
) local_nasid
,
44 (u64
) local_widget
, __pa(sn_irq_info
), (u64
) req_irq
,
45 (u64
) req_nasid
, (u64
) req_slice
);
47 return ret_stuff
.status
;
50 void sn_intr_free(nasid_t local_nasid
, int local_widget
,
51 struct sn_irq_info
*sn_irq_info
)
53 struct ia64_sal_retval ret_stuff
;
57 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
58 (u64
) SAL_INTR_FREE
, (u64
) local_nasid
,
59 (u64
) local_widget
, (u64
) sn_irq_info
->irq_irq
,
60 (u64
) sn_irq_info
->irq_cookie
, 0, 0);
63 u64
sn_intr_redirect(nasid_t local_nasid
, int local_widget
,
64 struct sn_irq_info
*sn_irq_info
,
65 nasid_t req_nasid
, int req_slice
)
67 struct ia64_sal_retval ret_stuff
;
71 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
72 (u64
) SAL_INTR_REDIRECT
, (u64
) local_nasid
,
73 (u64
) local_widget
, __pa(sn_irq_info
),
74 (u64
) req_nasid
, (u64
) req_slice
, 0);
76 return ret_stuff
.status
;
79 static unsigned int sn_startup_irq(unsigned int irq
)
84 static void sn_shutdown_irq(unsigned int irq
)
88 extern void ia64_mca_register_cpev(int);
90 static void sn_disable_irq(unsigned int irq
)
92 if (irq
== local_vector_to_irq(IA64_CPE_VECTOR
))
93 ia64_mca_register_cpev(0);
96 static void sn_enable_irq(unsigned int irq
)
98 if (irq
== local_vector_to_irq(IA64_CPE_VECTOR
))
99 ia64_mca_register_cpev(irq
);
102 static void sn_ack_irq(unsigned int irq
)
104 u64 event_occurred
, mask
;
107 event_occurred
= HUB_L((u64
*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED
));
108 mask
= event_occurred
& SH_ALL_INT_MASK
;
109 HUB_S((u64
*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS
), mask
);
110 __set_bit(irq
, (volatile void *)pda
->sn_in_service_ivecs
);
112 move_native_irq(irq
);
115 static void sn_end_irq(unsigned int irq
)
121 if (ivec
== SGI_UART_VECTOR
) {
122 event_occurred
= HUB_L((u64
*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED
));
123 /* If the UART bit is set here, we may have received an
124 * interrupt from the UART that the driver missed. To
125 * make sure, we IPI ourselves to force us to look again.
127 if (event_occurred
& SH_EVENT_OCCURRED_UART_INT_MASK
) {
128 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR
,
132 __clear_bit(ivec
, (volatile void *)pda
->sn_in_service_ivecs
);
133 if (sn_force_interrupt_flag
)
134 force_interrupt(irq
);
137 static void sn_irq_info_free(struct rcu_head
*head
);
139 struct sn_irq_info
*sn_retarget_vector(struct sn_irq_info
*sn_irq_info
,
140 nasid_t nasid
, int slice
)
148 int local_widget
, status
;
150 struct sn_irq_info
*new_irq_info
;
151 struct sn_pcibus_provider
*pci_provider
;
153 bridge
= (u64
) sn_irq_info
->irq_bridge
;
155 return NULL
; /* irq is not a device interrupt */
158 local_nasid
= NASID_GET(bridge
);
161 local_widget
= TIO_SWIN_WIDGETNUM(bridge
);
163 local_widget
= SWIN_WIDGETNUM(bridge
);
164 vector
= sn_irq_info
->irq_irq
;
166 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
167 status
= sn_intr_redirect(local_nasid
, local_widget
, sn_irq_info
, nasid
, slice
);
169 new_irq_info
= sn_irq_info
;
174 * PROM does not support SAL_INTR_REDIRECT, or it failed.
175 * Revert to old method.
177 new_irq_info
= kmalloc(sizeof(struct sn_irq_info
), GFP_ATOMIC
);
178 if (new_irq_info
== NULL
)
181 memcpy(new_irq_info
, sn_irq_info
, sizeof(struct sn_irq_info
));
183 /* Free the old PROM new_irq_info structure */
184 sn_intr_free(local_nasid
, local_widget
, new_irq_info
);
185 unregister_intr_pda(new_irq_info
);
187 /* allocate a new PROM new_irq_info struct */
188 status
= sn_intr_alloc(local_nasid
, local_widget
,
189 new_irq_info
, vector
,
192 /* SAL call failed */
198 register_intr_pda(new_irq_info
);
199 spin_lock(&sn_irq_info_lock
);
200 list_replace_rcu(&sn_irq_info
->list
, &new_irq_info
->list
);
201 spin_unlock(&sn_irq_info_lock
);
202 call_rcu(&sn_irq_info
->rcu
, sn_irq_info_free
);
206 /* Update kernels new_irq_info with new target info */
207 cpuid
= nasid_slice_to_cpuid(new_irq_info
->irq_nasid
,
208 new_irq_info
->irq_slice
);
209 new_irq_info
->irq_cpuid
= cpuid
;
211 pci_provider
= sn_pci_provider
[new_irq_info
->irq_bridge_type
];
214 * If this represents a line interrupt, target it. If it's
215 * an msi (irq_int_bit < 0), it's already targeted.
217 if (new_irq_info
->irq_int_bit
>= 0 &&
218 pci_provider
&& pci_provider
->target_interrupt
)
219 (pci_provider
->target_interrupt
)(new_irq_info
);
222 cpuphys
= cpu_physical_id(cpuid
);
223 set_irq_affinity_info((vector
& 0xff), cpuphys
, 0);
229 static void sn_set_affinity_irq(unsigned int irq
, cpumask_t mask
)
231 struct sn_irq_info
*sn_irq_info
, *sn_irq_info_safe
;
235 nasid
= cpuid_to_nasid(first_cpu(mask
));
236 slice
= cpuid_to_slice(first_cpu(mask
));
238 list_for_each_entry_safe(sn_irq_info
, sn_irq_info_safe
,
239 sn_irq_lh
[irq
], list
)
240 (void)sn_retarget_vector(sn_irq_info
, nasid
, slice
);
244 void sn_set_err_irq_affinity(unsigned int irq
)
247 * On systems which support CPU disabling (SHub2), all error interrupts
248 * are targetted at the boot CPU.
250 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT
))
251 set_irq_affinity_info(irq
, cpu_physical_id(0), 0);
254 void sn_set_err_irq_affinity(unsigned int irq
) { }
258 sn_mask_irq(unsigned int irq
)
263 sn_unmask_irq(unsigned int irq
)
267 struct irq_chip irq_type_sn
= {
269 .startup
= sn_startup_irq
,
270 .shutdown
= sn_shutdown_irq
,
271 .enable
= sn_enable_irq
,
272 .disable
= sn_disable_irq
,
276 .unmask
= sn_unmask_irq
,
277 .set_affinity
= sn_set_affinity_irq
280 ia64_vector
sn_irq_to_vector(int irq
)
282 if (irq
>= IA64_NUM_VECTORS
)
284 return (ia64_vector
)irq
;
287 unsigned int sn_local_vector_to_irq(u8 vector
)
289 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector
));
292 void sn_irq_init(void)
295 irq_desc_t
*base_desc
= irq_desc
;
297 ia64_first_device_vector
= IA64_SN2_FIRST_DEVICE_VECTOR
;
298 ia64_last_device_vector
= IA64_SN2_LAST_DEVICE_VECTOR
;
300 for (i
= 0; i
< NR_IRQS
; i
++) {
301 if (base_desc
[i
].chip
== &no_irq_type
) {
302 base_desc
[i
].chip
= &irq_type_sn
;
307 static void register_intr_pda(struct sn_irq_info
*sn_irq_info
)
309 int irq
= sn_irq_info
->irq_irq
;
310 int cpu
= sn_irq_info
->irq_cpuid
;
312 if (pdacpu(cpu
)->sn_last_irq
< irq
) {
313 pdacpu(cpu
)->sn_last_irq
= irq
;
316 if (pdacpu(cpu
)->sn_first_irq
== 0 || pdacpu(cpu
)->sn_first_irq
> irq
)
317 pdacpu(cpu
)->sn_first_irq
= irq
;
320 static void unregister_intr_pda(struct sn_irq_info
*sn_irq_info
)
322 int irq
= sn_irq_info
->irq_irq
;
323 int cpu
= sn_irq_info
->irq_cpuid
;
324 struct sn_irq_info
*tmp_irq_info
;
328 if (pdacpu(cpu
)->sn_last_irq
== irq
) {
330 for (i
= pdacpu(cpu
)->sn_last_irq
- 1;
331 i
&& !foundmatch
; i
--) {
332 list_for_each_entry_rcu(tmp_irq_info
,
335 if (tmp_irq_info
->irq_cpuid
== cpu
) {
341 pdacpu(cpu
)->sn_last_irq
= i
;
344 if (pdacpu(cpu
)->sn_first_irq
== irq
) {
346 for (i
= pdacpu(cpu
)->sn_first_irq
+ 1;
347 i
< NR_IRQS
&& !foundmatch
; i
++) {
348 list_for_each_entry_rcu(tmp_irq_info
,
351 if (tmp_irq_info
->irq_cpuid
== cpu
) {
357 pdacpu(cpu
)->sn_first_irq
= ((i
== NR_IRQS
) ? 0 : i
);
362 static void sn_irq_info_free(struct rcu_head
*head
)
364 struct sn_irq_info
*sn_irq_info
;
366 sn_irq_info
= container_of(head
, struct sn_irq_info
, rcu
);
370 void sn_irq_fixup(struct pci_dev
*pci_dev
, struct sn_irq_info
*sn_irq_info
)
372 nasid_t nasid
= sn_irq_info
->irq_nasid
;
373 int slice
= sn_irq_info
->irq_slice
;
374 int cpu
= nasid_slice_to_cpuid(nasid
, slice
);
379 pci_dev_get(pci_dev
);
380 sn_irq_info
->irq_cpuid
= cpu
;
381 sn_irq_info
->irq_pciioinfo
= SN_PCIDEV_INFO(pci_dev
);
383 /* link it into the sn_irq[irq] list */
384 spin_lock(&sn_irq_info_lock
);
385 list_add_rcu(&sn_irq_info
->list
, sn_irq_lh
[sn_irq_info
->irq_irq
]);
386 reserve_irq_vector(sn_irq_info
->irq_irq
);
387 spin_unlock(&sn_irq_info_lock
);
389 register_intr_pda(sn_irq_info
);
391 cpuphys
= cpu_physical_id(cpu
);
392 set_irq_affinity_info(sn_irq_info
->irq_irq
, cpuphys
, 0);
396 void sn_irq_unfixup(struct pci_dev
*pci_dev
)
398 struct sn_irq_info
*sn_irq_info
;
400 /* Only cleanup IRQ stuff if this device has a host bus context */
401 if (!SN_PCIDEV_BUSSOFT(pci_dev
))
404 sn_irq_info
= SN_PCIDEV_INFO(pci_dev
)->pdi_sn_irq_info
;
407 if (!sn_irq_info
->irq_irq
) {
412 unregister_intr_pda(sn_irq_info
);
413 spin_lock(&sn_irq_info_lock
);
414 list_del_rcu(&sn_irq_info
->list
);
415 spin_unlock(&sn_irq_info_lock
);
416 if (list_empty(sn_irq_lh
[sn_irq_info
->irq_irq
]))
417 free_irq_vector(sn_irq_info
->irq_irq
);
418 call_rcu(&sn_irq_info
->rcu
, sn_irq_info_free
);
419 pci_dev_put(pci_dev
);
424 sn_call_force_intr_provider(struct sn_irq_info
*sn_irq_info
)
426 struct sn_pcibus_provider
*pci_provider
;
428 pci_provider
= sn_pci_provider
[sn_irq_info
->irq_bridge_type
];
430 /* Don't force an interrupt if the irq has been disabled */
431 if (!(irq_desc
[sn_irq_info
->irq_irq
].status
& IRQ_DISABLED
) &&
432 pci_provider
&& pci_provider
->force_interrupt
)
433 (*pci_provider
->force_interrupt
)(sn_irq_info
);
436 static void force_interrupt(int irq
)
438 struct sn_irq_info
*sn_irq_info
;
444 list_for_each_entry_rcu(sn_irq_info
, sn_irq_lh
[irq
], list
)
445 sn_call_force_intr_provider(sn_irq_info
);
451 * Check for lost interrupts. If the PIC int_status reg. says that
452 * an interrupt has been sent, but not handled, and the interrupt
453 * is not pending in either the cpu irr regs or in the soft irr regs,
454 * and the interrupt is not in service, then the interrupt may have
455 * been lost. Force an interrupt on that pin. It is possible that
456 * the interrupt is in flight, so we may generate a spurious interrupt,
457 * but we should never miss a real lost interrupt.
459 static void sn_check_intr(int irq
, struct sn_irq_info
*sn_irq_info
)
462 struct pcidev_info
*pcidev_info
;
463 struct pcibus_info
*pcibus_info
;
466 * Bridge types attached to TIO (anything but PIC) do not need this WAR
467 * since they do not target Shub II interrupt registers. If that
468 * ever changes, this check needs to accomodate.
470 if (sn_irq_info
->irq_bridge_type
!= PCIIO_ASIC_TYPE_PIC
)
473 pcidev_info
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
478 (struct pcibus_info
*)pcidev_info
->pdi_host_pcidev_info
->
480 regval
= pcireg_intr_status_get(pcibus_info
);
482 if (!ia64_get_irr(irq_to_vector(irq
))) {
483 if (!test_bit(irq
, pda
->sn_in_service_ivecs
)) {
485 if (sn_irq_info
->irq_int_bit
& regval
&
486 sn_irq_info
->irq_last_intr
) {
487 regval
&= ~(sn_irq_info
->irq_int_bit
& regval
);
488 sn_call_force_intr_provider(sn_irq_info
);
492 sn_irq_info
->irq_last_intr
= regval
;
495 void sn_lb_int_war_check(void)
497 struct sn_irq_info
*sn_irq_info
;
500 if (!sn_ioif_inited
|| pda
->sn_first_irq
== 0)
504 for (i
= pda
->sn_first_irq
; i
<= pda
->sn_last_irq
; i
++) {
505 list_for_each_entry_rcu(sn_irq_info
, sn_irq_lh
[i
], list
) {
506 sn_check_intr(i
, sn_irq_info
);
512 void __init
sn_irq_lh_init(void)
516 sn_irq_lh
= kmalloc(sizeof(struct list_head
*) * NR_IRQS
, GFP_KERNEL
);
518 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
520 for (i
= 0; i
< NR_IRQS
; i
++) {
521 sn_irq_lh
[i
] = kmalloc(sizeof(struct list_head
), GFP_KERNEL
);
523 panic("SN PCI INIT: Failed IRQ memory allocation\n");
525 INIT_LIST_HEAD(sn_irq_lh
[i
]);