| blob | 4ee87fee701ca0ef0890c687d5e22204f13ec685 |
1 /*
2 * MPC8379E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
12 /dts-v1/;
14 / {
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
32 PowerPC,8379@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
50 <<<<<<< HEAD:arch/powerpc/boot/dts/mpc8379_mds.dts
51 =======
52 localbus@e0005000 {
53 #address-cells = <2>;
54 #size-cells = <1>;
55 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
56 reg = <0xe0005000 0x1000>;
57 interrupts = <77 0x8>;
58 interrupt-parent = <&ipic>;
60 // booting from NOR flash
61 ranges = <0 0x0 0xfe000000 0x02000000
62 1 0x0 0xf8000000 0x00008000
63 3 0x0 0xe0600000 0x00008000>;
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0 0x0 0x2000000>;
70 bank-width = <2>;
71 device-width = <1>;
73 u-boot@0 {
74 reg = <0x0 0x100000>;
75 read-only;
76 };
78 fs@100000 {
79 reg = <0x100000 0x800000>;
80 };
82 kernel@1d00000 {
83 reg = <0x1d00000 0x200000>;
84 };
86 dtb@1f00000 {
87 reg = <0x1f00000 0x100000>;
88 };
89 };
91 bcsr@1,0 {
92 reg = <1 0x0 0x8000>;
93 compatible = "fsl,mpc837xmds-bcsr";
94 };
96 nand@3,0 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8379-fcm-nand",
100 "fsl,elbc-fcm-nand";
101 reg = <3 0x0 0x8000>;
103 u-boot@0 {
104 reg = <0x0 0x100000>;
105 read-only;
106 };
108 kernel@100000 {
109 reg = <0x100000 0x300000>;
110 };
112 fs@400000 {
113 reg = <0x400000 0x1c00000>;
114 };
115 };
116 };
118 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/boot/dts/mpc8379_mds.dts
119 soc@e0000000 {
120 #address-cells = <1>;
121 #size-cells = <1>;
122 device_type = "soc";
123 ranges = <0x0 0xe0000000 0x00100000>;
124 reg = <0xe0000000 0x00000200>;
125 bus-frequency = <0>;
127 wdt@200 {
128 compatible = "mpc83xx_wdt";
129 reg = <0x200 0x100>;
130 };
132 i2c@3000 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 cell-index = <0>;
136 compatible = "fsl-i2c";
137 reg = <0x3000 0x100>;
138 interrupts = <14 0x8>;
139 interrupt-parent = <&ipic>;
140 dfsrr;
141 };
143 i2c@3100 {
144 #address-cells = <1>;
145 #size-cells = <0>;
146 cell-index = <1>;
147 compatible = "fsl-i2c";
148 reg = <0x3100 0x100>;
149 interrupts = <15 0x8>;
150 interrupt-parent = <&ipic>;
151 dfsrr;
152 };
154 spi@7000 {
155 cell-index = <0>;
156 compatible = "fsl,spi";
157 reg = <0x7000 0x1000>;
158 interrupts = <16 0x8>;
159 interrupt-parent = <&ipic>;
160 mode = "cpu";
161 };
163 <<<<<<< HEAD:arch/powerpc/boot/dts/mpc8379_mds.dts
164 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
165 =======
166 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/boot/dts/mpc8379_mds.dts
167 usb@23000 {
168 compatible = "fsl-usb2-dr";
169 reg = <0x23000 0x1000>;
170 #address-cells = <1>;
171 #size-cells = <0>;
172 interrupt-parent = <&ipic>;
173 interrupts = <38 0x8>;
174 <<<<<<< HEAD:arch/powerpc/boot/dts/mpc8379_mds.dts
175 phy_type = "utmi_wide";
176 =======
177 dr_mode = "host";
178 phy_type = "ulpi";
179 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/boot/dts/mpc8379_mds.dts
180 };
182 mdio@24520 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "fsl,gianfar-mdio";
186 reg = <0x24520 0x20>;
187 phy2: ethernet-phy@2 {
188 interrupt-parent = <&ipic>;
189 interrupts = <17 0x8>;
190 reg = <0x2>;
191 device_type = "ethernet-phy";
192 };
193 phy3: ethernet-phy@3 {
194 interrupt-parent = <&ipic>;
195 interrupts = <18 0x8>;
196 reg = <0x3>;
197 device_type = "ethernet-phy";
198 };
199 };
201 enet0: ethernet@24000 {
202 cell-index = <0>;
203 device_type = "network";
204 model = "eTSEC";
205 compatible = "gianfar";
206 reg = <0x24000 0x1000>;
207 local-mac-address = [ 00 00 00 00 00 00 ];
208 interrupts = <32 0x8 33 0x8 34 0x8>;
209 phy-connection-type = "mii";
210 interrupt-parent = <&ipic>;
211 phy-handle = <&phy2>;
212 };
214 enet1: ethernet@25000 {
215 cell-index = <1>;
216 device_type = "network";
217 model = "eTSEC";
218 compatible = "gianfar";
219 reg = <0x25000 0x1000>;
220 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <35 0x8 36 0x8 37 0x8>;
222 phy-connection-type = "mii";
223 interrupt-parent = <&ipic>;
224 phy-handle = <&phy3>;
225 };
227 serial0: serial@4500 {
228 cell-index = <0>;
229 device_type = "serial";
230 compatible = "ns16550";
231 reg = <0x4500 0x100>;
232 clock-frequency = <0>;
233 interrupts = <9 0x8>;
234 interrupt-parent = <&ipic>;
235 };
237 serial1: serial@4600 {
238 cell-index = <1>;
239 device_type = "serial";
240 compatible = "ns16550";
241 reg = <0x4600 0x100>;
242 clock-frequency = <0>;
243 interrupts = <10 0x8>;
244 interrupt-parent = <&ipic>;
245 };
247 crypto@30000 {
248 model = "SEC3";
249 compatible = "talitos";
250 reg = <0x30000 0x10000>;
251 interrupts = <11 0x8>;
252 interrupt-parent = <&ipic>;
253 /* Rev. 3.0 geometry */
254 num-channels = <4>;
255 channel-fifo-len = <24>;
256 exec-units-mask = <0x000001fe>;
257 descriptor-types-mask = <0x03ab0ebf>;
258 };
260 sdhc@2e000 {
261 model = "eSDHC";
262 compatible = "fsl,esdhc";
263 reg = <0x2e000 0x1000>;
264 interrupts = <42 0x8>;
265 interrupt-parent = <&ipic>;
266 };
268 sata@18000 {
269 compatible = "fsl,mpc8379-sata";
270 reg = <0x18000 0x1000>;
271 interrupts = <44 0x8>;
272 interrupt-parent = <&ipic>;
273 };
275 sata@19000 {
276 compatible = "fsl,mpc8379-sata";
277 reg = <0x19000 0x1000>;
278 interrupts = <45 0x8>;
279 interrupt-parent = <&ipic>;
280 };
282 sata@1a000 {
283 compatible = "fsl,mpc8379-sata";
284 reg = <0x1a000 0x1000>;
285 interrupts = <46 0x8>;
286 interrupt-parent = <&ipic>;
287 };
289 sata@1b000 {
290 compatible = "fsl,mpc8379-sata";
291 reg = <0x1b000 0x1000>;
292 interrupts = <47 0x8>;
293 interrupt-parent = <&ipic>;
294 };
296 /* IPIC
297 * interrupts cell = <intr #, sense>
298 * sense values match linux IORESOURCE_IRQ_* defines:
299 * sense == 8: Level, low assertion
300 * sense == 2: Edge, high-to-low change
301 */
302 ipic: pic@700 {
303 compatible = "fsl,ipic";
304 interrupt-controller;
305 #address-cells = <0>;
306 #interrupt-cells = <2>;
307 reg = <0x700 0x100>;
308 };
309 };
311 pci0: pci@e0008500 {
312 cell-index = <0>;
313 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
314 interrupt-map = <
316 /* IDSEL 0x11 */
317 0x8800 0x0 0x0 0x1 &ipic 20 0x8
318 0x8800 0x0 0x0 0x2 &ipic 21 0x8
319 0x8800 0x0 0x0 0x3 &ipic 22 0x8
320 0x8800 0x0 0x0 0x4 &ipic 23 0x8
322 /* IDSEL 0x12 */
323 0x9000 0x0 0x0 0x1 &ipic 22 0x8
324 0x9000 0x0 0x0 0x2 &ipic 23 0x8
325 0x9000 0x0 0x0 0x3 &ipic 20 0x8
326 0x9000 0x0 0x0 0x4 &ipic 21 0x8
328 /* IDSEL 0x13 */
329 0x9800 0x0 0x0 0x1 &ipic 23 0x8
330 0x9800 0x0 0x0 0x2 &ipic 20 0x8
331 0x9800 0x0 0x0 0x3 &ipic 21 0x8
332 0x9800 0x0 0x0 0x4 &ipic 22 0x8
334 /* IDSEL 0x15 */
335 0xa800 0x0 0x0 0x1 &ipic 20 0x8
336 0xa800 0x0 0x0 0x2 &ipic 21 0x8
337 0xa800 0x0 0x0 0x3 &ipic 22 0x8
338 0xa800 0x0 0x0 0x4 &ipic 23 0x8
340 /* IDSEL 0x16 */
341 0xb000 0x0 0x0 0x1 &ipic 23 0x8
342 0xb000 0x0 0x0 0x2 &ipic 20 0x8
343 0xb000 0x0 0x0 0x3 &ipic 21 0x8
344 0xb000 0x0 0x0 0x4 &ipic 22 0x8
346 /* IDSEL 0x17 */
347 0xb800 0x0 0x0 0x1 &ipic 22 0x8
348 0xb800 0x0 0x0 0x2 &ipic 23 0x8
349 0xb800 0x0 0x0 0x3 &ipic 20 0x8
350 0xb800 0x0 0x0 0x4 &ipic 21 0x8
352 /* IDSEL 0x18 */
353 0xc000 0x0 0x0 0x1 &ipic 21 0x8
354 0xc000 0x0 0x0 0x2 &ipic 22 0x8
355 0xc000 0x0 0x0 0x3 &ipic 23 0x8
356 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
357 interrupt-parent = <&ipic>;
358 interrupts = <66 0x8>;
359 bus-range = <0x0 0x0>;
360 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
361 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
362 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
363 clock-frequency = <0>;
364 #interrupt-cells = <1>;
365 #size-cells = <2>;
366 #address-cells = <3>;
367 reg = <0xe0008500 0x100>;
368 compatible = "fsl,mpc8349-pci";
369 device_type = "pci";
370 };
371 };