Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / arch / powerpc / boot / ps3-hvcall.S
blobd6068f1829ca354552d3d6632a889fedaa627c75
1 /*
2  *  PS3 bootwrapper hvcalls.
3  *
4  *  Copyright (C) 2007 Sony Computer Entertainment Inc.
5  *  Copyright 2007 Sony Corp.
6  *
7  *  This program is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License as published by
9  *  the Free Software Foundation; version 2 of the License.
10  *
11  *  This program is distributed in the hope that it will be useful,
12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *  GNU General Public License for more details.
15  *
16  *  You should have received a copy of the GNU General Public License
17  *  along with this program; if not, write to the Free Software
18  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
21 #include "ppc_asm.h"
23         .machine "ppc64"
26  * The PS3 hypervisor uses a 64 bit "C" language calling convention.
27  * The routines here marshal arguments between the 32 bit wrapper
28  * program and the 64 bit hvcalls.
29  *
30  *  wrapper           lv1
31  *  32-bit (h,l)      64-bit
32  *
33  *  1: r3,r4          <-> r3
34  *  2: r5,r6          <-> r4
35  *  3: r7,r8          <-> r5
36  *  4: r9,r10         <-> r6
37  *  5: 8(r1),12(r1)   <-> r7
38  *  6: 16(r1),20(r1)  <-> r8
39  *  7: 24(r1),28(r1)  <-> r9
40  *  8: 32(r1),36(r1)  <-> r10
41  *
42  */
44 .macro GLOBAL name
45         .section ".text"
46         .balign 4
47         .globl \name
48 \name:
49 .endm
51 .macro NO_SUPPORT name
52         GLOBAL \name
53         b ps3_no_support
54 .endm
56 .macro HVCALL num
57         li r11, \num
58         .long 0x44000022
59         extsw r3, r3
60 .endm
62 .macro SAVE_LR offset=4
63         mflr r0
64         stw r0, \offset(r1)
65 .endm
67 .macro LOAD_LR offset=4
68         lwz r0, \offset(r1)
69         mtlr r0
70 .endm
72 .macro LOAD_64_REG target,high,low
73         sldi r11, \high, 32
74         or \target, r11, \low
75 .endm
77 .macro LOAD_64_STACK target,offset
78         ld \target, \offset(r1)
79 .endm
81 .macro LOAD_R3
82         LOAD_64_REG r3,r3,r4
83 .endm
85 .macro LOAD_R4
86         LOAD_64_REG r4,r5,r6
87 .endm
89 .macro LOAD_R5
90         LOAD_64_REG r5,r7,r8
91 .endm
93 .macro LOAD_R6
94         LOAD_64_REG r6,r9,r10
95 .endm
97 .macro LOAD_R7
98         LOAD_64_STACK r7,8
99 .endm
101 .macro LOAD_R8
102         LOAD_64_STACK r8,16
103 .endm
105 .macro LOAD_R9
106         LOAD_64_STACK r9,24
107 .endm
109 .macro LOAD_R10
110         LOAD_64_STACK r10,32
111 .endm
113 .macro LOAD_REGS_0
114         stwu 1,-16(1)
115         stw 3, 8(1)
116 .endm
118 .macro LOAD_REGS_5
119         LOAD_R3
120         LOAD_R4
121         LOAD_R5
122         LOAD_R6
123         LOAD_R7
124 .endm
126 .macro LOAD_REGS_6
127         LOAD_REGS_5
128         LOAD_R8
129 .endm
131 .macro LOAD_REGS_8
132         LOAD_REGS_6
133         LOAD_R9
134         LOAD_R10
135 .endm
137 .macro STORE_REGS_0_1
138         lwz r11, 8(r1)
139         std r4, 0(r11)
140         mr r4, r3
141         li r3, 0
142         addi r1,r1,16
143 .endm
145 .macro STORE_REGS_5_2
146         lwz r11, 16(r1)
147         std r4, 0(r11)
148         lwz r11, 20(r1)
149         std r5, 0(r11)
150 .endm
152 .macro STORE_REGS_6_1
153         lwz r11, 24(r1)
154         std r4, 0(r11)
155 .endm
157 GLOBAL lv1_get_logical_ppe_id
158         SAVE_LR
159         LOAD_REGS_0
160         HVCALL 69
161         STORE_REGS_0_1
162         LOAD_LR
163         blr
165 GLOBAL lv1_get_logical_partition_id
166         SAVE_LR
167         LOAD_REGS_0
168         HVCALL 74
169         STORE_REGS_0_1
170         LOAD_LR
171         blr
173 GLOBAL lv1_get_repository_node_value
174         SAVE_LR
175         LOAD_REGS_5
176         HVCALL 91
177         STORE_REGS_5_2
178         LOAD_LR
179         blr
181 GLOBAL lv1_panic
182         SAVE_LR
183         LOAD_REGS_8
184         HVCALL 255
185         LOAD_LR
186         blr