arch/powerpc/sysdev/qe_lib/qe.c

   1 /*
   2  * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Authors:     Shlomi Gridish <gridish@freescale.com>
   5  *              Li Yang <leoli@freescale.com>
   6  * Based on cpm2_common.c from Dan Malek (dmalek@jlc.net)
   7  *
   8  * Description:
   9  * General Purpose functions for the global management of the
  10  * QUICC Engine (QE).
  11  *
  12  * This program is free software; you can redistribute  it and/or modify it
  13  * under  the terms of  the GNU General  Public License as published by the
  14  * Free Software Foundation;  either version 2 of the  License, or (at your
  15  * option) any later version.
  16  */
  17 #include <linux/errno.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/param.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bootmem.h>
  25 #include <linux/module.h>
  26 #include <linux/delay.h>
  27 #include <linux/ioport.h>
  28 #include <linux/crc32.h>
  29 #include <asm/irq.h>
  30 #include <asm/page.h>
  31 #include <asm/pgtable.h>
  32 #include <asm/immap_qe.h>
  33 #include <asm/qe.h>
  34 #include <asm/prom.h>
  35 #include <asm/rheap.h>
  36
  37 static void qe_snums_init(void);
  38 static void qe_muram_init(void);
  39 static int qe_sdma_init(void);
  40
  41 static DEFINE_SPINLOCK(qe_lock);
  42
  43 /* QE snum state */
  44 enum qe_snum_state {
  45         QE_SNUM_STATE_USED,
  46         QE_SNUM_STATE_FREE
  47 };
  48
  49 /* QE snum */
  50 struct qe_snum {
  51         u8 num;
  52         enum qe_snum_state state;
  53 };
  54
  55 /* We allocate this here because it is used almost exclusively for
  56  * the communication processor devices.
  57  */
  58 struct qe_immap *qe_immr = NULL;
  59 EXPORT_SYMBOL(qe_immr);
  60
  61 static struct qe_snum snums[QE_NUM_OF_SNUM];    /* Dynamically allocated SNUMs */
  62
  63 static phys_addr_t qebase = -1;
  64
  65 phys_addr_t get_qe_base(void)
  66 {
  67         struct device_node *qe;
  68         unsigned int size;
  69         const u32 *prop;
  70
  71         if (qebase != -1)
  72                 return qebase;
  73
  74         qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
  75         if (!qe) {
  76                 qe = of_find_node_by_type(NULL, "qe");
  77                 if (!qe)
  78                         return qebase;
  79         }
  80
  81         prop = of_get_property(qe, "reg", &size);
  82         if (prop && size >= sizeof(*prop))
  83                 qebase = of_translate_address(qe, prop);
  84         of_node_put(qe);
  85
  86         return qebase;
  87 }
  88
  89 EXPORT_SYMBOL(get_qe_base);
  90
  91 void qe_reset(void)
  92 {
  93         if (qe_immr == NULL)
  94                 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
  95
  96         qe_snums_init();
  97
  98         qe_issue_cmd(QE_RESET, QE_CR_SUBBLOCK_INVALID,
  99                      QE_CR_PROTOCOL_UNSPECIFIED, 0);
 100
 101         /* Reclaim the MURAM memory for our use. */
 102         qe_muram_init();
 103
 104         if (qe_sdma_init())
 105                 panic("sdma init failed!");
 106 }
 107
 108 int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input)
 109 {
 110         unsigned long flags;
 111         u8 mcn_shift = 0, dev_shift = 0;
 112
 113         spin_lock_irqsave(&qe_lock, flags);
 114         if (cmd == QE_RESET) {
 115                 out_be32(&qe_immr->cp.cecr, (u32) (cmd | QE_CR_FLG));
 116         } else {
 117                 if (cmd == QE_ASSIGN_PAGE) {
 118                         /* Here device is the SNUM, not sub-block */
 119                         dev_shift = QE_CR_SNUM_SHIFT;
 120                 } else if (cmd == QE_ASSIGN_RISC) {
 121                         /* Here device is the SNUM, and mcnProtocol is
 122                          * e_QeCmdRiscAssignment value */
 123                         dev_shift = QE_CR_SNUM_SHIFT;
 124                         mcn_shift = QE_CR_MCN_RISC_ASSIGN_SHIFT;
 125                 } else {
 126                         if (device == QE_CR_SUBBLOCK_USB)
 127                                 mcn_shift = QE_CR_MCN_USB_SHIFT;
 128                         else
 129                                 mcn_shift = QE_CR_MCN_NORMAL_SHIFT;
 130                 }
 131
 132                 out_be32(&qe_immr->cp.cecdr, cmd_input);
 133                 out_be32(&qe_immr->cp.cecr,
 134                          (cmd | QE_CR_FLG | ((u32) device << dev_shift) | (u32)
 135                           mcn_protocol << mcn_shift));
 136         }
 137
 138         /* wait for the QE_CR_FLG to clear */
 139         while(in_be32(&qe_immr->cp.cecr) & QE_CR_FLG)
 140                 cpu_relax();
 141         spin_unlock_irqrestore(&qe_lock, flags);
 142
 143         return 0;
 144 }
 145 EXPORT_SYMBOL(qe_issue_cmd);
 146
 147 /* Set a baud rate generator. This needs lots of work. There are
 148  * 16 BRGs, which can be connected to the QE channels or output
 149  * as clocks. The BRGs are in two different block of internal
 150  * memory mapped space.
 151  * The BRG clock is the QE clock divided by 2.
 152  * It was set up long ago during the initial boot phase and is
 153  * is given to us.
 154  * Baud rate clocks are zero-based in the driver code (as that maps
 155  * to port numbers). Documentation uses 1-based numbering.
 156  */
 157 static unsigned int brg_clk = 0;
 158
 159 unsigned int get_brg_clk(void)
 160 {
 161         struct device_node *qe;
 162         unsigned int size;
 163         const u32 *prop;
 164
 165         if (brg_clk)
 166                 return brg_clk;
 167
 168         qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
 169         if (!qe) {
 170                 qe = of_find_node_by_type(NULL, "qe");
 171                 if (!qe)
 172                         return brg_clk;
 173         }
 174
 175         prop = of_get_property(qe, "brg-frequency", &size);
 176         if (prop && size == sizeof(*prop))
 177                 brg_clk = *prop;
 178
 179         of_node_put(qe);
 180
 181         return brg_clk;
 182 }
 183
 184 /* Program the BRG to the given sampling rate and multiplier
 185  *
 186  * @brg: the BRG, QE_BRG1 - QE_BRG16
 187  * @rate: the desired sampling rate
 188  * @multiplier: corresponds to the value programmed in GUMR_L[RDCR] or
 189  * GUMR_L[TDCR].  E.g., if this BRG is the RX clock, and GUMR_L[RDCR]=01,
 190  * then 'multiplier' should be 8.
 191  */
 192 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
 193 {
 194         u32 divisor, tempval;
 195         u32 div16 = 0;
 196
 197         if ((brg < QE_BRG1) || (brg > QE_BRG16))
 198                 return -EINVAL;
 199
 200         divisor = get_brg_clk() / (rate * multiplier);
 201
 202         if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
 203                 div16 = QE_BRGC_DIV16;
 204                 divisor /= 16;
 205         }
 206
 207         /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says
 208            that the BRG divisor must be even if you're not using divide-by-16
 209            mode. */
 210         if (!div16 && (divisor & 1))
 211                 divisor++;
 212
 213         tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
 214                 QE_BRGC_ENABLE | div16;
 215
 216         out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval);
 217
 218         return 0;
 219 }
 220 EXPORT_SYMBOL(qe_setbrg);
 221
 222 /* Convert a string to a QE clock source enum
 223  *
 224  * This function takes a string, typically from a property in the device
 225  * tree, and returns the corresponding "enum qe_clock" value.
 226 */
 227 enum qe_clock qe_clock_source(const char *source)
 228 {
 229         unsigned int i;
 230
 231         if (strcasecmp(source, "none") == 0)
 232                 return QE_CLK_NONE;
 233
 234         if (strncasecmp(source, "brg", 3) == 0) {
 235                 i = simple_strtoul(source + 3, NULL, 10);
 236                 if ((i >= 1) && (i <= 16))
 237                         return (QE_BRG1 - 1) + i;
 238                 else
 239                         return QE_CLK_DUMMY;
 240         }
 241
 242         if (strncasecmp(source, "clk", 3) == 0) {
 243                 i = simple_strtoul(source + 3, NULL, 10);
 244                 if ((i >= 1) && (i <= 24))
 245                         return (QE_CLK1 - 1) + i;
 246                 else
 247                         return QE_CLK_DUMMY;
 248         }
 249
 250         return QE_CLK_DUMMY;
 251 }
 252 EXPORT_SYMBOL(qe_clock_source);
 253
 254 /* Initialize SNUMs (thread serial numbers) according to
 255  * QE Module Control chapter, SNUM table
 256  */
 257 static void qe_snums_init(void)
 258 {
 259         int i;
 260         static const u8 snum_init[] = {
 261                 0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
 262                 0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
 263                 0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
 264                 0xD8, 0xD9, 0xE8, 0xE9,
 265         };
 266
 267         for (i = 0; i < QE_NUM_OF_SNUM; i++) {
 268                 snums[i].num = snum_init[i];
 269                 snums[i].state = QE_SNUM_STATE_FREE;
 270         }
 271 }
 272
 273 int qe_get_snum(void)
 274 {
 275         unsigned long flags;
 276         int snum = -EBUSY;
 277         int i;
 278
 279         spin_lock_irqsave(&qe_lock, flags);
 280         for (i = 0; i < QE_NUM_OF_SNUM; i++) {
 281                 if (snums[i].state == QE_SNUM_STATE_FREE) {
 282                         snums[i].state = QE_SNUM_STATE_USED;
 283                         snum = snums[i].num;
 284                         break;
 285                 }
 286         }
 287         spin_unlock_irqrestore(&qe_lock, flags);
 288
 289         return snum;
 290 }
 291 EXPORT_SYMBOL(qe_get_snum);
 292
 293 void qe_put_snum(u8 snum)
 294 {
 295         int i;
 296
 297         for (i = 0; i < QE_NUM_OF_SNUM; i++) {
 298                 if (snums[i].num == snum) {
 299                         snums[i].state = QE_SNUM_STATE_FREE;
 300                         break;
 301                 }
 302         }
 303 }
 304 EXPORT_SYMBOL(qe_put_snum);
 305
 306 static int qe_sdma_init(void)
 307 {
 308         struct sdma *sdma = &qe_immr->sdma;
 309         unsigned long sdma_buf_offset;
 310
 311         if (!sdma)
 312                 return -ENODEV;
 313
 314         /* allocate 2 internal temporary buffers (512 bytes size each) for
 315          * the SDMA */
 316         sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
 317         if (IS_ERR_VALUE(sdma_buf_offset))
 318                 return -ENOMEM;
 319
 320         out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK);
 321         out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |
 322                                         (0x1 << QE_SDMR_CEN_SHIFT)));
 323
 324         return 0;
 325 }
 326
 327 /*
 328  * muram_alloc / muram_free bits.
 329  */
 330 static DEFINE_SPINLOCK(qe_muram_lock);
 331
 332 /* 16 blocks should be enough to satisfy all requests
 333  * until the memory subsystem goes up... */
 334 static rh_block_t qe_boot_muram_rh_block[16];
 335 static rh_info_t qe_muram_info;
 336
 337 static void qe_muram_init(void)
 338 {
 339         struct device_node *np;
 340         const u32 *address;
 341         u64 size;
 342         unsigned int flags;
 343
 344         /* initialize the info header */
 345         rh_init(&qe_muram_info, 1,
 346                 sizeof(qe_boot_muram_rh_block) /
 347                 sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
 348
 349         /* Attach the usable muram area */
 350         /* XXX: This is a subset of the available muram. It
 351          * varies with the processor and the microcode patches activated.
 352          */
 353         np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
 354         if (!np) {
 355                 np = of_find_node_by_name(NULL, "data-only");
 356                 if (!np) {
 357                         WARN_ON(1);
 358                         return;
 359                 }
 360         }
 361
 362         address = of_get_address(np, 0, &size, &flags);
 363         WARN_ON(!address);
 364
 365         of_node_put(np);
 366         if (address)
 367                 rh_attach_region(&qe_muram_info, *address, (int)size);
 368 }
 369
 370 /* This function returns an index into the MURAM area.
 371  */
 372 unsigned long qe_muram_alloc(int size, int align)
 373 {
 374         unsigned long start;
 375         unsigned long flags;
 376
 377         spin_lock_irqsave(&qe_muram_lock, flags);
 378         start = rh_alloc_align(&qe_muram_info, size, align, "QE");
 379         spin_unlock_irqrestore(&qe_muram_lock, flags);
 380
 381         return start;
 382 }
 383 EXPORT_SYMBOL(qe_muram_alloc);
 384
 385 int qe_muram_free(unsigned long offset)
 386 {
 387         int ret;
 388         unsigned long flags;
 389
 390         spin_lock_irqsave(&qe_muram_lock, flags);
 391         ret = rh_free(&qe_muram_info, offset);
 392         spin_unlock_irqrestore(&qe_muram_lock, flags);
 393
 394         return ret;
 395 }
 396 EXPORT_SYMBOL(qe_muram_free);
 397
 398 /* not sure if this is ever needed */
 399 unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
 400 {
 401         unsigned long start;
 402         unsigned long flags;
 403
 404         spin_lock_irqsave(&qe_muram_lock, flags);
 405         start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
 406         spin_unlock_irqrestore(&qe_muram_lock, flags);
 407
 408         return start;
 409 }
 410 EXPORT_SYMBOL(qe_muram_alloc_fixed);
 411
 412 void qe_muram_dump(void)
 413 {
 414         rh_dump(&qe_muram_info);
 415 }
 416 EXPORT_SYMBOL(qe_muram_dump);
 417
 418 void *qe_muram_addr(unsigned long offset)
 419 {
 420         return (void *)&qe_immr->muram[offset];
 421 }
 422 EXPORT_SYMBOL(qe_muram_addr);
 423
 424 /* The maximum number of RISCs we support */
 425 #define MAX_QE_RISC     2
 426
 427 /* Firmware information stored here for qe_get_firmware_info() */
 428 static struct qe_firmware_info qe_firmware_info;
 429
 430 /*
 431  * Set to 1 if QE firmware has been uploaded, and therefore
 432  * qe_firmware_info contains valid data.
 433  */
 434 static int qe_firmware_uploaded;
 435
 436 /*
 437  * Upload a QE microcode
 438  *
 439  * This function is a worker function for qe_upload_firmware().  It does
 440  * the actual uploading of the microcode.
 441  */
 442 static void qe_upload_microcode(const void *base,
 443         const struct qe_microcode *ucode)
 444 {
 445         const __be32 *code = base + be32_to_cpu(ucode->code_offset);
 446         unsigned int i;
 447
 448         if (ucode->major || ucode->minor || ucode->revision)
 449                 printk(KERN_INFO "qe-firmware: "
 450                         "uploading microcode '%s' version %u.%u.%u\n",
 451                         ucode->id, ucode->major, ucode->minor, ucode->revision);
 452         else
 453                 printk(KERN_INFO "qe-firmware: "
 454                         "uploading microcode '%s'\n", ucode->id);
 455
 456         /* Use auto-increment */
 457         out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) |
 458                 QE_IRAM_IADD_AIE | QE_IRAM_IADD_BADDR);
 459
 460         for (i = 0; i < be32_to_cpu(ucode->count); i++)
 461                 out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
 462 }
 463
 464 /*
 465  * Upload a microcode to the I-RAM at a specific address.
 466  *
 467  * See Documentation/powerpc/qe-firmware.txt for information on QE microcode
 468  * uploading.
 469  *
 470  * Currently, only version 1 is supported, so the 'version' field must be
 471  * set to 1.
 472  *
 473  * The SOC model and revision are not validated, they are only displayed for
 474  * informational purposes.
 475  *
 476  * 'calc_size' is the calculated size, in bytes, of the firmware structure and
 477  * all of the microcode structures, minus the CRC.
 478  *
 479  * 'length' is the size that the structure says it is, including the CRC.
 480  */
 481 int qe_upload_firmware(const struct qe_firmware *firmware)
 482 {
 483         unsigned int i;
 484         unsigned int j;
 485         u32 crc;
 486         size_t calc_size = sizeof(struct qe_firmware);
 487         size_t length;
 488         const struct qe_header *hdr;
 489
 490         if (!firmware) {
 491                 printk(KERN_ERR "qe-firmware: invalid pointer\n");
 492                 return -EINVAL;
 493         }
 494
 495         hdr = &firmware->header;
 496         length = be32_to_cpu(hdr->length);
 497
 498         /* Check the magic */
 499         if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
 500             (hdr->magic[2] != 'F')) {
 501                 printk(KERN_ERR "qe-firmware: not a microcode\n");
 502                 return -EPERM;
 503         }
 504
 505         /* Check the version */
 506         if (hdr->version != 1) {
 507                 printk(KERN_ERR "qe-firmware: unsupported version\n");
 508                 return -EPERM;
 509         }
 510
 511         /* Validate some of the fields */
 512 <<<<<<< HEAD:arch/powerpc/sysdev/qe_lib/qe.c
 513         if ((firmware->count < 1) || (firmware->count >= MAX_QE_RISC)) {
 514 =======
 515         if ((firmware->count < 1) || (firmware->count > MAX_QE_RISC)) {
 516 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/sysdev/qe_lib/qe.c
 517                 printk(KERN_ERR "qe-firmware: invalid data\n");
 518                 return -EINVAL;
 519         }
 520
 521         /* Validate the length and check if there's a CRC */
 522         calc_size += (firmware->count - 1) * sizeof(struct qe_microcode);
 523
 524         for (i = 0; i < firmware->count; i++)
 525                 /*
 526                  * For situations where the second RISC uses the same microcode
 527                  * as the first, the 'code_offset' and 'count' fields will be
 528                  * zero, so it's okay to add those.
 529                  */
 530                 calc_size += sizeof(__be32) *
 531                         be32_to_cpu(firmware->microcode[i].count);
 532
 533         /* Validate the length */
 534         if (length != calc_size + sizeof(__be32)) {
 535                 printk(KERN_ERR "qe-firmware: invalid length\n");
 536                 return -EPERM;
 537         }
 538
 539         /* Validate the CRC */
 540         crc = be32_to_cpu(*(__be32 *)((void *)firmware + calc_size));
 541         if (crc != crc32(0, firmware, calc_size)) {
 542                 printk(KERN_ERR "qe-firmware: firmware CRC is invalid\n");
 543                 return -EIO;
 544         }
 545
 546         /*
 547          * If the microcode calls for it, split the I-RAM.
 548          */
 549         if (!firmware->split)
 550                 setbits16(&qe_immr->cp.cercr, QE_CP_CERCR_CIR);
 551
 552         if (firmware->soc.model)
 553                 printk(KERN_INFO
 554                         "qe-firmware: firmware '%s' for %u V%u.%u\n",
 555                         firmware->id, be16_to_cpu(firmware->soc.model),
 556                         firmware->soc.major, firmware->soc.minor);
 557         else
 558                 printk(KERN_INFO "qe-firmware: firmware '%s'\n",
 559                         firmware->id);
 560
 561         /*
 562          * The QE only supports one microcode per RISC, so clear out all the
 563          * saved microcode information and put in the new.
 564          */
 565         memset(&qe_firmware_info, 0, sizeof(qe_firmware_info));
 566         strcpy(qe_firmware_info.id, firmware->id);
 567         qe_firmware_info.extended_modes = firmware->extended_modes;
 568         memcpy(qe_firmware_info.vtraps, firmware->vtraps,
 569                 sizeof(firmware->vtraps));
 570
 571         /* Loop through each microcode. */
 572         for (i = 0; i < firmware->count; i++) {
 573                 const struct qe_microcode *ucode = &firmware->microcode[i];
 574
 575                 /* Upload a microcode if it's present */
 576                 if (ucode->code_offset)
 577                         qe_upload_microcode(firmware, ucode);
 578
 579                 /* Program the traps for this processor */
 580                 for (j = 0; j < 16; j++) {
 581                         u32 trap = be32_to_cpu(ucode->traps[j]);
 582
 583                         if (trap)
 584                                 out_be32(&qe_immr->rsp[i].tibcr[j], trap);
 585                 }
 586
 587                 /* Enable traps */
 588                 out_be32(&qe_immr->rsp[i].eccr, be32_to_cpu(ucode->eccr));
 589         }
 590
 591         qe_firmware_uploaded = 1;
 592
 593         return 0;
 594 }
 595 EXPORT_SYMBOL(qe_upload_firmware);
 596
 597 /*
 598  * Get info on the currently-loaded firmware
 599  *
 600  * This function also checks the device tree to see if the boot loader has
 601  * uploaded a firmware already.
 602  */
 603 struct qe_firmware_info *qe_get_firmware_info(void)
 604 {
 605         static int initialized;
 606         struct property *prop;
 607         struct device_node *qe;
 608         struct device_node *fw = NULL;
 609         const char *sprop;
 610         unsigned int i;
 611
 612         /*
 613          * If we haven't checked yet, and a driver hasn't uploaded a firmware
 614          * yet, then check the device tree for information.
 615          */
 616 <<<<<<< HEAD:arch/powerpc/sysdev/qe_lib/qe.c
 617         if (initialized || qe_firmware_uploaded)
 618 =======
 619         if (qe_firmware_uploaded)
 620                 return &qe_firmware_info;
 621
 622         if (initialized)
 623 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/powerpc/sysdev/qe_lib/qe.c
 624                 return NULL;
 625
 626         initialized = 1;
 627
 628         /*
 629          * Newer device trees have an "fsl,qe" compatible property for the QE
 630          * node, but we still need to support older device trees.
 631         */
 632         qe = of_find_compatible_node(NULL, NULL, "fsl,qe");
 633         if (!qe) {
 634                 qe = of_find_node_by_type(NULL, "qe");
 635                 if (!qe)
 636                         return NULL;
 637         }
 638
 639         /* Find the 'firmware' child node */
 640         for_each_child_of_node(qe, fw) {
 641                 if (strcmp(fw->name, "firmware") == 0)
 642                         break;
 643         }
 644
 645         of_node_put(qe);
 646
 647         /* Did we find the 'firmware' node? */
 648         if (!fw)
 649                 return NULL;
 650
 651         qe_firmware_uploaded = 1;
 652
 653         /* Copy the data into qe_firmware_info*/
 654         sprop = of_get_property(fw, "id", NULL);
 655         if (sprop)
 656                 strncpy(qe_firmware_info.id, sprop,
 657                         sizeof(qe_firmware_info.id) - 1);
 658
 659         prop = of_find_property(fw, "extended-modes", NULL);
 660         if (prop && (prop->length == sizeof(u64))) {
 661                 const u64 *iprop = prop->value;
 662
 663                 qe_firmware_info.extended_modes = *iprop;
 664         }
 665
 666         prop = of_find_property(fw, "virtual-traps", NULL);
 667         if (prop && (prop->length == 32)) {
 668                 const u32 *iprop = prop->value;
 669
 670                 for (i = 0; i < ARRAY_SIZE(qe_firmware_info.vtraps); i++)
 671                         qe_firmware_info.vtraps[i] = iprop[i];
 672         }
 673
 674         of_node_put(fw);
 675
 676         return &qe_firmware_info;
 677 }
 678 EXPORT_SYMBOL(qe_get_firmware_info);
 679