Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / arch / x86 / kernel / tsc_32.c
blob2c6f0189b065104f205083fee85c8cd0d04dd90c
1 #include <linux/sched.h>
2 #include <linux/clocksource.h>
3 #include <linux/workqueue.h>
4 #include <linux/cpufreq.h>
5 #include <linux/jiffies.h>
6 #include <linux/init.h>
7 #include <linux/dmi.h>
8 #include <linux/percpu.h>
10 #include <asm/delay.h>
11 #include <asm/tsc.h>
12 #include <asm/io.h>
13 #include <asm/timer.h>
15 #include "mach_timer.h"
17 static int tsc_enabled;
20 * On some systems the TSC frequency does not
21 * change with the cpu frequency. So we need
22 * an extra value to store the TSC freq
24 unsigned int tsc_khz;
25 EXPORT_SYMBOL_GPL(tsc_khz);
27 #ifdef CONFIG_X86_TSC
28 static int __init tsc_setup(char *str)
30 printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
31 <<<<<<< HEAD:arch/x86/kernel/tsc_32.c
32 "cannot disable TSC.\n");
33 =======
34 "cannot disable TSC completely.\n");
35 mark_tsc_unstable("user disabled TSC");
36 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kernel/tsc_32.c
37 return 1;
39 #else
41 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
42 * in cpu/common.c
44 static int __init tsc_setup(char *str)
46 setup_clear_cpu_cap(X86_FEATURE_TSC);
47 return 1;
49 #endif
51 __setup("notsc", tsc_setup);
54 * code to mark and check if the TSC is unstable
55 * due to cpufreq or due to unsynced TSCs
57 static int tsc_unstable;
59 int check_tsc_unstable(void)
61 return tsc_unstable;
63 EXPORT_SYMBOL_GPL(check_tsc_unstable);
65 /* Accelerators for sched_clock()
66 * convert from cycles(64bits) => nanoseconds (64bits)
67 * basic equation:
68 * ns = cycles / (freq / ns_per_sec)
69 * ns = cycles * (ns_per_sec / freq)
70 * ns = cycles * (10^9 / (cpu_khz * 10^3))
71 * ns = cycles * (10^6 / cpu_khz)
73 * Then we use scaling math (suggested by george@mvista.com) to get:
74 * ns = cycles * (10^6 * SC / cpu_khz) / SC
75 * ns = cycles * cyc2ns_scale / SC
77 * And since SC is a constant power of two, we can convert the div
78 * into a shift.
80 * We can use khz divisor instead of mhz to keep a better precision, since
81 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
82 * (mathieu.desnoyers@polymtl.ca)
84 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
87 DEFINE_PER_CPU(unsigned long, cyc2ns);
89 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
91 unsigned long flags, prev_scale, *scale;
92 unsigned long long tsc_now, ns_now;
94 local_irq_save(flags);
95 sched_clock_idle_sleep_event();
97 scale = &per_cpu(cyc2ns, cpu);
99 rdtscll(tsc_now);
100 ns_now = __cycles_2_ns(tsc_now);
102 prev_scale = *scale;
103 if (cpu_khz)
104 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
107 * Start smoothly with the new frequency:
109 sched_clock_idle_wakeup_event(0);
110 local_irq_restore(flags);
114 * Scheduler clock - returns current time in nanosec units.
116 unsigned long long native_sched_clock(void)
118 unsigned long long this_offset;
121 * Fall back to jiffies if there's no TSC available:
122 * ( But note that we still use it if the TSC is marked
123 * unstable. We do this because unlike Time Of Day,
124 * the scheduler clock tolerates small errors and it's
125 * very important for it to be as fast as the platform
126 * can achive it. )
128 if (unlikely(!tsc_enabled && !tsc_unstable))
129 /* No locking but a rare wrong value is not a big deal: */
130 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
132 /* read the Time Stamp Counter: */
133 rdtscll(this_offset);
135 /* return the value in ns */
136 return cycles_2_ns(this_offset);
139 /* We need to define a real function for sched_clock, to override the
140 weak default version */
141 #ifdef CONFIG_PARAVIRT
142 unsigned long long sched_clock(void)
144 return paravirt_sched_clock();
146 #else
147 unsigned long long sched_clock(void)
148 __attribute__((alias("native_sched_clock")));
149 #endif
151 unsigned long native_calculate_cpu_khz(void)
153 unsigned long long start, end;
154 unsigned long count;
155 u64 delta64 = (u64)ULLONG_MAX;
156 int i;
157 unsigned long flags;
159 local_irq_save(flags);
161 /* run 3 times to ensure the cache is warm and to get an accurate reading */
162 for (i = 0; i < 3; i++) {
163 mach_prepare_counter();
164 rdtscll(start);
165 mach_countup(&count);
166 rdtscll(end);
169 * Error: ECTCNEVERSET
170 * The CTC wasn't reliable: we got a hit on the very first read,
171 * or the CPU was so fast/slow that the quotient wouldn't fit in
172 * 32 bits..
174 if (count <= 1)
175 continue;
177 /* cpu freq too slow: */
178 if ((end - start) <= CALIBRATE_TIME_MSEC)
179 continue;
182 * We want the minimum time of all runs in case one of them
183 * is inaccurate due to SMI or other delay
185 delta64 = min(delta64, (end - start));
188 /* cpu freq too fast (or every run was bad): */
189 if (delta64 > (1ULL<<32))
190 goto err;
192 delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
193 do_div(delta64,CALIBRATE_TIME_MSEC);
195 local_irq_restore(flags);
196 return (unsigned long)delta64;
197 err:
198 local_irq_restore(flags);
199 return 0;
202 int recalibrate_cpu_khz(void)
204 #ifndef CONFIG_SMP
205 unsigned long cpu_khz_old = cpu_khz;
207 if (cpu_has_tsc) {
208 cpu_khz = calculate_cpu_khz();
209 tsc_khz = cpu_khz;
210 cpu_data(0).loops_per_jiffy =
211 cpufreq_scale(cpu_data(0).loops_per_jiffy,
212 cpu_khz_old, cpu_khz);
213 return 0;
214 } else
215 return -ENODEV;
216 #else
217 return -ENODEV;
218 #endif
221 EXPORT_SYMBOL(recalibrate_cpu_khz);
223 #ifdef CONFIG_CPU_FREQ
226 * if the CPU frequency is scaled, TSC-based delays will need a different
227 * loops_per_jiffy value to function properly.
229 static unsigned int ref_freq = 0;
230 static unsigned long loops_per_jiffy_ref = 0;
231 static unsigned long cpu_khz_ref = 0;
233 static int
234 time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
236 struct cpufreq_freqs *freq = data;
238 if (!ref_freq) {
239 if (!freq->old){
240 ref_freq = freq->new;
241 return 0;
243 ref_freq = freq->old;
244 loops_per_jiffy_ref = cpu_data(freq->cpu).loops_per_jiffy;
245 cpu_khz_ref = cpu_khz;
248 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
249 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
250 (val == CPUFREQ_RESUMECHANGE)) {
251 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
252 cpu_data(freq->cpu).loops_per_jiffy =
253 cpufreq_scale(loops_per_jiffy_ref,
254 ref_freq, freq->new);
256 if (cpu_khz) {
258 if (num_online_cpus() == 1)
259 cpu_khz = cpufreq_scale(cpu_khz_ref,
260 ref_freq, freq->new);
261 if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
262 tsc_khz = cpu_khz;
263 preempt_disable();
264 set_cyc2ns_scale(cpu_khz, smp_processor_id());
265 preempt_enable();
267 * TSC based sched_clock turns
268 * to junk w/ cpufreq
270 mark_tsc_unstable("cpufreq changes");
275 return 0;
278 static struct notifier_block time_cpufreq_notifier_block = {
279 .notifier_call = time_cpufreq_notifier
282 static int __init cpufreq_tsc(void)
284 return cpufreq_register_notifier(&time_cpufreq_notifier_block,
285 CPUFREQ_TRANSITION_NOTIFIER);
287 core_initcall(cpufreq_tsc);
289 #endif
291 /* clock source code */
293 static unsigned long current_tsc_khz = 0;
295 static cycle_t read_tsc(void)
297 cycle_t ret;
299 rdtscll(ret);
301 return ret;
304 static struct clocksource clocksource_tsc = {
305 .name = "tsc",
306 .rating = 300,
307 .read = read_tsc,
308 .mask = CLOCKSOURCE_MASK(64),
309 .mult = 0, /* to be set */
310 .shift = 22,
311 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
312 CLOCK_SOURCE_MUST_VERIFY,
315 void mark_tsc_unstable(char *reason)
317 if (!tsc_unstable) {
318 tsc_unstable = 1;
319 tsc_enabled = 0;
320 printk("Marking TSC unstable due to: %s.\n", reason);
321 /* Can be called before registration */
322 if (clocksource_tsc.mult)
323 clocksource_change_rating(&clocksource_tsc, 0);
324 else
325 clocksource_tsc.rating = 0;
328 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
330 static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
332 printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
333 d->ident);
334 tsc_unstable = 1;
335 return 0;
338 /* List of systems that have known TSC problems */
339 static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
341 .callback = dmi_mark_tsc_unstable,
342 .ident = "IBM Thinkpad 380XD",
343 .matches = {
344 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
345 DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
352 * Make an educated guess if the TSC is trustworthy and synchronized
353 * over all CPUs.
355 __cpuinit int unsynchronized_tsc(void)
357 if (!cpu_has_tsc || tsc_unstable)
358 return 1;
360 /* Anything with constant TSC should be synchronized */
361 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
362 return 0;
365 * Intel systems are normally all synchronized.
366 * Exceptions must mark TSC as unstable:
368 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
369 /* assume multi socket systems are not synchronized: */
370 if (num_possible_cpus() > 1)
371 tsc_unstable = 1;
373 return tsc_unstable;
377 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
379 #ifdef CONFIG_MGEODE_LX
380 /* RTSC counts during suspend */
381 #define RTSC_SUSP 0x100
383 static void __init check_geode_tsc_reliable(void)
385 unsigned long res_low, res_high;
387 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
388 if (res_low & RTSC_SUSP)
389 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
391 #else
392 static inline void check_geode_tsc_reliable(void) { }
393 #endif
396 void __init tsc_init(void)
398 int cpu;
400 if (!cpu_has_tsc)
401 goto out_no_tsc;
403 cpu_khz = calculate_cpu_khz();
404 tsc_khz = cpu_khz;
406 if (!cpu_khz)
407 goto out_no_tsc;
409 printk("Detected %lu.%03lu MHz processor.\n",
410 (unsigned long)cpu_khz / 1000,
411 (unsigned long)cpu_khz % 1000);
414 * Secondary CPUs do not run through tsc_init(), so set up
415 * all the scale factors for all CPUs, assuming the same
416 * speed as the bootup CPU. (cpufreq notifiers will fix this
417 * up if their speed diverges)
419 for_each_possible_cpu(cpu)
420 set_cyc2ns_scale(cpu_khz, cpu);
422 use_tsc_delay();
424 /* Check and install the TSC clocksource */
425 dmi_check_system(bad_tsc_dmi_table);
427 unsynchronized_tsc();
428 check_geode_tsc_reliable();
429 current_tsc_khz = tsc_khz;
430 clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
431 clocksource_tsc.shift);
432 /* lower the rating if we already know its unstable: */
433 if (check_tsc_unstable()) {
434 clocksource_tsc.rating = 0;
435 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
436 } else
437 tsc_enabled = 1;
439 clocksource_register(&clocksource_tsc);
441 return;
443 out_no_tsc:
444 setup_clear_cpu_cap(X86_FEATURE_TSC);