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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / arch / x86 / kvm / x86.c
blob953dc9d29c5207ef440023dd30098d22d42196fa
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Avi Kivity <avi@qumranet.com>
10 * Yaniv Kamay <yaniv@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
17 #include <linux/kvm_host.h>
18 #include "segment_descriptor.h"
19 #include "irq.h"
20 #include "mmu.h"
21
22 #include <linux/kvm.h>
23 #include <linux/fs.h>
24 #include <linux/vmalloc.h>
25 #include <linux/module.h>
26 #include <linux/mman.h>
27 #include <linux/highmem.h>
28
29 #include <asm/uaccess.h>
30 #include <asm/msr.h>
31
32 #define MAX_IO_MSRS 256
33 #define CR0_RESERVED_BITS \
34 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
35 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
36 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
37 #define CR4_RESERVED_BITS \
38 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
39 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
40 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
41 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
42
43 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
44 #define EFER_RESERVED_BITS 0xfffffffffffff2fe
45
46 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
47 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
48
49 <<<<<<< HEAD:arch/x86/kvm/x86.c
50 =======
51 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
52 struct kvm_cpuid_entry2 __user *entries);
53
54 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
55 struct kvm_x86_ops *kvm_x86_ops;
56
57 struct kvm_stats_debugfs_item debugfs_entries[] = {
58 { "pf_fixed", VCPU_STAT(pf_fixed) },
59 { "pf_guest", VCPU_STAT(pf_guest) },
60 { "tlb_flush", VCPU_STAT(tlb_flush) },
61 { "invlpg", VCPU_STAT(invlpg) },
62 { "exits", VCPU_STAT(exits) },
63 { "io_exits", VCPU_STAT(io_exits) },
64 { "mmio_exits", VCPU_STAT(mmio_exits) },
65 { "signal_exits", VCPU_STAT(signal_exits) },
66 { "irq_window", VCPU_STAT(irq_window_exits) },
67 { "halt_exits", VCPU_STAT(halt_exits) },
68 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
69 { "request_irq", VCPU_STAT(request_irq_exits) },
70 { "irq_exits", VCPU_STAT(irq_exits) },
71 { "host_state_reload", VCPU_STAT(host_state_reload) },
72 { "efer_reload", VCPU_STAT(efer_reload) },
73 { "fpu_reload", VCPU_STAT(fpu_reload) },
74 { "insn_emulation", VCPU_STAT(insn_emulation) },
75 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
76 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
77 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
78 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
79 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
80 { "mmu_flooded", VM_STAT(mmu_flooded) },
81 { "mmu_recycled", VM_STAT(mmu_recycled) },
82 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
83 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
84 { NULL }
85 };
86
87
88 unsigned long segment_base(u16 selector)
89 {
90 struct descriptor_table gdt;
91 struct segment_descriptor *d;
92 unsigned long table_base;
93 unsigned long v;
94
95 if (selector == 0)
96 return 0;
97
98 asm("sgdt %0" : "=m"(gdt));
99 table_base = gdt.base;
100
101 if (selector & 4) { /* from ldt */
102 u16 ldt_selector;
103
104 asm("sldt %0" : "=g"(ldt_selector));
105 table_base = segment_base(ldt_selector);
106 }
107 d = (struct segment_descriptor *)(table_base + (selector & ~7));
108 v = d->base_low | ((unsigned long)d->base_mid << 16) |
109 ((unsigned long)d->base_high << 24);
110 #ifdef CONFIG_X86_64
111 if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
112 v |= ((unsigned long) \
113 ((struct segment_descriptor_64 *)d)->base_higher) << 32;
114 #endif
115 return v;
116 }
117 EXPORT_SYMBOL_GPL(segment_base);
118
119 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
120 {
121 if (irqchip_in_kernel(vcpu->kvm))
122 return vcpu->arch.apic_base;
123 else
124 return vcpu->arch.apic_base;
125 }
126 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
127
128 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
129 {
130 /* TODO: reserve bits check */
131 if (irqchip_in_kernel(vcpu->kvm))
132 kvm_lapic_set_base(vcpu, data);
133 else
134 vcpu->arch.apic_base = data;
135 }
136 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
137
138 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
139 {
140 WARN_ON(vcpu->arch.exception.pending);
141 vcpu->arch.exception.pending = true;
142 vcpu->arch.exception.has_error_code = false;
143 vcpu->arch.exception.nr = nr;
144 }
145 EXPORT_SYMBOL_GPL(kvm_queue_exception);
146
147 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
148 u32 error_code)
149 {
150 ++vcpu->stat.pf_guest;
151 if (vcpu->arch.exception.pending && vcpu->arch.exception.nr == PF_VECTOR) {
152 printk(KERN_DEBUG "kvm: inject_page_fault:"
153 " double fault 0x%lx\n", addr);
154 vcpu->arch.exception.nr = DF_VECTOR;
155 vcpu->arch.exception.error_code = 0;
156 return;
157 }
158 vcpu->arch.cr2 = addr;
159 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
160 }
161
162 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
163 {
164 WARN_ON(vcpu->arch.exception.pending);
165 vcpu->arch.exception.pending = true;
166 vcpu->arch.exception.has_error_code = true;
167 vcpu->arch.exception.nr = nr;
168 vcpu->arch.exception.error_code = error_code;
169 }
170 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
171
172 static void __queue_exception(struct kvm_vcpu *vcpu)
173 {
174 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
175 vcpu->arch.exception.has_error_code,
176 vcpu->arch.exception.error_code);
177 }
178
179 /*
180 * Load the pae pdptrs. Return true is they are all valid.
181 */
182 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
183 {
184 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
185 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
186 int i;
187 int ret;
188 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
189
190 <<<<<<< HEAD:arch/x86/kvm/x86.c
191 down_read(&current->mm->mmap_sem);
192 =======
193 down_read(&vcpu->kvm->slots_lock);
194 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
195 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
196 offset * sizeof(u64), sizeof(pdpte));
197 if (ret < 0) {
198 ret = 0;
199 goto out;
200 }
201 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
202 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
203 ret = 0;
204 goto out;
205 }
206 }
207 ret = 1;
208
209 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
210 out:
211 <<<<<<< HEAD:arch/x86/kvm/x86.c
212 up_read(&current->mm->mmap_sem);
213 =======
214 up_read(&vcpu->kvm->slots_lock);
215 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
216
217 return ret;
218 }
219
220 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
221 {
222 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
223 bool changed = true;
224 int r;
225
226 if (is_long_mode(vcpu) || !is_pae(vcpu))
227 return false;
228
229 <<<<<<< HEAD:arch/x86/kvm/x86.c
230 down_read(&current->mm->mmap_sem);
231 =======
232 down_read(&vcpu->kvm->slots_lock);
233 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
234 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
235 if (r < 0)
236 goto out;
237 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
238 out:
239 <<<<<<< HEAD:arch/x86/kvm/x86.c
240 up_read(&current->mm->mmap_sem);
241 =======
242 up_read(&vcpu->kvm->slots_lock);
243 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
244
245 return changed;
246 }
247
248 void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
249 {
250 if (cr0 & CR0_RESERVED_BITS) {
251 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
252 cr0, vcpu->arch.cr0);
253 kvm_inject_gp(vcpu, 0);
254 return;
255 }
256
257 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
258 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
259 kvm_inject_gp(vcpu, 0);
260 return;
261 }
262
263 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
264 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
265 "and a clear PE flag\n");
266 kvm_inject_gp(vcpu, 0);
267 return;
268 }
269
270 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
271 #ifdef CONFIG_X86_64
272 if ((vcpu->arch.shadow_efer & EFER_LME)) {
273 int cs_db, cs_l;
274
275 if (!is_pae(vcpu)) {
276 printk(KERN_DEBUG "set_cr0: #GP, start paging "
277 "in long mode while PAE is disabled\n");
278 kvm_inject_gp(vcpu, 0);
279 return;
280 }
281 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
282 if (cs_l) {
283 printk(KERN_DEBUG "set_cr0: #GP, start paging "
284 "in long mode while CS.L == 1\n");
285 kvm_inject_gp(vcpu, 0);
286 return;
287
288 }
289 } else
290 #endif
291 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
292 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
293 "reserved bits\n");
294 kvm_inject_gp(vcpu, 0);
295 return;
296 }
297
298 }
299
300 kvm_x86_ops->set_cr0(vcpu, cr0);
301 vcpu->arch.cr0 = cr0;
302
303 kvm_mmu_reset_context(vcpu);
304 return;
305 }
306 EXPORT_SYMBOL_GPL(set_cr0);
307
308 void lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
309 {
310 set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
311 }
312 EXPORT_SYMBOL_GPL(lmsw);
313
314 void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
315 {
316 if (cr4 & CR4_RESERVED_BITS) {
317 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
318 kvm_inject_gp(vcpu, 0);
319 return;
320 }
321
322 if (is_long_mode(vcpu)) {
323 if (!(cr4 & X86_CR4_PAE)) {
324 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
325 "in long mode\n");
326 kvm_inject_gp(vcpu, 0);
327 return;
328 }
329 } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
330 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
331 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
332 kvm_inject_gp(vcpu, 0);
333 return;
334 }
335
336 if (cr4 & X86_CR4_VMXE) {
337 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
338 kvm_inject_gp(vcpu, 0);
339 return;
340 }
341 kvm_x86_ops->set_cr4(vcpu, cr4);
342 vcpu->arch.cr4 = cr4;
343 kvm_mmu_reset_context(vcpu);
344 }
345 EXPORT_SYMBOL_GPL(set_cr4);
346
347 void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
348 {
349 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
350 kvm_mmu_flush_tlb(vcpu);
351 return;
352 }
353
354 if (is_long_mode(vcpu)) {
355 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
356 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
357 kvm_inject_gp(vcpu, 0);
358 return;
359 }
360 } else {
361 if (is_pae(vcpu)) {
362 if (cr3 & CR3_PAE_RESERVED_BITS) {
363 printk(KERN_DEBUG
364 "set_cr3: #GP, reserved bits\n");
365 kvm_inject_gp(vcpu, 0);
366 return;
367 }
368 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
369 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
370 "reserved bits\n");
371 kvm_inject_gp(vcpu, 0);
372 return;
373 }
374 }
375 /*
376 * We don't check reserved bits in nonpae mode, because
377 * this isn't enforced, and VMware depends on this.
378 */
379 }
380
381 <<<<<<< HEAD:arch/x86/kvm/x86.c
382 down_read(&current->mm->mmap_sem);
383 =======
384 down_read(&vcpu->kvm->slots_lock);
385 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
386 /*
387 * Does the new cr3 value map to physical memory? (Note, we
388 * catch an invalid cr3 even in real-mode, because it would
389 * cause trouble later on when we turn on paging anyway.)
390 *
391 * A real CPU would silently accept an invalid cr3 and would
392 * attempt to use it - with largely undefined (and often hard
393 * to debug) behavior on the guest side.
394 */
395 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
396 kvm_inject_gp(vcpu, 0);
397 else {
398 vcpu->arch.cr3 = cr3;
399 vcpu->arch.mmu.new_cr3(vcpu);
400 }
401 <<<<<<< HEAD:arch/x86/kvm/x86.c
402 up_read(&current->mm->mmap_sem);
403 =======
404 up_read(&vcpu->kvm->slots_lock);
405 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
406 }
407 EXPORT_SYMBOL_GPL(set_cr3);
408
409 void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
410 {
411 if (cr8 & CR8_RESERVED_BITS) {
412 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
413 kvm_inject_gp(vcpu, 0);
414 return;
415 }
416 if (irqchip_in_kernel(vcpu->kvm))
417 kvm_lapic_set_tpr(vcpu, cr8);
418 else
419 vcpu->arch.cr8 = cr8;
420 }
421 EXPORT_SYMBOL_GPL(set_cr8);
422
423 unsigned long get_cr8(struct kvm_vcpu *vcpu)
424 {
425 if (irqchip_in_kernel(vcpu->kvm))
426 return kvm_lapic_get_cr8(vcpu);
427 else
428 return vcpu->arch.cr8;
429 }
430 EXPORT_SYMBOL_GPL(get_cr8);
431
432 /*
433 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
434 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
435 *
436 * This list is modified at module load time to reflect the
437 * capabilities of the host cpu.
438 */
439 static u32 msrs_to_save[] = {
440 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
441 MSR_K6_STAR,
442 #ifdef CONFIG_X86_64
443 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
444 #endif
445 MSR_IA32_TIME_STAMP_COUNTER,
446 };
447
448 static unsigned num_msrs_to_save;
449
450 static u32 emulated_msrs[] = {
451 MSR_IA32_MISC_ENABLE,
452 };
453
454 #ifdef CONFIG_X86_64
455
456 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
457 {
458 if (efer & EFER_RESERVED_BITS) {
459 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
460 efer);
461 kvm_inject_gp(vcpu, 0);
462 return;
463 }
464
465 if (is_paging(vcpu)
466 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
467 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
468 kvm_inject_gp(vcpu, 0);
469 return;
470 }
471
472 kvm_x86_ops->set_efer(vcpu, efer);
473
474 efer &= ~EFER_LMA;
475 efer |= vcpu->arch.shadow_efer & EFER_LMA;
476
477 vcpu->arch.shadow_efer = efer;
478 }
479
480 #endif
481
482 /*
483 * Writes msr value into into the appropriate "register".
484 * Returns 0 on success, non-0 otherwise.
485 * Assumes vcpu_load() was already called.
486 */
487 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
488 {
489 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
490 }
491
492 /*
493 * Adapt set_msr() to msr_io()'s calling convention
494 */
495 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
496 {
497 return kvm_set_msr(vcpu, index, *data);
498 }
499
500
501 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
502 {
503 switch (msr) {
504 #ifdef CONFIG_X86_64
505 case MSR_EFER:
506 set_efer(vcpu, data);
507 break;
508 #endif
509 case MSR_IA32_MC0_STATUS:
510 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
511 __FUNCTION__, data);
512 break;
513 case MSR_IA32_MCG_STATUS:
514 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
515 __FUNCTION__, data);
516 break;
517 <<<<<<< HEAD:arch/x86/kvm/x86.c
518 =======
519 case MSR_IA32_MCG_CTL:
520 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
521 __FUNCTION__, data);
522 break;
523 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
524 case MSR_IA32_UCODE_REV:
525 case MSR_IA32_UCODE_WRITE:
526 case 0x200 ... 0x2ff: /* MTRRs */
527 break;
528 case MSR_IA32_APICBASE:
529 kvm_set_apic_base(vcpu, data);
530 break;
531 case MSR_IA32_MISC_ENABLE:
532 vcpu->arch.ia32_misc_enable_msr = data;
533 break;
534 default:
535 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
536 return 1;
537 }
538 return 0;
539 }
540 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
541
542
543 /*
544 * Reads an msr value (of 'msr_index') into 'pdata'.
545 * Returns 0 on success, non-0 otherwise.
546 * Assumes vcpu_load() was already called.
547 */
548 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
549 {
550 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
551 }
552
553 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
554 {
555 u64 data;
556
557 switch (msr) {
558 case 0xc0010010: /* SYSCFG */
559 case 0xc0010015: /* HWCR */
560 case MSR_IA32_PLATFORM_ID:
561 case MSR_IA32_P5_MC_ADDR:
562 case MSR_IA32_P5_MC_TYPE:
563 case MSR_IA32_MC0_CTL:
564 case MSR_IA32_MCG_STATUS:
565 case MSR_IA32_MCG_CAP:
566 <<<<<<< HEAD:arch/x86/kvm/x86.c
567 =======
568 case MSR_IA32_MCG_CTL:
569 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
570 case MSR_IA32_MC0_MISC:
571 case MSR_IA32_MC0_MISC+4:
572 case MSR_IA32_MC0_MISC+8:
573 case MSR_IA32_MC0_MISC+12:
574 case MSR_IA32_MC0_MISC+16:
575 case MSR_IA32_UCODE_REV:
576 case MSR_IA32_PERF_STATUS:
577 case MSR_IA32_EBL_CR_POWERON:
578 /* MTRR registers */
579 case 0xfe:
580 case 0x200 ... 0x2ff:
581 data = 0;
582 break;
583 case 0xcd: /* fsb frequency */
584 data = 3;
585 break;
586 case MSR_IA32_APICBASE:
587 data = kvm_get_apic_base(vcpu);
588 break;
589 case MSR_IA32_MISC_ENABLE:
590 data = vcpu->arch.ia32_misc_enable_msr;
591 break;
592 #ifdef CONFIG_X86_64
593 case MSR_EFER:
594 data = vcpu->arch.shadow_efer;
595 break;
596 #endif
597 default:
598 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
599 return 1;
600 }
601 *pdata = data;
602 return 0;
603 }
604 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
605
606 /*
607 * Read or write a bunch of msrs. All parameters are kernel addresses.
608 *
609 * @return number of msrs set successfully.
610 */
611 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
612 struct kvm_msr_entry *entries,
613 int (*do_msr)(struct kvm_vcpu *vcpu,
614 unsigned index, u64 *data))
615 {
616 int i;
617
618 vcpu_load(vcpu);
619
620 for (i = 0; i < msrs->nmsrs; ++i)
621 if (do_msr(vcpu, entries[i].index, &entries[i].data))
622 break;
623
624 vcpu_put(vcpu);
625
626 return i;
627 }
628
629 /*
630 * Read or write a bunch of msrs. Parameters are user addresses.
631 *
632 * @return number of msrs set successfully.
633 */
634 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
635 int (*do_msr)(struct kvm_vcpu *vcpu,
636 unsigned index, u64 *data),
637 int writeback)
638 {
639 struct kvm_msrs msrs;
640 struct kvm_msr_entry *entries;
641 int r, n;
642 unsigned size;
643
644 r = -EFAULT;
645 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
646 goto out;
647
648 r = -E2BIG;
649 if (msrs.nmsrs >= MAX_IO_MSRS)
650 goto out;
651
652 r = -ENOMEM;
653 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
654 entries = vmalloc(size);
655 if (!entries)
656 goto out;
657
658 r = -EFAULT;
659 if (copy_from_user(entries, user_msrs->entries, size))
660 goto out_free;
661
662 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
663 if (r < 0)
664 goto out_free;
665
666 r = -EFAULT;
667 if (writeback && copy_to_user(user_msrs->entries, entries, size))
668 goto out_free;
669
670 r = n;
671
672 out_free:
673 vfree(entries);
674 out:
675 return r;
676 }
677
678 /*
679 * Make sure that a cpu that is being hot-unplugged does not have any vcpus
680 * cached on it.
681 */
682 void decache_vcpus_on_cpu(int cpu)
683 {
684 struct kvm *vm;
685 struct kvm_vcpu *vcpu;
686 int i;
687
688 spin_lock(&kvm_lock);
689 list_for_each_entry(vm, &vm_list, vm_list)
690 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
691 vcpu = vm->vcpus[i];
692 if (!vcpu)
693 continue;
694 /*
695 * If the vcpu is locked, then it is running on some
696 * other cpu and therefore it is not cached on the
697 * cpu in question.
698 *
699 * If it's not locked, check the last cpu it executed
700 * on.
701 */
702 if (mutex_trylock(&vcpu->mutex)) {
703 if (vcpu->cpu == cpu) {
704 kvm_x86_ops->vcpu_decache(vcpu);
705 vcpu->cpu = -1;
706 }
707 mutex_unlock(&vcpu->mutex);
708 }
709 }
710 spin_unlock(&kvm_lock);
711 }
712
713 int kvm_dev_ioctl_check_extension(long ext)
714 {
715 int r;
716
717 switch (ext) {
718 case KVM_CAP_IRQCHIP:
719 case KVM_CAP_HLT:
720 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
721 case KVM_CAP_USER_MEMORY:
722 case KVM_CAP_SET_TSS_ADDR:
723 case KVM_CAP_EXT_CPUID:
724 r = 1;
725 break;
726 case KVM_CAP_VAPIC:
727 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
728 break;
729 default:
730 r = 0;
731 break;
732 }
733 return r;
734
735 }
736
737 long kvm_arch_dev_ioctl(struct file *filp,
738 unsigned int ioctl, unsigned long arg)
739 {
740 void __user *argp = (void __user *)arg;
741 long r;
742
743 switch (ioctl) {
744 case KVM_GET_MSR_INDEX_LIST: {
745 struct kvm_msr_list __user *user_msr_list = argp;
746 struct kvm_msr_list msr_list;
747 unsigned n;
748
749 r = -EFAULT;
750 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
751 goto out;
752 n = msr_list.nmsrs;
753 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
754 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
755 goto out;
756 r = -E2BIG;
757 if (n < num_msrs_to_save)
758 goto out;
759 r = -EFAULT;
760 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
761 num_msrs_to_save * sizeof(u32)))
762 goto out;
763 if (copy_to_user(user_msr_list->indices
764 + num_msrs_to_save * sizeof(u32),
765 &emulated_msrs,
766 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
767 goto out;
768 r = 0;
769 break;
770 }
771 <<<<<<< HEAD:arch/x86/kvm/x86.c
772 =======
773 case KVM_GET_SUPPORTED_CPUID: {
774 struct kvm_cpuid2 __user *cpuid_arg = argp;
775 struct kvm_cpuid2 cpuid;
776
777 r = -EFAULT;
778 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
779 goto out;
780 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
781 cpuid_arg->entries);
782 if (r)
783 goto out;
784
785 r = -EFAULT;
786 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
787 goto out;
788 r = 0;
789 break;
790 }
791 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
792 default:
793 r = -EINVAL;
794 }
795 out:
796 return r;
797 }
798
799 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
800 {
801 kvm_x86_ops->vcpu_load(vcpu, cpu);
802 }
803
804 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
805 {
806 kvm_x86_ops->vcpu_put(vcpu);
807 kvm_put_guest_fpu(vcpu);
808 }
809
810 static int is_efer_nx(void)
811 {
812 u64 efer;
813
814 rdmsrl(MSR_EFER, efer);
815 return efer & EFER_NX;
816 }
817
818 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
819 {
820 int i;
821 struct kvm_cpuid_entry2 *e, *entry;
822
823 entry = NULL;
824 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
825 e = &vcpu->arch.cpuid_entries[i];
826 if (e->function == 0x80000001) {
827 entry = e;
828 break;
829 }
830 }
831 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
832 entry->edx &= ~(1 << 20);
833 printk(KERN_INFO "kvm: guest NX capability removed\n");
834 }
835 }
836
837 /* when an old userspace process fills a new kernel module */
838 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
839 struct kvm_cpuid *cpuid,
840 struct kvm_cpuid_entry __user *entries)
841 {
842 int r, i;
843 struct kvm_cpuid_entry *cpuid_entries;
844
845 r = -E2BIG;
846 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
847 goto out;
848 r = -ENOMEM;
849 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
850 if (!cpuid_entries)
851 goto out;
852 r = -EFAULT;
853 if (copy_from_user(cpuid_entries, entries,
854 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
855 goto out_free;
856 for (i = 0; i < cpuid->nent; i++) {
857 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
858 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
859 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
860 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
861 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
862 vcpu->arch.cpuid_entries[i].index = 0;
863 vcpu->arch.cpuid_entries[i].flags = 0;
864 vcpu->arch.cpuid_entries[i].padding[0] = 0;
865 vcpu->arch.cpuid_entries[i].padding[1] = 0;
866 vcpu->arch.cpuid_entries[i].padding[2] = 0;
867 }
868 vcpu->arch.cpuid_nent = cpuid->nent;
869 cpuid_fix_nx_cap(vcpu);
870 r = 0;
871
872 out_free:
873 vfree(cpuid_entries);
874 out:
875 return r;
876 }
877
878 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
879 struct kvm_cpuid2 *cpuid,
880 struct kvm_cpuid_entry2 __user *entries)
881 {
882 int r;
883
884 r = -E2BIG;
885 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
886 goto out;
887 r = -EFAULT;
888 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
889 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
890 goto out;
891 vcpu->arch.cpuid_nent = cpuid->nent;
892 return 0;
893
894 out:
895 return r;
896 }
897
898 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
899 struct kvm_cpuid2 *cpuid,
900 struct kvm_cpuid_entry2 __user *entries)
901 {
902 int r;
903
904 r = -E2BIG;
905 if (cpuid->nent < vcpu->arch.cpuid_nent)
906 goto out;
907 r = -EFAULT;
908 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
909 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
910 goto out;
911 return 0;
912
913 out:
914 cpuid->nent = vcpu->arch.cpuid_nent;
915 return r;
916 }
917
918 static inline u32 bit(int bitno)
919 {
920 return 1 << (bitno & 31);
921 }
922
923 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
924 u32 index)
925 {
926 entry->function = function;
927 entry->index = index;
928 cpuid_count(entry->function, entry->index,
929 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
930 entry->flags = 0;
931 }
932
933 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
934 u32 index, int *nent, int maxnent)
935 {
936 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
937 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
938 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
939 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
940 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
941 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
942 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
943 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
944 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
945 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
946 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
947 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
948 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
949 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
950 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
951 bit(X86_FEATURE_PGE) |
952 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
953 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
954 bit(X86_FEATURE_SYSCALL) |
955 (bit(X86_FEATURE_NX) && is_efer_nx()) |
956 #ifdef CONFIG_X86_64
957 bit(X86_FEATURE_LM) |
958 #endif
959 bit(X86_FEATURE_MMXEXT) |
960 bit(X86_FEATURE_3DNOWEXT) |
961 bit(X86_FEATURE_3DNOW);
962 const u32 kvm_supported_word3_x86_features =
963 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
964 const u32 kvm_supported_word6_x86_features =
965 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
966
967 /* all func 2 cpuid_count() should be called on the same cpu */
968 get_cpu();
969 do_cpuid_1_ent(entry, function, index);
970 ++*nent;
971
972 switch (function) {
973 case 0:
974 entry->eax = min(entry->eax, (u32)0xb);
975 break;
976 case 1:
977 entry->edx &= kvm_supported_word0_x86_features;
978 entry->ecx &= kvm_supported_word3_x86_features;
979 break;
980 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
981 * may return different values. This forces us to get_cpu() before
982 * issuing the first command, and also to emulate this annoying behavior
983 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
984 case 2: {
985 int t, times = entry->eax & 0xff;
986
987 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
988 for (t = 1; t < times && *nent < maxnent; ++t) {
989 do_cpuid_1_ent(&entry[t], function, 0);
990 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
991 ++*nent;
992 }
993 break;
994 }
995 /* function 4 and 0xb have additional index. */
996 case 4: {
997 int index, cache_type;
998
999 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1000 /* read more entries until cache_type is zero */
1001 for (index = 1; *nent < maxnent; ++index) {
1002 cache_type = entry[index - 1].eax & 0x1f;
1003 if (!cache_type)
1004 break;
1005 do_cpuid_1_ent(&entry[index], function, index);
1006 entry[index].flags |=
1007 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1008 ++*nent;
1009 }
1010 break;
1011 }
1012 case 0xb: {
1013 int index, level_type;
1014
1015 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1016 /* read more entries until level_type is zero */
1017 for (index = 1; *nent < maxnent; ++index) {
1018 level_type = entry[index - 1].ecx & 0xff;
1019 if (!level_type)
1020 break;
1021 do_cpuid_1_ent(&entry[index], function, index);
1022 entry[index].flags |=
1023 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1024 ++*nent;
1025 }
1026 break;
1027 }
1028 case 0x80000000:
1029 entry->eax = min(entry->eax, 0x8000001a);
1030 break;
1031 case 0x80000001:
1032 entry->edx &= kvm_supported_word1_x86_features;
1033 entry->ecx &= kvm_supported_word6_x86_features;
1034 break;
1035 }
1036 put_cpu();
1037 }
1038
1039 <<<<<<< HEAD:arch/x86/kvm/x86.c
1040 static int kvm_vm_ioctl_get_supported_cpuid(struct kvm *kvm,
1041 struct kvm_cpuid2 *cpuid,
1042 =======
1043 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1044 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1045 struct kvm_cpuid_entry2 __user *entries)
1046 {
1047 struct kvm_cpuid_entry2 *cpuid_entries;
1048 int limit, nent = 0, r = -E2BIG;
1049 u32 func;
1050
1051 if (cpuid->nent < 1)
1052 goto out;
1053 r = -ENOMEM;
1054 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1055 if (!cpuid_entries)
1056 goto out;
1057
1058 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1059 limit = cpuid_entries[0].eax;
1060 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1061 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1062 &nent, cpuid->nent);
1063 r = -E2BIG;
1064 if (nent >= cpuid->nent)
1065 goto out_free;
1066
1067 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1068 limit = cpuid_entries[nent - 1].eax;
1069 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1070 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1071 &nent, cpuid->nent);
1072 r = -EFAULT;
1073 if (copy_to_user(entries, cpuid_entries,
1074 nent * sizeof(struct kvm_cpuid_entry2)))
1075 goto out_free;
1076 cpuid->nent = nent;
1077 r = 0;
1078
1079 out_free:
1080 vfree(cpuid_entries);
1081 out:
1082 return r;
1083 }
1084
1085 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1086 struct kvm_lapic_state *s)
1087 {
1088 vcpu_load(vcpu);
1089 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1090 vcpu_put(vcpu);
1091
1092 return 0;
1093 }
1094
1095 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1096 struct kvm_lapic_state *s)
1097 {
1098 vcpu_load(vcpu);
1099 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1100 kvm_apic_post_state_restore(vcpu);
1101 vcpu_put(vcpu);
1102
1103 return 0;
1104 }
1105
1106 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1107 struct kvm_interrupt *irq)
1108 {
1109 if (irq->irq < 0 || irq->irq >= 256)
1110 return -EINVAL;
1111 if (irqchip_in_kernel(vcpu->kvm))
1112 return -ENXIO;
1113 vcpu_load(vcpu);
1114
1115 set_bit(irq->irq, vcpu->arch.irq_pending);
1116 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1117
1118 vcpu_put(vcpu);
1119
1120 return 0;
1121 }
1122
1123 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1124 struct kvm_tpr_access_ctl *tac)
1125 {
1126 if (tac->flags)
1127 return -EINVAL;
1128 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1129 return 0;
1130 }
1131
1132 long kvm_arch_vcpu_ioctl(struct file *filp,
1133 unsigned int ioctl, unsigned long arg)
1134 {
1135 struct kvm_vcpu *vcpu = filp->private_data;
1136 void __user *argp = (void __user *)arg;
1137 int r;
1138
1139 switch (ioctl) {
1140 case KVM_GET_LAPIC: {
1141 struct kvm_lapic_state lapic;
1142
1143 memset(&lapic, 0, sizeof lapic);
1144 r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
1145 if (r)
1146 goto out;
1147 r = -EFAULT;
1148 if (copy_to_user(argp, &lapic, sizeof lapic))
1149 goto out;
1150 r = 0;
1151 break;
1152 }
1153 case KVM_SET_LAPIC: {
1154 struct kvm_lapic_state lapic;
1155
1156 r = -EFAULT;
1157 if (copy_from_user(&lapic, argp, sizeof lapic))
1158 goto out;
1159 r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
1160 if (r)
1161 goto out;
1162 r = 0;
1163 break;
1164 }
1165 case KVM_INTERRUPT: {
1166 struct kvm_interrupt irq;
1167
1168 r = -EFAULT;
1169 if (copy_from_user(&irq, argp, sizeof irq))
1170 goto out;
1171 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1172 if (r)
1173 goto out;
1174 r = 0;
1175 break;
1176 }
1177 case KVM_SET_CPUID: {
1178 struct kvm_cpuid __user *cpuid_arg = argp;
1179 struct kvm_cpuid cpuid;
1180
1181 r = -EFAULT;
1182 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1183 goto out;
1184 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1185 if (r)
1186 goto out;
1187 break;
1188 }
1189 case KVM_SET_CPUID2: {
1190 struct kvm_cpuid2 __user *cpuid_arg = argp;
1191 struct kvm_cpuid2 cpuid;
1192
1193 r = -EFAULT;
1194 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1195 goto out;
1196 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1197 cpuid_arg->entries);
1198 if (r)
1199 goto out;
1200 break;
1201 }
1202 case KVM_GET_CPUID2: {
1203 struct kvm_cpuid2 __user *cpuid_arg = argp;
1204 struct kvm_cpuid2 cpuid;
1205
1206 r = -EFAULT;
1207 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1208 goto out;
1209 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1210 cpuid_arg->entries);
1211 if (r)
1212 goto out;
1213 r = -EFAULT;
1214 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1215 goto out;
1216 r = 0;
1217 break;
1218 }
1219 case KVM_GET_MSRS:
1220 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1221 break;
1222 case KVM_SET_MSRS:
1223 r = msr_io(vcpu, argp, do_set_msr, 0);
1224 break;
1225 case KVM_TPR_ACCESS_REPORTING: {
1226 struct kvm_tpr_access_ctl tac;
1227
1228 r = -EFAULT;
1229 if (copy_from_user(&tac, argp, sizeof tac))
1230 goto out;
1231 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1232 if (r)
1233 goto out;
1234 r = -EFAULT;
1235 if (copy_to_user(argp, &tac, sizeof tac))
1236 goto out;
1237 r = 0;
1238 break;
1239 };
1240 case KVM_SET_VAPIC_ADDR: {
1241 struct kvm_vapic_addr va;
1242
1243 r = -EINVAL;
1244 if (!irqchip_in_kernel(vcpu->kvm))
1245 goto out;
1246 r = -EFAULT;
1247 if (copy_from_user(&va, argp, sizeof va))
1248 goto out;
1249 r = 0;
1250 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1251 break;
1252 }
1253 default:
1254 r = -EINVAL;
1255 }
1256 out:
1257 return r;
1258 }
1259
1260 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1261 {
1262 int ret;
1263
1264 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1265 return -1;
1266 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1267 return ret;
1268 }
1269
1270 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1271 u32 kvm_nr_mmu_pages)
1272 {
1273 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1274 return -EINVAL;
1275
1276 <<<<<<< HEAD:arch/x86/kvm/x86.c
1277 down_write(&current->mm->mmap_sem);
1278 =======
1279 down_write(&kvm->slots_lock);
1280 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1281
1282 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1283 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1284
1285 <<<<<<< HEAD:arch/x86/kvm/x86.c
1286 up_write(&current->mm->mmap_sem);
1287 =======
1288 up_write(&kvm->slots_lock);
1289 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1290 return 0;
1291 }
1292
1293 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1294 {
1295 return kvm->arch.n_alloc_mmu_pages;
1296 }
1297
1298 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1299 {
1300 int i;
1301 struct kvm_mem_alias *alias;
1302
1303 for (i = 0; i < kvm->arch.naliases; ++i) {
1304 alias = &kvm->arch.aliases[i];
1305 if (gfn >= alias->base_gfn
1306 && gfn < alias->base_gfn + alias->npages)
1307 return alias->target_gfn + gfn - alias->base_gfn;
1308 }
1309 return gfn;
1310 }
1311
1312 /*
1313 * Set a new alias region. Aliases map a portion of physical memory into
1314 * another portion. This is useful for memory windows, for example the PC
1315 * VGA region.
1316 */
1317 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1318 struct kvm_memory_alias *alias)
1319 {
1320 int r, n;
1321 struct kvm_mem_alias *p;
1322
1323 r = -EINVAL;
1324 /* General sanity checks */
1325 if (alias->memory_size & (PAGE_SIZE - 1))
1326 goto out;
1327 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1328 goto out;
1329 if (alias->slot >= KVM_ALIAS_SLOTS)
1330 goto out;
1331 if (alias->guest_phys_addr + alias->memory_size
1332 < alias->guest_phys_addr)
1333 goto out;
1334 if (alias->target_phys_addr + alias->memory_size
1335 < alias->target_phys_addr)
1336 goto out;
1337
1338 <<<<<<< HEAD:arch/x86/kvm/x86.c
1339 down_write(&current->mm->mmap_sem);
1340 =======
1341 down_write(&kvm->slots_lock);
1342 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1343
1344 p = &kvm->arch.aliases[alias->slot];
1345 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1346 p->npages = alias->memory_size >> PAGE_SHIFT;
1347 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1348
1349 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1350 if (kvm->arch.aliases[n - 1].npages)
1351 break;
1352 kvm->arch.naliases = n;
1353
1354 kvm_mmu_zap_all(kvm);
1355
1356 <<<<<<< HEAD:arch/x86/kvm/x86.c
1357 up_write(&current->mm->mmap_sem);
1358 =======
1359 up_write(&kvm->slots_lock);
1360 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1361
1362 return 0;
1363
1364 out:
1365 return r;
1366 }
1367
1368 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1369 {
1370 int r;
1371
1372 r = 0;
1373 switch (chip->chip_id) {
1374 case KVM_IRQCHIP_PIC_MASTER:
1375 memcpy(&chip->chip.pic,
1376 &pic_irqchip(kvm)->pics[0],
1377 sizeof(struct kvm_pic_state));
1378 break;
1379 case KVM_IRQCHIP_PIC_SLAVE:
1380 memcpy(&chip->chip.pic,
1381 &pic_irqchip(kvm)->pics[1],
1382 sizeof(struct kvm_pic_state));
1383 break;
1384 case KVM_IRQCHIP_IOAPIC:
1385 memcpy(&chip->chip.ioapic,
1386 ioapic_irqchip(kvm),
1387 sizeof(struct kvm_ioapic_state));
1388 break;
1389 default:
1390 r = -EINVAL;
1391 break;
1392 }
1393 return r;
1394 }
1395
1396 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1397 {
1398 int r;
1399
1400 r = 0;
1401 switch (chip->chip_id) {
1402 case KVM_IRQCHIP_PIC_MASTER:
1403 memcpy(&pic_irqchip(kvm)->pics[0],
1404 &chip->chip.pic,
1405 sizeof(struct kvm_pic_state));
1406 break;
1407 case KVM_IRQCHIP_PIC_SLAVE:
1408 memcpy(&pic_irqchip(kvm)->pics[1],
1409 &chip->chip.pic,
1410 sizeof(struct kvm_pic_state));
1411 break;
1412 case KVM_IRQCHIP_IOAPIC:
1413 memcpy(ioapic_irqchip(kvm),
1414 &chip->chip.ioapic,
1415 sizeof(struct kvm_ioapic_state));
1416 break;
1417 default:
1418 r = -EINVAL;
1419 break;
1420 }
1421 kvm_pic_update_irq(pic_irqchip(kvm));
1422 return r;
1423 }
1424
1425 /*
1426 * Get (and clear) the dirty memory log for a memory slot.
1427 */
1428 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1429 struct kvm_dirty_log *log)
1430 {
1431 int r;
1432 int n;
1433 struct kvm_memory_slot *memslot;
1434 int is_dirty = 0;
1435
1436 <<<<<<< HEAD:arch/x86/kvm/x86.c
1437 down_write(&current->mm->mmap_sem);
1438 =======
1439 down_write(&kvm->slots_lock);
1440 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1441
1442 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1443 if (r)
1444 goto out;
1445
1446 /* If nothing is dirty, don't bother messing with page tables. */
1447 if (is_dirty) {
1448 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1449 kvm_flush_remote_tlbs(kvm);
1450 memslot = &kvm->memslots[log->slot];
1451 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1452 memset(memslot->dirty_bitmap, 0, n);
1453 }
1454 r = 0;
1455 out:
1456 <<<<<<< HEAD:arch/x86/kvm/x86.c
1457 up_write(&current->mm->mmap_sem);
1458 =======
1459 up_write(&kvm->slots_lock);
1460 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1461 return r;
1462 }
1463
1464 long kvm_arch_vm_ioctl(struct file *filp,
1465 unsigned int ioctl, unsigned long arg)
1466 {
1467 struct kvm *kvm = filp->private_data;
1468 void __user *argp = (void __user *)arg;
1469 int r = -EINVAL;
1470
1471 switch (ioctl) {
1472 case KVM_SET_TSS_ADDR:
1473 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1474 if (r < 0)
1475 goto out;
1476 break;
1477 case KVM_SET_MEMORY_REGION: {
1478 struct kvm_memory_region kvm_mem;
1479 struct kvm_userspace_memory_region kvm_userspace_mem;
1480
1481 r = -EFAULT;
1482 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1483 goto out;
1484 kvm_userspace_mem.slot = kvm_mem.slot;
1485 kvm_userspace_mem.flags = kvm_mem.flags;
1486 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1487 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1488 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1489 if (r)
1490 goto out;
1491 break;
1492 }
1493 case KVM_SET_NR_MMU_PAGES:
1494 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1495 if (r)
1496 goto out;
1497 break;
1498 case KVM_GET_NR_MMU_PAGES:
1499 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1500 break;
1501 case KVM_SET_MEMORY_ALIAS: {
1502 struct kvm_memory_alias alias;
1503
1504 r = -EFAULT;
1505 if (copy_from_user(&alias, argp, sizeof alias))
1506 goto out;
1507 r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
1508 if (r)
1509 goto out;
1510 break;
1511 }
1512 case KVM_CREATE_IRQCHIP:
1513 r = -ENOMEM;
1514 kvm->arch.vpic = kvm_create_pic(kvm);
1515 if (kvm->arch.vpic) {
1516 r = kvm_ioapic_init(kvm);
1517 if (r) {
1518 kfree(kvm->arch.vpic);
1519 kvm->arch.vpic = NULL;
1520 goto out;
1521 }
1522 } else
1523 goto out;
1524 break;
1525 case KVM_IRQ_LINE: {
1526 struct kvm_irq_level irq_event;
1527
1528 r = -EFAULT;
1529 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1530 goto out;
1531 if (irqchip_in_kernel(kvm)) {
1532 mutex_lock(&kvm->lock);
1533 if (irq_event.irq < 16)
1534 kvm_pic_set_irq(pic_irqchip(kvm),
1535 irq_event.irq,
1536 irq_event.level);
1537 kvm_ioapic_set_irq(kvm->arch.vioapic,
1538 irq_event.irq,
1539 irq_event.level);
1540 mutex_unlock(&kvm->lock);
1541 r = 0;
1542 }
1543 break;
1544 }
1545 case KVM_GET_IRQCHIP: {
1546 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1547 struct kvm_irqchip chip;
1548
1549 r = -EFAULT;
1550 if (copy_from_user(&chip, argp, sizeof chip))
1551 goto out;
1552 r = -ENXIO;
1553 if (!irqchip_in_kernel(kvm))
1554 goto out;
1555 r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
1556 if (r)
1557 goto out;
1558 r = -EFAULT;
1559 if (copy_to_user(argp, &chip, sizeof chip))
1560 goto out;
1561 r = 0;
1562 break;
1563 }
1564 case KVM_SET_IRQCHIP: {
1565 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1566 struct kvm_irqchip chip;
1567
1568 r = -EFAULT;
1569 if (copy_from_user(&chip, argp, sizeof chip))
1570 goto out;
1571 r = -ENXIO;
1572 if (!irqchip_in_kernel(kvm))
1573 goto out;
1574 r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
1575 if (r)
1576 goto out;
1577 r = 0;
1578 break;
1579 }
1580 <<<<<<< HEAD:arch/x86/kvm/x86.c
1581 case KVM_GET_SUPPORTED_CPUID: {
1582 struct kvm_cpuid2 __user *cpuid_arg = argp;
1583 struct kvm_cpuid2 cpuid;
1584
1585 r = -EFAULT;
1586 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1587 goto out;
1588 r = kvm_vm_ioctl_get_supported_cpuid(kvm, &cpuid,
1589 cpuid_arg->entries);
1590 if (r)
1591 goto out;
1592
1593 r = -EFAULT;
1594 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1595 goto out;
1596 r = 0;
1597 break;
1598 }
1599 =======
1600 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1601 default:
1602 ;
1603 }
1604 out:
1605 return r;
1606 }
1607
1608 static void kvm_init_msr_list(void)
1609 {
1610 u32 dummy[2];
1611 unsigned i, j;
1612
1613 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
1614 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
1615 continue;
1616 if (j < i)
1617 msrs_to_save[j] = msrs_to_save[i];
1618 j++;
1619 }
1620 num_msrs_to_save = j;
1621 }
1622
1623 /*
1624 * Only apic need an MMIO device hook, so shortcut now..
1625 */
1626 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
1627 gpa_t addr)
1628 {
1629 struct kvm_io_device *dev;
1630
1631 if (vcpu->arch.apic) {
1632 dev = &vcpu->arch.apic->dev;
1633 if (dev->in_range(dev, addr))
1634 return dev;
1635 }
1636 return NULL;
1637 }
1638
1639
1640 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
1641 gpa_t addr)
1642 {
1643 struct kvm_io_device *dev;
1644
1645 dev = vcpu_find_pervcpu_dev(vcpu, addr);
1646 if (dev == NULL)
1647 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
1648 return dev;
1649 }
1650
1651 int emulator_read_std(unsigned long addr,
1652 void *val,
1653 unsigned int bytes,
1654 struct kvm_vcpu *vcpu)
1655 {
1656 void *data = val;
1657 int r = X86EMUL_CONTINUE;
1658
1659 <<<<<<< HEAD:arch/x86/kvm/x86.c
1660 down_read(&current->mm->mmap_sem);
1661 =======
1662 down_read(&vcpu->kvm->slots_lock);
1663 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1664 while (bytes) {
1665 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1666 unsigned offset = addr & (PAGE_SIZE-1);
1667 unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
1668 int ret;
1669
1670 if (gpa == UNMAPPED_GVA) {
1671 r = X86EMUL_PROPAGATE_FAULT;
1672 goto out;
1673 }
1674 ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
1675 if (ret < 0) {
1676 r = X86EMUL_UNHANDLEABLE;
1677 goto out;
1678 }
1679
1680 bytes -= tocopy;
1681 data += tocopy;
1682 addr += tocopy;
1683 }
1684 out:
1685 <<<<<<< HEAD:arch/x86/kvm/x86.c
1686 up_read(&current->mm->mmap_sem);
1687 =======
1688 up_read(&vcpu->kvm->slots_lock);
1689 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1690 return r;
1691 }
1692 EXPORT_SYMBOL_GPL(emulator_read_std);
1693
1694 static int emulator_read_emulated(unsigned long addr,
1695 void *val,
1696 unsigned int bytes,
1697 struct kvm_vcpu *vcpu)
1698 {
1699 struct kvm_io_device *mmio_dev;
1700 gpa_t gpa;
1701
1702 if (vcpu->mmio_read_completed) {
1703 memcpy(val, vcpu->mmio_data, bytes);
1704 vcpu->mmio_read_completed = 0;
1705 return X86EMUL_CONTINUE;
1706 }
1707
1708 <<<<<<< HEAD:arch/x86/kvm/x86.c
1709 down_read(&current->mm->mmap_sem);
1710 =======
1711 down_read(&vcpu->kvm->slots_lock);
1712 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1713 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1714 <<<<<<< HEAD:arch/x86/kvm/x86.c
1715 up_read(&current->mm->mmap_sem);
1716 =======
1717 up_read(&vcpu->kvm->slots_lock);
1718 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1719
1720 /* For APIC access vmexit */
1721 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1722 goto mmio;
1723
1724 if (emulator_read_std(addr, val, bytes, vcpu)
1725 == X86EMUL_CONTINUE)
1726 return X86EMUL_CONTINUE;
1727 if (gpa == UNMAPPED_GVA)
1728 return X86EMUL_PROPAGATE_FAULT;
1729
1730 mmio:
1731 /*
1732 * Is this MMIO handled locally?
1733 */
1734 mutex_lock(&vcpu->kvm->lock);
1735 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1736 if (mmio_dev) {
1737 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
1738 mutex_unlock(&vcpu->kvm->lock);
1739 return X86EMUL_CONTINUE;
1740 }
1741 mutex_unlock(&vcpu->kvm->lock);
1742
1743 vcpu->mmio_needed = 1;
1744 vcpu->mmio_phys_addr = gpa;
1745 vcpu->mmio_size = bytes;
1746 vcpu->mmio_is_write = 0;
1747
1748 return X86EMUL_UNHANDLEABLE;
1749 }
1750
1751 static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
1752 const void *val, int bytes)
1753 {
1754 int ret;
1755
1756 <<<<<<< HEAD:arch/x86/kvm/x86.c
1757 down_read(&current->mm->mmap_sem);
1758 =======
1759 down_read(&vcpu->kvm->slots_lock);
1760 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1761 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
1762 if (ret < 0) {
1763 <<<<<<< HEAD:arch/x86/kvm/x86.c
1764 up_read(&current->mm->mmap_sem);
1765 =======
1766 up_read(&vcpu->kvm->slots_lock);
1767 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1768 return 0;
1769 }
1770 kvm_mmu_pte_write(vcpu, gpa, val, bytes);
1771 <<<<<<< HEAD:arch/x86/kvm/x86.c
1772 up_read(&current->mm->mmap_sem);
1773 =======
1774 up_read(&vcpu->kvm->slots_lock);
1775 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1776 return 1;
1777 }
1778
1779 static int emulator_write_emulated_onepage(unsigned long addr,
1780 const void *val,
1781 unsigned int bytes,
1782 struct kvm_vcpu *vcpu)
1783 {
1784 struct kvm_io_device *mmio_dev;
1785 gpa_t gpa;
1786
1787 <<<<<<< HEAD:arch/x86/kvm/x86.c
1788 down_read(&current->mm->mmap_sem);
1789 =======
1790 down_read(&vcpu->kvm->slots_lock);
1791 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1792 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1793 <<<<<<< HEAD:arch/x86/kvm/x86.c
1794 up_read(&current->mm->mmap_sem);
1795 =======
1796 up_read(&vcpu->kvm->slots_lock);
1797 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1798
1799 if (gpa == UNMAPPED_GVA) {
1800 kvm_inject_page_fault(vcpu, addr, 2);
1801 return X86EMUL_PROPAGATE_FAULT;
1802 }
1803
1804 /* For APIC access vmexit */
1805 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1806 goto mmio;
1807
1808 if (emulator_write_phys(vcpu, gpa, val, bytes))
1809 return X86EMUL_CONTINUE;
1810
1811 mmio:
1812 /*
1813 * Is this MMIO handled locally?
1814 */
1815 mutex_lock(&vcpu->kvm->lock);
1816 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
1817 if (mmio_dev) {
1818 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
1819 mutex_unlock(&vcpu->kvm->lock);
1820 return X86EMUL_CONTINUE;
1821 }
1822 mutex_unlock(&vcpu->kvm->lock);
1823
1824 vcpu->mmio_needed = 1;
1825 vcpu->mmio_phys_addr = gpa;
1826 vcpu->mmio_size = bytes;
1827 vcpu->mmio_is_write = 1;
1828 memcpy(vcpu->mmio_data, val, bytes);
1829
1830 return X86EMUL_CONTINUE;
1831 }
1832
1833 int emulator_write_emulated(unsigned long addr,
1834 const void *val,
1835 unsigned int bytes,
1836 struct kvm_vcpu *vcpu)
1837 {
1838 /* Crossing a page boundary? */
1839 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
1840 int rc, now;
1841
1842 now = -addr & ~PAGE_MASK;
1843 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
1844 if (rc != X86EMUL_CONTINUE)
1845 return rc;
1846 addr += now;
1847 val += now;
1848 bytes -= now;
1849 }
1850 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
1851 }
1852 EXPORT_SYMBOL_GPL(emulator_write_emulated);
1853
1854 static int emulator_cmpxchg_emulated(unsigned long addr,
1855 const void *old,
1856 const void *new,
1857 unsigned int bytes,
1858 struct kvm_vcpu *vcpu)
1859 {
1860 static int reported;
1861
1862 if (!reported) {
1863 reported = 1;
1864 printk(KERN_WARNING "kvm: emulating exchange as write\n");
1865 }
1866 #ifndef CONFIG_X86_64
1867 /* guests cmpxchg8b have to be emulated atomically */
1868 if (bytes == 8) {
1869 gpa_t gpa;
1870 struct page *page;
1871 char *kaddr;
1872 u64 val;
1873
1874 <<<<<<< HEAD:arch/x86/kvm/x86.c
1875 down_read(&current->mm->mmap_sem);
1876 =======
1877 down_read(&vcpu->kvm->slots_lock);
1878 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1879 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
1880
1881 if (gpa == UNMAPPED_GVA ||
1882 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
1883 goto emul_write;
1884
1885 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
1886 goto emul_write;
1887
1888 val = *(u64 *)new;
1889 <<<<<<< HEAD:arch/x86/kvm/x86.c
1890 =======
1891
1892 down_read(&current->mm->mmap_sem);
1893 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1894 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1895 <<<<<<< HEAD:arch/x86/kvm/x86.c
1896 =======
1897 up_read(&current->mm->mmap_sem);
1898
1899 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1900 kaddr = kmap_atomic(page, KM_USER0);
1901 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
1902 kunmap_atomic(kaddr, KM_USER0);
1903 kvm_release_page_dirty(page);
1904 emul_write:
1905 <<<<<<< HEAD:arch/x86/kvm/x86.c
1906 up_read(&current->mm->mmap_sem);
1907 =======
1908 up_read(&vcpu->kvm->slots_lock);
1909 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
1910 }
1911 #endif
1912
1913 return emulator_write_emulated(addr, new, bytes, vcpu);
1914 }
1915
1916 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
1917 {
1918 return kvm_x86_ops->get_segment_base(vcpu, seg);
1919 }
1920
1921 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
1922 {
1923 return X86EMUL_CONTINUE;
1924 }
1925
1926 int emulate_clts(struct kvm_vcpu *vcpu)
1927 {
1928 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
1929 return X86EMUL_CONTINUE;
1930 }
1931
1932 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
1933 {
1934 struct kvm_vcpu *vcpu = ctxt->vcpu;
1935
1936 switch (dr) {
1937 case 0 ... 3:
1938 *dest = kvm_x86_ops->get_dr(vcpu, dr);
1939 return X86EMUL_CONTINUE;
1940 default:
1941 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
1942 return X86EMUL_UNHANDLEABLE;
1943 }
1944 }
1945
1946 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
1947 {
1948 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
1949 int exception;
1950
1951 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
1952 if (exception) {
1953 /* FIXME: better handling */
1954 return X86EMUL_UNHANDLEABLE;
1955 }
1956 return X86EMUL_CONTINUE;
1957 }
1958
1959 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
1960 {
1961 static int reported;
1962 u8 opcodes[4];
1963 unsigned long rip = vcpu->arch.rip;
1964 unsigned long rip_linear;
1965
1966 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
1967
1968 if (reported)
1969 return;
1970
1971 emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
1972
1973 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
1974 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
1975 reported = 1;
1976 }
1977 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
1978
1979 struct x86_emulate_ops emulate_ops = {
1980 .read_std = emulator_read_std,
1981 .read_emulated = emulator_read_emulated,
1982 .write_emulated = emulator_write_emulated,
1983 .cmpxchg_emulated = emulator_cmpxchg_emulated,
1984 };
1985
1986 int emulate_instruction(struct kvm_vcpu *vcpu,
1987 struct kvm_run *run,
1988 unsigned long cr2,
1989 u16 error_code,
1990 int emulation_type)
1991 {
1992 int r;
1993 struct decode_cache *c;
1994
1995 vcpu->arch.mmio_fault_cr2 = cr2;
1996 kvm_x86_ops->cache_regs(vcpu);
1997
1998 vcpu->mmio_is_write = 0;
1999 vcpu->arch.pio.string = 0;
2000
2001 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2002 int cs_db, cs_l;
2003 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2004
2005 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2006 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2007 vcpu->arch.emulate_ctxt.mode =
2008 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2009 ? X86EMUL_MODE_REAL : cs_l
2010 ? X86EMUL_MODE_PROT64 : cs_db
2011 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2012
2013 if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
2014 vcpu->arch.emulate_ctxt.cs_base = 0;
2015 vcpu->arch.emulate_ctxt.ds_base = 0;
2016 vcpu->arch.emulate_ctxt.es_base = 0;
2017 vcpu->arch.emulate_ctxt.ss_base = 0;
2018 } else {
2019 vcpu->arch.emulate_ctxt.cs_base =
2020 get_segment_base(vcpu, VCPU_SREG_CS);
2021 vcpu->arch.emulate_ctxt.ds_base =
2022 get_segment_base(vcpu, VCPU_SREG_DS);
2023 vcpu->arch.emulate_ctxt.es_base =
2024 get_segment_base(vcpu, VCPU_SREG_ES);
2025 vcpu->arch.emulate_ctxt.ss_base =
2026 get_segment_base(vcpu, VCPU_SREG_SS);
2027 }
2028
2029 vcpu->arch.emulate_ctxt.gs_base =
2030 get_segment_base(vcpu, VCPU_SREG_GS);
2031 vcpu->arch.emulate_ctxt.fs_base =
2032 get_segment_base(vcpu, VCPU_SREG_FS);
2033
2034 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2035
2036 /* Reject the instructions other than VMCALL/VMMCALL when
2037 * try to emulate invalid opcode */
2038 c = &vcpu->arch.emulate_ctxt.decode;
2039 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2040 (!(c->twobyte && c->b == 0x01 &&
2041 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2042 c->modrm_mod == 3 && c->modrm_rm == 1)))
2043 return EMULATE_FAIL;
2044
2045 ++vcpu->stat.insn_emulation;
2046 if (r) {
2047 ++vcpu->stat.insn_emulation_fail;
2048 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2049 return EMULATE_DONE;
2050 return EMULATE_FAIL;
2051 }
2052 }
2053
2054 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2055
2056 if (vcpu->arch.pio.string)
2057 return EMULATE_DO_MMIO;
2058
2059 if ((r || vcpu->mmio_is_write) && run) {
2060 run->exit_reason = KVM_EXIT_MMIO;
2061 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2062 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2063 run->mmio.len = vcpu->mmio_size;
2064 run->mmio.is_write = vcpu->mmio_is_write;
2065 }
2066
2067 if (r) {
2068 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2069 return EMULATE_DONE;
2070 if (!vcpu->mmio_needed) {
2071 kvm_report_emulation_failure(vcpu, "mmio");
2072 return EMULATE_FAIL;
2073 }
2074 return EMULATE_DO_MMIO;
2075 }
2076
2077 kvm_x86_ops->decache_regs(vcpu);
2078 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2079
2080 if (vcpu->mmio_is_write) {
2081 vcpu->mmio_needed = 0;
2082 return EMULATE_DO_MMIO;
2083 }
2084
2085 return EMULATE_DONE;
2086 }
2087 EXPORT_SYMBOL_GPL(emulate_instruction);
2088
2089 static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
2090 {
2091 int i;
2092
2093 for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
2094 if (vcpu->arch.pio.guest_pages[i]) {
2095 kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
2096 vcpu->arch.pio.guest_pages[i] = NULL;
2097 }
2098 }
2099
2100 static int pio_copy_data(struct kvm_vcpu *vcpu)
2101 {
2102 void *p = vcpu->arch.pio_data;
2103 void *q;
2104 unsigned bytes;
2105 int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
2106
2107 q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
2108 PAGE_KERNEL);
2109 if (!q) {
2110 free_pio_guest_pages(vcpu);
2111 return -ENOMEM;
2112 }
2113 q += vcpu->arch.pio.guest_page_offset;
2114 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2115 if (vcpu->arch.pio.in)
2116 memcpy(q, p, bytes);
2117 else
2118 memcpy(p, q, bytes);
2119 q -= vcpu->arch.pio.guest_page_offset;
2120 vunmap(q);
2121 free_pio_guest_pages(vcpu);
2122 return 0;
2123 }
2124
2125 int complete_pio(struct kvm_vcpu *vcpu)
2126 {
2127 struct kvm_pio_request *io = &vcpu->arch.pio;
2128 long delta;
2129 int r;
2130
2131 kvm_x86_ops->cache_regs(vcpu);
2132
2133 if (!io->string) {
2134 if (io->in)
2135 memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
2136 io->size);
2137 } else {
2138 if (io->in) {
2139 r = pio_copy_data(vcpu);
2140 if (r) {
2141 kvm_x86_ops->cache_regs(vcpu);
2142 return r;
2143 }
2144 }
2145
2146 delta = 1;
2147 if (io->rep) {
2148 delta *= io->cur_count;
2149 /*
2150 * The size of the register should really depend on
2151 * current address size.
2152 */
2153 vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
2154 }
2155 if (io->down)
2156 delta = -delta;
2157 delta *= io->size;
2158 if (io->in)
2159 vcpu->arch.regs[VCPU_REGS_RDI] += delta;
2160 else
2161 vcpu->arch.regs[VCPU_REGS_RSI] += delta;
2162 }
2163
2164 kvm_x86_ops->decache_regs(vcpu);
2165
2166 io->count -= io->cur_count;
2167 io->cur_count = 0;
2168
2169 return 0;
2170 }
2171
2172 static void kernel_pio(struct kvm_io_device *pio_dev,
2173 struct kvm_vcpu *vcpu,
2174 void *pd)
2175 {
2176 /* TODO: String I/O for in kernel device */
2177
2178 mutex_lock(&vcpu->kvm->lock);
2179 if (vcpu->arch.pio.in)
2180 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2181 vcpu->arch.pio.size,
2182 pd);
2183 else
2184 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2185 vcpu->arch.pio.size,
2186 pd);
2187 mutex_unlock(&vcpu->kvm->lock);
2188 }
2189
2190 static void pio_string_write(struct kvm_io_device *pio_dev,
2191 struct kvm_vcpu *vcpu)
2192 {
2193 struct kvm_pio_request *io = &vcpu->arch.pio;
2194 void *pd = vcpu->arch.pio_data;
2195 int i;
2196
2197 mutex_lock(&vcpu->kvm->lock);
2198 for (i = 0; i < io->cur_count; i++) {
2199 kvm_iodevice_write(pio_dev, io->port,
2200 io->size,
2201 pd);
2202 pd += io->size;
2203 }
2204 mutex_unlock(&vcpu->kvm->lock);
2205 }
2206
2207 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2208 gpa_t addr)
2209 {
2210 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
2211 }
2212
2213 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2214 int size, unsigned port)
2215 {
2216 struct kvm_io_device *pio_dev;
2217
2218 vcpu->run->exit_reason = KVM_EXIT_IO;
2219 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2220 vcpu->run->io.size = vcpu->arch.pio.size = size;
2221 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2222 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2223 vcpu->run->io.port = vcpu->arch.pio.port = port;
2224 vcpu->arch.pio.in = in;
2225 vcpu->arch.pio.string = 0;
2226 vcpu->arch.pio.down = 0;
2227 vcpu->arch.pio.guest_page_offset = 0;
2228 vcpu->arch.pio.rep = 0;
2229
2230 kvm_x86_ops->cache_regs(vcpu);
2231 memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
2232 kvm_x86_ops->decache_regs(vcpu);
2233
2234 kvm_x86_ops->skip_emulated_instruction(vcpu);
2235
2236 pio_dev = vcpu_find_pio_dev(vcpu, port);
2237 if (pio_dev) {
2238 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2239 complete_pio(vcpu);
2240 return 1;
2241 }
2242 return 0;
2243 }
2244 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2245
2246 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2247 int size, unsigned long count, int down,
2248 gva_t address, int rep, unsigned port)
2249 {
2250 unsigned now, in_page;
2251 int i, ret = 0;
2252 int nr_pages = 1;
2253 struct page *page;
2254 struct kvm_io_device *pio_dev;
2255
2256 vcpu->run->exit_reason = KVM_EXIT_IO;
2257 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2258 vcpu->run->io.size = vcpu->arch.pio.size = size;
2259 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2260 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2261 vcpu->run->io.port = vcpu->arch.pio.port = port;
2262 vcpu->arch.pio.in = in;
2263 vcpu->arch.pio.string = 1;
2264 vcpu->arch.pio.down = down;
2265 vcpu->arch.pio.guest_page_offset = offset_in_page(address);
2266 vcpu->arch.pio.rep = rep;
2267
2268 if (!count) {
2269 kvm_x86_ops->skip_emulated_instruction(vcpu);
2270 return 1;
2271 }
2272
2273 if (!down)
2274 in_page = PAGE_SIZE - offset_in_page(address);
2275 else
2276 in_page = offset_in_page(address) + size;
2277 now = min(count, (unsigned long)in_page / size);
2278 if (!now) {
2279 /*
2280 * String I/O straddles page boundary. Pin two guest pages
2281 * so that we satisfy atomicity constraints. Do just one
2282 * transaction to avoid complexity.
2283 */
2284 nr_pages = 2;
2285 now = 1;
2286 }
2287 if (down) {
2288 /*
2289 * String I/O in reverse. Yuck. Kill the guest, fix later.
2290 */
2291 pr_unimpl(vcpu, "guest string pio down\n");
2292 kvm_inject_gp(vcpu, 0);
2293 return 1;
2294 }
2295 vcpu->run->io.count = now;
2296 vcpu->arch.pio.cur_count = now;
2297
2298 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2299 kvm_x86_ops->skip_emulated_instruction(vcpu);
2300
2301 for (i = 0; i < nr_pages; ++i) {
2302 <<<<<<< HEAD:arch/x86/kvm/x86.c
2303 down_read(&current->mm->mmap_sem);
2304 =======
2305 down_read(&vcpu->kvm->slots_lock);
2306 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
2307 page = gva_to_page(vcpu, address + i * PAGE_SIZE);
2308 vcpu->arch.pio.guest_pages[i] = page;
2309 <<<<<<< HEAD:arch/x86/kvm/x86.c
2310 up_read(&current->mm->mmap_sem);
2311 =======
2312 up_read(&vcpu->kvm->slots_lock);
2313 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
2314 if (!page) {
2315 kvm_inject_gp(vcpu, 0);
2316 free_pio_guest_pages(vcpu);
2317 return 1;
2318 }
2319 }
2320
2321 pio_dev = vcpu_find_pio_dev(vcpu, port);
2322 if (!vcpu->arch.pio.in) {
2323 /* string PIO write */
2324 ret = pio_copy_data(vcpu);
2325 if (ret >= 0 && pio_dev) {
2326 pio_string_write(pio_dev, vcpu);
2327 complete_pio(vcpu);
2328 if (vcpu->arch.pio.count == 0)
2329 ret = 1;
2330 }
2331 } else if (pio_dev)
2332 pr_unimpl(vcpu, "no string pio read support yet, "
2333 "port %x size %d count %ld\n",
2334 port, size, count);
2335
2336 return ret;
2337 }
2338 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2339
2340 int kvm_arch_init(void *opaque)
2341 {
2342 int r;
2343 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2344
2345 if (kvm_x86_ops) {
2346 printk(KERN_ERR "kvm: already loaded the other module\n");
2347 r = -EEXIST;
2348 goto out;
2349 }
2350
2351 if (!ops->cpu_has_kvm_support()) {
2352 printk(KERN_ERR "kvm: no hardware support\n");
2353 r = -EOPNOTSUPP;
2354 goto out;
2355 }
2356 if (ops->disabled_by_bios()) {
2357 printk(KERN_ERR "kvm: disabled by bios\n");
2358 r = -EOPNOTSUPP;
2359 goto out;
2360 }
2361
2362 r = kvm_mmu_module_init();
2363 if (r)
2364 goto out;
2365
2366 kvm_init_msr_list();
2367
2368 kvm_x86_ops = ops;
2369 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2370 return 0;
2371
2372 out:
2373 return r;
2374 }
2375
2376 void kvm_arch_exit(void)
2377 {
2378 kvm_x86_ops = NULL;
2379 kvm_mmu_module_exit();
2380 }
2381
2382 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2383 {
2384 ++vcpu->stat.halt_exits;
2385 if (irqchip_in_kernel(vcpu->kvm)) {
2386 vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
2387 kvm_vcpu_block(vcpu);
2388 if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
2389 return -EINTR;
2390 return 1;
2391 } else {
2392 vcpu->run->exit_reason = KVM_EXIT_HLT;
2393 return 0;
2394 }
2395 }
2396 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2397
2398 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2399 {
2400 unsigned long nr, a0, a1, a2, a3, ret;
2401
2402 kvm_x86_ops->cache_regs(vcpu);
2403
2404 nr = vcpu->arch.regs[VCPU_REGS_RAX];
2405 a0 = vcpu->arch.regs[VCPU_REGS_RBX];
2406 a1 = vcpu->arch.regs[VCPU_REGS_RCX];
2407 a2 = vcpu->arch.regs[VCPU_REGS_RDX];
2408 a3 = vcpu->arch.regs[VCPU_REGS_RSI];
2409
2410 if (!is_long_mode(vcpu)) {
2411 nr &= 0xFFFFFFFF;
2412 a0 &= 0xFFFFFFFF;
2413 a1 &= 0xFFFFFFFF;
2414 a2 &= 0xFFFFFFFF;
2415 a3 &= 0xFFFFFFFF;
2416 }
2417
2418 switch (nr) {
2419 case KVM_HC_VAPIC_POLL_IRQ:
2420 ret = 0;
2421 break;
2422 default:
2423 ret = -KVM_ENOSYS;
2424 break;
2425 }
2426 vcpu->arch.regs[VCPU_REGS_RAX] = ret;
2427 kvm_x86_ops->decache_regs(vcpu);
2428 return 0;
2429 }
2430 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2431
2432 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2433 {
2434 char instruction[3];
2435 int ret = 0;
2436
2437
2438 /*
2439 * Blow out the MMU to ensure that no other VCPU has an active mapping
2440 * to ensure that the updated hypercall appears atomically across all
2441 * VCPUs.
2442 */
2443 kvm_mmu_zap_all(vcpu->kvm);
2444
2445 kvm_x86_ops->cache_regs(vcpu);
2446 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2447 if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
2448 != X86EMUL_CONTINUE)
2449 ret = -EFAULT;
2450
2451 return ret;
2452 }
2453
2454 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2455 {
2456 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2457 }
2458
2459 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2460 {
2461 struct descriptor_table dt = { limit, base };
2462
2463 kvm_x86_ops->set_gdt(vcpu, &dt);
2464 }
2465
2466 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2467 {
2468 struct descriptor_table dt = { limit, base };
2469
2470 kvm_x86_ops->set_idt(vcpu, &dt);
2471 }
2472
2473 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2474 unsigned long *rflags)
2475 {
2476 lmsw(vcpu, msw);
2477 *rflags = kvm_x86_ops->get_rflags(vcpu);
2478 }
2479
2480 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2481 {
2482 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2483 switch (cr) {
2484 case 0:
2485 return vcpu->arch.cr0;
2486 case 2:
2487 return vcpu->arch.cr2;
2488 case 3:
2489 return vcpu->arch.cr3;
2490 case 4:
2491 return vcpu->arch.cr4;
2492 case 8:
2493 return get_cr8(vcpu);
2494 default:
2495 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2496 return 0;
2497 }
2498 }
2499
2500 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2501 unsigned long *rflags)
2502 {
2503 switch (cr) {
2504 case 0:
2505 set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2506 *rflags = kvm_x86_ops->get_rflags(vcpu);
2507 break;
2508 case 2:
2509 vcpu->arch.cr2 = val;
2510 break;
2511 case 3:
2512 set_cr3(vcpu, val);
2513 break;
2514 case 4:
2515 set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2516 break;
2517 case 8:
2518 set_cr8(vcpu, val & 0xfUL);
2519 break;
2520 default:
2521 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
2522 }
2523 }
2524
2525 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2526 {
2527 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2528 int j, nent = vcpu->arch.cpuid_nent;
2529
2530 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2531 /* when no next entry is found, the current entry[i] is reselected */
2532 for (j = i + 1; j == i; j = (j + 1) % nent) {
2533 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2534 if (ej->function == e->function) {
2535 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2536 return j;
2537 }
2538 }
2539 return 0; /* silence gcc, even though control never reaches here */
2540 }
2541
2542 /* find an entry with matching function, matching index (if needed), and that
2543 * should be read next (if it's stateful) */
2544 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2545 u32 function, u32 index)
2546 {
2547 if (e->function != function)
2548 return 0;
2549 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2550 return 0;
2551 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2552 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2553 return 0;
2554 return 1;
2555 }
2556
2557 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2558 {
2559 int i;
2560 u32 function, index;
2561 struct kvm_cpuid_entry2 *e, *best;
2562
2563 kvm_x86_ops->cache_regs(vcpu);
2564 function = vcpu->arch.regs[VCPU_REGS_RAX];
2565 index = vcpu->arch.regs[VCPU_REGS_RCX];
2566 vcpu->arch.regs[VCPU_REGS_RAX] = 0;
2567 vcpu->arch.regs[VCPU_REGS_RBX] = 0;
2568 vcpu->arch.regs[VCPU_REGS_RCX] = 0;
2569 vcpu->arch.regs[VCPU_REGS_RDX] = 0;
2570 best = NULL;
2571 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2572 e = &vcpu->arch.cpuid_entries[i];
2573 if (is_matching_cpuid_entry(e, function, index)) {
2574 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
2575 move_to_next_stateful_cpuid_entry(vcpu, i);
2576 best = e;
2577 break;
2578 }
2579 /*
2580 * Both basic or both extended?
2581 */
2582 if (((e->function ^ function) & 0x80000000) == 0)
2583 if (!best || e->function > best->function)
2584 best = e;
2585 }
2586 if (best) {
2587 vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
2588 vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
2589 vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
2590 vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
2591 }
2592 kvm_x86_ops->decache_regs(vcpu);
2593 kvm_x86_ops->skip_emulated_instruction(vcpu);
2594 }
2595 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
2596
2597 /*
2598 * Check if userspace requested an interrupt window, and that the
2599 * interrupt window is open.
2600 *
2601 * No need to exit to userspace if we already have an interrupt queued.
2602 */
2603 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
2604 struct kvm_run *kvm_run)
2605 {
2606 return (!vcpu->arch.irq_summary &&
2607 kvm_run->request_interrupt_window &&
2608 vcpu->arch.interrupt_window_open &&
2609 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
2610 }
2611
2612 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
2613 struct kvm_run *kvm_run)
2614 {
2615 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
2616 kvm_run->cr8 = get_cr8(vcpu);
2617 kvm_run->apic_base = kvm_get_apic_base(vcpu);
2618 if (irqchip_in_kernel(vcpu->kvm))
2619 kvm_run->ready_for_interrupt_injection = 1;
2620 else
2621 kvm_run->ready_for_interrupt_injection =
2622 (vcpu->arch.interrupt_window_open &&
2623 vcpu->arch.irq_summary == 0);
2624 }
2625
2626 static void vapic_enter(struct kvm_vcpu *vcpu)
2627 {
2628 struct kvm_lapic *apic = vcpu->arch.apic;
2629 struct page *page;
2630
2631 if (!apic || !apic->vapic_addr)
2632 return;
2633
2634 down_read(&current->mm->mmap_sem);
2635 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2636 <<<<<<< HEAD:arch/x86/kvm/x86.c
2637 vcpu->arch.apic->vapic_page = page;
2638 =======
2639 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
2640 up_read(&current->mm->mmap_sem);
2641 <<<<<<< HEAD:arch/x86/kvm/x86.c
2642 =======
2643
2644 vcpu->arch.apic->vapic_page = page;
2645 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
2646 }
2647
2648 static void vapic_exit(struct kvm_vcpu *vcpu)
2649 {
2650 struct kvm_lapic *apic = vcpu->arch.apic;
2651
2652 if (!apic || !apic->vapic_addr)
2653 return;
2654
2655 kvm_release_page_dirty(apic->vapic_page);
2656 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
2657 }
2658
2659 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2660 {
2661 int r;
2662
2663 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
2664 pr_debug("vcpu %d received sipi with vector # %x\n",
2665 vcpu->vcpu_id, vcpu->arch.sipi_vector);
2666 kvm_lapic_reset(vcpu);
2667 r = kvm_x86_ops->vcpu_reset(vcpu);
2668 if (r)
2669 return r;
2670 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
2671 }
2672
2673 vapic_enter(vcpu);
2674
2675 preempted:
2676 if (vcpu->guest_debug.enabled)
2677 kvm_x86_ops->guest_debug_pre(vcpu);
2678
2679 again:
2680 r = kvm_mmu_reload(vcpu);
2681 if (unlikely(r))
2682 goto out;
2683
2684 if (vcpu->requests) {
2685 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
2686 __kvm_migrate_apic_timer(vcpu);
2687 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
2688 &vcpu->requests)) {
2689 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
2690 r = 0;
2691 goto out;
2692 }
2693 }
2694
2695 kvm_inject_pending_timer_irqs(vcpu);
2696
2697 preempt_disable();
2698
2699 kvm_x86_ops->prepare_guest_switch(vcpu);
2700 kvm_load_guest_fpu(vcpu);
2701
2702 local_irq_disable();
2703
2704 if (need_resched()) {
2705 local_irq_enable();
2706 preempt_enable();
2707 r = 1;
2708 goto out;
2709 }
2710
2711 if (signal_pending(current)) {
2712 local_irq_enable();
2713 preempt_enable();
2714 r = -EINTR;
2715 kvm_run->exit_reason = KVM_EXIT_INTR;
2716 ++vcpu->stat.signal_exits;
2717 goto out;
2718 }
2719
2720 if (vcpu->arch.exception.pending)
2721 __queue_exception(vcpu);
2722 else if (irqchip_in_kernel(vcpu->kvm))
2723 kvm_x86_ops->inject_pending_irq(vcpu);
2724 else
2725 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
2726
2727 kvm_lapic_sync_to_vapic(vcpu);
2728
2729 vcpu->guest_mode = 1;
2730 kvm_guest_enter();
2731
2732 if (vcpu->requests)
2733 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
2734 kvm_x86_ops->tlb_flush(vcpu);
2735
2736 kvm_x86_ops->run(vcpu, kvm_run);
2737
2738 vcpu->guest_mode = 0;
2739 local_irq_enable();
2740
2741 ++vcpu->stat.exits;
2742
2743 /*
2744 * We must have an instruction between local_irq_enable() and
2745 * kvm_guest_exit(), so the timer interrupt isn't delayed by
2746 * the interrupt shadow. The stat.exits increment will do nicely.
2747 * But we need to prevent reordering, hence this barrier():
2748 */
2749 barrier();
2750
2751 kvm_guest_exit();
2752
2753 preempt_enable();
2754
2755 /*
2756 * Profile KVM exit RIPs:
2757 */
2758 if (unlikely(prof_on == KVM_PROFILING)) {
2759 kvm_x86_ops->cache_regs(vcpu);
2760 profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
2761 }
2762
2763 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
2764 vcpu->arch.exception.pending = false;
2765
2766 kvm_lapic_sync_from_vapic(vcpu);
2767
2768 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
2769
2770 if (r > 0) {
2771 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2772 r = -EINTR;
2773 kvm_run->exit_reason = KVM_EXIT_INTR;
2774 ++vcpu->stat.request_irq_exits;
2775 goto out;
2776 }
2777 if (!need_resched())
2778 goto again;
2779 }
2780
2781 out:
2782 if (r > 0) {
2783 kvm_resched(vcpu);
2784 goto preempted;
2785 }
2786
2787 post_kvm_run_save(vcpu, kvm_run);
2788
2789 vapic_exit(vcpu);
2790
2791 return r;
2792 }
2793
2794 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
2795 {
2796 int r;
2797 sigset_t sigsaved;
2798
2799 vcpu_load(vcpu);
2800
2801 if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
2802 kvm_vcpu_block(vcpu);
2803 vcpu_put(vcpu);
2804 return -EAGAIN;
2805 }
2806
2807 if (vcpu->sigset_active)
2808 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
2809
2810 /* re-sync apic's tpr */
2811 if (!irqchip_in_kernel(vcpu->kvm))
2812 set_cr8(vcpu, kvm_run->cr8);
2813
2814 if (vcpu->arch.pio.cur_count) {
2815 r = complete_pio(vcpu);
2816 if (r)
2817 goto out;
2818 }
2819 #if CONFIG_HAS_IOMEM
2820 if (vcpu->mmio_needed) {
2821 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
2822 vcpu->mmio_read_completed = 1;
2823 vcpu->mmio_needed = 0;
2824 r = emulate_instruction(vcpu, kvm_run,
2825 vcpu->arch.mmio_fault_cr2, 0,
2826 EMULTYPE_NO_DECODE);
2827 if (r == EMULATE_DO_MMIO) {
2828 /*
2829 * Read-modify-write. Back to userspace.
2830 */
2831 r = 0;
2832 goto out;
2833 }
2834 }
2835 #endif
2836 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
2837 kvm_x86_ops->cache_regs(vcpu);
2838 vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
2839 kvm_x86_ops->decache_regs(vcpu);
2840 }
2841
2842 r = __vcpu_run(vcpu, kvm_run);
2843
2844 out:
2845 if (vcpu->sigset_active)
2846 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
2847
2848 vcpu_put(vcpu);
2849 return r;
2850 }
2851
2852 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2853 {
2854 vcpu_load(vcpu);
2855
2856 kvm_x86_ops->cache_regs(vcpu);
2857
2858 regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
2859 regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
2860 regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
2861 regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
2862 regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
2863 regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
2864 regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
2865 regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
2866 #ifdef CONFIG_X86_64
2867 regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
2868 regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
2869 regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
2870 regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
2871 regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
2872 regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
2873 regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
2874 regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
2875 #endif
2876
2877 regs->rip = vcpu->arch.rip;
2878 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
2879
2880 /*
2881 * Don't leak debug flags in case they were set for guest debugging
2882 */
2883 if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
2884 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
2885
2886 vcpu_put(vcpu);
2887
2888 return 0;
2889 }
2890
2891 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
2892 {
2893 vcpu_load(vcpu);
2894
2895 vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
2896 vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
2897 vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
2898 vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
2899 vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
2900 vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
2901 vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
2902 vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
2903 #ifdef CONFIG_X86_64
2904 vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
2905 vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
2906 vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
2907 vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
2908 vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
2909 vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
2910 vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
2911 vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
2912 #endif
2913
2914 vcpu->arch.rip = regs->rip;
2915 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
2916
2917 kvm_x86_ops->decache_regs(vcpu);
2918
2919 vcpu_put(vcpu);
2920
2921 return 0;
2922 }
2923
2924 static void get_segment(struct kvm_vcpu *vcpu,
2925 struct kvm_segment *var, int seg)
2926 {
2927 return kvm_x86_ops->get_segment(vcpu, var, seg);
2928 }
2929
2930 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
2931 {
2932 struct kvm_segment cs;
2933
2934 get_segment(vcpu, &cs, VCPU_SREG_CS);
2935 *db = cs.db;
2936 *l = cs.l;
2937 }
2938 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
2939
2940 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
2941 struct kvm_sregs *sregs)
2942 {
2943 struct descriptor_table dt;
2944 int pending_vec;
2945
2946 vcpu_load(vcpu);
2947
2948 get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
2949 get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
2950 get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
2951 get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
2952 get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
2953 get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
2954
2955 get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
2956 get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
2957
2958 kvm_x86_ops->get_idt(vcpu, &dt);
2959 sregs->idt.limit = dt.limit;
2960 sregs->idt.base = dt.base;
2961 kvm_x86_ops->get_gdt(vcpu, &dt);
2962 sregs->gdt.limit = dt.limit;
2963 sregs->gdt.base = dt.base;
2964
2965 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2966 sregs->cr0 = vcpu->arch.cr0;
2967 sregs->cr2 = vcpu->arch.cr2;
2968 sregs->cr3 = vcpu->arch.cr3;
2969 sregs->cr4 = vcpu->arch.cr4;
2970 sregs->cr8 = get_cr8(vcpu);
2971 sregs->efer = vcpu->arch.shadow_efer;
2972 sregs->apic_base = kvm_get_apic_base(vcpu);
2973
2974 if (irqchip_in_kernel(vcpu->kvm)) {
2975 memset(sregs->interrupt_bitmap, 0,
2976 sizeof sregs->interrupt_bitmap);
2977 pending_vec = kvm_x86_ops->get_irq(vcpu);
2978 if (pending_vec >= 0)
2979 set_bit(pending_vec,
2980 (unsigned long *)sregs->interrupt_bitmap);
2981 } else
2982 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
2983 sizeof sregs->interrupt_bitmap);
2984
2985 vcpu_put(vcpu);
2986
2987 return 0;
2988 }
2989
2990 static void set_segment(struct kvm_vcpu *vcpu,
2991 struct kvm_segment *var, int seg)
2992 {
2993 return kvm_x86_ops->set_segment(vcpu, var, seg);
2994 }
2995
2996 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
2997 struct kvm_sregs *sregs)
2998 {
2999 int mmu_reset_needed = 0;
3000 int i, pending_vec, max_bits;
3001 struct descriptor_table dt;
3002
3003 vcpu_load(vcpu);
3004
3005 dt.limit = sregs->idt.limit;
3006 dt.base = sregs->idt.base;
3007 kvm_x86_ops->set_idt(vcpu, &dt);
3008 dt.limit = sregs->gdt.limit;
3009 dt.base = sregs->gdt.base;
3010 kvm_x86_ops->set_gdt(vcpu, &dt);
3011
3012 vcpu->arch.cr2 = sregs->cr2;
3013 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3014 vcpu->arch.cr3 = sregs->cr3;
3015
3016 set_cr8(vcpu, sregs->cr8);
3017
3018 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3019 #ifdef CONFIG_X86_64
3020 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3021 #endif
3022 kvm_set_apic_base(vcpu, sregs->apic_base);
3023
3024 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3025
3026 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3027 <<<<<<< HEAD:arch/x86/kvm/x86.c
3028 vcpu->arch.cr0 = sregs->cr0;
3029 =======
3030 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3031 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3032 <<<<<<< HEAD:arch/x86/kvm/x86.c
3033 =======
3034 vcpu->arch.cr0 = sregs->cr0;
3035 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3036
3037 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3038 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3039 if (!is_long_mode(vcpu) && is_pae(vcpu))
3040 load_pdptrs(vcpu, vcpu->arch.cr3);
3041
3042 if (mmu_reset_needed)
3043 kvm_mmu_reset_context(vcpu);
3044
3045 if (!irqchip_in_kernel(vcpu->kvm)) {
3046 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3047 sizeof vcpu->arch.irq_pending);
3048 vcpu->arch.irq_summary = 0;
3049 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3050 if (vcpu->arch.irq_pending[i])
3051 __set_bit(i, &vcpu->arch.irq_summary);
3052 } else {
3053 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3054 pending_vec = find_first_bit(
3055 (const unsigned long *)sregs->interrupt_bitmap,
3056 max_bits);
3057 /* Only pending external irq is handled here */
3058 if (pending_vec < max_bits) {
3059 kvm_x86_ops->set_irq(vcpu, pending_vec);
3060 pr_debug("Set back pending irq %d\n",
3061 pending_vec);
3062 }
3063 }
3064
3065 set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3066 set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3067 set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3068 set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3069 set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3070 set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3071
3072 set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3073 set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3074
3075 vcpu_put(vcpu);
3076
3077 return 0;
3078 }
3079
3080 int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
3081 struct kvm_debug_guest *dbg)
3082 {
3083 int r;
3084
3085 vcpu_load(vcpu);
3086
3087 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
3088
3089 vcpu_put(vcpu);
3090
3091 return r;
3092 }
3093
3094 /*
3095 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
3096 * we have asm/x86/processor.h
3097 */
3098 struct fxsave {
3099 u16 cwd;
3100 u16 swd;
3101 u16 twd;
3102 u16 fop;
3103 u64 rip;
3104 u64 rdp;
3105 u32 mxcsr;
3106 u32 mxcsr_mask;
3107 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
3108 #ifdef CONFIG_X86_64
3109 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
3110 #else
3111 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
3112 #endif
3113 };
3114
3115 /*
3116 * Translate a guest virtual address to a guest physical address.
3117 */
3118 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
3119 struct kvm_translation *tr)
3120 {
3121 unsigned long vaddr = tr->linear_address;
3122 gpa_t gpa;
3123
3124 vcpu_load(vcpu);
3125 <<<<<<< HEAD:arch/x86/kvm/x86.c
3126 down_read(&current->mm->mmap_sem);
3127 =======
3128 down_read(&vcpu->kvm->slots_lock);
3129 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3130 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
3131 <<<<<<< HEAD:arch/x86/kvm/x86.c
3132 up_read(&current->mm->mmap_sem);
3133 =======
3134 up_read(&vcpu->kvm->slots_lock);
3135 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3136 tr->physical_address = gpa;
3137 tr->valid = gpa != UNMAPPED_GVA;
3138 tr->writeable = 1;
3139 tr->usermode = 0;
3140 vcpu_put(vcpu);
3141
3142 return 0;
3143 }
3144
3145 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3146 {
3147 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3148
3149 vcpu_load(vcpu);
3150
3151 memcpy(fpu->fpr, fxsave->st_space, 128);
3152 fpu->fcw = fxsave->cwd;
3153 fpu->fsw = fxsave->swd;
3154 fpu->ftwx = fxsave->twd;
3155 fpu->last_opcode = fxsave->fop;
3156 fpu->last_ip = fxsave->rip;
3157 fpu->last_dp = fxsave->rdp;
3158 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
3159
3160 vcpu_put(vcpu);
3161
3162 return 0;
3163 }
3164
3165 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
3166 {
3167 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
3168
3169 vcpu_load(vcpu);
3170
3171 memcpy(fxsave->st_space, fpu->fpr, 128);
3172 fxsave->cwd = fpu->fcw;
3173 fxsave->swd = fpu->fsw;
3174 fxsave->twd = fpu->ftwx;
3175 fxsave->fop = fpu->last_opcode;
3176 fxsave->rip = fpu->last_ip;
3177 fxsave->rdp = fpu->last_dp;
3178 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
3179
3180 vcpu_put(vcpu);
3181
3182 return 0;
3183 }
3184
3185 void fx_init(struct kvm_vcpu *vcpu)
3186 {
3187 unsigned after_mxcsr_mask;
3188
3189 /* Initialize guest FPU by resetting ours and saving into guest's */
3190 preempt_disable();
3191 fx_save(&vcpu->arch.host_fx_image);
3192 fpu_init();
3193 fx_save(&vcpu->arch.guest_fx_image);
3194 fx_restore(&vcpu->arch.host_fx_image);
3195 preempt_enable();
3196
3197 vcpu->arch.cr0 |= X86_CR0_ET;
3198 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
3199 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
3200 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
3201 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
3202 }
3203 EXPORT_SYMBOL_GPL(fx_init);
3204
3205 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
3206 {
3207 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
3208 return;
3209
3210 vcpu->guest_fpu_loaded = 1;
3211 fx_save(&vcpu->arch.host_fx_image);
3212 fx_restore(&vcpu->arch.guest_fx_image);
3213 }
3214 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
3215
3216 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
3217 {
3218 if (!vcpu->guest_fpu_loaded)
3219 return;
3220
3221 vcpu->guest_fpu_loaded = 0;
3222 fx_save(&vcpu->arch.guest_fx_image);
3223 fx_restore(&vcpu->arch.host_fx_image);
3224 ++vcpu->stat.fpu_reload;
3225 }
3226 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
3227
3228 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
3229 {
3230 kvm_x86_ops->vcpu_free(vcpu);
3231 }
3232
3233 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
3234 unsigned int id)
3235 {
3236 return kvm_x86_ops->vcpu_create(kvm, id);
3237 }
3238
3239 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
3240 {
3241 int r;
3242
3243 /* We do fxsave: this must be aligned. */
3244 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
3245
3246 vcpu_load(vcpu);
3247 r = kvm_arch_vcpu_reset(vcpu);
3248 if (r == 0)
3249 r = kvm_mmu_setup(vcpu);
3250 vcpu_put(vcpu);
3251 if (r < 0)
3252 goto free_vcpu;
3253
3254 return 0;
3255 free_vcpu:
3256 kvm_x86_ops->vcpu_free(vcpu);
3257 return r;
3258 }
3259
3260 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
3261 {
3262 vcpu_load(vcpu);
3263 kvm_mmu_unload(vcpu);
3264 vcpu_put(vcpu);
3265
3266 kvm_x86_ops->vcpu_free(vcpu);
3267 }
3268
3269 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
3270 {
3271 return kvm_x86_ops->vcpu_reset(vcpu);
3272 }
3273
3274 void kvm_arch_hardware_enable(void *garbage)
3275 {
3276 kvm_x86_ops->hardware_enable(garbage);
3277 }
3278
3279 void kvm_arch_hardware_disable(void *garbage)
3280 {
3281 kvm_x86_ops->hardware_disable(garbage);
3282 }
3283
3284 int kvm_arch_hardware_setup(void)
3285 {
3286 return kvm_x86_ops->hardware_setup();
3287 }
3288
3289 void kvm_arch_hardware_unsetup(void)
3290 {
3291 kvm_x86_ops->hardware_unsetup();
3292 }
3293
3294 void kvm_arch_check_processor_compat(void *rtn)
3295 {
3296 kvm_x86_ops->check_processor_compatibility(rtn);
3297 }
3298
3299 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
3300 {
3301 struct page *page;
3302 struct kvm *kvm;
3303 int r;
3304
3305 BUG_ON(vcpu->kvm == NULL);
3306 kvm = vcpu->kvm;
3307
3308 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
3309 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
3310 vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
3311 else
3312 vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
3313
3314 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
3315 if (!page) {
3316 r = -ENOMEM;
3317 goto fail;
3318 }
3319 vcpu->arch.pio_data = page_address(page);
3320
3321 r = kvm_mmu_create(vcpu);
3322 if (r < 0)
3323 goto fail_free_pio_data;
3324
3325 if (irqchip_in_kernel(kvm)) {
3326 r = kvm_create_lapic(vcpu);
3327 if (r < 0)
3328 goto fail_mmu_destroy;
3329 }
3330
3331 return 0;
3332
3333 fail_mmu_destroy:
3334 kvm_mmu_destroy(vcpu);
3335 fail_free_pio_data:
3336 free_page((unsigned long)vcpu->arch.pio_data);
3337 fail:
3338 return r;
3339 }
3340
3341 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
3342 {
3343 kvm_free_lapic(vcpu);
3344 kvm_mmu_destroy(vcpu);
3345 free_page((unsigned long)vcpu->arch.pio_data);
3346 }
3347
3348 struct kvm *kvm_arch_create_vm(void)
3349 {
3350 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
3351
3352 if (!kvm)
3353 return ERR_PTR(-ENOMEM);
3354
3355 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
3356
3357 return kvm;
3358 }
3359
3360 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
3361 {
3362 vcpu_load(vcpu);
3363 kvm_mmu_unload(vcpu);
3364 vcpu_put(vcpu);
3365 }
3366
3367 static void kvm_free_vcpus(struct kvm *kvm)
3368 {
3369 unsigned int i;
3370
3371 /*
3372 * Unpin any mmu pages first.
3373 */
3374 for (i = 0; i < KVM_MAX_VCPUS; ++i)
3375 if (kvm->vcpus[i])
3376 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
3377 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
3378 if (kvm->vcpus[i]) {
3379 kvm_arch_vcpu_free(kvm->vcpus[i]);
3380 kvm->vcpus[i] = NULL;
3381 }
3382 }
3383
3384 }
3385
3386 void kvm_arch_destroy_vm(struct kvm *kvm)
3387 {
3388 kfree(kvm->arch.vpic);
3389 kfree(kvm->arch.vioapic);
3390 kvm_free_vcpus(kvm);
3391 kvm_free_physmem(kvm);
3392 kfree(kvm);
3393 }
3394
3395 int kvm_arch_set_memory_region(struct kvm *kvm,
3396 struct kvm_userspace_memory_region *mem,
3397 struct kvm_memory_slot old,
3398 int user_alloc)
3399 {
3400 int npages = mem->memory_size >> PAGE_SHIFT;
3401 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
3402
3403 /*To keep backward compatibility with older userspace,
3404 *x86 needs to hanlde !user_alloc case.
3405 */
3406 if (!user_alloc) {
3407 if (npages && !old.rmap) {
3408 <<<<<<< HEAD:arch/x86/kvm/x86.c
3409 =======
3410 down_write(&current->mm->mmap_sem);
3411 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3412 memslot->userspace_addr = do_mmap(NULL, 0,
3413 npages * PAGE_SIZE,
3414 PROT_READ | PROT_WRITE,
3415 MAP_SHARED | MAP_ANONYMOUS,
3416 0);
3417 <<<<<<< HEAD:arch/x86/kvm/x86.c
3418 =======
3419 up_write(&current->mm->mmap_sem);
3420 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3421
3422 if (IS_ERR((void *)memslot->userspace_addr))
3423 return PTR_ERR((void *)memslot->userspace_addr);
3424 } else {
3425 if (!old.user_alloc && old.rmap) {
3426 int ret;
3427
3428 <<<<<<< HEAD:arch/x86/kvm/x86.c
3429 =======
3430 down_write(&current->mm->mmap_sem);
3431 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3432 ret = do_munmap(current->mm, old.userspace_addr,
3433 old.npages * PAGE_SIZE);
3434 <<<<<<< HEAD:arch/x86/kvm/x86.c
3435 =======
3436 up_write(&current->mm->mmap_sem);
3437 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:arch/x86/kvm/x86.c
3438 if (ret < 0)
3439 printk(KERN_WARNING
3440 "kvm_vm_ioctl_set_memory_region: "
3441 "failed to munmap memory\n");
3442 }
3443 }
3444 }
3445
3446 if (!kvm->arch.n_requested_mmu_pages) {
3447 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
3448 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
3449 }
3450
3451 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
3452 kvm_flush_remote_tlbs(kvm);
3453
3454 return 0;
3455 }
3456
3457 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
3458 {
3459 return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
3460 || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
3461 }
3462
3463 static void vcpu_kick_intr(void *info)
3464 {
3465 #ifdef DEBUG
3466 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
3467 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
3468 #endif
3469 }
3470
3471 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
3472 {
3473 int ipi_pcpu = vcpu->cpu;
3474
3475 if (waitqueue_active(&vcpu->wq)) {
3476 wake_up_interruptible(&vcpu->wq);
3477 ++vcpu->stat.halt_wakeup;
3478 }
3479 if (vcpu->guest_mode)
3480 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
3481 }
WRT350N Kernel Patches