1 /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
4 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 #define USER_INT_FLAG (1<<1)
35 #define VSYNC_PIPEB_FLAG (1<<5)
36 #define VSYNC_PIPEA_FLAG (1<<7)
38 #define MAX_NOPID ((u32)~0)
41 * Emit blits for scheduled buffer swaps.
43 * This function will be called with the HW lock held.
45 static void i915_vblank_tasklet(struct drm_device
*dev
)
47 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
48 unsigned long irqflags
;
49 struct list_head
*list
, *tmp
, hits
, *hit
;
50 int nhits
, nrects
, slice
[2], upper
[2], lower
[2], i
;
51 unsigned counter
[2] = { atomic_read(&dev
->vbl_received
),
52 atomic_read(&dev
->vbl_received2
) };
53 struct drm_drawable_info
*drw
;
54 drm_i915_sarea_t
*sarea_priv
= dev_priv
->sarea_priv
;
55 u32 cpp
= dev_priv
->cpp
;
56 u32 cmd
= (cpp
== 4) ? (XY_SRC_COPY_BLT_CMD
|
57 XY_SRC_COPY_BLT_WRITE_ALPHA
|
58 XY_SRC_COPY_BLT_WRITE_RGB
)
59 : XY_SRC_COPY_BLT_CMD
;
60 u32 pitchropcpp
= (sarea_priv
->pitch
* cpp
) | (0xcc << 16) |
61 (cpp
<< 23) | (1 << 24);
66 INIT_LIST_HEAD(&hits
);
70 spin_lock_irqsave(&dev_priv
->swaps_lock
, irqflags
);
72 /* Find buffer swaps scheduled for this vertical blank */
73 list_for_each_safe(list
, tmp
, &dev_priv
->vbl_swaps
.head
) {
74 drm_i915_vbl_swap_t
*vbl_swap
=
75 list_entry(list
, drm_i915_vbl_swap_t
, head
);
77 if ((counter
[vbl_swap
->pipe
] - vbl_swap
->sequence
) > (1<<23))
81 dev_priv
->swaps_pending
--;
83 spin_unlock(&dev_priv
->swaps_lock
);
84 spin_lock(&dev
->drw_lock
);
86 drw
= drm_get_drawable_info(dev
, vbl_swap
->drw_id
);
89 spin_unlock(&dev
->drw_lock
);
90 drm_free(vbl_swap
, sizeof(*vbl_swap
), DRM_MEM_DRIVER
);
91 spin_lock(&dev_priv
->swaps_lock
);
95 list_for_each(hit
, &hits
) {
96 drm_i915_vbl_swap_t
*swap_cmp
=
97 list_entry(hit
, drm_i915_vbl_swap_t
, head
);
98 struct drm_drawable_info
*drw_cmp
=
99 drm_get_drawable_info(dev
, swap_cmp
->drw_id
);
102 drw_cmp
->rects
[0].y1
> drw
->rects
[0].y1
) {
103 list_add_tail(list
, hit
);
108 spin_unlock(&dev
->drw_lock
);
110 /* List of hits was empty, or we reached the end of it */
112 list_add_tail(list
, hits
.prev
);
116 spin_lock(&dev_priv
->swaps_lock
);
120 spin_unlock_irqrestore(&dev_priv
->swaps_lock
, irqflags
);
124 spin_unlock(&dev_priv
->swaps_lock
);
126 i915_kernel_lost_context(dev
);
130 OUT_RING(GFX_OP_DRAWRECT_INFO
);
133 OUT_RING(sarea_priv
->width
| sarea_priv
->height
<< 16);
134 OUT_RING(sarea_priv
->width
| sarea_priv
->height
<< 16);
139 sarea_priv
->ctxOwner
= DRM_KERNEL_CONTEXT
;
141 upper
[0] = upper
[1] = 0;
142 slice
[0] = max(sarea_priv
->pipeA_h
/ nhits
, 1);
143 slice
[1] = max(sarea_priv
->pipeB_h
/ nhits
, 1);
144 lower
[0] = sarea_priv
->pipeA_y
+ slice
[0];
145 lower
[1] = sarea_priv
->pipeB_y
+ slice
[0];
147 spin_lock(&dev
->drw_lock
);
149 /* Emit blits for buffer swaps, partitioning both outputs into as many
150 * slices as there are buffer swaps scheduled in order to avoid tearing
151 * (based on the assumption that a single buffer swap would always
152 * complete before scanout starts).
154 for (i
= 0; i
++ < nhits
;
155 upper
[0] = lower
[0], lower
[0] += slice
[0],
156 upper
[1] = lower
[1], lower
[1] += slice
[1]) {
158 lower
[0] = lower
[1] = sarea_priv
->height
;
160 list_for_each(hit
, &hits
) {
161 drm_i915_vbl_swap_t
*swap_hit
=
162 list_entry(hit
, drm_i915_vbl_swap_t
, head
);
163 struct drm_clip_rect
*rect
;
165 unsigned short top
, bottom
;
167 drw
= drm_get_drawable_info(dev
, swap_hit
->drw_id
);
173 pipe
= swap_hit
->pipe
;
175 bottom
= lower
[pipe
];
177 for (num_rects
= drw
->num_rects
; num_rects
--; rect
++) {
178 int y1
= max(rect
->y1
, top
);
179 int y2
= min(rect
->y2
, bottom
);
187 OUT_RING(pitchropcpp
);
188 OUT_RING((y1
<< 16) | rect
->x1
);
189 OUT_RING((y2
<< 16) | rect
->x2
);
190 OUT_RING(sarea_priv
->front_offset
);
191 OUT_RING((y1
<< 16) | rect
->x1
);
192 OUT_RING(pitchropcpp
& 0xffff);
193 OUT_RING(sarea_priv
->back_offset
);
200 spin_unlock_irqrestore(&dev
->drw_lock
, irqflags
);
202 list_for_each_safe(hit
, tmp
, &hits
) {
203 drm_i915_vbl_swap_t
*swap_hit
=
204 list_entry(hit
, drm_i915_vbl_swap_t
, head
);
208 drm_free(swap_hit
, sizeof(*swap_hit
), DRM_MEM_DRIVER
);
212 irqreturn_t
i915_driver_irq_handler(DRM_IRQ_ARGS
)
214 struct drm_device
*dev
= (struct drm_device
*) arg
;
215 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
217 u32 pipea_stats
, pipeb_stats
;
219 pipea_stats
= I915_READ(I915REG_PIPEASTAT
);
220 pipeb_stats
= I915_READ(I915REG_PIPEBSTAT
);
222 temp
= I915_READ16(I915REG_INT_IDENTITY_R
);
224 temp
&= (USER_INT_FLAG
| VSYNC_PIPEA_FLAG
| VSYNC_PIPEB_FLAG
);
226 DRM_DEBUG("%s flag=%08x\n", __FUNCTION__
, temp
);
231 I915_WRITE16(I915REG_INT_IDENTITY_R
, temp
);
232 (void) I915_READ16(I915REG_INT_IDENTITY_R
);
233 DRM_READMEMORYBARRIER();
235 dev_priv
->sarea_priv
->last_dispatch
= READ_BREADCRUMB(dev_priv
);
237 if (temp
& USER_INT_FLAG
)
238 DRM_WAKEUP(&dev_priv
->irq_queue
);
240 if (temp
& (VSYNC_PIPEA_FLAG
| VSYNC_PIPEB_FLAG
)) {
241 int vblank_pipe
= dev_priv
->vblank_pipe
;
244 (DRM_I915_VBLANK_PIPE_A
| DRM_I915_VBLANK_PIPE_B
))
245 == (DRM_I915_VBLANK_PIPE_A
| DRM_I915_VBLANK_PIPE_B
)) {
246 if (temp
& VSYNC_PIPEA_FLAG
)
247 atomic_inc(&dev
->vbl_received
);
248 if (temp
& VSYNC_PIPEB_FLAG
)
249 atomic_inc(&dev
->vbl_received2
);
250 } else if (((temp
& VSYNC_PIPEA_FLAG
) &&
251 (vblank_pipe
& DRM_I915_VBLANK_PIPE_A
)) ||
252 ((temp
& VSYNC_PIPEB_FLAG
) &&
253 (vblank_pipe
& DRM_I915_VBLANK_PIPE_B
)))
254 atomic_inc(&dev
->vbl_received
);
256 DRM_WAKEUP(&dev
->vbl_queue
);
257 drm_vbl_send_signals(dev
);
259 if (dev_priv
->swaps_pending
> 0)
260 drm_locked_tasklet(dev
, i915_vblank_tasklet
);
261 I915_WRITE(I915REG_PIPEASTAT
,
262 pipea_stats
|I915_VBLANK_INTERRUPT_ENABLE
|
264 I915_WRITE(I915REG_PIPEBSTAT
,
265 pipeb_stats
|I915_VBLANK_INTERRUPT_ENABLE
|
272 static int i915_emit_irq(struct drm_device
* dev
)
274 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
277 i915_kernel_lost_context(dev
);
281 dev_priv
->sarea_priv
->last_enqueue
= ++dev_priv
->counter
;
283 if (dev_priv
->counter
> 0x7FFFFFFFUL
)
284 dev_priv
->sarea_priv
->last_enqueue
= dev_priv
->counter
= 1;
287 OUT_RING(CMD_STORE_DWORD_IDX
);
289 OUT_RING(dev_priv
->counter
);
292 OUT_RING(GFX_OP_USER_INTERRUPT
);
295 return dev_priv
->counter
;
298 static int i915_wait_irq(struct drm_device
* dev
, int irq_nr
)
300 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
303 DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr
,
304 READ_BREADCRUMB(dev_priv
));
306 if (READ_BREADCRUMB(dev_priv
) >= irq_nr
)
309 dev_priv
->sarea_priv
->perf_boxes
|= I915_BOX_WAIT
;
311 DRM_WAIT_ON(ret
, dev_priv
->irq_queue
, 3 * DRM_HZ
,
312 READ_BREADCRUMB(dev_priv
) >= irq_nr
);
315 DRM_ERROR("EBUSY -- rec: %d emitted: %d\n",
316 READ_BREADCRUMB(dev_priv
), (int)dev_priv
->counter
);
319 dev_priv
->sarea_priv
->last_dispatch
= READ_BREADCRUMB(dev_priv
);
323 static int i915_driver_vblank_do_wait(struct drm_device
*dev
, unsigned int *sequence
,
326 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
327 unsigned int cur_vblank
;
331 DRM_ERROR("called with no initialization\n");
335 DRM_WAIT_ON(ret
, dev
->vbl_queue
, 3 * DRM_HZ
,
336 (((cur_vblank
= atomic_read(counter
))
337 - *sequence
) <= (1<<23)));
339 *sequence
= cur_vblank
;
345 int i915_driver_vblank_wait(struct drm_device
*dev
, unsigned int *sequence
)
347 return i915_driver_vblank_do_wait(dev
, sequence
, &dev
->vbl_received
);
350 int i915_driver_vblank_wait2(struct drm_device
*dev
, unsigned int *sequence
)
352 return i915_driver_vblank_do_wait(dev
, sequence
, &dev
->vbl_received2
);
355 /* Needs the lock as it touches the ring.
357 int i915_irq_emit(struct drm_device
*dev
, void *data
,
358 struct drm_file
*file_priv
)
360 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
361 drm_i915_irq_emit_t
*emit
= data
;
364 LOCK_TEST_WITH_RETURN(dev
, file_priv
);
367 DRM_ERROR("called with no initialization\n");
371 result
= i915_emit_irq(dev
);
373 if (DRM_COPY_TO_USER(emit
->irq_seq
, &result
, sizeof(int))) {
374 DRM_ERROR("copy_to_user\n");
381 /* Doesn't need the hardware lock.
383 int i915_irq_wait(struct drm_device
*dev
, void *data
,
384 struct drm_file
*file_priv
)
386 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
387 drm_i915_irq_wait_t
*irqwait
= data
;
390 DRM_ERROR("called with no initialization\n");
394 return i915_wait_irq(dev
, irqwait
->irq_seq
);
397 static void i915_enable_interrupt (struct drm_device
*dev
)
399 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
403 if (dev_priv
->vblank_pipe
& DRM_I915_VBLANK_PIPE_A
)
404 flag
|= VSYNC_PIPEA_FLAG
;
405 if (dev_priv
->vblank_pipe
& DRM_I915_VBLANK_PIPE_B
)
406 flag
|= VSYNC_PIPEB_FLAG
;
408 I915_WRITE16(I915REG_INT_ENABLE_R
, USER_INT_FLAG
| flag
);
411 /* Set the vblank monitor pipe
413 int i915_vblank_pipe_set(struct drm_device
*dev
, void *data
,
414 struct drm_file
*file_priv
)
416 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
417 drm_i915_vblank_pipe_t
*pipe
= data
;
420 DRM_ERROR("called with no initialization\n");
424 if (pipe
->pipe
& ~(DRM_I915_VBLANK_PIPE_A
|DRM_I915_VBLANK_PIPE_B
)) {
425 DRM_ERROR("called with invalid pipe 0x%x\n", pipe
->pipe
);
429 dev_priv
->vblank_pipe
= pipe
->pipe
;
431 i915_enable_interrupt (dev
);
436 int i915_vblank_pipe_get(struct drm_device
*dev
, void *data
,
437 struct drm_file
*file_priv
)
439 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
440 drm_i915_vblank_pipe_t
*pipe
= data
;
444 DRM_ERROR("called with no initialization\n");
448 flag
= I915_READ(I915REG_INT_ENABLE_R
);
450 if (flag
& VSYNC_PIPEA_FLAG
)
451 pipe
->pipe
|= DRM_I915_VBLANK_PIPE_A
;
452 if (flag
& VSYNC_PIPEB_FLAG
)
453 pipe
->pipe
|= DRM_I915_VBLANK_PIPE_B
;
459 * Schedule buffer swap at given vertical blank.
461 int i915_vblank_swap(struct drm_device
*dev
, void *data
,
462 struct drm_file
*file_priv
)
464 drm_i915_private_t
*dev_priv
= dev
->dev_private
;
465 drm_i915_vblank_swap_t
*swap
= data
;
466 drm_i915_vbl_swap_t
*vbl_swap
;
467 unsigned int pipe
, seqtype
, curseq
;
468 unsigned long irqflags
;
469 struct list_head
*list
;
472 DRM_ERROR("%s called with no initialization\n", __func__
);
476 if (dev_priv
->sarea_priv
->rotation
) {
477 DRM_DEBUG("Rotation not supported\n");
481 if (swap
->seqtype
& ~(_DRM_VBLANK_RELATIVE
| _DRM_VBLANK_ABSOLUTE
|
482 _DRM_VBLANK_SECONDARY
| _DRM_VBLANK_NEXTONMISS
)) {
483 DRM_ERROR("Invalid sequence type 0x%x\n", swap
->seqtype
);
487 pipe
= (swap
->seqtype
& _DRM_VBLANK_SECONDARY
) ? 1 : 0;
489 seqtype
= swap
->seqtype
& (_DRM_VBLANK_RELATIVE
| _DRM_VBLANK_ABSOLUTE
);
491 if (!(dev_priv
->vblank_pipe
& (1 << pipe
))) {
492 DRM_ERROR("Invalid pipe %d\n", pipe
);
496 spin_lock_irqsave(&dev
->drw_lock
, irqflags
);
498 if (!drm_get_drawable_info(dev
, swap
->drawable
)) {
499 spin_unlock_irqrestore(&dev
->drw_lock
, irqflags
);
500 DRM_DEBUG("Invalid drawable ID %d\n", swap
->drawable
);
504 spin_unlock_irqrestore(&dev
->drw_lock
, irqflags
);
506 curseq
= atomic_read(pipe
? &dev
->vbl_received2
: &dev
->vbl_received
);
508 if (seqtype
== _DRM_VBLANK_RELATIVE
)
509 swap
->sequence
+= curseq
;
511 if ((curseq
- swap
->sequence
) <= (1<<23)) {
512 if (swap
->seqtype
& _DRM_VBLANK_NEXTONMISS
) {
513 swap
->sequence
= curseq
+ 1;
515 DRM_DEBUG("Missed target sequence\n");
520 spin_lock_irqsave(&dev_priv
->swaps_lock
, irqflags
);
522 list_for_each(list
, &dev_priv
->vbl_swaps
.head
) {
523 vbl_swap
= list_entry(list
, drm_i915_vbl_swap_t
, head
);
525 if (vbl_swap
->drw_id
== swap
->drawable
&&
526 vbl_swap
->pipe
== pipe
&&
527 vbl_swap
->sequence
== swap
->sequence
) {
528 spin_unlock_irqrestore(&dev_priv
->swaps_lock
, irqflags
);
529 DRM_DEBUG("Already scheduled\n");
534 spin_unlock_irqrestore(&dev_priv
->swaps_lock
, irqflags
);
536 if (dev_priv
->swaps_pending
>= 100) {
537 DRM_DEBUG("Too many swaps queued\n");
541 vbl_swap
= drm_calloc(1, sizeof(*vbl_swap
), DRM_MEM_DRIVER
);
544 DRM_ERROR("Failed to allocate memory to queue swap\n");
550 vbl_swap
->drw_id
= swap
->drawable
;
551 vbl_swap
->pipe
= pipe
;
552 vbl_swap
->sequence
= swap
->sequence
;
554 spin_lock_irqsave(&dev_priv
->swaps_lock
, irqflags
);
556 list_add_tail(&vbl_swap
->head
, &dev_priv
->vbl_swaps
.head
);
557 dev_priv
->swaps_pending
++;
559 spin_unlock_irqrestore(&dev_priv
->swaps_lock
, irqflags
);
566 void i915_driver_irq_preinstall(struct drm_device
* dev
)
568 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
570 I915_WRITE16(I915REG_HWSTAM
, 0xfffe);
571 I915_WRITE16(I915REG_INT_MASK_R
, 0x0);
572 I915_WRITE16(I915REG_INT_ENABLE_R
, 0x0);
575 void i915_driver_irq_postinstall(struct drm_device
* dev
)
577 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
579 spin_lock_init(&dev_priv
->swaps_lock
);
580 INIT_LIST_HEAD(&dev_priv
->vbl_swaps
.head
);
581 dev_priv
->swaps_pending
= 0;
583 if (!dev_priv
->vblank_pipe
)
584 dev_priv
->vblank_pipe
= DRM_I915_VBLANK_PIPE_A
;
585 i915_enable_interrupt(dev
);
586 DRM_INIT_WAITQUEUE(&dev_priv
->irq_queue
);
589 void i915_driver_irq_uninstall(struct drm_device
* dev
)
591 drm_i915_private_t
*dev_priv
= (drm_i915_private_t
*) dev
->dev_private
;
597 I915_WRITE16(I915REG_HWSTAM
, 0xffff);
598 I915_WRITE16(I915REG_INT_MASK_R
, 0xffff);
599 I915_WRITE16(I915REG_INT_ENABLE_R
, 0x0);
601 temp
= I915_READ16(I915REG_INT_IDENTITY_R
);
602 I915_WRITE16(I915REG_INT_IDENTITY_R
, temp
);