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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / hwmon / dme1737.c
blob963e31f3cc744fcf8bcf2fec40993208df8a90b3
1 /*
2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
3 * Super-I/O chips integrated hardware monitoring features.
4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
5 *
6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
8 * SCH311x chip is found. Both types of chips have very similar hardware
9 * monitoring capabilities but differ in the way they can be accessed.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/slab.h>
29 #include <linux/jiffies.h>
30 #include <linux/i2c.h>
31 #include <linux/platform_device.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/hwmon-vid.h>
35 #include <linux/err.h>
36 #include <linux/mutex.h>
37 #include <asm/io.h>
38
39 /* ISA device, if found */
40 static struct platform_device *pdev;
41
42 /* Module load parameters */
43 static int force_start;
44 module_param(force_start, bool, 0);
45 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
46
47 static unsigned short force_id;
48 module_param(force_id, ushort, 0);
49 MODULE_PARM_DESC(force_id, "Override the detected device ID");
50
51 /* Addresses to scan */
52 <<<<<<< HEAD:drivers/hwmon/dme1737.c
53 static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
54 =======
55 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
56 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/hwmon/dme1737.c
57
58 /* Insmod parameters */
59 I2C_CLIENT_INSMOD_1(dme1737);
60
61 /* ---------------------------------------------------------------------
62 * Registers
63 *
64 * The sensors are defined as follows:
65 *
66 * Voltages Temperatures
67 * -------- ------------
68 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
69 * in1 Vccp (proc core) temp2 Internal temp
70 * in2 VCC (internal +3.3V) temp3 Remote diode 2
71 * in3 +5V
72 * in4 +12V
73 * in5 VTR (+3.3V stby)
74 * in6 Vbat
75 *
76 * --------------------------------------------------------------------- */
77
78 /* Voltages (in) numbered 0-6 (ix) */
79 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
80 : 0x94 + (ix))
81 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
82 : 0x91 + (ix) * 2)
83 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
84 : 0x92 + (ix) * 2)
85
86 /* Temperatures (temp) numbered 0-2 (ix) */
87 #define DME1737_REG_TEMP(ix) (0x25 + (ix))
88 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
89 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
90 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
91 : 0x1c + (ix))
92
93 /* Voltage and temperature LSBs
94 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
95 * IN_TEMP_LSB(0) = [in5, in6]
96 * IN_TEMP_LSB(1) = [temp3, temp1]
97 * IN_TEMP_LSB(2) = [in4, temp2]
98 * IN_TEMP_LSB(3) = [in3, in0]
99 * IN_TEMP_LSB(4) = [in2, in1] */
100 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
101 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
102 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
103 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
104 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
105
106 /* Fans numbered 0-5 (ix) */
107 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
108 : 0xa1 + (ix) * 2)
109 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
110 : 0xa5 + (ix) * 2)
111 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
112 : 0xb2 + (ix))
113 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
114
115 /* PWMs numbered 0-2, 4-5 (ix) */
116 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
117 : 0xa1 + (ix))
118 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
119 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
120 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
121 : 0xa3 + (ix))
122 /* The layout of the ramp rate registers is different from the other pwm
123 * registers. The bits for the 3 PWMs are stored in 2 registers:
124 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
125 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
126 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
127
128 /* Thermal zones 0-2 */
129 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
130 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
131 /* The layout of the hysteresis registers is different from the other zone
132 * registers. The bits for the 3 zones are stored in 2 registers:
133 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
134 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
135 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
136
137 /* Alarm registers and bit mapping
138 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
139 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
140 #define DME1737_REG_ALARM1 0x41
141 #define DME1737_REG_ALARM2 0x42
142 #define DME1737_REG_ALARM3 0x83
143 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
144 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
145 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
146
147 /* Miscellaneous registers */
148 #define DME1737_REG_DEVICE 0x3d
149 #define DME1737_REG_COMPANY 0x3e
150 #define DME1737_REG_VERSTEP 0x3f
151 #define DME1737_REG_CONFIG 0x40
152 #define DME1737_REG_CONFIG2 0x7f
153 #define DME1737_REG_VID 0x43
154 #define DME1737_REG_TACH_PWM 0x81
155
156 /* ---------------------------------------------------------------------
157 * Misc defines
158 * --------------------------------------------------------------------- */
159
160 /* Chip identification */
161 #define DME1737_COMPANY_SMSC 0x5c
162 #define DME1737_VERSTEP 0x88
163 #define DME1737_VERSTEP_MASK 0xf8
164 #define SCH311X_DEVICE 0x8c
165
166 /* Length of ISA address segment */
167 #define DME1737_EXTENT 2
168
169 /* ---------------------------------------------------------------------
170 * Data structures and manipulation thereof
171 * --------------------------------------------------------------------- */
172
173 /* For ISA chips, we abuse the i2c_client addr and name fields. We also use
174 the driver field to differentiate between I2C and ISA chips. */
175 struct dme1737_data {
176 struct i2c_client client;
177 struct device *hwmon_dev;
178
179 struct mutex update_lock;
180 int valid; /* !=0 if following fields are valid */
181 unsigned long last_update; /* in jiffies */
182 unsigned long last_vbat; /* in jiffies */
183
184 u8 vid;
185 u8 pwm_rr_en;
186 u8 has_pwm;
187 u8 has_fan;
188
189 /* Register values */
190 u16 in[7];
191 u8 in_min[7];
192 u8 in_max[7];
193 s16 temp[3];
194 s8 temp_min[3];
195 s8 temp_max[3];
196 s8 temp_offset[3];
197 u8 config;
198 u8 config2;
199 u8 vrm;
200 u16 fan[6];
201 u16 fan_min[6];
202 u8 fan_max[2];
203 u8 fan_opt[6];
204 u8 pwm[6];
205 u8 pwm_min[3];
206 u8 pwm_config[3];
207 u8 pwm_acz[3];
208 u8 pwm_freq[6];
209 u8 pwm_rr[2];
210 u8 zone_low[3];
211 u8 zone_abs[3];
212 u8 zone_hyst[2];
213 u32 alarms;
214 };
215
216 /* Nominal voltage values */
217 static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
218
219 /* Voltage input
220 * Voltage inputs have 16 bits resolution, limit values have 8 bits
221 * resolution. */
222 static inline int IN_FROM_REG(int reg, int ix, int res)
223 {
224 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
225 }
226
227 static inline int IN_TO_REG(int val, int ix)
228 {
229 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
230 IN_NOMINAL[ix], 0, 255);
231 }
232
233 /* Temperature input
234 * The register values represent temperatures in 2's complement notation from
235 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
236 * values have 8 bits resolution. */
237 static inline int TEMP_FROM_REG(int reg, int res)
238 {
239 return (reg * 1000) >> (res - 8);
240 }
241
242 static inline int TEMP_TO_REG(int val)
243 {
244 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
245 -128, 127);
246 }
247
248 /* Temperature range */
249 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
250 10000, 13333, 16000, 20000, 26666, 32000,
251 40000, 53333, 80000};
252
253 static inline int TEMP_RANGE_FROM_REG(int reg)
254 {
255 return TEMP_RANGE[(reg >> 4) & 0x0f];
256 }
257
258 static int TEMP_RANGE_TO_REG(int val, int reg)
259 {
260 int i;
261
262 for (i = 15; i > 0; i--) {
263 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
264 break;
265 }
266 }
267
268 return (reg & 0x0f) | (i << 4);
269 }
270
271 /* Temperature hysteresis
272 * Register layout:
273 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
274 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
275 static inline int TEMP_HYST_FROM_REG(int reg, int ix)
276 {
277 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
278 }
279
280 static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
281 {
282 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
283
284 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
285 }
286
287 /* Fan input RPM */
288 static inline int FAN_FROM_REG(int reg, int tpc)
289 {
290 if (tpc) {
291 return tpc * reg;
292 } else {
293 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
294 }
295 }
296
297 static inline int FAN_TO_REG(int val, int tpc)
298 {
299 if (tpc) {
300 return SENSORS_LIMIT(val / tpc, 0, 0xffff);
301 } else {
302 return (val <= 0) ? 0xffff :
303 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe);
304 }
305 }
306
307 /* Fan TPC (tach pulse count)
308 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
309 * is configured in legacy (non-tpc) mode */
310 static inline int FAN_TPC_FROM_REG(int reg)
311 {
312 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
313 }
314
315 /* Fan type
316 * The type of a fan is expressed in number of pulses-per-revolution that it
317 * emits */
318 static inline int FAN_TYPE_FROM_REG(int reg)
319 {
320 int edge = (reg >> 1) & 0x03;
321
322 return (edge > 0) ? 1 << (edge - 1) : 0;
323 }
324
325 static inline int FAN_TYPE_TO_REG(int val, int reg)
326 {
327 int edge = (val == 4) ? 3 : val;
328
329 return (reg & 0xf9) | (edge << 1);
330 }
331
332 /* Fan max RPM */
333 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
334 0x11, 0x0f, 0x0e};
335
336 static int FAN_MAX_FROM_REG(int reg)
337 {
338 int i;
339
340 for (i = 10; i > 0; i--) {
341 if (reg == FAN_MAX[i]) {
342 break;
343 }
344 }
345
346 return 1000 + i * 500;
347 }
348
349 static int FAN_MAX_TO_REG(int val)
350 {
351 int i;
352
353 for (i = 10; i > 0; i--) {
354 if (val > (1000 + (i - 1) * 500)) {
355 break;
356 }
357 }
358
359 return FAN_MAX[i];
360 }
361
362 /* PWM enable
363 * Register to enable mapping:
364 * 000: 2 fan on zone 1 auto
365 * 001: 2 fan on zone 2 auto
366 * 010: 2 fan on zone 3 auto
367 * 011: 0 fan full on
368 * 100: -1 fan disabled
369 * 101: 2 fan on hottest of zones 2,3 auto
370 * 110: 2 fan on hottest of zones 1,2,3 auto
371 * 111: 1 fan in manual mode */
372 static inline int PWM_EN_FROM_REG(int reg)
373 {
374 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
375
376 return en[(reg >> 5) & 0x07];
377 }
378
379 static inline int PWM_EN_TO_REG(int val, int reg)
380 {
381 int en = (val == 1) ? 7 : 3;
382
383 return (reg & 0x1f) | ((en & 0x07) << 5);
384 }
385
386 /* PWM auto channels zone
387 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
388 * corresponding to zone x+1):
389 * 000: 001 fan on zone 1 auto
390 * 001: 010 fan on zone 2 auto
391 * 010: 100 fan on zone 3 auto
392 * 011: 000 fan full on
393 * 100: 000 fan disabled
394 * 101: 110 fan on hottest of zones 2,3 auto
395 * 110: 111 fan on hottest of zones 1,2,3 auto
396 * 111: 000 fan in manual mode */
397 static inline int PWM_ACZ_FROM_REG(int reg)
398 {
399 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
400
401 return acz[(reg >> 5) & 0x07];
402 }
403
404 static inline int PWM_ACZ_TO_REG(int val, int reg)
405 {
406 int acz = (val == 4) ? 2 : val - 1;
407
408 return (reg & 0x1f) | ((acz & 0x07) << 5);
409 }
410
411 /* PWM frequency */
412 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
413 15000, 20000, 30000, 25000, 0, 0, 0, 0};
414
415 static inline int PWM_FREQ_FROM_REG(int reg)
416 {
417 return PWM_FREQ[reg & 0x0f];
418 }
419
420 static int PWM_FREQ_TO_REG(int val, int reg)
421 {
422 int i;
423
424 /* the first two cases are special - stupid chip design! */
425 if (val > 27500) {
426 i = 10;
427 } else if (val > 22500) {
428 i = 11;
429 } else {
430 for (i = 9; i > 0; i--) {
431 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
432 break;
433 }
434 }
435 }
436
437 return (reg & 0xf0) | i;
438 }
439
440 /* PWM ramp rate
441 * Register layout:
442 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
443 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
444 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
445
446 static inline int PWM_RR_FROM_REG(int reg, int ix)
447 {
448 int rr = (ix == 1) ? reg >> 4 : reg;
449
450 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
451 }
452
453 static int PWM_RR_TO_REG(int val, int ix, int reg)
454 {
455 int i;
456
457 for (i = 0; i < 7; i++) {
458 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
459 break;
460 }
461 }
462
463 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
464 }
465
466 /* PWM ramp rate enable */
467 static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
468 {
469 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
470 }
471
472 static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
473 {
474 int en = (ix == 1) ? 0x80 : 0x08;
475
476 return val ? reg | en : reg & ~en;
477 }
478
479 /* PWM min/off
480 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
481 * the register layout). */
482 static inline int PWM_OFF_FROM_REG(int reg, int ix)
483 {
484 return (reg >> (ix + 5)) & 0x01;
485 }
486
487 static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
488 {
489 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
490 }
491
492 /* ---------------------------------------------------------------------
493 * Device I/O access
494 *
495 * ISA access is performed through an index/data register pair and needs to
496 * be protected by a mutex during runtime (not required for initialization).
497 * We use data->update_lock for this and need to ensure that we acquire it
498 * before calling dme1737_read or dme1737_write.
499 * --------------------------------------------------------------------- */
500
501 static u8 dme1737_read(struct i2c_client *client, u8 reg)
502 {
503 s32 val;
504
505 if (client->driver) { /* I2C device */
506 val = i2c_smbus_read_byte_data(client, reg);
507
508 if (val < 0) {
509 dev_warn(&client->dev, "Read from register "
510 "0x%02x failed! Please report to the driver "
511 "maintainer.\n", reg);
512 }
513 } else { /* ISA device */
514 outb(reg, client->addr);
515 val = inb(client->addr + 1);
516 }
517
518 return val;
519 }
520
521 static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val)
522 {
523 s32 res = 0;
524
525 if (client->driver) { /* I2C device */
526 res = i2c_smbus_write_byte_data(client, reg, val);
527
528 if (res < 0) {
529 dev_warn(&client->dev, "Write to register "
530 "0x%02x failed! Please report to the driver "
531 "maintainer.\n", reg);
532 }
533 } else { /* ISA device */
534 outb(reg, client->addr);
535 outb(val, client->addr + 1);
536 }
537
538 return res;
539 }
540
541 static struct dme1737_data *dme1737_update_device(struct device *dev)
542 {
543 struct dme1737_data *data = dev_get_drvdata(dev);
544 struct i2c_client *client = &data->client;
545 int ix;
546 u8 lsb[5];
547
548 mutex_lock(&data->update_lock);
549
550 /* Enable a Vbat monitoring cycle every 10 mins */
551 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
552 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
553 DME1737_REG_CONFIG) | 0x10);
554 data->last_vbat = jiffies;
555 }
556
557 /* Sample register contents every 1 sec */
558 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
559 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
560
561 /* In (voltage) registers */
562 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
563 /* Voltage inputs are stored as 16 bit values even
564 * though they have only 12 bits resolution. This is
565 * to make it consistent with the temp inputs. */
566 data->in[ix] = dme1737_read(client,
567 DME1737_REG_IN(ix)) << 8;
568 data->in_min[ix] = dme1737_read(client,
569 DME1737_REG_IN_MIN(ix));
570 data->in_max[ix] = dme1737_read(client,
571 DME1737_REG_IN_MAX(ix));
572 }
573
574 /* Temp registers */
575 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
576 /* Temp inputs are stored as 16 bit values even
577 * though they have only 12 bits resolution. This is
578 * to take advantage of implicit conversions between
579 * register values (2's complement) and temp values
580 * (signed decimal). */
581 data->temp[ix] = dme1737_read(client,
582 DME1737_REG_TEMP(ix)) << 8;
583 data->temp_min[ix] = dme1737_read(client,
584 DME1737_REG_TEMP_MIN(ix));
585 data->temp_max[ix] = dme1737_read(client,
586 DME1737_REG_TEMP_MAX(ix));
587 data->temp_offset[ix] = dme1737_read(client,
588 DME1737_REG_TEMP_OFFSET(ix));
589 }
590
591 /* In and temp LSB registers
592 * The LSBs are latched when the MSBs are read, so the order in
593 * which the registers are read (MSB first, then LSB) is
594 * important! */
595 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
596 lsb[ix] = dme1737_read(client,
597 DME1737_REG_IN_TEMP_LSB(ix));
598 }
599 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
600 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
601 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
602 }
603 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
604 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
605 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
606 }
607
608 /* Fan registers */
609 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
610 /* Skip reading registers if optional fans are not
611 * present */
612 if (!(data->has_fan & (1 << ix))) {
613 continue;
614 }
615 data->fan[ix] = dme1737_read(client,
616 DME1737_REG_FAN(ix));
617 data->fan[ix] |= dme1737_read(client,
618 DME1737_REG_FAN(ix) + 1) << 8;
619 data->fan_min[ix] = dme1737_read(client,
620 DME1737_REG_FAN_MIN(ix));
621 data->fan_min[ix] |= dme1737_read(client,
622 DME1737_REG_FAN_MIN(ix) + 1) << 8;
623 data->fan_opt[ix] = dme1737_read(client,
624 DME1737_REG_FAN_OPT(ix));
625 /* fan_max exists only for fan[5-6] */
626 if (ix > 3) {
627 data->fan_max[ix - 4] = dme1737_read(client,
628 DME1737_REG_FAN_MAX(ix));
629 }
630 }
631
632 /* PWM registers */
633 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
634 /* Skip reading registers if optional PWMs are not
635 * present */
636 if (!(data->has_pwm & (1 << ix))) {
637 continue;
638 }
639 data->pwm[ix] = dme1737_read(client,
640 DME1737_REG_PWM(ix));
641 data->pwm_freq[ix] = dme1737_read(client,
642 DME1737_REG_PWM_FREQ(ix));
643 /* pwm_config and pwm_min exist only for pwm[1-3] */
644 if (ix < 3) {
645 data->pwm_config[ix] = dme1737_read(client,
646 DME1737_REG_PWM_CONFIG(ix));
647 data->pwm_min[ix] = dme1737_read(client,
648 DME1737_REG_PWM_MIN(ix));
649 }
650 }
651 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
652 data->pwm_rr[ix] = dme1737_read(client,
653 DME1737_REG_PWM_RR(ix));
654 }
655
656 /* Thermal zone registers */
657 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
658 data->zone_low[ix] = dme1737_read(client,
659 DME1737_REG_ZONE_LOW(ix));
660 data->zone_abs[ix] = dme1737_read(client,
661 DME1737_REG_ZONE_ABS(ix));
662 }
663 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
664 data->zone_hyst[ix] = dme1737_read(client,
665 DME1737_REG_ZONE_HYST(ix));
666 }
667
668 /* Alarm registers */
669 data->alarms = dme1737_read(client,
670 DME1737_REG_ALARM1);
671 /* Bit 7 tells us if the other alarm registers are non-zero and
672 * therefore also need to be read */
673 if (data->alarms & 0x80) {
674 data->alarms |= dme1737_read(client,
675 DME1737_REG_ALARM2) << 8;
676 data->alarms |= dme1737_read(client,
677 DME1737_REG_ALARM3) << 16;
678 }
679
680 /* The ISA chips require explicit clearing of alarm bits.
681 * Don't worry, an alarm will come back if the condition
682 * that causes it still exists */
683 if (!client->driver) {
684 if (data->alarms & 0xff0000) {
685 dme1737_write(client, DME1737_REG_ALARM3,
686 0xff);
687 }
688 if (data->alarms & 0xff00) {
689 dme1737_write(client, DME1737_REG_ALARM2,
690 0xff);
691 }
692 if (data->alarms & 0xff) {
693 dme1737_write(client, DME1737_REG_ALARM1,
694 0xff);
695 }
696 }
697
698 data->last_update = jiffies;
699 data->valid = 1;
700 }
701
702 mutex_unlock(&data->update_lock);
703
704 return data;
705 }
706
707 /* ---------------------------------------------------------------------
708 * Voltage sysfs attributes
709 * ix = [0-5]
710 * --------------------------------------------------------------------- */
711
712 #define SYS_IN_INPUT 0
713 #define SYS_IN_MIN 1
714 #define SYS_IN_MAX 2
715 #define SYS_IN_ALARM 3
716
717 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
718 char *buf)
719 {
720 struct dme1737_data *data = dme1737_update_device(dev);
721 struct sensor_device_attribute_2
722 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
723 int ix = sensor_attr_2->index;
724 int fn = sensor_attr_2->nr;
725 int res;
726
727 switch (fn) {
728 case SYS_IN_INPUT:
729 res = IN_FROM_REG(data->in[ix], ix, 16);
730 break;
731 case SYS_IN_MIN:
732 res = IN_FROM_REG(data->in_min[ix], ix, 8);
733 break;
734 case SYS_IN_MAX:
735 res = IN_FROM_REG(data->in_max[ix], ix, 8);
736 break;
737 case SYS_IN_ALARM:
738 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
739 break;
740 default:
741 res = 0;
742 dev_dbg(dev, "Unknown function %d.\n", fn);
743 }
744
745 return sprintf(buf, "%d\n", res);
746 }
747
748 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
749 const char *buf, size_t count)
750 {
751 struct dme1737_data *data = dev_get_drvdata(dev);
752 struct i2c_client *client = &data->client;
753 struct sensor_device_attribute_2
754 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
755 int ix = sensor_attr_2->index;
756 int fn = sensor_attr_2->nr;
757 long val = simple_strtol(buf, NULL, 10);
758
759 mutex_lock(&data->update_lock);
760 switch (fn) {
761 case SYS_IN_MIN:
762 data->in_min[ix] = IN_TO_REG(val, ix);
763 dme1737_write(client, DME1737_REG_IN_MIN(ix),
764 data->in_min[ix]);
765 break;
766 case SYS_IN_MAX:
767 data->in_max[ix] = IN_TO_REG(val, ix);
768 dme1737_write(client, DME1737_REG_IN_MAX(ix),
769 data->in_max[ix]);
770 break;
771 default:
772 dev_dbg(dev, "Unknown function %d.\n", fn);
773 }
774 mutex_unlock(&data->update_lock);
775
776 return count;
777 }
778
779 /* ---------------------------------------------------------------------
780 * Temperature sysfs attributes
781 * ix = [0-2]
782 * --------------------------------------------------------------------- */
783
784 #define SYS_TEMP_INPUT 0
785 #define SYS_TEMP_MIN 1
786 #define SYS_TEMP_MAX 2
787 #define SYS_TEMP_OFFSET 3
788 #define SYS_TEMP_ALARM 4
789 #define SYS_TEMP_FAULT 5
790
791 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
792 char *buf)
793 {
794 struct dme1737_data *data = dme1737_update_device(dev);
795 struct sensor_device_attribute_2
796 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
797 int ix = sensor_attr_2->index;
798 int fn = sensor_attr_2->nr;
799 int res;
800
801 switch (fn) {
802 case SYS_TEMP_INPUT:
803 res = TEMP_FROM_REG(data->temp[ix], 16);
804 break;
805 case SYS_TEMP_MIN:
806 res = TEMP_FROM_REG(data->temp_min[ix], 8);
807 break;
808 case SYS_TEMP_MAX:
809 res = TEMP_FROM_REG(data->temp_max[ix], 8);
810 break;
811 case SYS_TEMP_OFFSET:
812 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
813 break;
814 case SYS_TEMP_ALARM:
815 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
816 break;
817 case SYS_TEMP_FAULT:
818 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
819 break;
820 default:
821 res = 0;
822 dev_dbg(dev, "Unknown function %d.\n", fn);
823 }
824
825 return sprintf(buf, "%d\n", res);
826 }
827
828 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
829 const char *buf, size_t count)
830 {
831 struct dme1737_data *data = dev_get_drvdata(dev);
832 struct i2c_client *client = &data->client;
833 struct sensor_device_attribute_2
834 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
835 int ix = sensor_attr_2->index;
836 int fn = sensor_attr_2->nr;
837 long val = simple_strtol(buf, NULL, 10);
838
839 mutex_lock(&data->update_lock);
840 switch (fn) {
841 case SYS_TEMP_MIN:
842 data->temp_min[ix] = TEMP_TO_REG(val);
843 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
844 data->temp_min[ix]);
845 break;
846 case SYS_TEMP_MAX:
847 data->temp_max[ix] = TEMP_TO_REG(val);
848 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
849 data->temp_max[ix]);
850 break;
851 case SYS_TEMP_OFFSET:
852 data->temp_offset[ix] = TEMP_TO_REG(val);
853 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
854 data->temp_offset[ix]);
855 break;
856 default:
857 dev_dbg(dev, "Unknown function %d.\n", fn);
858 }
859 mutex_unlock(&data->update_lock);
860
861 return count;
862 }
863
864 /* ---------------------------------------------------------------------
865 * Zone sysfs attributes
866 * ix = [0-2]
867 * --------------------------------------------------------------------- */
868
869 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0
870 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
871 #define SYS_ZONE_AUTO_POINT1_TEMP 2
872 #define SYS_ZONE_AUTO_POINT2_TEMP 3
873 #define SYS_ZONE_AUTO_POINT3_TEMP 4
874
875 static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
876 char *buf)
877 {
878 struct dme1737_data *data = dme1737_update_device(dev);
879 struct sensor_device_attribute_2
880 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
881 int ix = sensor_attr_2->index;
882 int fn = sensor_attr_2->nr;
883 int res;
884
885 switch (fn) {
886 case SYS_ZONE_AUTO_CHANNELS_TEMP:
887 /* check config2 for non-standard temp-to-zone mapping */
888 if ((ix == 1) && (data->config2 & 0x02)) {
889 res = 4;
890 } else {
891 res = 1 << ix;
892 }
893 break;
894 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
895 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
896 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
897 break;
898 case SYS_ZONE_AUTO_POINT1_TEMP:
899 res = TEMP_FROM_REG(data->zone_low[ix], 8);
900 break;
901 case SYS_ZONE_AUTO_POINT2_TEMP:
902 /* pwm_freq holds the temp range bits in the upper nibble */
903 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
904 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
905 break;
906 case SYS_ZONE_AUTO_POINT3_TEMP:
907 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
908 break;
909 default:
910 res = 0;
911 dev_dbg(dev, "Unknown function %d.\n", fn);
912 }
913
914 return sprintf(buf, "%d\n", res);
915 }
916
917 static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
918 const char *buf, size_t count)
919 {
920 struct dme1737_data *data = dev_get_drvdata(dev);
921 struct i2c_client *client = &data->client;
922 struct sensor_device_attribute_2
923 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
924 int ix = sensor_attr_2->index;
925 int fn = sensor_attr_2->nr;
926 long val = simple_strtol(buf, NULL, 10);
927
928 mutex_lock(&data->update_lock);
929 switch (fn) {
930 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
931 /* Refresh the cache */
932 data->zone_low[ix] = dme1737_read(client,
933 DME1737_REG_ZONE_LOW(ix));
934 /* Modify the temp hyst value */
935 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
936 TEMP_FROM_REG(data->zone_low[ix], 8) -
937 val, ix, dme1737_read(client,
938 DME1737_REG_ZONE_HYST(ix == 2)));
939 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
940 data->zone_hyst[ix == 2]);
941 break;
942 case SYS_ZONE_AUTO_POINT1_TEMP:
943 data->zone_low[ix] = TEMP_TO_REG(val);
944 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
945 data->zone_low[ix]);
946 break;
947 case SYS_ZONE_AUTO_POINT2_TEMP:
948 /* Refresh the cache */
949 data->zone_low[ix] = dme1737_read(client,
950 DME1737_REG_ZONE_LOW(ix));
951 /* Modify the temp range value (which is stored in the upper
952 * nibble of the pwm_freq register) */
953 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
954 TEMP_FROM_REG(data->zone_low[ix], 8),
955 dme1737_read(client,
956 DME1737_REG_PWM_FREQ(ix)));
957 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
958 data->pwm_freq[ix]);
959 break;
960 case SYS_ZONE_AUTO_POINT3_TEMP:
961 data->zone_abs[ix] = TEMP_TO_REG(val);
962 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
963 data->zone_abs[ix]);
964 break;
965 default:
966 dev_dbg(dev, "Unknown function %d.\n", fn);
967 }
968 mutex_unlock(&data->update_lock);
969
970 return count;
971 }
972
973 /* ---------------------------------------------------------------------
974 * Fan sysfs attributes
975 * ix = [0-5]
976 * --------------------------------------------------------------------- */
977
978 #define SYS_FAN_INPUT 0
979 #define SYS_FAN_MIN 1
980 #define SYS_FAN_MAX 2
981 #define SYS_FAN_ALARM 3
982 #define SYS_FAN_TYPE 4
983
984 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
985 char *buf)
986 {
987 struct dme1737_data *data = dme1737_update_device(dev);
988 struct sensor_device_attribute_2
989 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
990 int ix = sensor_attr_2->index;
991 int fn = sensor_attr_2->nr;
992 int res;
993
994 switch (fn) {
995 case SYS_FAN_INPUT:
996 res = FAN_FROM_REG(data->fan[ix],
997 ix < 4 ? 0 :
998 FAN_TPC_FROM_REG(data->fan_opt[ix]));
999 break;
1000 case SYS_FAN_MIN:
1001 res = FAN_FROM_REG(data->fan_min[ix],
1002 ix < 4 ? 0 :
1003 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1004 break;
1005 case SYS_FAN_MAX:
1006 /* only valid for fan[5-6] */
1007 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1008 break;
1009 case SYS_FAN_ALARM:
1010 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1011 break;
1012 case SYS_FAN_TYPE:
1013 /* only valid for fan[1-4] */
1014 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1015 break;
1016 default:
1017 res = 0;
1018 dev_dbg(dev, "Unknown function %d.\n", fn);
1019 }
1020
1021 return sprintf(buf, "%d\n", res);
1022 }
1023
1024 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1025 const char *buf, size_t count)
1026 {
1027 struct dme1737_data *data = dev_get_drvdata(dev);
1028 struct i2c_client *client = &data->client;
1029 struct sensor_device_attribute_2
1030 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1031 int ix = sensor_attr_2->index;
1032 int fn = sensor_attr_2->nr;
1033 long val = simple_strtol(buf, NULL, 10);
1034
1035 mutex_lock(&data->update_lock);
1036 switch (fn) {
1037 case SYS_FAN_MIN:
1038 if (ix < 4) {
1039 data->fan_min[ix] = FAN_TO_REG(val, 0);
1040 } else {
1041 /* Refresh the cache */
1042 data->fan_opt[ix] = dme1737_read(client,
1043 DME1737_REG_FAN_OPT(ix));
1044 /* Modify the fan min value */
1045 data->fan_min[ix] = FAN_TO_REG(val,
1046 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1047 }
1048 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
1049 data->fan_min[ix] & 0xff);
1050 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
1051 data->fan_min[ix] >> 8);
1052 break;
1053 case SYS_FAN_MAX:
1054 /* Only valid for fan[5-6] */
1055 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1056 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
1057 data->fan_max[ix - 4]);
1058 break;
1059 case SYS_FAN_TYPE:
1060 /* Only valid for fan[1-4] */
1061 if (!(val == 1 || val == 2 || val == 4)) {
1062 count = -EINVAL;
1063 dev_warn(dev, "Fan type value %ld not "
1064 "supported. Choose one of 1, 2, or 4.\n",
1065 val);
1066 goto exit;
1067 }
1068 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1069 DME1737_REG_FAN_OPT(ix)));
1070 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1071 data->fan_opt[ix]);
1072 break;
1073 default:
1074 dev_dbg(dev, "Unknown function %d.\n", fn);
1075 }
1076 exit:
1077 mutex_unlock(&data->update_lock);
1078
1079 return count;
1080 }
1081
1082 /* ---------------------------------------------------------------------
1083 * PWM sysfs attributes
1084 * ix = [0-4]
1085 * --------------------------------------------------------------------- */
1086
1087 #define SYS_PWM 0
1088 #define SYS_PWM_FREQ 1
1089 #define SYS_PWM_ENABLE 2
1090 #define SYS_PWM_RAMP_RATE 3
1091 #define SYS_PWM_AUTO_CHANNELS_ZONE 4
1092 #define SYS_PWM_AUTO_PWM_MIN 5
1093 #define SYS_PWM_AUTO_POINT1_PWM 6
1094 #define SYS_PWM_AUTO_POINT2_PWM 7
1095
1096 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1097 char *buf)
1098 {
1099 struct dme1737_data *data = dme1737_update_device(dev);
1100 struct sensor_device_attribute_2
1101 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1102 int ix = sensor_attr_2->index;
1103 int fn = sensor_attr_2->nr;
1104 int res;
1105
1106 switch (fn) {
1107 case SYS_PWM:
1108 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1109 res = 255;
1110 } else {
1111 res = data->pwm[ix];
1112 }
1113 break;
1114 case SYS_PWM_FREQ:
1115 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1116 break;
1117 case SYS_PWM_ENABLE:
1118 if (ix > 3) {
1119 res = 1; /* pwm[5-6] hard-wired to manual mode */
1120 } else {
1121 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1122 }
1123 break;
1124 case SYS_PWM_RAMP_RATE:
1125 /* Only valid for pwm[1-3] */
1126 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1127 break;
1128 case SYS_PWM_AUTO_CHANNELS_ZONE:
1129 /* Only valid for pwm[1-3] */
1130 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1131 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1132 } else {
1133 res = data->pwm_acz[ix];
1134 }
1135 break;
1136 case SYS_PWM_AUTO_PWM_MIN:
1137 /* Only valid for pwm[1-3] */
1138 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1139 res = data->pwm_min[ix];
1140 } else {
1141 res = 0;
1142 }
1143 break;
1144 case SYS_PWM_AUTO_POINT1_PWM:
1145 /* Only valid for pwm[1-3] */
1146 res = data->pwm_min[ix];
1147 break;
1148 case SYS_PWM_AUTO_POINT2_PWM:
1149 /* Only valid for pwm[1-3] */
1150 res = 255; /* hard-wired */
1151 break;
1152 default:
1153 res = 0;
1154 dev_dbg(dev, "Unknown function %d.\n", fn);
1155 }
1156
1157 return sprintf(buf, "%d\n", res);
1158 }
1159
1160 static struct attribute *dme1737_attr_pwm[];
1161 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
1162
1163 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1164 const char *buf, size_t count)
1165 {
1166 struct dme1737_data *data = dev_get_drvdata(dev);
1167 struct i2c_client *client = &data->client;
1168 struct sensor_device_attribute_2
1169 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1170 int ix = sensor_attr_2->index;
1171 int fn = sensor_attr_2->nr;
1172 long val = simple_strtol(buf, NULL, 10);
1173
1174 mutex_lock(&data->update_lock);
1175 switch (fn) {
1176 case SYS_PWM:
1177 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1178 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1179 break;
1180 case SYS_PWM_FREQ:
1181 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1182 DME1737_REG_PWM_FREQ(ix)));
1183 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1184 data->pwm_freq[ix]);
1185 break;
1186 case SYS_PWM_ENABLE:
1187 /* Only valid for pwm[1-3] */
1188 if (val < 0 || val > 2) {
1189 count = -EINVAL;
1190 dev_warn(dev, "PWM enable %ld not "
1191 "supported. Choose one of 0, 1, or 2.\n",
1192 val);
1193 goto exit;
1194 }
1195 /* Refresh the cache */
1196 data->pwm_config[ix] = dme1737_read(client,
1197 DME1737_REG_PWM_CONFIG(ix));
1198 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1199 /* Bail out if no change */
1200 goto exit;
1201 }
1202 /* Do some housekeeping if we are currently in auto mode */
1203 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1204 /* Save the current zone channel assignment */
1205 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1206 data->pwm_config[ix]);
1207 /* Save the current ramp rate state and disable it */
1208 data->pwm_rr[ix > 0] = dme1737_read(client,
1209 DME1737_REG_PWM_RR(ix > 0));
1210 data->pwm_rr_en &= ~(1 << ix);
1211 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1212 data->pwm_rr_en |= (1 << ix);
1213 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1214 data->pwm_rr[ix > 0]);
1215 dme1737_write(client,
1216 DME1737_REG_PWM_RR(ix > 0),
1217 data->pwm_rr[ix > 0]);
1218 }
1219 }
1220 /* Set the new PWM mode */
1221 switch (val) {
1222 case 0:
1223 /* Change permissions of pwm[ix] to read-only */
1224 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1225 S_IRUGO);
1226 /* Turn fan fully on */
1227 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1228 data->pwm_config[ix]);
1229 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1230 data->pwm_config[ix]);
1231 break;
1232 case 1:
1233 /* Turn on manual mode */
1234 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1235 data->pwm_config[ix]);
1236 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1237 data->pwm_config[ix]);
1238 /* Change permissions of pwm[ix] to read-writeable */
1239 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1240 S_IRUGO | S_IWUSR);
1241 break;
1242 case 2:
1243 /* Change permissions of pwm[ix] to read-only */
1244 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1245 S_IRUGO);
1246 /* Turn on auto mode using the saved zone channel
1247 * assignment */
1248 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1249 data->pwm_acz[ix],
1250 data->pwm_config[ix]);
1251 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1252 data->pwm_config[ix]);
1253 /* Enable PWM ramp rate if previously enabled */
1254 if (data->pwm_rr_en & (1 << ix)) {
1255 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1256 dme1737_read(client,
1257 DME1737_REG_PWM_RR(ix > 0)));
1258 dme1737_write(client,
1259 DME1737_REG_PWM_RR(ix > 0),
1260 data->pwm_rr[ix > 0]);
1261 }
1262 break;
1263 }
1264 break;
1265 case SYS_PWM_RAMP_RATE:
1266 /* Only valid for pwm[1-3] */
1267 /* Refresh the cache */
1268 data->pwm_config[ix] = dme1737_read(client,
1269 DME1737_REG_PWM_CONFIG(ix));
1270 data->pwm_rr[ix > 0] = dme1737_read(client,
1271 DME1737_REG_PWM_RR(ix > 0));
1272 /* Set the ramp rate value */
1273 if (val > 0) {
1274 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1275 data->pwm_rr[ix > 0]);
1276 }
1277 /* Enable/disable the feature only if the associated PWM
1278 * output is in automatic mode. */
1279 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1280 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1281 data->pwm_rr[ix > 0]);
1282 }
1283 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1284 data->pwm_rr[ix > 0]);
1285 break;
1286 case SYS_PWM_AUTO_CHANNELS_ZONE:
1287 /* Only valid for pwm[1-3] */
1288 if (!(val == 1 || val == 2 || val == 4 ||
1289 val == 6 || val == 7)) {
1290 count = -EINVAL;
1291 dev_warn(dev, "PWM auto channels zone %ld "
1292 "not supported. Choose one of 1, 2, 4, 6, "
1293 "or 7.\n", val);
1294 goto exit;
1295 }
1296 /* Refresh the cache */
1297 data->pwm_config[ix] = dme1737_read(client,
1298 DME1737_REG_PWM_CONFIG(ix));
1299 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1300 /* PWM is already in auto mode so update the temp
1301 * channel assignment */
1302 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1303 data->pwm_config[ix]);
1304 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1305 data->pwm_config[ix]);
1306 } else {
1307 /* PWM is not in auto mode so we save the temp
1308 * channel assignment for later use */
1309 data->pwm_acz[ix] = val;
1310 }
1311 break;
1312 case SYS_PWM_AUTO_PWM_MIN:
1313 /* Only valid for pwm[1-3] */
1314 /* Refresh the cache */
1315 data->pwm_min[ix] = dme1737_read(client,
1316 DME1737_REG_PWM_MIN(ix));
1317 /* There are only 2 values supported for the auto_pwm_min
1318 * value: 0 or auto_point1_pwm. So if the temperature drops
1319 * below the auto_point1_temp_hyst value, the fan either turns
1320 * off or runs at auto_point1_pwm duty-cycle. */
1321 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1322 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1323 dme1737_read(client,
1324 DME1737_REG_PWM_RR(0)));
1325 } else {
1326 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1327 dme1737_read(client,
1328 DME1737_REG_PWM_RR(0)));
1329 }
1330 dme1737_write(client, DME1737_REG_PWM_RR(0),
1331 data->pwm_rr[0]);
1332 break;
1333 case SYS_PWM_AUTO_POINT1_PWM:
1334 /* Only valid for pwm[1-3] */
1335 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1336 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1337 data->pwm_min[ix]);
1338 break;
1339 default:
1340 dev_dbg(dev, "Unknown function %d.\n", fn);
1341 }
1342 exit:
1343 mutex_unlock(&data->update_lock);
1344
1345 return count;
1346 }
1347
1348 /* ---------------------------------------------------------------------
1349 * Miscellaneous sysfs attributes
1350 * --------------------------------------------------------------------- */
1351
1352 static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1353 char *buf)
1354 {
1355 struct i2c_client *client = to_i2c_client(dev);
1356 struct dme1737_data *data = i2c_get_clientdata(client);
1357
1358 return sprintf(buf, "%d\n", data->vrm);
1359 }
1360
1361 static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1362 const char *buf, size_t count)
1363 {
1364 struct dme1737_data *data = dev_get_drvdata(dev);
1365 long val = simple_strtol(buf, NULL, 10);
1366
1367 data->vrm = val;
1368 return count;
1369 }
1370
1371 static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1372 char *buf)
1373 {
1374 struct dme1737_data *data = dme1737_update_device(dev);
1375
1376 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1377 }
1378
1379 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1380 char *buf)
1381 {
1382 struct dme1737_data *data = dev_get_drvdata(dev);
1383
1384 return sprintf(buf, "%s\n", data->client.name);
1385 }
1386
1387 /* ---------------------------------------------------------------------
1388 * Sysfs device attribute defines and structs
1389 * --------------------------------------------------------------------- */
1390
1391 /* Voltages 0-6 */
1392
1393 #define SENSOR_DEVICE_ATTR_IN(ix) \
1394 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1395 show_in, NULL, SYS_IN_INPUT, ix); \
1396 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1397 show_in, set_in, SYS_IN_MIN, ix); \
1398 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1399 show_in, set_in, SYS_IN_MAX, ix); \
1400 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1401 show_in, NULL, SYS_IN_ALARM, ix)
1402
1403 SENSOR_DEVICE_ATTR_IN(0);
1404 SENSOR_DEVICE_ATTR_IN(1);
1405 SENSOR_DEVICE_ATTR_IN(2);
1406 SENSOR_DEVICE_ATTR_IN(3);
1407 SENSOR_DEVICE_ATTR_IN(4);
1408 SENSOR_DEVICE_ATTR_IN(5);
1409 SENSOR_DEVICE_ATTR_IN(6);
1410
1411 /* Temperatures 1-3 */
1412
1413 #define SENSOR_DEVICE_ATTR_TEMP(ix) \
1414 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1415 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1416 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1417 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1418 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1419 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1420 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1421 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1422 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1423 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1424 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1425 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1426
1427 SENSOR_DEVICE_ATTR_TEMP(1);
1428 SENSOR_DEVICE_ATTR_TEMP(2);
1429 SENSOR_DEVICE_ATTR_TEMP(3);
1430
1431 /* Zones 1-3 */
1432
1433 #define SENSOR_DEVICE_ATTR_ZONE(ix) \
1434 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1435 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1436 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1437 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1438 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1439 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1440 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1441 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1442 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1443 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1444
1445 SENSOR_DEVICE_ATTR_ZONE(1);
1446 SENSOR_DEVICE_ATTR_ZONE(2);
1447 SENSOR_DEVICE_ATTR_ZONE(3);
1448
1449 /* Fans 1-4 */
1450
1451 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1452 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1453 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1454 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1455 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1456 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1457 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1458 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1459 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1460
1461 SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1462 SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1463 SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1464 SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1465
1466 /* Fans 5-6 */
1467
1468 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1469 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1470 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1471 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1472 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1473 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1474 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1475 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1476 show_fan, set_fan, SYS_FAN_MAX, ix-1)
1477
1478 SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1479 SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1480
1481 /* PWMs 1-3 */
1482
1483 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1484 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1485 show_pwm, set_pwm, SYS_PWM, ix-1); \
1486 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1487 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1488 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1489 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1490 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1491 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1492 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1493 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1494 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1495 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1496 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1497 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1498 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1499 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1500
1501 SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1502 SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1503 SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1504
1505 /* PWMs 5-6 */
1506
1507 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1508 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
1509 show_pwm, set_pwm, SYS_PWM, ix-1); \
1510 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
1511 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1512 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1513 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1514
1515 SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1516 SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1517
1518 /* Misc */
1519
1520 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1521 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1522 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
1523
1524 #define SENSOR_DEV_ATTR_IN(ix) \
1525 &sensor_dev_attr_in##ix##_input.dev_attr.attr, \
1526 &sensor_dev_attr_in##ix##_min.dev_attr.attr, \
1527 &sensor_dev_attr_in##ix##_max.dev_attr.attr, \
1528 &sensor_dev_attr_in##ix##_alarm.dev_attr.attr
1529
1530 /* These attributes are read-writeable only if the chip is *not* locked */
1531 #define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
1532 &sensor_dev_attr_temp##ix##_offset.dev_attr.attr
1533
1534 #define SENSOR_DEV_ATTR_TEMP(ix) \
1535 SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
1536 &sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
1537 &sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
1538 &sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
1539 &sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
1540 &sensor_dev_attr_temp##ix##_fault.dev_attr.attr
1541
1542 /* These attributes are read-writeable only if the chip is *not* locked */
1543 #define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
1544 &sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
1545 &sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
1546 &sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
1547 &sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
1548
1549 #define SENSOR_DEV_ATTR_ZONE(ix) \
1550 SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
1551 &sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
1552
1553 #define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
1554 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1555 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1556 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1557 &sensor_dev_attr_fan##ix##_type.dev_attr.attr
1558
1559 #define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
1560 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1561 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1562 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1563 &sensor_dev_attr_fan##ix##_max.dev_attr.attr
1564
1565 /* These attributes are read-writeable only if the chip is *not* locked */
1566 #define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
1567 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
1568 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
1569 &sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
1570 &sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
1571 &sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
1572 &sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
1573
1574 #define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
1575 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
1576 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1577 &sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
1578
1579 /* These attributes are read-writeable only if the chip is *not* locked */
1580 #define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
1581 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1582 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
1583
1584 #define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
1585 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
1586 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
1587
1588 /* This struct holds all the attributes that are always present and need to be
1589 * created unconditionally. The attributes that need modification of their
1590 * permissions are created read-only and write permissions are added or removed
1591 * on the fly when required */
1592 static struct attribute *dme1737_attr[] ={
1593 /* Voltages */
1594 SENSOR_DEV_ATTR_IN(0),
1595 SENSOR_DEV_ATTR_IN(1),
1596 SENSOR_DEV_ATTR_IN(2),
1597 SENSOR_DEV_ATTR_IN(3),
1598 SENSOR_DEV_ATTR_IN(4),
1599 SENSOR_DEV_ATTR_IN(5),
1600 SENSOR_DEV_ATTR_IN(6),
1601 /* Temperatures */
1602 SENSOR_DEV_ATTR_TEMP(1),
1603 SENSOR_DEV_ATTR_TEMP(2),
1604 SENSOR_DEV_ATTR_TEMP(3),
1605 /* Zones */
1606 SENSOR_DEV_ATTR_ZONE(1),
1607 SENSOR_DEV_ATTR_ZONE(2),
1608 SENSOR_DEV_ATTR_ZONE(3),
1609 /* Misc */
1610 &dev_attr_vrm.attr,
1611 &dev_attr_cpu0_vid.attr,
1612 NULL
1613 };
1614
1615 static const struct attribute_group dme1737_group = {
1616 .attrs = dme1737_attr,
1617 };
1618
1619 /* The following structs hold the PWM attributes, some of which are optional.
1620 * Their creation depends on the chip configuration which is determined during
1621 * module load. */
1622 static struct attribute *dme1737_attr_pwm1[] = {
1623 SENSOR_DEV_ATTR_PWM_1TO3(1),
1624 NULL
1625 };
1626 static struct attribute *dme1737_attr_pwm2[] = {
1627 SENSOR_DEV_ATTR_PWM_1TO3(2),
1628 NULL
1629 };
1630 static struct attribute *dme1737_attr_pwm3[] = {
1631 SENSOR_DEV_ATTR_PWM_1TO3(3),
1632 NULL
1633 };
1634 static struct attribute *dme1737_attr_pwm5[] = {
1635 SENSOR_DEV_ATTR_PWM_5TO6(5),
1636 NULL
1637 };
1638 static struct attribute *dme1737_attr_pwm6[] = {
1639 SENSOR_DEV_ATTR_PWM_5TO6(6),
1640 NULL
1641 };
1642
1643 static const struct attribute_group dme1737_pwm_group[] = {
1644 { .attrs = dme1737_attr_pwm1 },
1645 { .attrs = dme1737_attr_pwm2 },
1646 { .attrs = dme1737_attr_pwm3 },
1647 { .attrs = NULL },
1648 { .attrs = dme1737_attr_pwm5 },
1649 { .attrs = dme1737_attr_pwm6 },
1650 };
1651
1652 /* The following structs hold the fan attributes, some of which are optional.
1653 * Their creation depends on the chip configuration which is determined during
1654 * module load. */
1655 static struct attribute *dme1737_attr_fan1[] = {
1656 SENSOR_DEV_ATTR_FAN_1TO4(1),
1657 NULL
1658 };
1659 static struct attribute *dme1737_attr_fan2[] = {
1660 SENSOR_DEV_ATTR_FAN_1TO4(2),
1661 NULL
1662 };
1663 static struct attribute *dme1737_attr_fan3[] = {
1664 SENSOR_DEV_ATTR_FAN_1TO4(3),
1665 NULL
1666 };
1667 static struct attribute *dme1737_attr_fan4[] = {
1668 SENSOR_DEV_ATTR_FAN_1TO4(4),
1669 NULL
1670 };
1671 static struct attribute *dme1737_attr_fan5[] = {
1672 SENSOR_DEV_ATTR_FAN_5TO6(5),
1673 NULL
1674 };
1675 static struct attribute *dme1737_attr_fan6[] = {
1676 SENSOR_DEV_ATTR_FAN_5TO6(6),
1677 NULL
1678 };
1679
1680 static const struct attribute_group dme1737_fan_group[] = {
1681 { .attrs = dme1737_attr_fan1 },
1682 { .attrs = dme1737_attr_fan2 },
1683 { .attrs = dme1737_attr_fan3 },
1684 { .attrs = dme1737_attr_fan4 },
1685 { .attrs = dme1737_attr_fan5 },
1686 { .attrs = dme1737_attr_fan6 },
1687 };
1688
1689 /* The permissions of all of the following attributes are changed to read-
1690 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1691 static struct attribute *dme1737_attr_lock[] = {
1692 /* Temperatures */
1693 SENSOR_DEV_ATTR_TEMP_LOCK(1),
1694 SENSOR_DEV_ATTR_TEMP_LOCK(2),
1695 SENSOR_DEV_ATTR_TEMP_LOCK(3),
1696 /* Zones */
1697 SENSOR_DEV_ATTR_ZONE_LOCK(1),
1698 SENSOR_DEV_ATTR_ZONE_LOCK(2),
1699 SENSOR_DEV_ATTR_ZONE_LOCK(3),
1700 NULL
1701 };
1702
1703 static const struct attribute_group dme1737_lock_group = {
1704 .attrs = dme1737_attr_lock,
1705 };
1706
1707 /* The permissions of the following PWM attributes are changed to read-
1708 * writeable if the chip is *not* locked and the respective PWM is available.
1709 * Otherwise they stay read-only. */
1710 static struct attribute *dme1737_attr_pwm1_lock[] = {
1711 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
1712 NULL
1713 };
1714 static struct attribute *dme1737_attr_pwm2_lock[] = {
1715 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
1716 NULL
1717 };
1718 static struct attribute *dme1737_attr_pwm3_lock[] = {
1719 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
1720 NULL
1721 };
1722 static struct attribute *dme1737_attr_pwm5_lock[] = {
1723 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
1724 NULL
1725 };
1726 static struct attribute *dme1737_attr_pwm6_lock[] = {
1727 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
1728 NULL
1729 };
1730
1731 static const struct attribute_group dme1737_pwm_lock_group[] = {
1732 { .attrs = dme1737_attr_pwm1_lock },
1733 { .attrs = dme1737_attr_pwm2_lock },
1734 { .attrs = dme1737_attr_pwm3_lock },
1735 { .attrs = NULL },
1736 { .attrs = dme1737_attr_pwm5_lock },
1737 { .attrs = dme1737_attr_pwm6_lock },
1738 };
1739
1740 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1741 * chip is not locked. Otherwise they are read-only. */
1742 static struct attribute *dme1737_attr_pwm[] = {
1743 &sensor_dev_attr_pwm1.dev_attr.attr,
1744 &sensor_dev_attr_pwm2.dev_attr.attr,
1745 &sensor_dev_attr_pwm3.dev_attr.attr,
1746 };
1747
1748 /* ---------------------------------------------------------------------
1749 * Super-IO functions
1750 * --------------------------------------------------------------------- */
1751
1752 static inline void dme1737_sio_enter(int sio_cip)
1753 {
1754 outb(0x55, sio_cip);
1755 }
1756
1757 static inline void dme1737_sio_exit(int sio_cip)
1758 {
1759 outb(0xaa, sio_cip);
1760 }
1761
1762 static inline int dme1737_sio_inb(int sio_cip, int reg)
1763 {
1764 outb(reg, sio_cip);
1765 return inb(sio_cip + 1);
1766 }
1767
1768 static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1769 {
1770 outb(reg, sio_cip);
1771 outb(val, sio_cip + 1);
1772 }
1773
1774 /* ---------------------------------------------------------------------
1775 * Device initialization
1776 * --------------------------------------------------------------------- */
1777
1778 static int dme1737_i2c_get_features(int, struct dme1737_data*);
1779
1780 static void dme1737_chmod_file(struct device *dev,
1781 struct attribute *attr, mode_t mode)
1782 {
1783 if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
1784 dev_warn(dev, "Failed to change permissions of %s.\n",
1785 attr->name);
1786 }
1787 }
1788
1789 static void dme1737_chmod_group(struct device *dev,
1790 const struct attribute_group *group,
1791 mode_t mode)
1792 {
1793 struct attribute **attr;
1794
1795 for (attr = group->attrs; *attr; attr++) {
1796 dme1737_chmod_file(dev, *attr, mode);
1797 }
1798 }
1799
1800 static void dme1737_remove_files(struct device *dev)
1801 {
1802 struct dme1737_data *data = dev_get_drvdata(dev);
1803 int ix;
1804
1805 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1806 if (data->has_fan & (1 << ix)) {
1807 sysfs_remove_group(&dev->kobj,
1808 &dme1737_fan_group[ix]);
1809 }
1810 }
1811
1812 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1813 if (data->has_pwm & (1 << ix)) {
1814 sysfs_remove_group(&dev->kobj,
1815 &dme1737_pwm_group[ix]);
1816 }
1817 }
1818
1819 sysfs_remove_group(&dev->kobj, &dme1737_group);
1820
1821 if (!data->client.driver) {
1822 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
1823 }
1824 }
1825
1826 static int dme1737_create_files(struct device *dev)
1827 {
1828 struct dme1737_data *data = dev_get_drvdata(dev);
1829 int err, ix;
1830
1831 /* Create a name attribute for ISA devices */
1832 if (!data->client.driver &&
1833 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
1834 goto exit;
1835 }
1836
1837 /* Create standard sysfs attributes */
1838 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
1839 goto exit_remove;
1840 }
1841
1842 /* Create fan sysfs attributes */
1843 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1844 if (data->has_fan & (1 << ix)) {
1845 if ((err = sysfs_create_group(&dev->kobj,
1846 &dme1737_fan_group[ix]))) {
1847 goto exit_remove;
1848 }
1849 }
1850 }
1851
1852 /* Create PWM sysfs attributes */
1853 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1854 if (data->has_pwm & (1 << ix)) {
1855 if ((err = sysfs_create_group(&dev->kobj,
1856 &dme1737_pwm_group[ix]))) {
1857 goto exit_remove;
1858 }
1859 }
1860 }
1861
1862 /* Inform if the device is locked. Otherwise change the permissions of
1863 * selected attributes from read-only to read-writeable. */
1864 if (data->config & 0x02) {
1865 dev_info(dev, "Device is locked. Some attributes "
1866 "will be read-only.\n");
1867 } else {
1868 /* Change permissions of standard attributes */
1869 dme1737_chmod_group(dev, &dme1737_lock_group,
1870 S_IRUGO | S_IWUSR);
1871
1872 /* Change permissions of PWM attributes */
1873 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
1874 if (data->has_pwm & (1 << ix)) {
1875 dme1737_chmod_group(dev,
1876 &dme1737_pwm_lock_group[ix],
1877 S_IRUGO | S_IWUSR);
1878 }
1879 }
1880
1881 /* Change permissions of pwm[1-3] if in manual mode */
1882 for (ix = 0; ix < 3; ix++) {
1883 if ((data->has_pwm & (1 << ix)) &&
1884 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1885 dme1737_chmod_file(dev,
1886 dme1737_attr_pwm[ix],
1887 S_IRUGO | S_IWUSR);
1888 }
1889 }
1890 }
1891
1892 return 0;
1893
1894 exit_remove:
1895 dme1737_remove_files(dev);
1896 exit:
1897 return err;
1898 }
1899
1900 static int dme1737_init_device(struct device *dev)
1901 {
1902 struct dme1737_data *data = dev_get_drvdata(dev);
1903 struct i2c_client *client = &data->client;
1904 int ix;
1905 u8 reg;
1906
1907 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1908 /* Inform if part is not monitoring/started */
1909 if (!(data->config & 0x01)) {
1910 if (!force_start) {
1911 dev_err(dev, "Device is not monitoring. "
1912 "Use the force_start load parameter to "
1913 "override.\n");
1914 return -EFAULT;
1915 }
1916
1917 /* Force monitoring */
1918 data->config |= 0x01;
1919 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1920 }
1921 /* Inform if part is not ready */
1922 if (!(data->config & 0x04)) {
1923 dev_err(dev, "Device is not ready.\n");
1924 return -EFAULT;
1925 }
1926
1927 /* Determine which optional fan and pwm features are enabled/present */
1928 if (client->driver) { /* I2C chip */
1929 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1930 /* Check if optional fan3 input is enabled */
1931 if (data->config2 & 0x04) {
1932 data->has_fan |= (1 << 2);
1933 }
1934
1935 /* Fan4 and pwm3 are only available if the client's I2C address
1936 * is the default 0x2e. Otherwise the I/Os associated with
1937 * these functions are used for addr enable/select. */
1938 if (data->client.addr == 0x2e) {
1939 data->has_fan |= (1 << 3);
1940 data->has_pwm |= (1 << 2);
1941 }
1942
1943 /* Determine which of the optional fan[5-6] and pwm[5-6]
1944 * features are enabled. For this, we need to query the runtime
1945 * registers through the Super-IO LPC interface. Try both
1946 * config ports 0x2e and 0x4e. */
1947 if (dme1737_i2c_get_features(0x2e, data) &&
1948 dme1737_i2c_get_features(0x4e, data)) {
1949 dev_warn(dev, "Failed to query Super-IO for optional "
1950 "features.\n");
1951 }
1952 } else { /* ISA chip */
1953 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
1954 * don't exist in the ISA chip. */
1955 data->has_fan |= (1 << 2);
1956 data->has_pwm |= (1 << 2);
1957 }
1958
1959 /* Fan1, fan2, pwm1, and pwm2 are always present */
1960 data->has_fan |= 0x03;
1961 data->has_pwm |= 0x03;
1962
1963 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
1964 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
1965 (data->has_pwm & (1 << 2)) ? "yes" : "no",
1966 (data->has_pwm & (1 << 4)) ? "yes" : "no",
1967 (data->has_pwm & (1 << 5)) ? "yes" : "no",
1968 (data->has_fan & (1 << 2)) ? "yes" : "no",
1969 (data->has_fan & (1 << 3)) ? "yes" : "no",
1970 (data->has_fan & (1 << 4)) ? "yes" : "no",
1971 (data->has_fan & (1 << 5)) ? "yes" : "no");
1972
1973 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
1974 /* Inform if fan-to-pwm mapping differs from the default */
1975 if (client->driver && reg != 0xa4) { /* I2C chip */
1976 dev_warn(dev, "Non-standard fan to pwm mapping: "
1977 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
1978 "fan4->pwm%d. Please report to the driver "
1979 "maintainer.\n",
1980 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1981 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
1982 } else if (!client->driver && reg != 0x24) { /* ISA chip */
1983 dev_warn(dev, "Non-standard fan to pwm mapping: "
1984 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
1985 "Please report to the driver maintainer.\n",
1986 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1987 ((reg >> 4) & 0x03) + 1);
1988 }
1989
1990 /* Switch pwm[1-3] to manual mode if they are currently disabled and
1991 * set the duty-cycles to 0% (which is identical to the PWMs being
1992 * disabled). */
1993 if (!(data->config & 0x02)) {
1994 for (ix = 0; ix < 3; ix++) {
1995 data->pwm_config[ix] = dme1737_read(client,
1996 DME1737_REG_PWM_CONFIG(ix));
1997 if ((data->has_pwm & (1 << ix)) &&
1998 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
1999 dev_info(dev, "Switching pwm%d to "
2000 "manual mode.\n", ix + 1);
2001 data->pwm_config[ix] = PWM_EN_TO_REG(1,
2002 data->pwm_config[ix]);
2003 dme1737_write(client, DME1737_REG_PWM(ix), 0);
2004 dme1737_write(client,
2005 DME1737_REG_PWM_CONFIG(ix),
2006 data->pwm_config[ix]);
2007 }
2008 }
2009 }
2010
2011 /* Initialize the default PWM auto channels zone (acz) assignments */
2012 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2013 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2014 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2015
2016 /* Set VRM */
2017 data->vrm = vid_which_vrm();
2018
2019 return 0;
2020 }
2021
2022 /* ---------------------------------------------------------------------
2023 * I2C device detection and registration
2024 * --------------------------------------------------------------------- */
2025
2026 static struct i2c_driver dme1737_i2c_driver;
2027
2028 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2029 {
2030 int err = 0, reg;
2031 u16 addr;
2032
2033 dme1737_sio_enter(sio_cip);
2034
2035 /* Check device ID
2036 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
2037 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2038 if (!(reg == 0x77 || reg == 0x78)) {
2039 err = -ENODEV;
2040 goto exit;
2041 }
2042
2043 /* Select logical device A (runtime registers) */
2044 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2045
2046 /* Get the base address of the runtime registers */
2047 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2048 dme1737_sio_inb(sio_cip, 0x61))) {
2049 err = -ENODEV;
2050 goto exit;
2051 }
2052
2053 /* Read the runtime registers to determine which optional features
2054 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2055 * to '10' if the respective feature is enabled. */
2056 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
2057 data->has_fan |= (1 << 5);
2058 }
2059 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
2060 data->has_pwm |= (1 << 5);
2061 }
2062 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
2063 data->has_fan |= (1 << 4);
2064 }
2065 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
2066 data->has_pwm |= (1 << 4);
2067 }
2068
2069 exit:
2070 dme1737_sio_exit(sio_cip);
2071
2072 return err;
2073 }
2074
2075 static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
2076 int kind)
2077 {
2078 u8 company, verstep = 0;
2079 struct i2c_client *client;
2080 struct dme1737_data *data;
2081 struct device *dev;
2082 int err = 0;
2083 const char *name;
2084
2085 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
2086 goto exit;
2087 }
2088
2089 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2090 err = -ENOMEM;
2091 goto exit;
2092 }
2093
2094 client = &data->client;
2095 i2c_set_clientdata(client, data);
2096 client->addr = address;
2097 client->adapter = adapter;
2098 client->driver = &dme1737_i2c_driver;
2099 dev = &client->dev;
2100
2101 /* A negative kind means that the driver was loaded with no force
2102 * parameter (default), so we must identify the chip. */
2103 if (kind < 0) {
2104 company = dme1737_read(client, DME1737_REG_COMPANY);
2105 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
2106
2107 if (!((company == DME1737_COMPANY_SMSC) &&
2108 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
2109 err = -ENODEV;
2110 goto exit_kfree;
2111 }
2112 }
2113
2114 kind = dme1737;
2115 name = "dme1737";
2116
2117 /* Fill in the remaining client fields and put it into the global
2118 * list */
2119 strlcpy(client->name, name, I2C_NAME_SIZE);
2120 mutex_init(&data->update_lock);
2121
2122 /* Tell the I2C layer a new client has arrived */
2123 if ((err = i2c_attach_client(client))) {
2124 goto exit_kfree;
2125 }
2126
2127 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
2128 client->addr, verstep);
2129
2130 /* Initialize the DME1737 chip */
2131 if ((err = dme1737_init_device(dev))) {
2132 dev_err(dev, "Failed to initialize device.\n");
2133 goto exit_detach;
2134 }
2135
2136 /* Create sysfs files */
2137 if ((err = dme1737_create_files(dev))) {
2138 dev_err(dev, "Failed to create sysfs files.\n");
2139 goto exit_detach;
2140 }
2141
2142 /* Register device */
2143 data->hwmon_dev = hwmon_device_register(dev);
2144 if (IS_ERR(data->hwmon_dev)) {
2145 dev_err(dev, "Failed to register device.\n");
2146 err = PTR_ERR(data->hwmon_dev);
2147 goto exit_remove;
2148 }
2149
2150 return 0;
2151
2152 exit_remove:
2153 dme1737_remove_files(dev);
2154 exit_detach:
2155 i2c_detach_client(client);
2156 exit_kfree:
2157 kfree(data);
2158 exit:
2159 return err;
2160 }
2161
2162 static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
2163 {
2164 if (!(adapter->class & I2C_CLASS_HWMON)) {
2165 return 0;
2166 }
2167
2168 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
2169 }
2170
2171 static int dme1737_i2c_detach_client(struct i2c_client *client)
2172 {
2173 struct dme1737_data *data = i2c_get_clientdata(client);
2174 int err;
2175
2176 hwmon_device_unregister(data->hwmon_dev);
2177 dme1737_remove_files(&client->dev);
2178
2179 if ((err = i2c_detach_client(client))) {
2180 return err;
2181 }
2182
2183 kfree(data);
2184 return 0;
2185 }
2186
2187 static struct i2c_driver dme1737_i2c_driver = {
2188 .driver = {
2189 .name = "dme1737",
2190 },
2191 .attach_adapter = dme1737_i2c_attach_adapter,
2192 .detach_client = dme1737_i2c_detach_client,
2193 };
2194
2195 /* ---------------------------------------------------------------------
2196 * ISA device detection and registration
2197 * --------------------------------------------------------------------- */
2198
2199 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2200 {
2201 int err = 0, reg;
2202 unsigned short base_addr;
2203
2204 dme1737_sio_enter(sio_cip);
2205
2206 /* Check device ID
2207 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
2208 * SCH3116 (0x7f). */
2209 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2210 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
2211 err = -ENODEV;
2212 goto exit;
2213 }
2214
2215 /* Select logical device A (runtime registers) */
2216 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2217
2218 /* Get the base address of the runtime registers */
2219 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2220 dme1737_sio_inb(sio_cip, 0x61))) {
2221 printk(KERN_ERR "dme1737: Base address not set.\n");
2222 err = -ENODEV;
2223 goto exit;
2224 }
2225
2226 /* Access to the hwmon registers is through an index/data register
2227 * pair located at offset 0x70/0x71. */
2228 *addr = base_addr + 0x70;
2229
2230 exit:
2231 dme1737_sio_exit(sio_cip);
2232 return err;
2233 }
2234
2235 static int __init dme1737_isa_device_add(unsigned short addr)
2236 {
2237 struct resource res = {
2238 .start = addr,
2239 .end = addr + DME1737_EXTENT - 1,
2240 .name = "dme1737",
2241 .flags = IORESOURCE_IO,
2242 };
2243 int err;
2244
2245 if (!(pdev = platform_device_alloc("dme1737", addr))) {
2246 printk(KERN_ERR "dme1737: Failed to allocate device.\n");
2247 err = -ENOMEM;
2248 goto exit;
2249 }
2250
2251 if ((err = platform_device_add_resources(pdev, &res, 1))) {
2252 printk(KERN_ERR "dme1737: Failed to add device resource "
2253 "(err = %d).\n", err);
2254 goto exit_device_put;
2255 }
2256
2257 if ((err = platform_device_add(pdev))) {
2258 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
2259 err);
2260 goto exit_device_put;
2261 }
2262
2263 return 0;
2264
2265 exit_device_put:
2266 platform_device_put(pdev);
2267 pdev = NULL;
2268 exit:
2269 return err;
2270 }
2271
2272 static int __devinit dme1737_isa_probe(struct platform_device *pdev)
2273 {
2274 u8 company, device;
2275 struct resource *res;
2276 struct i2c_client *client;
2277 struct dme1737_data *data;
2278 struct device *dev = &pdev->dev;
2279 int err;
2280
2281 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2282 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
2283 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2284 (unsigned short)res->start,
2285 (unsigned short)res->start + DME1737_EXTENT - 1);
2286 err = -EBUSY;
2287 goto exit;
2288 }
2289
2290 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2291 err = -ENOMEM;
2292 goto exit_release_region;
2293 }
2294
2295 client = &data->client;
2296 i2c_set_clientdata(client, data);
2297 client->addr = res->start;
2298 platform_set_drvdata(pdev, data);
2299
2300 company = dme1737_read(client, DME1737_REG_COMPANY);
2301 device = dme1737_read(client, DME1737_REG_DEVICE);
2302
2303 if (!((company == DME1737_COMPANY_SMSC) &&
2304 (device == SCH311X_DEVICE))) {
2305 err = -ENODEV;
2306 goto exit_kfree;
2307 }
2308
2309 /* Fill in the remaining client fields and initialize the mutex */
2310 strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
2311 mutex_init(&data->update_lock);
2312
2313 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr);
2314
2315 /* Initialize the chip */
2316 if ((err = dme1737_init_device(dev))) {
2317 dev_err(dev, "Failed to initialize device.\n");
2318 goto exit_kfree;
2319 }
2320
2321 /* Create sysfs files */
2322 if ((err = dme1737_create_files(dev))) {
2323 dev_err(dev, "Failed to create sysfs files.\n");
2324 goto exit_kfree;
2325 }
2326
2327 /* Register device */
2328 data->hwmon_dev = hwmon_device_register(dev);
2329 if (IS_ERR(data->hwmon_dev)) {
2330 dev_err(dev, "Failed to register device.\n");
2331 err = PTR_ERR(data->hwmon_dev);
2332 goto exit_remove_files;
2333 }
2334
2335 return 0;
2336
2337 exit_remove_files:
2338 dme1737_remove_files(dev);
2339 exit_kfree:
2340 platform_set_drvdata(pdev, NULL);
2341 kfree(data);
2342 exit_release_region:
2343 release_region(res->start, DME1737_EXTENT);
2344 exit:
2345 return err;
2346 }
2347
2348 static int __devexit dme1737_isa_remove(struct platform_device *pdev)
2349 {
2350 struct dme1737_data *data = platform_get_drvdata(pdev);
2351
2352 hwmon_device_unregister(data->hwmon_dev);
2353 dme1737_remove_files(&pdev->dev);
2354 release_region(data->client.addr, DME1737_EXTENT);
2355 platform_set_drvdata(pdev, NULL);
2356 kfree(data);
2357
2358 return 0;
2359 }
2360
2361 static struct platform_driver dme1737_isa_driver = {
2362 .driver = {
2363 .owner = THIS_MODULE,
2364 .name = "dme1737",
2365 },
2366 .probe = dme1737_isa_probe,
2367 .remove = __devexit_p(dme1737_isa_remove),
2368 };
2369
2370 /* ---------------------------------------------------------------------
2371 * Module initialization and cleanup
2372 * --------------------------------------------------------------------- */
2373
2374 static int __init dme1737_init(void)
2375 {
2376 int err;
2377 unsigned short addr;
2378
2379 if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
2380 goto exit;
2381 }
2382
2383 if (dme1737_isa_detect(0x2e, &addr) &&
2384 dme1737_isa_detect(0x4e, &addr)) {
2385 /* Return 0 if we didn't find an ISA device */
2386 return 0;
2387 }
2388
2389 if ((err = platform_driver_register(&dme1737_isa_driver))) {
2390 goto exit_del_i2c_driver;
2391 }
2392
2393 /* Sets global pdev as a side effect */
2394 if ((err = dme1737_isa_device_add(addr))) {
2395 goto exit_del_isa_driver;
2396 }
2397
2398 return 0;
2399
2400 exit_del_isa_driver:
2401 platform_driver_unregister(&dme1737_isa_driver);
2402 exit_del_i2c_driver:
2403 i2c_del_driver(&dme1737_i2c_driver);
2404 exit:
2405 return err;
2406 }
2407
2408 static void __exit dme1737_exit(void)
2409 {
2410 if (pdev) {
2411 platform_device_unregister(pdev);
2412 platform_driver_unregister(&dme1737_isa_driver);
2413 }
2414
2415 i2c_del_driver(&dme1737_i2c_driver);
2416 }
2417
2418 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2419 MODULE_DESCRIPTION("DME1737 sensors");
2420 MODULE_LICENSE("GPL");
2421
2422 module_init(dme1737_init);
2423 module_exit(dme1737_exit);
WRT350N Kernel Patches