2 amd756.c - Part of lm_sensors, Linux kernel modules for hardware
5 Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
7 Shamelessly ripped from i2c-piix4.c:
9 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl> and
10 Philip Edelbrock <phil@netroedge.com>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 2002-04-08: Added nForce support. (Csaba Halasz)
29 2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
30 2002-12-28: Rewritten into something that resembles a Linux driver (hch)
31 2003-11-29: Added back AMD8111 removed by the previous rewrite.
36 Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
37 Note: we assume there can only be one device, with one SMBus interface.
40 #include <linux/module.h>
41 #include <linux/pci.h>
42 #include <linux/kernel.h>
43 #include <linux/delay.h>
44 #include <linux/stddef.h>
45 #include <linux/ioport.h>
46 #include <linux/i2c.h>
47 #include <linux/init.h>
50 /* AMD756 SMBus address offsets */
51 #define SMB_ADDR_OFFSET 0xE0
53 #define SMB_GLOBAL_STATUS (0x0 + amd756_ioport)
54 #define SMB_GLOBAL_ENABLE (0x2 + amd756_ioport)
55 #define SMB_HOST_ADDRESS (0x4 + amd756_ioport)
56 #define SMB_HOST_DATA (0x6 + amd756_ioport)
57 #define SMB_HOST_COMMAND (0x8 + amd756_ioport)
58 #define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
59 #define SMB_HAS_DATA (0xA + amd756_ioport)
60 #define SMB_HAS_DEVICE_ADDRESS (0xC + amd756_ioport)
61 #define SMB_HAS_HOST_ADDRESS (0xE + amd756_ioport)
62 #define SMB_SNOOP_ADDRESS (0xF + amd756_ioport)
64 /* PCI Address Constants */
66 /* address of I/O space */
67 #define SMBBA 0x058 /* mh */
68 #define SMBBANFORCE 0x014
70 /* general configuration */
71 #define SMBGCFG 0x041 /* mh */
73 /* silicon revision code */
77 #define MAX_TIMEOUT 500
79 /* AMD756 constants */
80 #define AMD756_QUICK 0x00
81 #define AMD756_BYTE 0x01
82 #define AMD756_BYTE_DATA 0x02
83 #define AMD756_WORD_DATA 0x03
84 #define AMD756_PROCESS_CALL 0x04
85 #define AMD756_BLOCK_DATA 0x05
87 static struct pci_driver amd756_driver
;
88 static unsigned short amd756_ioport
;
91 SMBUS event = I/O 28-29 bit 11
92 see E0 for the status bits and enabled in E2
95 #define GS_ABRT_STS (1 << 0)
96 #define GS_COL_STS (1 << 1)
97 #define GS_PRERR_STS (1 << 2)
98 #define GS_HST_STS (1 << 3)
99 #define GS_HCYC_STS (1 << 4)
100 #define GS_TO_STS (1 << 5)
101 #define GS_SMB_STS (1 << 11)
103 #define GS_CLEAR_STS (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
104 GS_HCYC_STS | GS_TO_STS )
106 #define GE_CYC_TYPE_MASK (7)
107 #define GE_HOST_STC (1 << 3)
108 #define GE_ABORT (1 << 5)
111 static int amd756_transaction(struct i2c_adapter
*adap
)
117 dev_dbg(&adap
->dev
, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
118 "DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS
),
119 inw_p(SMB_GLOBAL_ENABLE
), inw_p(SMB_HOST_ADDRESS
),
120 inb_p(SMB_HOST_DATA
));
122 /* Make sure the SMBus host is ready to start transmitting */
123 if ((temp
= inw_p(SMB_GLOBAL_STATUS
)) & (GS_HST_STS
| GS_SMB_STS
)) {
124 dev_dbg(&adap
->dev
, "SMBus busy (%04x). Waiting...\n", temp
);
127 temp
= inw_p(SMB_GLOBAL_STATUS
);
128 } while ((temp
& (GS_HST_STS
| GS_SMB_STS
)) &&
129 (timeout
++ < MAX_TIMEOUT
));
130 /* If the SMBus is still busy, we give up */
131 if (timeout
>= MAX_TIMEOUT
) {
132 dev_dbg(&adap
->dev
, "Busy wait timeout (%04x)\n", temp
);
138 /* start the transaction by setting the start bit */
139 outw_p(inw(SMB_GLOBAL_ENABLE
) | GE_HOST_STC
, SMB_GLOBAL_ENABLE
);
141 /* We will always wait for a fraction of a second! */
144 temp
= inw_p(SMB_GLOBAL_STATUS
);
145 } while ((temp
& GS_HST_STS
) && (timeout
++ < MAX_TIMEOUT
));
147 /* If the SMBus is still busy, we give up */
148 if (timeout
>= MAX_TIMEOUT
) {
149 dev_dbg(&adap
->dev
, "Completion timeout!\n");
153 if (temp
& GS_PRERR_STS
) {
155 dev_dbg(&adap
->dev
, "SMBus Protocol error (no response)!\n");
158 if (temp
& GS_COL_STS
) {
160 dev_warn(&adap
->dev
, "SMBus collision!\n");
163 if (temp
& GS_TO_STS
) {
165 dev_dbg(&adap
->dev
, "SMBus protocol timeout!\n");
168 if (temp
& GS_HCYC_STS
)
169 dev_dbg(&adap
->dev
, "SMBus protocol success!\n");
171 outw_p(GS_CLEAR_STS
, SMB_GLOBAL_STATUS
);
174 if (((temp
= inw_p(SMB_GLOBAL_STATUS
)) & GS_CLEAR_STS
) != 0x00) {
176 "Failed reset at end of transaction (%04x)\n", temp
);
181 "Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
182 inw_p(SMB_GLOBAL_STATUS
), inw_p(SMB_GLOBAL_ENABLE
),
183 inw_p(SMB_HOST_ADDRESS
), inb_p(SMB_HOST_DATA
));
188 dev_warn(&adap
->dev
, "Sending abort\n");
189 outw_p(inw(SMB_GLOBAL_ENABLE
) | GE_ABORT
, SMB_GLOBAL_ENABLE
);
191 outw_p(GS_CLEAR_STS
, SMB_GLOBAL_STATUS
);
195 /* Return -1 on error. */
196 static s32
amd756_access(struct i2c_adapter
* adap
, u16 addr
,
197 unsigned short flags
, char read_write
,
198 u8 command
, int size
, union i2c_smbus_data
* data
)
202 /** TODO: Should I supporte the 10-bit transfers? */
204 case I2C_SMBUS_PROC_CALL
:
205 dev_dbg(&adap
->dev
, "I2C_SMBUS_PROC_CALL not supported!\n");
206 /* TODO: Well... It is supported, I'm just not sure what to do here... */
208 case I2C_SMBUS_QUICK
:
209 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
214 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
216 if (read_write
== I2C_SMBUS_WRITE
)
217 outb_p(command
, SMB_HOST_DATA
);
220 case I2C_SMBUS_BYTE_DATA
:
221 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
223 outb_p(command
, SMB_HOST_COMMAND
);
224 if (read_write
== I2C_SMBUS_WRITE
)
225 outw_p(data
->byte
, SMB_HOST_DATA
);
226 size
= AMD756_BYTE_DATA
;
228 case I2C_SMBUS_WORD_DATA
:
229 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
231 outb_p(command
, SMB_HOST_COMMAND
);
232 if (read_write
== I2C_SMBUS_WRITE
)
233 outw_p(data
->word
, SMB_HOST_DATA
); /* TODO: endian???? */
234 size
= AMD756_WORD_DATA
;
236 case I2C_SMBUS_BLOCK_DATA
:
237 outw_p(((addr
& 0x7f) << 1) | (read_write
& 0x01),
239 outb_p(command
, SMB_HOST_COMMAND
);
240 if (read_write
== I2C_SMBUS_WRITE
) {
241 len
= data
->block
[0];
246 outw_p(len
, SMB_HOST_DATA
);
247 /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
248 for (i
= 1; i
<= len
; i
++)
249 outb_p(data
->block
[i
],
250 SMB_HOST_BLOCK_DATA
);
252 size
= AMD756_BLOCK_DATA
;
256 /* How about enabling interrupts... */
257 outw_p(size
& GE_CYC_TYPE_MASK
, SMB_GLOBAL_ENABLE
);
259 if (amd756_transaction(adap
)) /* Error in transaction */
262 if ((read_write
== I2C_SMBUS_WRITE
) || (size
== AMD756_QUICK
))
268 data
->byte
= inw_p(SMB_HOST_DATA
);
270 case AMD756_BYTE_DATA
:
271 data
->byte
= inw_p(SMB_HOST_DATA
);
273 case AMD756_WORD_DATA
:
274 data
->word
= inw_p(SMB_HOST_DATA
); /* TODO: endian???? */
276 case AMD756_BLOCK_DATA
:
277 data
->block
[0] = inw_p(SMB_HOST_DATA
) & 0x3f;
278 if(data
->block
[0] > 32)
280 /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
281 for (i
= 1; i
<= data
->block
[0]; i
++)
282 data
->block
[i
] = inb_p(SMB_HOST_BLOCK_DATA
);
289 static u32
amd756_func(struct i2c_adapter
*adapter
)
291 return I2C_FUNC_SMBUS_QUICK
| I2C_FUNC_SMBUS_BYTE
|
292 I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA
|
293 I2C_FUNC_SMBUS_BLOCK_DATA
| I2C_FUNC_SMBUS_PROC_CALL
;
296 static const struct i2c_algorithm smbus_algorithm
= {
297 .smbus_xfer
= amd756_access
,
298 .functionality
= amd756_func
,
301 struct i2c_adapter amd756_smbus
= {
302 .owner
= THIS_MODULE
,
303 .id
= I2C_HW_SMBUS_AMD756
,
304 .class = I2C_CLASS_HWMON
,
305 .algo
= &smbus_algorithm
,
308 enum chiptype
{ AMD756
, AMD766
, AMD768
, NFORCE
, AMD8111
};
309 static const char* chipname
[] = {
310 "AMD756", "AMD766", "AMD768",
311 "nVidia nForce", "AMD8111",
314 static struct pci_device_id amd756_ids
[] = {
315 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_VIPER_740B
),
316 .driver_data
= AMD756
},
317 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_VIPER_7413
),
318 .driver_data
= AMD766
},
319 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_OPUS_7443
),
320 .driver_data
= AMD768
},
321 { PCI_DEVICE(PCI_VENDOR_ID_AMD
, PCI_DEVICE_ID_AMD_8111_SMBUS
),
322 .driver_data
= AMD8111
},
323 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS
),
324 .driver_data
= NFORCE
},
328 MODULE_DEVICE_TABLE (pci
, amd756_ids
);
330 static int __devinit
amd756_probe(struct pci_dev
*pdev
,
331 const struct pci_device_id
*id
)
333 int nforce
= (id
->driver_data
== NFORCE
);
337 /* driver_data might come from user-space, so check it */
338 <<<<<<< HEAD
:drivers
/i2c
/busses
/i2c
-amd756
.c
339 if (id
->driver_data
> ARRAY_SIZE(chipname
))
341 if (id
->driver_data
>= ARRAY_SIZE(chipname
))
342 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/i2c
/busses
/i2c
-amd756
.c
346 dev_err(&pdev
->dev
, "Only one device supported "
347 "(you have a strange motherboard, btw)\n");
352 if (PCI_FUNC(pdev
->devfn
) != 1)
355 pci_read_config_word(pdev
, SMBBANFORCE
, &amd756_ioport
);
356 amd756_ioport
&= 0xfffc;
358 if (PCI_FUNC(pdev
->devfn
) != 3)
361 pci_read_config_byte(pdev
, SMBGCFG
, &temp
);
362 if ((temp
& 128) == 0) {
364 "Error: SMBus controller I/O not enabled!\n");
368 /* Determine the address of the SMBus areas */
369 /* Technically it is a dword but... */
370 pci_read_config_word(pdev
, SMBBA
, &amd756_ioport
);
371 amd756_ioport
&= 0xff00;
372 amd756_ioport
+= SMB_ADDR_OFFSET
;
375 if (!request_region(amd756_ioport
, SMB_IOSIZE
, amd756_driver
.name
)) {
376 dev_err(&pdev
->dev
, "SMB region 0x%x already in use!\n",
381 pci_read_config_byte(pdev
, SMBREV
, &temp
);
382 dev_dbg(&pdev
->dev
, "SMBREV = 0x%X\n", temp
);
383 dev_dbg(&pdev
->dev
, "AMD756_smba = 0x%X\n", amd756_ioport
);
385 /* set up the sysfs linkage to our parent device */
386 amd756_smbus
.dev
.parent
= &pdev
->dev
;
388 sprintf(amd756_smbus
.name
, "SMBus %s adapter at %04x",
389 chipname
[id
->driver_data
], amd756_ioport
);
391 error
= i2c_add_adapter(&amd756_smbus
);
394 "Adapter registration failed, module not inserted\n");
401 release_region(amd756_ioport
, SMB_IOSIZE
);
405 static void __devexit
amd756_remove(struct pci_dev
*dev
)
407 i2c_del_adapter(&amd756_smbus
);
408 release_region(amd756_ioport
, SMB_IOSIZE
);
411 static struct pci_driver amd756_driver
= {
412 .name
= "amd756_smbus",
413 .id_table
= amd756_ids
,
414 .probe
= amd756_probe
,
415 .remove
= __devexit_p(amd756_remove
),
416 .dynids
.use_driver_data
= 1,
419 static int __init
amd756_init(void)
421 return pci_register_driver(&amd756_driver
);
424 static void __exit
amd756_exit(void)
426 pci_unregister_driver(&amd756_driver
);
429 MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
430 MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
431 MODULE_LICENSE("GPL");
433 EXPORT_SYMBOL(amd756_smbus
);
435 module_init(amd756_init
)
436 module_exit(amd756_exit
)