2 * linux/drivers/net/ehea/ehea.h
4 * eHEA ethernet device driver for IBM eServer System p
6 * (C) Copyright IBM Corp. 2006
9 * Christoph Raisch <raisch@de.ibm.com>
10 * Jan-Bernd Themann <themann@de.ibm.com>
11 * Thomas Klein <tklein@de.ibm.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2, or (at your option)
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 #include <linux/module.h>
33 #include <linux/ethtool.h>
34 #include <linux/vmalloc.h>
35 #include <linux/if_vlan.h>
36 #include <linux/inet_lro.h>
38 #include <asm/ibmebus.h>
39 #include <asm/abs_addr.h>
42 #define DRV_NAME "ehea"
43 <<<<<<< HEAD
:drivers
/net
/ehea
/ehea
.h
44 #define DRV_VERSION "EHEA_0083"
46 #define DRV_VERSION "EHEA_0087"
47 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/ehea
/ehea
.h
49 /* eHEA capability flags */
50 #define DLPAR_PORT_ADD_REM 1
51 #define DLPAR_MEM_ADD 2
52 #define DLPAR_MEM_REM 4
53 #define EHEA_CAPABILITIES (DLPAR_PORT_ADD_REM | DLPAR_MEM_ADD)
55 #define EHEA_MSG_DEFAULT (NETIF_MSG_LINK | NETIF_MSG_TIMER \
56 | NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
58 #define EHEA_MAX_ENTRIES_RQ1 32767
59 #define EHEA_MAX_ENTRIES_RQ2 16383
60 #define EHEA_MAX_ENTRIES_RQ3 16383
61 #define EHEA_MAX_ENTRIES_SQ 32767
62 #define EHEA_MIN_ENTRIES_QP 127
64 #define EHEA_SMALL_QUEUES
65 #define EHEA_NUM_TX_QP 1
66 #define EHEA_LRO_MAX_AGGR 64
68 #ifdef EHEA_SMALL_QUEUES
69 #define EHEA_MAX_CQE_COUNT 1023
70 #define EHEA_DEF_ENTRIES_SQ 1023
71 #define EHEA_DEF_ENTRIES_RQ1 4095
72 #define EHEA_DEF_ENTRIES_RQ2 1023
73 #define EHEA_DEF_ENTRIES_RQ3 1023
75 #define EHEA_MAX_CQE_COUNT 4080
76 #define EHEA_DEF_ENTRIES_SQ 4080
77 #define EHEA_DEF_ENTRIES_RQ1 8160
78 #define EHEA_DEF_ENTRIES_RQ2 2040
79 #define EHEA_DEF_ENTRIES_RQ3 2040
82 #define EHEA_MAX_ENTRIES_EQ 20
89 #define EHEA_MAX_PACKET_SIZE 9022 /* for jumbo frames */
90 #define EHEA_RQ2_PKT_SIZE 1522
91 #define EHEA_L_PKT_SIZE 256 /* low latency */
93 #define MAX_LRO_DESCRIPTORS 8
95 /* Send completion signaling */
97 /* Protection Domain Identifier */
98 #define EHEA_PD_ID 0xaabcdeff
100 #define EHEA_RQ2_THRESHOLD 1
101 #define EHEA_RQ3_THRESHOLD 9 /* use RQ3 threshold of 1522 bytes */
103 #define EHEA_SPEED_10G 10000
104 #define EHEA_SPEED_1G 1000
105 #define EHEA_SPEED_100M 100
106 #define EHEA_SPEED_10M 10
107 #define EHEA_SPEED_AUTONEG 0
109 /* Broadcast/Multicast registration types */
110 #define EHEA_BCMC_SCOPE_ALL 0x08
111 #define EHEA_BCMC_SCOPE_SINGLE 0x00
112 #define EHEA_BCMC_MULTICAST 0x04
113 #define EHEA_BCMC_BROADCAST 0x00
114 #define EHEA_BCMC_UNTAGGED 0x02
115 #define EHEA_BCMC_TAGGED 0x00
116 #define EHEA_BCMC_VLANID_ALL 0x01
117 #define EHEA_BCMC_VLANID_SINGLE 0x00
119 #define EHEA_CACHE_LINE 128
122 #define EHEA_MR_ACC_CTRL 0x00800000
124 #define EHEA_BUSMAP_START 0x8000000000000000ULL
126 #define EHEA_WATCH_DOG_TIMEOUT 10*HZ
128 /* utility functions */
130 #define ehea_info(fmt, args...) \
131 printk(KERN_INFO DRV_NAME ": " fmt "\n", ## args)
133 #define ehea_error(fmt, args...) \
134 printk(KERN_ERR DRV_NAME ": Error in %s: " fmt "\n", __func__, ## args)
137 #define ehea_debug(fmt, args...) \
138 printk(KERN_DEBUG DRV_NAME ": " fmt, ## args)
140 #define ehea_debug(fmt, args...) do {} while (0)
143 void ehea_dump(void *adr
, int len
, char *msg
);
145 #define EHEA_BMASK(pos, length) (((pos) << 16) + (length))
147 #define EHEA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
149 #define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
151 #define EHEA_BMASK_MASK(mask) \
152 (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff))
154 #define EHEA_BMASK_SET(mask, value) \
155 ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask))
157 #define EHEA_BMASK_GET(mask, value) \
158 (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask)))
164 u8 entries
[PAGE_SIZE
];
168 * Generic queue in linux kernel virtual memory
171 u64 current_q_offset
; /* current queue entry */
172 struct ehea_page
**queue_pages
; /* array of pages belonging to queue */
173 u32 qe_size
; /* queue entry size */
174 u32 queue_length
; /* queue length allocated in bytes */
176 u32 toggle_state
; /* toggle flag - per page */
177 u32 reserved
; /* 64 bit alignment */
181 * For pSeries this is a 64bit memory address where
182 * I/O memory is mapped into CPU address space
193 struct h_epa kernel
; /* kernel space accessible resource,
194 set to 0 if unused */
195 struct h_epa_user user
; /* user space accessible resource
196 set to 0 if unused */
200 unsigned int entries
; /* total number of entries */
201 unsigned int valid_sections
; /* number of valid sections */
212 * Queue attributes passed to ehea_create_qp()
214 struct ehea_qp_init_attr
{
215 /* input parameter */
216 u32 qp_token
; /* queue token */
218 u8 signalingtype
; /* cqe generation flag */
219 u8 rq_count
; /* num of receive queues */
220 u8 eqe_gen
; /* eqe generation flag */
221 u16 max_nr_send_wqes
; /* max number of send wqes */
222 u16 max_nr_rwqes_rq1
; /* max number of receive wqes */
223 u16 max_nr_rwqes_rq2
;
224 u16 max_nr_rwqes_rq3
;
229 u8 swqe_imm_data_len
; /* immediate data length for swqes */
237 /* output parameter */
239 u16 act_nr_send_wqes
;
240 u16 act_nr_rwqes_rq1
;
241 u16 act_nr_rwqes_rq2
;
242 u16 act_nr_rwqes_rq3
;
243 u8 act_wqe_size_enc_sq
;
244 u8 act_wqe_size_enc_rq1
;
245 u8 act_wqe_size_enc_rq2
;
246 u8 act_wqe_size_enc_rq3
;
258 * Event Queue attributes, passed as paramter
260 struct ehea_eq_attr
{
263 u8 eqe_gen
; /* generate eqe flag */
267 u32 ist1
; /* Interrupt service token */
278 struct ehea_adapter
*adapter
;
279 struct hw_queue hw_queue
;
283 struct ehea_eq_attr attr
;
290 struct ehea_adapter
*adapter
;
291 u64 fw_handle
; /* QP handle for firmware calls */
292 struct hw_queue hw_squeue
;
293 struct hw_queue hw_rqueue1
;
294 struct hw_queue hw_rqueue2
;
295 struct hw_queue hw_rqueue3
;
297 struct ehea_qp_init_attr init_attr
;
301 * Completion Queue attributes
303 struct ehea_cq_attr
{
304 /* input parameter */
309 /* output parameter */
318 struct ehea_adapter
*adapter
;
320 struct hw_queue hw_queue
;
322 struct ehea_cq_attr attr
;
329 struct ehea_adapter
*adapter
;
336 * Port state information
339 int poll_receive_errors
;
346 #define EHEA_IRQ_NAME_SIZE 20
351 struct ehea_q_skb_arr
{
352 struct sk_buff
**arr
; /* skb array for queue */
353 int len
; /* array length */
354 int index
; /* array index */
355 int os_skbs
; /* rq2/rq3 only: outstanding skbs */
361 struct ehea_port_res
{
362 struct napi_struct napi
;
363 struct port_stats p_stats
;
364 struct ehea_mr send_mr
; /* send memory region */
365 struct ehea_mr recv_mr
; /* receive memory region */
366 spinlock_t xmit_lock
;
367 struct ehea_port
*port
;
368 char int_recv_name
[EHEA_IRQ_NAME_SIZE
];
369 char int_send_name
[EHEA_IRQ_NAME_SIZE
];
371 struct ehea_cq
*send_cq
;
372 struct ehea_cq
*recv_cq
;
374 struct ehea_q_skb_arr rq1_skba
;
375 struct ehea_q_skb_arr rq2_skba
;
376 struct ehea_q_skb_arr rq3_skba
;
377 struct ehea_q_skb_arr sq_skba
;
378 spinlock_t netif_queue
;
387 struct net_lro_mgr lro_mgr
;
388 struct net_lro_desc lro_desc
[MAX_LRO_DESCRIPTORS
];
392 #define EHEA_MAX_PORTS 16
393 <<<<<<< HEAD
:drivers
/net
/ehea
/ehea
.h
396 #define EHEA_NUM_PORTRES_FW_HANDLES 6 /* QP handle, SendCQ handle,
397 RecvCQ handle, EQ handle,
398 SendMR handle, RecvMR handle */
399 #define EHEA_NUM_PORT_FW_HANDLES 1 /* EQ handle */
400 #define EHEA_NUM_ADAPTER_FW_HANDLES 2 /* MR handle, NEQ handle */
402 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/ehea
/ehea
.h
403 struct ehea_adapter
{
405 struct of_device
*ofdev
;
406 struct ehea_port
*port
[EHEA_MAX_PORTS
];
407 struct ehea_eq
*neq
; /* notification event queue */
408 struct tasklet_struct neq_tasklet
;
410 u32 pd
; /* protection domain */
411 u64 max_mc_mac
; /* max number of multicast mac addresses */
413 struct list_head list
;
417 struct ehea_mc_list
{
418 struct list_head list
;
422 <<<<<<< HEAD
:drivers
/net
/ehea
/ehea
.h
425 struct ehea_fw_handle_entry
{
426 u64 adh
; /* Adapter Handle */
427 u64 fwh
; /* Firmware Handle */
430 struct ehea_fw_handle_array
{
431 struct ehea_fw_handle_entry
*arr
;
433 struct semaphore lock
;
436 struct ehea_bcmc_reg_entry
{
437 u64 adh
; /* Adapter Handle */
438 u32 port_id
; /* Logical Port Id */
439 u8 reg_type
; /* Registration Type */
443 struct ehea_bcmc_reg_array
{
444 struct ehea_bcmc_reg_entry
*arr
;
446 struct semaphore lock
;
449 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/net
/ehea
/ehea
.h
450 #define EHEA_PORT_UP 1
451 #define EHEA_PORT_DOWN 0
452 #define EHEA_PHY_LINK_UP 1
453 #define EHEA_PHY_LINK_DOWN 0
454 #define EHEA_MAX_PORT_RES 16
456 struct ehea_adapter
*adapter
; /* adapter that owns this port */
457 struct net_device
*netdev
;
458 struct net_device_stats stats
;
459 struct ehea_port_res port_res
[EHEA_MAX_PORT_RES
];
460 struct of_device ofdev
; /* Open Firmware Device */
461 struct ehea_mc_list
*mc_list
; /* Multicast MAC addresses */
462 struct vlan_group
*vgrp
;
463 struct ehea_eq
*qp_eq
;
464 struct work_struct reset_task
;
465 struct semaphore port_lock
;
466 char int_aff_name
[EHEA_IRQ_NAME_SIZE
];
467 int allmulti
; /* Indicates IFF_ALLMULTI state */
468 int promisc
; /* Indicates IFF_PROMISC state */
486 struct port_res_cfg
{
495 enum ehea_flag_bits
{
499 void ehea_set_ethtool_ops(struct net_device
*netdev
);
500 int ehea_sense_port_attr(struct ehea_port
*port
);
501 int ehea_set_portspeed(struct ehea_port
*port
, u32 port_speed
);
503 extern u64 ehea_driver_flags
;
504 extern struct work_struct ehea_rereg_mr_task
;
506 #endif /* __EHEA_H__ */