?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / hamradio / yam.c
blob1c942862a3f4944710de74c546cba66943b8b81a
1 /*****************************************************************************/
2
3 /*
4 * yam.c -- YAM radio modem driver.
5 *
6 * Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr)
7 * Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Please note that the GPL allows you to use the driver, NOT the radio.
24 * In order to use the radio, you need a license from the communications
25 * authority of your country.
26 *
27 *
28 * History:
29 * 0.0 F1OAT 06.06.98 Begin of work with baycom.c source code V 0.3
30 * 0.1 F1OAT 07.06.98 Add timer polling routine for channel arbitration
31 * 0.2 F6FBB 08.06.98 Added delay after FPGA programming
32 * 0.3 F6FBB 29.07.98 Delayed PTT implementation for dupmode=2
33 * 0.4 F6FBB 30.07.98 Added TxTail, Slottime and Persistance
34 * 0.5 F6FBB 01.08.98 Shared IRQs, /proc/net and network statistics
35 * 0.6 F6FBB 25.08.98 Added 1200Bds format
36 * 0.7 F6FBB 12.09.98 Added to the kernel configuration
37 * 0.8 F6FBB 14.10.98 Fixed slottime/persistence timing bug
38 * OK1ZIA 2.09.01 Fixed "kfree_skb on hard IRQ"
39 * using dev_kfree_skb_any(). (important in 2.4 kernel)
40 *
41 */
42
43 /*****************************************************************************/
44
45 #include <linux/module.h>
46 #include <linux/types.h>
47 #include <linux/net.h>
48 #include <linux/in.h>
49 #include <linux/if.h>
50 #include <linux/slab.h>
51 #include <linux/errno.h>
52 #include <linux/bitops.h>
53 #include <linux/random.h>
54 #include <asm/io.h>
55 #include <asm/system.h>
56 #include <linux/interrupt.h>
57 #include <linux/ioport.h>
58
59 #include <linux/netdevice.h>
60 #include <linux/if_arp.h>
61 #include <linux/etherdevice.h>
62 #include <linux/skbuff.h>
63 #include <net/ax25.h>
64
65 #include <linux/kernel.h>
66 #include <linux/proc_fs.h>
67 #include <linux/seq_file.h>
68 #include <net/net_namespace.h>
69
70 #include <asm/uaccess.h>
71 #include <linux/init.h>
72
73 #include <linux/yam.h>
74 #include "yam9600.h"
75 #include "yam1200.h"
76
77 /* --------------------------------------------------------------------- */
78
79 static const char yam_drvname[] = "yam";
80 static char yam_drvinfo[] __initdata = KERN_INFO "YAM driver version 0.8 by F1OAT/F6FBB\n";
81
82 /* --------------------------------------------------------------------- */
83
84 #define YAM_9600 1
85 #define YAM_1200 2
86
87 #define NR_PORTS 4
88 #define YAM_MAGIC 0xF10A7654
89
90 /* Transmitter states */
91
92 #define TX_OFF 0
93 #define TX_HEAD 1
94 #define TX_DATA 2
95 #define TX_CRC1 3
96 #define TX_CRC2 4
97 #define TX_TAIL 5
98
99 #define YAM_MAX_FRAME 1024
100
101 #define DEFAULT_BITRATE 9600 /* bps */
102 #define DEFAULT_HOLDD 10 /* sec */
103 #define DEFAULT_TXD 300 /* ms */
104 #define DEFAULT_TXTAIL 10 /* ms */
105 #define DEFAULT_SLOT 100 /* ms */
106 #define DEFAULT_PERS 64 /* 0->255 */
107
108 struct yam_port {
109 int magic;
110 int bitrate;
111 int baudrate;
112 int iobase;
113 int irq;
114 int dupmode;
115
116 struct net_device *dev;
117
118 /* Stats section */
119
120 struct net_device_stats stats;
121
122 int nb_rxint;
123 int nb_mdint;
124
125 /* Parameters section */
126
127 int txd; /* tx delay */
128 int holdd; /* duplex ptt delay */
129 int txtail; /* txtail delay */
130 int slot; /* slottime */
131 int pers; /* persistence */
132
133 /* Tx section */
134
135 int tx_state;
136 int tx_count;
137 int slotcnt;
138 unsigned char tx_buf[YAM_MAX_FRAME];
139 int tx_len;
140 int tx_crcl, tx_crch;
141 struct sk_buff_head send_queue; /* Packets awaiting transmission */
142
143 /* Rx section */
144
145 int dcd;
146 unsigned char rx_buf[YAM_MAX_FRAME];
147 int rx_len;
148 int rx_crcl, rx_crch;
149 };
150
151 struct yam_mcs {
152 unsigned char bits[YAM_FPGA_SIZE];
153 int bitrate;
154 struct yam_mcs *next;
155 };
156
157 static struct net_device *yam_devs[NR_PORTS];
158
159 static struct yam_mcs *yam_data;
160
161 static DEFINE_TIMER(yam_timer, NULL, 0, 0);
162
163 /* --------------------------------------------------------------------- */
164
165 #define RBR(iobase) (iobase+0)
166 #define THR(iobase) (iobase+0)
167 #define IER(iobase) (iobase+1)
168 #define IIR(iobase) (iobase+2)
169 #define FCR(iobase) (iobase+2)
170 #define LCR(iobase) (iobase+3)
171 #define MCR(iobase) (iobase+4)
172 #define LSR(iobase) (iobase+5)
173 #define MSR(iobase) (iobase+6)
174 #define SCR(iobase) (iobase+7)
175 #define DLL(iobase) (iobase+0)
176 #define DLM(iobase) (iobase+1)
177
178 #define YAM_EXTENT 8
179
180 /* Interrupt Identification Register Bit Masks */
181 #define IIR_NOPEND 1
182 #define IIR_MSR 0
183 #define IIR_TX 2
184 #define IIR_RX 4
185 #define IIR_LSR 6
186 #define IIR_TIMEOUT 12 /* Fifo mode only */
187
188 #define IIR_MASK 0x0F
189
190 /* Interrupt Enable Register Bit Masks */
191 #define IER_RX 1 /* enable rx interrupt */
192 #define IER_TX 2 /* enable tx interrupt */
193 #define IER_LSR 4 /* enable line status interrupts */
194 #define IER_MSR 8 /* enable modem status interrupts */
195
196 /* Modem Control Register Bit Masks */
197 #define MCR_DTR 0x01 /* DTR output */
198 #define MCR_RTS 0x02 /* RTS output */
199 #define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */
200 #define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */
201 #define MCR_LOOP 0x10 /* Loopback enable */
202
203 /* Modem Status Register Bit Masks */
204 #define MSR_DCTS 0x01 /* Delta CTS input */
205 #define MSR_DDSR 0x02 /* Delta DSR */
206 #define MSR_DRIN 0x04 /* Delta RI */
207 #define MSR_DDCD 0x08 /* Delta DCD */
208 #define MSR_CTS 0x10 /* CTS input */
209 #define MSR_DSR 0x20 /* DSR input */
210 #define MSR_RING 0x40 /* RI input */
211 #define MSR_DCD 0x80 /* DCD input */
212
213 /* line status register bit mask */
214 #define LSR_RXC 0x01
215 #define LSR_OE 0x02
216 #define LSR_PE 0x04
217 #define LSR_FE 0x08
218 #define LSR_BREAK 0x10
219 #define LSR_THRE 0x20
220 #define LSR_TSRE 0x40
221
222 /* Line Control Register Bit Masks */
223 #define LCR_DLAB 0x80
224 #define LCR_BREAK 0x40
225 #define LCR_PZERO 0x28
226 #define LCR_PEVEN 0x18
227 #define LCR_PODD 0x08
228 #define LCR_STOP1 0x00
229 #define LCR_STOP2 0x04
230 #define LCR_BIT5 0x00
231 #define LCR_BIT6 0x02
232 #define LCR_BIT7 0x01
233 #define LCR_BIT8 0x03
234
235 /* YAM Modem <-> UART Port mapping */
236
237 #define TX_RDY MSR_DCTS /* transmitter ready to send */
238 #define RX_DCD MSR_DCD /* carrier detect */
239 #define RX_FLAG MSR_RING /* hdlc flag received */
240 #define FPGA_DONE MSR_DSR /* FPGA is configured */
241 #define PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */
242 #define PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */
243
244 #define ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */
245 #define ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */
246 #define ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */
247
248
249 /*************************************************************************
250 * CRC Tables
251 ************************************************************************/
252
253 static const unsigned char chktabl[256] =
254 {0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
255 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
256 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
257 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
258 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
259 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
260 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
261 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
262 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
263 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
264 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
265 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
266 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
267 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
268 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
269 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
270 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
271 0x78};
272 static const unsigned char chktabh[256] =
273 {0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
274 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
275 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
276 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
277 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
278 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
279 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
280 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
281 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
282 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
283 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
284 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
285 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
286 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
287 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
288 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
289 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
290 0x0f};
291
292 /*************************************************************************
293 * FPGA functions
294 ************************************************************************/
295
296 static void delay(int ms)
297 {
298 unsigned long timeout = jiffies + ((ms * HZ) / 1000);
299 while (time_before(jiffies, timeout))
300 cpu_relax();
301 }
302
303 /*
304 * reset FPGA
305 */
306
307 static void fpga_reset(int iobase)
308 {
309 outb(0, IER(iobase));
310 outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
311 outb(1, DLL(iobase));
312 outb(0, DLM(iobase));
313
314 outb(LCR_BIT5, LCR(iobase));
315 inb(LSR(iobase));
316 inb(MSR(iobase));
317 /* turn off FPGA supply voltage */
318 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
319 delay(100);
320 /* turn on FPGA supply voltage again */
321 outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
322 delay(100);
323 }
324
325 /*
326 * send one byte to FPGA
327 */
328
329 static int fpga_write(int iobase, unsigned char wrd)
330 {
331 unsigned char bit;
332 int k;
333 unsigned long timeout = jiffies + HZ / 10;
334
335 for (k = 0; k < 8; k++) {
336 bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
337 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
338 wrd <<= 1;
339 outb(0xfc, THR(iobase));
340 while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
341 if (time_after(jiffies, timeout))
342 return -1;
343 }
344
345 return 0;
346 }
347
348 static unsigned char *add_mcs(unsigned char *bits, int bitrate)
349 {
350 struct yam_mcs *p;
351
352 /* If it already exists, replace the bit data */
353 p = yam_data;
354 while (p) {
355 if (p->bitrate == bitrate) {
356 memcpy(p->bits, bits, YAM_FPGA_SIZE);
357 return p->bits;
358 }
359 p = p->next;
360 }
361
362 /* Allocate a new mcs */
363 if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
364 printk(KERN_WARNING "YAM: no memory to allocate mcs\n");
365 return NULL;
366 }
367 memcpy(p->bits, bits, YAM_FPGA_SIZE);
368 p->bitrate = bitrate;
369 p->next = yam_data;
370 yam_data = p;
371
372 return p->bits;
373 }
374
375 static unsigned char *get_mcs(int bitrate)
376 {
377 struct yam_mcs *p;
378
379 p = yam_data;
380 while (p) {
381 if (p->bitrate == bitrate)
382 return p->bits;
383 p = p->next;
384 }
385
386 /* Load predefined mcs data */
387 switch (bitrate) {
388 case 1200:
389 return add_mcs(bits_1200, bitrate);
390 default:
391 return add_mcs(bits_9600, bitrate);
392 }
393 }
394
395 /*
396 * download bitstream to FPGA
397 * data is contained in bits[] array in yam1200.h resp. yam9600.h
398 */
399
400 static int fpga_download(int iobase, int bitrate)
401 {
402 int i, rc;
403 unsigned char *pbits;
404
405 pbits = get_mcs(bitrate);
406 if (pbits == NULL)
407 return -1;
408
409 fpga_reset(iobase);
410 for (i = 0; i < YAM_FPGA_SIZE; i++) {
411 if (fpga_write(iobase, pbits[i])) {
412 printk(KERN_ERR "yam: error in write cycle\n");
413 return -1; /* write... */
414 }
415 }
416
417 fpga_write(iobase, 0xFF);
418 rc = inb(MSR(iobase)); /* check DONE signal */
419
420 /* Needed for some hardwares */
421 delay(50);
422
423 return (rc & MSR_DSR) ? 0 : -1;
424 }
425
426
427 /************************************************************************
428 * Serial port init
429 ************************************************************************/
430
431 static void yam_set_uart(struct net_device *dev)
432 {
433 struct yam_port *yp = netdev_priv(dev);
434 int divisor = 115200 / yp->baudrate;
435
436 outb(0, IER(dev->base_addr));
437 outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
438 outb(divisor, DLL(dev->base_addr));
439 outb(0, DLM(dev->base_addr));
440 outb(LCR_BIT8, LCR(dev->base_addr));
441 outb(PTT_OFF, MCR(dev->base_addr));
442 outb(0x00, FCR(dev->base_addr));
443
444 /* Flush pending irq */
445
446 inb(RBR(dev->base_addr));
447 inb(MSR(dev->base_addr));
448
449 /* Enable rx irq */
450
451 outb(ENABLE_RTXINT, IER(dev->base_addr));
452 }
453
454
455 /* --------------------------------------------------------------------- */
456
457 enum uart {
458 c_uart_unknown, c_uart_8250,
459 c_uart_16450, c_uart_16550, c_uart_16550A
460 };
461
462 static const char *uart_str[] =
463 {"unknown", "8250", "16450", "16550", "16550A"};
464
465 static enum uart yam_check_uart(unsigned int iobase)
466 {
467 unsigned char b1, b2, b3;
468 enum uart u;
469 enum uart uart_tab[] =
470 {c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
471
472 b1 = inb(MCR(iobase));
473 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */
474 b2 = inb(MSR(iobase));
475 outb(0x1a, MCR(iobase));
476 b3 = inb(MSR(iobase)) & 0xf0;
477 outb(b1, MCR(iobase)); /* restore old values */
478 outb(b2, MSR(iobase));
479 if (b3 != 0x90)
480 return c_uart_unknown;
481 inb(RBR(iobase));
482 inb(RBR(iobase));
483 outb(0x01, FCR(iobase)); /* enable FIFOs */
484 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
485 if (u == c_uart_16450) {
486 outb(0x5a, SCR(iobase));
487 b1 = inb(SCR(iobase));
488 outb(0xa5, SCR(iobase));
489 b2 = inb(SCR(iobase));
490 if ((b1 != 0x5a) || (b2 != 0xa5))
491 u = c_uart_8250;
492 }
493 return u;
494 }
495
496 /******************************************************************************
497 * Rx Section
498 ******************************************************************************/
499 static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
500 {
501 if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
502 int pkt_len = yp->rx_len - 2 + 1; /* -CRC + kiss */
503 struct sk_buff *skb;
504
505 if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
506 /* Bad crc */
507 } else {
508 if (!(skb = dev_alloc_skb(pkt_len))) {
509 printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
510 ++yp->stats.rx_dropped;
511 } else {
512 unsigned char *cp;
513 cp = skb_put(skb, pkt_len);
514 *cp++ = 0; /* KISS kludge */
515 memcpy(cp, yp->rx_buf, pkt_len - 1);
516 skb->protocol = ax25_type_trans(skb, dev);
517 netif_rx(skb);
518 dev->last_rx = jiffies;
519 ++yp->stats.rx_packets;
520 }
521 }
522 }
523 yp->rx_len = 0;
524 yp->rx_crcl = 0x21;
525 yp->rx_crch = 0xf3;
526 }
527
528 static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
529 {
530 if (yp->rx_len < YAM_MAX_FRAME) {
531 unsigned char c = yp->rx_crcl;
532 yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
533 yp->rx_crch = (chktabh[c] ^ rxb);
534 yp->rx_buf[yp->rx_len++] = rxb;
535 }
536 }
537
538 /********************************************************************************
539 * TX Section
540 ********************************************************************************/
541
542 static void ptt_on(struct net_device *dev)
543 {
544 outb(PTT_ON, MCR(dev->base_addr));
545 }
546
547 static void ptt_off(struct net_device *dev)
548 {
549 outb(PTT_OFF, MCR(dev->base_addr));
550 }
551
552 static int yam_send_packet(struct sk_buff *skb, struct net_device *dev)
553 {
554 struct yam_port *yp = netdev_priv(dev);
555
556 skb_queue_tail(&yp->send_queue, skb);
557 dev->trans_start = jiffies;
558 return 0;
559 }
560
561 static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
562 {
563 if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
564 yp->tx_count = 1;
565 else
566 yp->tx_count = (yp->bitrate * yp->txd) / 8000;
567 yp->tx_state = TX_HEAD;
568 ptt_on(dev);
569 }
570
571 static void yam_arbitrate(struct net_device *dev)
572 {
573 struct yam_port *yp = netdev_priv(dev);
574
575 if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
576 skb_queue_empty(&yp->send_queue))
577 return;
578 /* tx_state is TX_OFF and there is data to send */
579
580 if (yp->dupmode) {
581 /* Full duplex mode, don't wait */
582 yam_start_tx(dev, yp);
583 return;
584 }
585 if (yp->dcd) {
586 /* DCD on, wait slotime ... */
587 yp->slotcnt = yp->slot / 10;
588 return;
589 }
590 /* Is slottime passed ? */
591 if ((--yp->slotcnt) > 0)
592 return;
593
594 yp->slotcnt = yp->slot / 10;
595
596 /* is random > persist ? */
597 if ((random32() % 256) > yp->pers)
598 return;
599
600 yam_start_tx(dev, yp);
601 }
602
603 static void yam_dotimer(unsigned long dummy)
604 {
605 int i;
606
607 for (i = 0; i < NR_PORTS; i++) {
608 struct net_device *dev = yam_devs[i];
609 if (dev && netif_running(dev))
610 yam_arbitrate(dev);
611 }
612 yam_timer.expires = jiffies + HZ / 100;
613 add_timer(&yam_timer);
614 }
615
616 static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
617 {
618 struct sk_buff *skb;
619 unsigned char b, temp;
620
621 switch (yp->tx_state) {
622 case TX_OFF:
623 break;
624 case TX_HEAD:
625 if (--yp->tx_count <= 0) {
626 if (!(skb = skb_dequeue(&yp->send_queue))) {
627 ptt_off(dev);
628 yp->tx_state = TX_OFF;
629 break;
630 }
631 yp->tx_state = TX_DATA;
632 if (skb->data[0] != 0) {
633 /* do_kiss_params(s, skb->data, skb->len); */
634 dev_kfree_skb_any(skb);
635 break;
636 }
637 yp->tx_len = skb->len - 1; /* strip KISS byte */
638 if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
639 dev_kfree_skb_any(skb);
640 break;
641 }
642 skb_copy_from_linear_data_offset(skb, 1,
643 yp->tx_buf,
644 yp->tx_len);
645 dev_kfree_skb_any(skb);
646 yp->tx_count = 0;
647 yp->tx_crcl = 0x21;
648 yp->tx_crch = 0xf3;
649 yp->tx_state = TX_DATA;
650 }
651 break;
652 case TX_DATA:
653 b = yp->tx_buf[yp->tx_count++];
654 outb(b, THR(dev->base_addr));
655 temp = yp->tx_crcl;
656 yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
657 yp->tx_crch = chktabh[temp] ^ b;
658 if (yp->tx_count >= yp->tx_len) {
659 yp->tx_state = TX_CRC1;
660 }
661 break;
662 case TX_CRC1:
663 yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
664 yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
665 outb(yp->tx_crcl, THR(dev->base_addr));
666 yp->tx_state = TX_CRC2;
667 break;
668 case TX_CRC2:
669 outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
670 if (skb_queue_empty(&yp->send_queue)) {
671 yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
672 if (yp->dupmode == 2)
673 yp->tx_count += (yp->bitrate * yp->holdd) / 8;
674 if (yp->tx_count == 0)
675 yp->tx_count = 1;
676 yp->tx_state = TX_TAIL;
677 } else {
678 yp->tx_count = 1;
679 yp->tx_state = TX_HEAD;
680 }
681 ++yp->stats.tx_packets;
682 break;
683 case TX_TAIL:
684 if (--yp->tx_count <= 0) {
685 yp->tx_state = TX_OFF;
686 ptt_off(dev);
687 }
688 break;
689 }
690 }
691
692 /***********************************************************************************
693 * ISR routine
694 ************************************************************************************/
695
696 static irqreturn_t yam_interrupt(int irq, void *dev_id)
697 {
698 struct net_device *dev;
699 struct yam_port *yp;
700 unsigned char iir;
701 int counter = 100;
702 int i;
703 int handled = 0;
704
705 for (i = 0; i < NR_PORTS; i++) {
706 dev = yam_devs[i];
707 yp = netdev_priv(dev);
708
709 if (!netif_running(dev))
710 continue;
711
712 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
713 unsigned char msr = inb(MSR(dev->base_addr));
714 unsigned char lsr = inb(LSR(dev->base_addr));
715 unsigned char rxb;
716
717 handled = 1;
718
719 if (lsr & LSR_OE)
720 ++yp->stats.rx_fifo_errors;
721
722 yp->dcd = (msr & RX_DCD) ? 1 : 0;
723
724 if (--counter <= 0) {
725 printk(KERN_ERR "%s: too many irq iir=%d\n",
726 dev->name, iir);
727 goto out;
728 }
729 if (msr & TX_RDY) {
730 ++yp->nb_mdint;
731 yam_tx_byte(dev, yp);
732 }
733 if (lsr & LSR_RXC) {
734 ++yp->nb_rxint;
735 rxb = inb(RBR(dev->base_addr));
736 if (msr & RX_FLAG)
737 yam_rx_flag(dev, yp);
738 else
739 yam_rx_byte(dev, yp, rxb);
740 }
741 }
742 }
743 out:
744 return IRQ_RETVAL(handled);
745 }
746
747 #ifdef CONFIG_PROC_FS
748
749 static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
750 {
751 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
752 }
753
754 static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
755 {
756 ++*pos;
757 return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
758 }
759
760 static void yam_seq_stop(struct seq_file *seq, void *v)
761 {
762 }
763
764 static int yam_seq_show(struct seq_file *seq, void *v)
765 {
766 struct net_device *dev = v;
767 const struct yam_port *yp = netdev_priv(dev);
768
769 seq_printf(seq, "Device %s\n", dev->name);
770 seq_printf(seq, " Up %d\n", netif_running(dev));
771 seq_printf(seq, " Speed %u\n", yp->bitrate);
772 seq_printf(seq, " IoBase 0x%x\n", yp->iobase);
773 seq_printf(seq, " BaudRate %u\n", yp->baudrate);
774 seq_printf(seq, " IRQ %u\n", yp->irq);
775 seq_printf(seq, " TxState %u\n", yp->tx_state);
776 seq_printf(seq, " Duplex %u\n", yp->dupmode);
777 seq_printf(seq, " HoldDly %u\n", yp->holdd);
778 seq_printf(seq, " TxDelay %u\n", yp->txd);
779 seq_printf(seq, " TxTail %u\n", yp->txtail);
780 seq_printf(seq, " SlotTime %u\n", yp->slot);
781 seq_printf(seq, " Persist %u\n", yp->pers);
782 seq_printf(seq, " TxFrames %lu\n", yp->stats.tx_packets);
783 seq_printf(seq, " RxFrames %lu\n", yp->stats.rx_packets);
784 seq_printf(seq, " TxInt %u\n", yp->nb_mdint);
785 seq_printf(seq, " RxInt %u\n", yp->nb_rxint);
786 seq_printf(seq, " RxOver %lu\n", yp->stats.rx_fifo_errors);
787 seq_printf(seq, "\n");
788 return 0;
789 }
790
791 static struct seq_operations yam_seqops = {
792 .start = yam_seq_start,
793 .next = yam_seq_next,
794 .stop = yam_seq_stop,
795 .show = yam_seq_show,
796 };
797
798 static int yam_info_open(struct inode *inode, struct file *file)
799 {
800 return seq_open(file, &yam_seqops);
801 }
802
803 static const struct file_operations yam_info_fops = {
804 .owner = THIS_MODULE,
805 .open = yam_info_open,
806 .read = seq_read,
807 .llseek = seq_lseek,
808 .release = seq_release,
809 };
810
811 #endif
812
813
814 /* --------------------------------------------------------------------- */
815
816 static struct net_device_stats *yam_get_stats(struct net_device *dev)
817 {
818 struct yam_port *yp;
819
820 if (!dev)
821 return NULL;
822
823 yp = netdev_priv(dev);
824 if (yp->magic != YAM_MAGIC)
825 return NULL;
826
827 /*
828 * Get the current statistics. This may be called with the
829 * card open or closed.
830 */
831 return &yp->stats;
832 }
833
834 /* --------------------------------------------------------------------- */
835
836 static int yam_open(struct net_device *dev)
837 {
838 struct yam_port *yp = netdev_priv(dev);
839 enum uart u;
840 int i;
841 int ret=0;
842
843 printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
844
845 if (!dev || !yp->bitrate)
846 return -ENXIO;
847 if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
848 dev->irq < 2 || dev->irq > 15) {
849 return -ENXIO;
850 }
851 if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
852 {
853 printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
854 return -EACCES;
855 }
856 if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
857 printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
858 ret = -EIO;
859 goto out_release_base;
860 }
861 if (fpga_download(dev->base_addr, yp->bitrate)) {
862 printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
863 ret = -EIO;
864 goto out_release_base;
865 }
866 outb(0, IER(dev->base_addr));
867 if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) {
868 printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
869 ret = -EBUSY;
870 goto out_release_base;
871 }
872
873 yam_set_uart(dev);
874
875 netif_start_queue(dev);
876
877 yp->slotcnt = yp->slot / 10;
878
879 /* Reset overruns for all ports - FPGA programming makes overruns */
880 for (i = 0; i < NR_PORTS; i++) {
881 struct net_device *dev = yam_devs[i];
882 struct yam_port *yp = netdev_priv(dev);
883 inb(LSR(dev->base_addr));
884 yp->stats.rx_fifo_errors = 0;
885 }
886
887 printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
888 uart_str[u]);
889 return 0;
890
891 out_release_base:
892 release_region(dev->base_addr, YAM_EXTENT);
893 return ret;
894 }
895
896 /* --------------------------------------------------------------------- */
897
898 static int yam_close(struct net_device *dev)
899 {
900 struct sk_buff *skb;
901 struct yam_port *yp = netdev_priv(dev);
902
903 if (!dev)
904 return -EINVAL;
905
906 /*
907 * disable interrupts
908 */
909 outb(0, IER(dev->base_addr));
910 outb(1, MCR(dev->base_addr));
911 /* Remove IRQ handler if last */
912 free_irq(dev->irq,dev);
913 release_region(dev->base_addr, YAM_EXTENT);
914 netif_stop_queue(dev);
915 while ((skb = skb_dequeue(&yp->send_queue)))
916 dev_kfree_skb(skb);
917
918 printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
919 yam_drvname, dev->base_addr, dev->irq);
920 return 0;
921 }
922
923 /* --------------------------------------------------------------------- */
924
925 static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
926 {
927 struct yam_port *yp = netdev_priv(dev);
928 struct yamdrv_ioctl_cfg yi;
929 struct yamdrv_ioctl_mcs *ym;
930 int ioctl_cmd;
931
932 if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int)))
933 return -EFAULT;
934
935 if (yp->magic != YAM_MAGIC)
936 return -EINVAL;
937
938 if (!capable(CAP_NET_ADMIN))
939 return -EPERM;
940
941 if (cmd != SIOCDEVPRIVATE)
942 return -EINVAL;
943
944 switch (ioctl_cmd) {
945
946 case SIOCYAMRESERVED:
947 return -EINVAL; /* unused */
948
949 case SIOCYAMSMCS:
950 if (netif_running(dev))
951 return -EINVAL; /* Cannot change this parameter when up */
952 if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL)
953 return -ENOBUFS;
954 ym->bitrate = 9600;
955 if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) {
956 kfree(ym);
957 return -EFAULT;
958 }
959 if (ym->bitrate > YAM_MAXBITRATE) {
960 kfree(ym);
961 return -EINVAL;
962 }
963 add_mcs(ym->bits, ym->bitrate);
964 kfree(ym);
965 break;
966
967 case SIOCYAMSCFG:
968 if (!capable(CAP_SYS_RAWIO))
969 return -EPERM;
970 if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg)))
971 return -EFAULT;
972
973 if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
974 return -EINVAL; /* Cannot change this parameter when up */
975 if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
976 return -EINVAL; /* Cannot change this parameter when up */
977 if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
978 return -EINVAL; /* Cannot change this parameter when up */
979 if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
980 return -EINVAL; /* Cannot change this parameter when up */
981
982 if (yi.cfg.mask & YAM_IOBASE) {
983 yp->iobase = yi.cfg.iobase;
984 dev->base_addr = yi.cfg.iobase;
985 }
986 if (yi.cfg.mask & YAM_IRQ) {
987 if (yi.cfg.irq > 15)
988 return -EINVAL;
989 yp->irq = yi.cfg.irq;
990 dev->irq = yi.cfg.irq;
991 }
992 if (yi.cfg.mask & YAM_BITRATE) {
993 if (yi.cfg.bitrate > YAM_MAXBITRATE)
994 return -EINVAL;
995 yp->bitrate = yi.cfg.bitrate;
996 }
997 if (yi.cfg.mask & YAM_BAUDRATE) {
998 if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
999 return -EINVAL;
1000 yp->baudrate = yi.cfg.baudrate;
1001 }
1002 if (yi.cfg.mask & YAM_MODE) {
1003 if (yi.cfg.mode > YAM_MAXMODE)
1004 return -EINVAL;
1005 yp->dupmode = yi.cfg.mode;
1006 }
1007 if (yi.cfg.mask & YAM_HOLDDLY) {
1008 if (yi.cfg.holddly > YAM_MAXHOLDDLY)
1009 return -EINVAL;
1010 yp->holdd = yi.cfg.holddly;
1011 }
1012 if (yi.cfg.mask & YAM_TXDELAY) {
1013 if (yi.cfg.txdelay > YAM_MAXTXDELAY)
1014 return -EINVAL;
1015 yp->txd = yi.cfg.txdelay;
1016 }
1017 if (yi.cfg.mask & YAM_TXTAIL) {
1018 if (yi.cfg.txtail > YAM_MAXTXTAIL)
1019 return -EINVAL;
1020 yp->txtail = yi.cfg.txtail;
1021 }
1022 if (yi.cfg.mask & YAM_PERSIST) {
1023 if (yi.cfg.persist > YAM_MAXPERSIST)
1024 return -EINVAL;
1025 yp->pers = yi.cfg.persist;
1026 }
1027 if (yi.cfg.mask & YAM_SLOTTIME) {
1028 if (yi.cfg.slottime > YAM_MAXSLOTTIME)
1029 return -EINVAL;
1030 yp->slot = yi.cfg.slottime;
1031 yp->slotcnt = yp->slot / 10;
1032 }
1033 break;
1034
1035 case SIOCYAMGCFG:
1036 yi.cfg.mask = 0xffffffff;
1037 yi.cfg.iobase = yp->iobase;
1038 yi.cfg.irq = yp->irq;
1039 yi.cfg.bitrate = yp->bitrate;
1040 yi.cfg.baudrate = yp->baudrate;
1041 yi.cfg.mode = yp->dupmode;
1042 yi.cfg.txdelay = yp->txd;
1043 yi.cfg.holddly = yp->holdd;
1044 yi.cfg.txtail = yp->txtail;
1045 yi.cfg.persist = yp->pers;
1046 yi.cfg.slottime = yp->slot;
1047 if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
1048 return -EFAULT;
1049 break;
1050
1051 default:
1052 return -EINVAL;
1053
1054 }
1055
1056 return 0;
1057 }
1058
1059 /* --------------------------------------------------------------------- */
1060
1061 static int yam_set_mac_address(struct net_device *dev, void *addr)
1062 {
1063 struct sockaddr *sa = (struct sockaddr *) addr;
1064
1065 /* addr is an AX.25 shifted ASCII mac address */
1066 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1067 return 0;
1068 }
1069
1070 /* --------------------------------------------------------------------- */
1071
1072 static void yam_setup(struct net_device *dev)
1073 {
1074 struct yam_port *yp = netdev_priv(dev);
1075
1076 yp->magic = YAM_MAGIC;
1077 yp->bitrate = DEFAULT_BITRATE;
1078 yp->baudrate = DEFAULT_BITRATE * 2;
1079 yp->iobase = 0;
1080 yp->irq = 0;
1081 yp->dupmode = 0;
1082 yp->holdd = DEFAULT_HOLDD;
1083 yp->txd = DEFAULT_TXD;
1084 yp->txtail = DEFAULT_TXTAIL;
1085 yp->slot = DEFAULT_SLOT;
1086 yp->pers = DEFAULT_PERS;
1087 yp->dev = dev;
1088
1089 dev->base_addr = yp->iobase;
1090 dev->irq = yp->irq;
1091
1092 dev->open = yam_open;
1093 dev->stop = yam_close;
1094 dev->do_ioctl = yam_ioctl;
1095 dev->hard_start_xmit = yam_send_packet;
1096 dev->get_stats = yam_get_stats;
1097
1098 skb_queue_head_init(&yp->send_queue);
1099
1100 dev->header_ops = &ax25_header_ops;
1101
1102 dev->set_mac_address = yam_set_mac_address;
1103
1104 dev->type = ARPHRD_AX25;
1105 dev->hard_header_len = AX25_MAX_HEADER_LEN;
1106 dev->mtu = AX25_MTU;
1107 dev->addr_len = AX25_ADDR_LEN;
1108 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1109 memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN);
1110 }
1111
1112 static int __init yam_init_driver(void)
1113 {
1114 struct net_device *dev;
1115 int i, err;
1116 char name[IFNAMSIZ];
1117
1118 printk(yam_drvinfo);
1119
1120 for (i = 0; i < NR_PORTS; i++) {
1121 sprintf(name, "yam%d", i);
1122
1123 dev = alloc_netdev(sizeof(struct yam_port), name,
1124 yam_setup);
1125 if (!dev) {
1126 printk(KERN_ERR "yam: cannot allocate net device %s\n",
1127 dev->name);
1128 err = -ENOMEM;
1129 goto error;
1130 }
1131
1132 err = register_netdev(dev);
1133 if (err) {
1134 printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
1135 goto error;
1136 }
1137 yam_devs[i] = dev;
1138
1139 }
1140
1141 yam_timer.function = yam_dotimer;
1142 yam_timer.expires = jiffies + HZ / 100;
1143 add_timer(&yam_timer);
1144
1145 proc_net_fops_create(&init_net, "yam", S_IRUGO, &yam_info_fops);
1146 return 0;
1147 error:
1148 while (--i >= 0) {
1149 unregister_netdev(yam_devs[i]);
1150 free_netdev(yam_devs[i]);
1151 }
1152 return err;
1153 }
1154
1155 /* --------------------------------------------------------------------- */
1156
1157 static void __exit yam_cleanup_driver(void)
1158 {
1159 struct yam_mcs *p;
1160 int i;
1161
1162 del_timer(&yam_timer);
1163 for (i = 0; i < NR_PORTS; i++) {
1164 struct net_device *dev = yam_devs[i];
1165 if (dev) {
1166 unregister_netdev(dev);
1167 free_netdev(dev);
1168 }
1169 }
1170
1171 while (yam_data) {
1172 p = yam_data;
1173 yam_data = yam_data->next;
1174 kfree(p);
1175 }
1176
1177 proc_net_remove(&init_net, "yam");
1178 }
1179
1180 /* --------------------------------------------------------------------- */
1181
1182 MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
1183 MODULE_DESCRIPTION("Yam amateur radio modem driver");
1184 MODULE_LICENSE("GPL");
1185
1186 module_init(yam_init_driver);
1187 module_exit(yam_cleanup_driver);
1188
1189 /* --------------------------------------------------------------------- */
1190
WRT350N Kernel Patches