Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / wireless / b43legacy / main.c
blobbd2328a877eadd517fd63fde4ee0e768d96d0270
1 /*
3 * Broadcom B43legacy wireless driver
5 * Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
6 <<<<<<< HEAD:drivers/net/wireless/b43legacy/main.c
7 * Copyright (c) 2005-2007 Stefano Brivio <stefano.brivio@polimi.it>
8 =======
9 * Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
10 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/b43legacy/main.c
11 * Copyright (c) 2005, 2006 Michael Buesch <mb@bu3sch.de>
12 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
13 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
14 * Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
16 * Some parts of the code in this file are derived from the ipw2200
17 * driver Copyright(c) 2003 - 2004 Intel Corporation.
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; see the file COPYING. If not, write to
31 * the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
32 * Boston, MA 02110-1301, USA.
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/moduleparam.h>
39 #include <linux/if_arp.h>
40 #include <linux/etherdevice.h>
41 #include <linux/version.h>
42 #include <linux/firmware.h>
43 #include <linux/wireless.h>
44 #include <linux/workqueue.h>
45 #include <linux/skbuff.h>
46 #include <linux/dma-mapping.h>
47 #include <net/dst.h>
48 #include <asm/unaligned.h>
50 #include "b43legacy.h"
51 #include "main.h"
52 #include "debugfs.h"
53 #include "phy.h"
54 #include "dma.h"
55 #include "pio.h"
56 #include "sysfs.h"
57 #include "xmit.h"
58 #include "radio.h"
61 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
62 MODULE_AUTHOR("Martin Langer");
63 MODULE_AUTHOR("Stefano Brivio");
64 MODULE_AUTHOR("Michael Buesch");
65 MODULE_LICENSE("GPL");
67 <<<<<<< HEAD:drivers/net/wireless/b43legacy/main.c
68 =======
69 MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
71 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/b43legacy/main.c
72 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
73 static int modparam_pio;
74 module_param_named(pio, modparam_pio, int, 0444);
75 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
76 #elif defined(CONFIG_B43LEGACY_DMA)
77 # define modparam_pio 0
78 #elif defined(CONFIG_B43LEGACY_PIO)
79 # define modparam_pio 1
80 #endif
82 static int modparam_bad_frames_preempt;
83 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
84 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
85 " Preemption");
87 static char modparam_fwpostfix[16];
88 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
89 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
91 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
92 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
93 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
94 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
95 SSB_DEVTABLE_END
97 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
100 /* Channel and ratetables are shared for all devices.
101 * They can't be const, because ieee80211 puts some precalculated
102 * data in there. This data is the same for all devices, so we don't
103 * get concurrency issues */
104 #define RATETAB_ENT(_rateid, _flags) \
106 .rate = B43legacy_RATE_TO_100KBPS(_rateid), \
107 .val = (_rateid), \
108 .val2 = (_rateid), \
109 .flags = (_flags), \
111 static struct ieee80211_rate __b43legacy_ratetable[] = {
112 RATETAB_ENT(B43legacy_CCK_RATE_1MB, IEEE80211_RATE_CCK),
113 RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_CCK_2),
114 RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_CCK_2),
115 RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_CCK_2),
116 RATETAB_ENT(B43legacy_OFDM_RATE_6MB, IEEE80211_RATE_OFDM),
117 RATETAB_ENT(B43legacy_OFDM_RATE_9MB, IEEE80211_RATE_OFDM),
118 RATETAB_ENT(B43legacy_OFDM_RATE_12MB, IEEE80211_RATE_OFDM),
119 RATETAB_ENT(B43legacy_OFDM_RATE_18MB, IEEE80211_RATE_OFDM),
120 RATETAB_ENT(B43legacy_OFDM_RATE_24MB, IEEE80211_RATE_OFDM),
121 RATETAB_ENT(B43legacy_OFDM_RATE_36MB, IEEE80211_RATE_OFDM),
122 RATETAB_ENT(B43legacy_OFDM_RATE_48MB, IEEE80211_RATE_OFDM),
123 RATETAB_ENT(B43legacy_OFDM_RATE_54MB, IEEE80211_RATE_OFDM),
125 #define b43legacy_a_ratetable (__b43legacy_ratetable + 4)
126 #define b43legacy_a_ratetable_size 8
127 #define b43legacy_b_ratetable (__b43legacy_ratetable + 0)
128 #define b43legacy_b_ratetable_size 4
129 #define b43legacy_g_ratetable (__b43legacy_ratetable + 0)
130 #define b43legacy_g_ratetable_size 12
132 #define CHANTAB_ENT(_chanid, _freq) \
134 .chan = (_chanid), \
135 .freq = (_freq), \
136 .val = (_chanid), \
137 .flag = IEEE80211_CHAN_W_SCAN | \
138 IEEE80211_CHAN_W_ACTIVE_SCAN | \
139 IEEE80211_CHAN_W_IBSS, \
140 .power_level = 0x0A, \
141 .antenna_max = 0xFF, \
143 static struct ieee80211_channel b43legacy_bg_chantable[] = {
144 CHANTAB_ENT(1, 2412),
145 CHANTAB_ENT(2, 2417),
146 CHANTAB_ENT(3, 2422),
147 CHANTAB_ENT(4, 2427),
148 CHANTAB_ENT(5, 2432),
149 CHANTAB_ENT(6, 2437),
150 CHANTAB_ENT(7, 2442),
151 CHANTAB_ENT(8, 2447),
152 CHANTAB_ENT(9, 2452),
153 CHANTAB_ENT(10, 2457),
154 CHANTAB_ENT(11, 2462),
155 CHANTAB_ENT(12, 2467),
156 CHANTAB_ENT(13, 2472),
157 CHANTAB_ENT(14, 2484),
159 #define b43legacy_bg_chantable_size ARRAY_SIZE(b43legacy_bg_chantable)
161 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
162 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
163 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
164 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
167 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
169 if (!wl || !wl->current_dev)
170 return 1;
171 if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
172 return 1;
173 /* We are up and running.
174 * Ratelimit the messages to avoid DoS over the net. */
175 return net_ratelimit();
178 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
180 va_list args;
182 if (!b43legacy_ratelimit(wl))
183 return;
184 va_start(args, fmt);
185 printk(KERN_INFO "b43legacy-%s: ",
186 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
187 vprintk(fmt, args);
188 va_end(args);
191 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
193 va_list args;
195 if (!b43legacy_ratelimit(wl))
196 return;
197 va_start(args, fmt);
198 printk(KERN_ERR "b43legacy-%s ERROR: ",
199 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
200 vprintk(fmt, args);
201 va_end(args);
204 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
206 va_list args;
208 if (!b43legacy_ratelimit(wl))
209 return;
210 va_start(args, fmt);
211 printk(KERN_WARNING "b43legacy-%s warning: ",
212 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
213 vprintk(fmt, args);
214 va_end(args);
217 #if B43legacy_DEBUG
218 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
220 va_list args;
222 va_start(args, fmt);
223 printk(KERN_DEBUG "b43legacy-%s debug: ",
224 (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
225 vprintk(fmt, args);
226 va_end(args);
228 #endif /* DEBUG */
230 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
231 u32 val)
233 u32 status;
235 B43legacy_WARN_ON(offset % 4 != 0);
237 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
238 if (status & B43legacy_MACCTL_BE)
239 val = swab32(val);
241 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
242 mmiowb();
243 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
246 static inline
247 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
248 u16 routing, u16 offset)
250 u32 control;
252 /* "offset" is the WORD offset. */
254 control = routing;
255 control <<= 16;
256 control |= offset;
257 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
260 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
261 u16 routing, u16 offset)
263 u32 ret;
265 if (routing == B43legacy_SHM_SHARED) {
266 B43legacy_WARN_ON((offset & 0x0001) != 0);
267 if (offset & 0x0003) {
268 /* Unaligned access */
269 b43legacy_shm_control_word(dev, routing, offset >> 2);
270 ret = b43legacy_read16(dev,
271 B43legacy_MMIO_SHM_DATA_UNALIGNED);
272 ret <<= 16;
273 b43legacy_shm_control_word(dev, routing,
274 (offset >> 2) + 1);
275 ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
277 return ret;
279 offset >>= 2;
281 b43legacy_shm_control_word(dev, routing, offset);
282 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
284 return ret;
287 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
288 u16 routing, u16 offset)
290 u16 ret;
292 if (routing == B43legacy_SHM_SHARED) {
293 B43legacy_WARN_ON((offset & 0x0001) != 0);
294 if (offset & 0x0003) {
295 /* Unaligned access */
296 b43legacy_shm_control_word(dev, routing, offset >> 2);
297 ret = b43legacy_read16(dev,
298 B43legacy_MMIO_SHM_DATA_UNALIGNED);
300 return ret;
302 offset >>= 2;
304 b43legacy_shm_control_word(dev, routing, offset);
305 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
307 return ret;
310 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
311 u16 routing, u16 offset,
312 u32 value)
314 if (routing == B43legacy_SHM_SHARED) {
315 B43legacy_WARN_ON((offset & 0x0001) != 0);
316 if (offset & 0x0003) {
317 /* Unaligned access */
318 b43legacy_shm_control_word(dev, routing, offset >> 2);
319 mmiowb();
320 b43legacy_write16(dev,
321 B43legacy_MMIO_SHM_DATA_UNALIGNED,
322 (value >> 16) & 0xffff);
323 mmiowb();
324 b43legacy_shm_control_word(dev, routing,
325 (offset >> 2) + 1);
326 mmiowb();
327 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
328 value & 0xffff);
329 return;
331 offset >>= 2;
333 b43legacy_shm_control_word(dev, routing, offset);
334 mmiowb();
335 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
338 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
339 u16 value)
341 if (routing == B43legacy_SHM_SHARED) {
342 B43legacy_WARN_ON((offset & 0x0001) != 0);
343 if (offset & 0x0003) {
344 /* Unaligned access */
345 b43legacy_shm_control_word(dev, routing, offset >> 2);
346 mmiowb();
347 b43legacy_write16(dev,
348 B43legacy_MMIO_SHM_DATA_UNALIGNED,
349 value);
350 return;
352 offset >>= 2;
354 b43legacy_shm_control_word(dev, routing, offset);
355 mmiowb();
356 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
359 /* Read HostFlags */
360 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
362 u32 ret;
364 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
365 B43legacy_SHM_SH_HOSTFHI);
366 ret <<= 16;
367 ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
368 B43legacy_SHM_SH_HOSTFLO);
370 return ret;
373 /* Write HostFlags */
374 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
376 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
377 B43legacy_SHM_SH_HOSTFLO,
378 (value & 0x0000FFFF));
379 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
380 B43legacy_SHM_SH_HOSTFHI,
381 ((value & 0xFFFF0000) >> 16));
384 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
386 /* We need to be careful. As we read the TSF from multiple
387 * registers, we should take care of register overflows.
388 * In theory, the whole tsf read process should be atomic.
389 * We try to be atomic here, by restaring the read process,
390 * if any of the high registers changed (overflew).
392 if (dev->dev->id.revision >= 3) {
393 u32 low;
394 u32 high;
395 u32 high2;
397 do {
398 high = b43legacy_read32(dev,
399 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
400 low = b43legacy_read32(dev,
401 B43legacy_MMIO_REV3PLUS_TSF_LOW);
402 high2 = b43legacy_read32(dev,
403 B43legacy_MMIO_REV3PLUS_TSF_HIGH);
404 } while (unlikely(high != high2));
406 *tsf = high;
407 *tsf <<= 32;
408 *tsf |= low;
409 } else {
410 u64 tmp;
411 u16 v0;
412 u16 v1;
413 u16 v2;
414 u16 v3;
415 u16 test1;
416 u16 test2;
417 u16 test3;
419 do {
420 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
421 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
422 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
423 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
425 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
426 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
427 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
428 } while (v3 != test3 || v2 != test2 || v1 != test1);
430 *tsf = v3;
431 *tsf <<= 48;
432 tmp = v2;
433 tmp <<= 32;
434 *tsf |= tmp;
435 tmp = v1;
436 tmp <<= 16;
437 *tsf |= tmp;
438 *tsf |= v0;
442 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
444 u32 status;
446 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
447 status |= B43legacy_MACCTL_TBTTHOLD;
448 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
449 mmiowb();
452 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
454 u32 status;
456 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
457 status &= ~B43legacy_MACCTL_TBTTHOLD;
458 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
461 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
463 /* Be careful with the in-progress timer.
464 * First zero out the low register, so we have a full
465 * register-overflow duration to complete the operation.
467 if (dev->dev->id.revision >= 3) {
468 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
469 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
471 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
472 mmiowb();
473 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
474 hi);
475 mmiowb();
476 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
477 lo);
478 } else {
479 u16 v0 = (tsf & 0x000000000000FFFFULL);
480 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
481 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
482 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
484 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
485 mmiowb();
486 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
487 mmiowb();
488 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
489 mmiowb();
490 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
491 mmiowb();
492 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
496 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
498 b43legacy_time_lock(dev);
499 b43legacy_tsf_write_locked(dev, tsf);
500 b43legacy_time_unlock(dev);
503 static
504 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
505 u16 offset, const u8 *mac)
507 static const u8 zero_addr[ETH_ALEN] = { 0 };
508 u16 data;
510 if (!mac)
511 mac = zero_addr;
513 offset |= 0x0020;
514 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
516 data = mac[0];
517 data |= mac[1] << 8;
518 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
519 data = mac[2];
520 data |= mac[3] << 8;
521 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
522 data = mac[4];
523 data |= mac[5] << 8;
524 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
527 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
529 static const u8 zero_addr[ETH_ALEN] = { 0 };
530 const u8 *mac = dev->wl->mac_addr;
531 const u8 *bssid = dev->wl->bssid;
532 u8 mac_bssid[ETH_ALEN * 2];
533 int i;
534 u32 tmp;
536 if (!bssid)
537 bssid = zero_addr;
538 if (!mac)
539 mac = zero_addr;
541 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
543 memcpy(mac_bssid, mac, ETH_ALEN);
544 memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
546 /* Write our MAC address and BSSID to template ram */
547 for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
548 tmp = (u32)(mac_bssid[i + 0]);
549 tmp |= (u32)(mac_bssid[i + 1]) << 8;
550 tmp |= (u32)(mac_bssid[i + 2]) << 16;
551 tmp |= (u32)(mac_bssid[i + 3]) << 24;
552 b43legacy_ram_write(dev, 0x20 + i, tmp);
553 b43legacy_ram_write(dev, 0x78 + i, tmp);
554 b43legacy_ram_write(dev, 0x478 + i, tmp);
558 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
560 b43legacy_write_mac_bssid_templates(dev);
561 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
562 dev->wl->mac_addr);
565 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
566 u16 slot_time)
568 /* slot_time is in usec. */
569 if (dev->phy.type != B43legacy_PHYTYPE_G)
570 return;
571 b43legacy_write16(dev, 0x684, 510 + slot_time);
572 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
573 slot_time);
576 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
578 b43legacy_set_slot_time(dev, 9);
579 dev->short_slot = 1;
582 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
584 b43legacy_set_slot_time(dev, 20);
585 dev->short_slot = 0;
588 /* Enable a Generic IRQ. "mask" is the mask of which IRQs to enable.
589 * Returns the _previously_ enabled IRQ mask.
591 static inline u32 b43legacy_interrupt_enable(struct b43legacy_wldev *dev,
592 u32 mask)
594 u32 old_mask;
596 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
597 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask |
598 mask);
600 return old_mask;
603 /* Disable a Generic IRQ. "mask" is the mask of which IRQs to disable.
604 * Returns the _previously_ enabled IRQ mask.
606 static inline u32 b43legacy_interrupt_disable(struct b43legacy_wldev *dev,
607 u32 mask)
609 u32 old_mask;
611 old_mask = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
612 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, old_mask & ~mask);
614 return old_mask;
617 /* Synchronize IRQ top- and bottom-half.
618 * IRQs must be masked before calling this.
619 * This must not be called with the irq_lock held.
621 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
623 synchronize_irq(dev->dev->irq);
624 tasklet_kill(&dev->isr_tasklet);
627 /* DummyTransmission function, as documented on
628 * http://bcm-specs.sipsolutions.net/DummyTransmission
630 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
632 struct b43legacy_phy *phy = &dev->phy;
633 unsigned int i;
634 unsigned int max_loop;
635 u16 value;
636 u32 buffer[5] = {
637 0x00000000,
638 0x00D40000,
639 0x00000000,
640 0x01000000,
641 0x00000000,
644 switch (phy->type) {
645 case B43legacy_PHYTYPE_B:
646 case B43legacy_PHYTYPE_G:
647 max_loop = 0xFA;
648 buffer[0] = 0x000B846E;
649 break;
650 default:
651 B43legacy_BUG_ON(1);
652 return;
655 for (i = 0; i < 5; i++)
656 b43legacy_ram_write(dev, i * 4, buffer[i]);
658 /* dummy read follows */
659 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
661 b43legacy_write16(dev, 0x0568, 0x0000);
662 b43legacy_write16(dev, 0x07C0, 0x0000);
663 b43legacy_write16(dev, 0x050C, 0x0000);
664 b43legacy_write16(dev, 0x0508, 0x0000);
665 b43legacy_write16(dev, 0x050A, 0x0000);
666 b43legacy_write16(dev, 0x054C, 0x0000);
667 b43legacy_write16(dev, 0x056A, 0x0014);
668 b43legacy_write16(dev, 0x0568, 0x0826);
669 b43legacy_write16(dev, 0x0500, 0x0000);
670 b43legacy_write16(dev, 0x0502, 0x0030);
672 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
673 b43legacy_radio_write16(dev, 0x0051, 0x0017);
674 for (i = 0x00; i < max_loop; i++) {
675 value = b43legacy_read16(dev, 0x050E);
676 if (value & 0x0080)
677 break;
678 udelay(10);
680 for (i = 0x00; i < 0x0A; i++) {
681 value = b43legacy_read16(dev, 0x050E);
682 if (value & 0x0400)
683 break;
684 udelay(10);
686 for (i = 0x00; i < 0x0A; i++) {
687 value = b43legacy_read16(dev, 0x0690);
688 if (!(value & 0x0100))
689 break;
690 udelay(10);
692 if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
693 b43legacy_radio_write16(dev, 0x0051, 0x0037);
696 /* Turn the Analog ON/OFF */
697 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
699 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
702 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
704 u32 tmslow;
705 u32 macctl;
707 flags |= B43legacy_TMSLOW_PHYCLKEN;
708 flags |= B43legacy_TMSLOW_PHYRESET;
709 ssb_device_enable(dev->dev, flags);
710 msleep(2); /* Wait for the PLL to turn on. */
712 /* Now take the PHY out of Reset again */
713 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
714 tmslow |= SSB_TMSLOW_FGC;
715 tmslow &= ~B43legacy_TMSLOW_PHYRESET;
716 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
717 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
718 msleep(1);
719 tmslow &= ~SSB_TMSLOW_FGC;
720 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
721 ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
722 msleep(1);
724 /* Turn Analog ON */
725 b43legacy_switch_analog(dev, 1);
727 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
728 macctl &= ~B43legacy_MACCTL_GMODE;
729 if (flags & B43legacy_TMSLOW_GMODE) {
730 macctl |= B43legacy_MACCTL_GMODE;
731 dev->phy.gmode = 1;
732 } else
733 dev->phy.gmode = 0;
734 macctl |= B43legacy_MACCTL_IHR_ENABLED;
735 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
738 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
740 u32 v0;
741 u32 v1;
742 u16 tmp;
743 struct b43legacy_txstatus stat;
745 while (1) {
746 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
747 if (!(v0 & 0x00000001))
748 break;
749 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
751 stat.cookie = (v0 >> 16);
752 stat.seq = (v1 & 0x0000FFFF);
753 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
754 tmp = (v0 & 0x0000FFFF);
755 stat.frame_count = ((tmp & 0xF000) >> 12);
756 stat.rts_count = ((tmp & 0x0F00) >> 8);
757 stat.supp_reason = ((tmp & 0x001C) >> 2);
758 stat.pm_indicated = !!(tmp & 0x0080);
759 stat.intermediate = !!(tmp & 0x0040);
760 stat.for_ampdu = !!(tmp & 0x0020);
761 stat.acked = !!(tmp & 0x0002);
763 b43legacy_handle_txstatus(dev, &stat);
767 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
769 u32 dummy;
771 if (dev->dev->id.revision < 5)
772 return;
773 /* Read all entries from the microcode TXstatus FIFO
774 * and throw them away.
776 while (1) {
777 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
778 if (!(dummy & 0x00000001))
779 break;
780 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
784 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
786 u32 val = 0;
788 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
789 val <<= 16;
790 val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
792 return val;
795 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
797 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
798 (jssi & 0x0000FFFF));
799 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
800 (jssi & 0xFFFF0000) >> 16);
803 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
805 b43legacy_jssi_write(dev, 0x7F7F7F7F);
806 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
807 b43legacy_read32(dev,
808 B43legacy_MMIO_MACCMD)
809 | (1 << 4));
810 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
811 dev->phy.channel);
814 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
816 /* Top half of Link Quality calculation. */
818 if (dev->noisecalc.calculation_running)
819 return;
820 dev->noisecalc.channel_at_start = dev->phy.channel;
821 dev->noisecalc.calculation_running = 1;
822 dev->noisecalc.nr_samples = 0;
824 b43legacy_generate_noise_sample(dev);
827 static void handle_irq_noise(struct b43legacy_wldev *dev)
829 struct b43legacy_phy *phy = &dev->phy;
830 u16 tmp;
831 u8 noise[4];
832 u8 i;
833 u8 j;
834 s32 average;
836 /* Bottom half of Link Quality calculation. */
838 B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
839 if (dev->noisecalc.channel_at_start != phy->channel)
840 goto drop_calculation;
841 *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
842 if (noise[0] == 0x7F || noise[1] == 0x7F ||
843 noise[2] == 0x7F || noise[3] == 0x7F)
844 goto generate_new;
846 /* Get the noise samples. */
847 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
848 i = dev->noisecalc.nr_samples;
849 noise[0] = limit_value(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
850 noise[1] = limit_value(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
851 noise[2] = limit_value(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
852 noise[3] = limit_value(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
853 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
854 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
855 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
856 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
857 dev->noisecalc.nr_samples++;
858 if (dev->noisecalc.nr_samples == 8) {
859 /* Calculate the Link Quality by the noise samples. */
860 average = 0;
861 for (i = 0; i < 8; i++) {
862 for (j = 0; j < 4; j++)
863 average += dev->noisecalc.samples[i][j];
865 average /= (8 * 4);
866 average *= 125;
867 average += 64;
868 average /= 128;
869 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
870 0x40C);
871 tmp = (tmp / 128) & 0x1F;
872 if (tmp >= 8)
873 average += 2;
874 else
875 average -= 25;
876 if (tmp == 8)
877 average -= 72;
878 else
879 average -= 48;
881 dev->stats.link_noise = average;
882 drop_calculation:
883 dev->noisecalc.calculation_running = 0;
884 return;
886 generate_new:
887 b43legacy_generate_noise_sample(dev);
890 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
892 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP)) {
893 /* TODO: PS TBTT */
894 } else {
895 if (1/*FIXME: the last PSpoll frame was sent successfully */)
896 b43legacy_power_saving_ctl_bits(dev, -1, -1);
898 dev->reg124_set_0x4 = 0;
899 if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
900 dev->reg124_set_0x4 = 1;
903 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
905 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
906 return;
907 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
908 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
909 | 0x4);
912 static void handle_irq_pmq(struct b43legacy_wldev *dev)
914 u32 tmp;
916 /* TODO: AP mode. */
918 while (1) {
919 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
920 if (!(tmp & 0x00000008))
921 break;
923 /* 16bit write is odd, but correct. */
924 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
927 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
928 const u8 *data, u16 size,
929 u16 ram_offset,
930 u16 shm_size_offset, u8 rate)
932 u32 i;
933 u32 tmp;
934 struct b43legacy_plcp_hdr4 plcp;
936 plcp.data = 0;
937 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
938 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
939 ram_offset += sizeof(u32);
940 /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
941 * So leave the first two bytes of the next write blank.
943 tmp = (u32)(data[0]) << 16;
944 tmp |= (u32)(data[1]) << 24;
945 b43legacy_ram_write(dev, ram_offset, tmp);
946 ram_offset += sizeof(u32);
947 for (i = 2; i < size; i += sizeof(u32)) {
948 tmp = (u32)(data[i + 0]);
949 if (i + 1 < size)
950 tmp |= (u32)(data[i + 1]) << 8;
951 if (i + 2 < size)
952 tmp |= (u32)(data[i + 2]) << 16;
953 if (i + 3 < size)
954 tmp |= (u32)(data[i + 3]) << 24;
955 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
957 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
958 size + sizeof(struct b43legacy_plcp_hdr6));
961 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
962 u16 ram_offset,
963 u16 shm_size_offset, u8 rate)
965 int len;
966 const u8 *data;
968 B43legacy_WARN_ON(!dev->cached_beacon);
969 len = min((size_t)dev->cached_beacon->len,
970 0x200 - sizeof(struct b43legacy_plcp_hdr6));
971 data = (const u8 *)(dev->cached_beacon->data);
972 b43legacy_write_template_common(dev, data,
973 len, ram_offset,
974 shm_size_offset, rate);
977 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
978 u16 shm_offset, u16 size,
979 u8 rate)
981 struct b43legacy_plcp_hdr4 plcp;
982 u32 tmp;
983 __le16 dur;
985 plcp.data = 0;
986 b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
987 dur = ieee80211_generic_frame_duration(dev->wl->hw,
988 dev->wl->vif,
989 size,
990 B43legacy_RATE_TO_100KBPS(rate));
991 /* Write PLCP in two parts and timing for packet transfer */
992 tmp = le32_to_cpu(plcp.data);
993 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
994 tmp & 0xFFFF);
995 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
996 tmp >> 16);
997 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
998 le16_to_cpu(dur));
1001 /* Instead of using custom probe response template, this function
1002 * just patches custom beacon template by:
1003 * 1) Changing packet type
1004 * 2) Patching duration field
1005 * 3) Stripping TIM
1007 static u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1008 u16 *dest_size, u8 rate)
1010 const u8 *src_data;
1011 u8 *dest_data;
1012 u16 src_size;
1013 u16 elem_size;
1014 u16 src_pos;
1015 u16 dest_pos;
1016 __le16 dur;
1017 struct ieee80211_hdr *hdr;
1019 B43legacy_WARN_ON(!dev->cached_beacon);
1020 src_size = dev->cached_beacon->len;
1021 src_data = (const u8 *)dev->cached_beacon->data;
1023 if (unlikely(src_size < 0x24)) {
1024 b43legacydbg(dev->wl, "b43legacy_generate_probe_resp: "
1025 "invalid beacon\n");
1026 return NULL;
1029 dest_data = kmalloc(src_size, GFP_ATOMIC);
1030 if (unlikely(!dest_data))
1031 return NULL;
1033 /* 0x24 is offset of first variable-len Information-Element
1034 * in beacon frame.
1036 memcpy(dest_data, src_data, 0x24);
1037 src_pos = 0x24;
1038 dest_pos = 0x24;
1039 for (; src_pos < src_size - 2; src_pos += elem_size) {
1040 elem_size = src_data[src_pos + 1] + 2;
1041 if (src_data[src_pos] != 0x05) { /* TIM */
1042 memcpy(dest_data + dest_pos, src_data + src_pos,
1043 elem_size);
1044 dest_pos += elem_size;
1047 *dest_size = dest_pos;
1048 hdr = (struct ieee80211_hdr *)dest_data;
1050 /* Set the frame control. */
1051 hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1052 IEEE80211_STYPE_PROBE_RESP);
1053 dur = ieee80211_generic_frame_duration(dev->wl->hw,
1054 dev->wl->vif,
1055 *dest_size,
1056 B43legacy_RATE_TO_100KBPS(rate));
1057 hdr->duration_id = dur;
1059 return dest_data;
1062 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1063 u16 ram_offset,
1064 u16 shm_size_offset, u8 rate)
1066 u8 *probe_resp_data;
1067 u16 size;
1069 B43legacy_WARN_ON(!dev->cached_beacon);
1070 size = dev->cached_beacon->len;
1071 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1072 if (unlikely(!probe_resp_data))
1073 return;
1075 /* Looks like PLCP headers plus packet timings are stored for
1076 * all possible basic rates
1078 b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1079 B43legacy_CCK_RATE_1MB);
1080 b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1081 B43legacy_CCK_RATE_2MB);
1082 b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1083 B43legacy_CCK_RATE_5MB);
1084 b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1085 B43legacy_CCK_RATE_11MB);
1087 size = min((size_t)size,
1088 0x200 - sizeof(struct b43legacy_plcp_hdr6));
1089 b43legacy_write_template_common(dev, probe_resp_data,
1090 size, ram_offset,
1091 shm_size_offset, rate);
1092 kfree(probe_resp_data);
1095 static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
1096 struct sk_buff *beacon)
1098 if (dev->cached_beacon)
1099 kfree_skb(dev->cached_beacon);
1100 dev->cached_beacon = beacon;
1102 return 0;
1105 static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1107 u32 status;
1109 B43legacy_WARN_ON(!dev->cached_beacon);
1111 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1112 B43legacy_CCK_RATE_1MB);
1113 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1114 B43legacy_CCK_RATE_1MB);
1115 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1116 B43legacy_CCK_RATE_11MB);
1118 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1119 status |= 0x03;
1120 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1123 static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
1124 struct sk_buff *beacon)
1126 int err;
1128 err = b43legacy_refresh_cached_beacon(dev, beacon);
1129 if (unlikely(err))
1130 return;
1131 b43legacy_update_templates(dev);
1134 static void b43legacy_set_ssid(struct b43legacy_wldev *dev,
1135 const u8 *ssid, u8 ssid_len)
1137 u32 tmp;
1138 u16 i;
1139 u16 len;
1141 len = min((u16)ssid_len, (u16)0x100);
1142 for (i = 0; i < len; i += sizeof(u32)) {
1143 tmp = (u32)(ssid[i + 0]);
1144 if (i + 1 < len)
1145 tmp |= (u32)(ssid[i + 1]) << 8;
1146 if (i + 2 < len)
1147 tmp |= (u32)(ssid[i + 2]) << 16;
1148 if (i + 3 < len)
1149 tmp |= (u32)(ssid[i + 3]) << 24;
1150 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
1151 0x380 + i, tmp);
1153 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1154 0x48, len);
1157 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1158 u16 beacon_int)
1160 b43legacy_time_lock(dev);
1161 if (dev->dev->id.revision >= 3)
1162 b43legacy_write32(dev, 0x188, (beacon_int << 16));
1163 else {
1164 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1165 b43legacy_write16(dev, 0x610, beacon_int);
1167 b43legacy_time_unlock(dev);
1170 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1172 u32 status;
1174 if (!b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_AP))
1175 return;
1177 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1178 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1180 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1181 /* ACK beacon IRQ. */
1182 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1183 B43legacy_IRQ_BEACON);
1184 dev->irq_savedstate |= B43legacy_IRQ_BEACON;
1185 if (dev->cached_beacon)
1186 kfree_skb(dev->cached_beacon);
1187 dev->cached_beacon = NULL;
1188 return;
1190 if (!(status & 0x1)) {
1191 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1192 B43legacy_CCK_RATE_1MB);
1193 status |= 0x1;
1194 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1195 status);
1197 if (!(status & 0x2)) {
1198 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1199 B43legacy_CCK_RATE_1MB);
1200 status |= 0x2;
1201 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1202 status);
1206 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1210 /* Interrupt handler bottom-half */
1211 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1213 u32 reason;
1214 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1215 u32 merged_dma_reason = 0;
1216 int i;
1217 unsigned long flags;
1219 spin_lock_irqsave(&dev->wl->irq_lock, flags);
1221 B43legacy_WARN_ON(b43legacy_status(dev) <
1222 B43legacy_STAT_INITIALIZED);
1224 reason = dev->irq_reason;
1225 for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1226 dma_reason[i] = dev->dma_reason[i];
1227 merged_dma_reason |= dma_reason[i];
1230 if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1231 b43legacyerr(dev->wl, "MAC transmission error\n");
1233 if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1234 b43legacyerr(dev->wl, "PHY transmission error\n");
1235 rmb();
1236 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1237 b43legacyerr(dev->wl, "Too many PHY TX errors, "
1238 "restarting the controller\n");
1239 b43legacy_controller_restart(dev, "PHY TX errors");
1243 if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1244 B43legacy_DMAIRQ_NONFATALMASK))) {
1245 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1246 b43legacyerr(dev->wl, "Fatal DMA error: "
1247 "0x%08X, 0x%08X, 0x%08X, "
1248 "0x%08X, 0x%08X, 0x%08X\n",
1249 dma_reason[0], dma_reason[1],
1250 dma_reason[2], dma_reason[3],
1251 dma_reason[4], dma_reason[5]);
1252 b43legacy_controller_restart(dev, "DMA error");
1253 mmiowb();
1254 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1255 return;
1257 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1258 b43legacyerr(dev->wl, "DMA error: "
1259 "0x%08X, 0x%08X, 0x%08X, "
1260 "0x%08X, 0x%08X, 0x%08X\n",
1261 dma_reason[0], dma_reason[1],
1262 dma_reason[2], dma_reason[3],
1263 dma_reason[4], dma_reason[5]);
1266 if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1267 handle_irq_ucode_debug(dev);
1268 if (reason & B43legacy_IRQ_TBTT_INDI)
1269 handle_irq_tbtt_indication(dev);
1270 if (reason & B43legacy_IRQ_ATIM_END)
1271 handle_irq_atim_end(dev);
1272 if (reason & B43legacy_IRQ_BEACON)
1273 handle_irq_beacon(dev);
1274 if (reason & B43legacy_IRQ_PMQ)
1275 handle_irq_pmq(dev);
1276 if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1277 ;/*TODO*/
1278 if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1279 handle_irq_noise(dev);
1281 /* Check the DMA reason registers for received data. */
1282 if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1283 if (b43legacy_using_pio(dev))
1284 b43legacy_pio_rx(dev->pio.queue0);
1285 else
1286 b43legacy_dma_rx(dev->dma.rx_ring0);
1288 B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1289 B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1290 if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1291 if (b43legacy_using_pio(dev))
1292 b43legacy_pio_rx(dev->pio.queue3);
1293 else
1294 b43legacy_dma_rx(dev->dma.rx_ring3);
1296 B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1297 B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1299 if (reason & B43legacy_IRQ_TX_OK)
1300 handle_irq_transmit_status(dev);
1302 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1303 mmiowb();
1304 spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1307 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1308 u16 base, int queueidx)
1310 u16 rxctl;
1312 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1313 if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1314 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1315 else
1316 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1319 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1321 if (b43legacy_using_pio(dev) &&
1322 (dev->dev->id.revision < 3) &&
1323 (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1324 /* Apply a PIO specific workaround to the dma_reasons */
1325 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1326 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1327 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1328 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1331 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1333 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1334 dev->dma_reason[0]);
1335 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1336 dev->dma_reason[1]);
1337 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1338 dev->dma_reason[2]);
1339 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1340 dev->dma_reason[3]);
1341 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1342 dev->dma_reason[4]);
1343 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1344 dev->dma_reason[5]);
1347 /* Interrupt handler top-half */
1348 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1350 irqreturn_t ret = IRQ_NONE;
1351 struct b43legacy_wldev *dev = dev_id;
1352 u32 reason;
1354 if (!dev)
1355 return IRQ_NONE;
1357 spin_lock(&dev->wl->irq_lock);
1359 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
1360 goto out;
1361 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1362 if (reason == 0xffffffff) /* shared IRQ */
1363 goto out;
1364 ret = IRQ_HANDLED;
1365 reason &= b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK);
1366 if (!reason)
1367 goto out;
1369 dev->dma_reason[0] = b43legacy_read32(dev,
1370 B43legacy_MMIO_DMA0_REASON)
1371 & 0x0001DC00;
1372 dev->dma_reason[1] = b43legacy_read32(dev,
1373 B43legacy_MMIO_DMA1_REASON)
1374 & 0x0000DC00;
1375 dev->dma_reason[2] = b43legacy_read32(dev,
1376 B43legacy_MMIO_DMA2_REASON)
1377 & 0x0000DC00;
1378 dev->dma_reason[3] = b43legacy_read32(dev,
1379 B43legacy_MMIO_DMA3_REASON)
1380 & 0x0001DC00;
1381 dev->dma_reason[4] = b43legacy_read32(dev,
1382 B43legacy_MMIO_DMA4_REASON)
1383 & 0x0000DC00;
1384 dev->dma_reason[5] = b43legacy_read32(dev,
1385 B43legacy_MMIO_DMA5_REASON)
1386 & 0x0000DC00;
1388 b43legacy_interrupt_ack(dev, reason);
1389 /* disable all IRQs. They are enabled again in the bottom half. */
1390 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
1391 B43legacy_IRQ_ALL);
1392 /* save the reason code and call our bottom half. */
1393 dev->irq_reason = reason;
1394 tasklet_schedule(&dev->isr_tasklet);
1395 out:
1396 mmiowb();
1397 spin_unlock(&dev->wl->irq_lock);
1399 return ret;
1402 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1404 release_firmware(dev->fw.ucode);
1405 dev->fw.ucode = NULL;
1406 release_firmware(dev->fw.pcm);
1407 dev->fw.pcm = NULL;
1408 release_firmware(dev->fw.initvals);
1409 dev->fw.initvals = NULL;
1410 release_firmware(dev->fw.initvals_band);
1411 dev->fw.initvals_band = NULL;
1414 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1416 b43legacyerr(wl, "You must go to http://linuxwireless.org/en/users/"
1417 "Drivers/b43#devicefirmware "
1418 "and download the correct firmware (version 3).\n");
1421 static int do_request_fw(struct b43legacy_wldev *dev,
1422 const char *name,
1423 const struct firmware **fw)
1425 char path[sizeof(modparam_fwpostfix) + 32];
1426 struct b43legacy_fw_header *hdr;
1427 u32 size;
1428 int err;
1430 if (!name)
1431 return 0;
1433 snprintf(path, ARRAY_SIZE(path),
1434 "b43legacy%s/%s.fw",
1435 modparam_fwpostfix, name);
1436 err = request_firmware(fw, path, dev->dev->dev);
1437 if (err) {
1438 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1439 "or load failed.\n", path);
1440 return err;
1442 if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1443 goto err_format;
1444 hdr = (struct b43legacy_fw_header *)((*fw)->data);
1445 switch (hdr->type) {
1446 case B43legacy_FW_TYPE_UCODE:
1447 case B43legacy_FW_TYPE_PCM:
1448 size = be32_to_cpu(hdr->size);
1449 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1450 goto err_format;
1451 /* fallthrough */
1452 case B43legacy_FW_TYPE_IV:
1453 if (hdr->ver != 1)
1454 goto err_format;
1455 break;
1456 default:
1457 goto err_format;
1460 return err;
1462 err_format:
1463 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1464 return -EPROTO;
1467 static int b43legacy_request_firmware(struct b43legacy_wldev *dev)
1469 struct b43legacy_firmware *fw = &dev->fw;
1470 const u8 rev = dev->dev->id.revision;
1471 const char *filename;
1472 u32 tmshigh;
1473 int err;
1475 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
1476 if (!fw->ucode) {
1477 if (rev == 2)
1478 filename = "ucode2";
1479 else if (rev == 4)
1480 filename = "ucode4";
1481 else
1482 filename = "ucode5";
1483 err = do_request_fw(dev, filename, &fw->ucode);
1484 if (err)
1485 goto err_load;
1487 if (!fw->pcm) {
1488 if (rev < 5)
1489 filename = "pcm4";
1490 else
1491 filename = "pcm5";
1492 err = do_request_fw(dev, filename, &fw->pcm);
1493 if (err)
1494 goto err_load;
1496 if (!fw->initvals) {
1497 switch (dev->phy.type) {
1498 case B43legacy_PHYTYPE_G:
1499 if ((rev >= 5) && (rev <= 10))
1500 filename = "b0g0initvals5";
1501 else if (rev == 2 || rev == 4)
1502 filename = "b0g0initvals2";
1503 else
1504 goto err_no_initvals;
1505 break;
1506 default:
1507 goto err_no_initvals;
1509 err = do_request_fw(dev, filename, &fw->initvals);
1510 if (err)
1511 goto err_load;
1513 if (!fw->initvals_band) {
1514 switch (dev->phy.type) {
1515 case B43legacy_PHYTYPE_G:
1516 if ((rev >= 5) && (rev <= 10))
1517 filename = "b0g0bsinitvals5";
1518 else if (rev >= 11)
1519 filename = NULL;
1520 else if (rev == 2 || rev == 4)
1521 filename = NULL;
1522 else
1523 goto err_no_initvals;
1524 break;
1525 default:
1526 goto err_no_initvals;
1528 err = do_request_fw(dev, filename, &fw->initvals_band);
1529 if (err)
1530 goto err_load;
1533 return 0;
1535 err_load:
1536 b43legacy_print_fw_helptext(dev->wl);
1537 goto error;
1539 err_no_initvals:
1540 err = -ENODEV;
1541 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1542 "core rev %u\n", dev->phy.type, rev);
1543 goto error;
1545 error:
1546 b43legacy_release_firmware(dev);
1547 return err;
1550 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1552 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1553 const __be32 *data;
1554 unsigned int i;
1555 unsigned int len;
1556 u16 fwrev;
1557 u16 fwpatch;
1558 u16 fwdate;
1559 u16 fwtime;
1560 u32 tmp, macctl;
1561 int err = 0;
1563 /* Jump the microcode PSM to offset 0 */
1564 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1565 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1566 macctl |= B43legacy_MACCTL_PSM_JMP0;
1567 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1568 /* Zero out all microcode PSM registers and shared memory. */
1569 for (i = 0; i < 64; i++)
1570 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1571 for (i = 0; i < 4096; i += 2)
1572 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1574 /* Upload Microcode. */
1575 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1576 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1577 b43legacy_shm_control_word(dev,
1578 B43legacy_SHM_UCODE |
1579 B43legacy_SHM_AUTOINC_W,
1580 0x0000);
1581 for (i = 0; i < len; i++) {
1582 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1583 be32_to_cpu(data[i]));
1584 udelay(10);
1587 if (dev->fw.pcm) {
1588 /* Upload PCM data. */
1589 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1590 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1591 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1592 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1593 /* No need for autoinc bit in SHM_HW */
1594 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1595 for (i = 0; i < len; i++) {
1596 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1597 be32_to_cpu(data[i]));
1598 udelay(10);
1602 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1603 B43legacy_IRQ_ALL);
1605 /* Start the microcode PSM */
1606 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1607 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1608 macctl |= B43legacy_MACCTL_PSM_RUN;
1609 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1611 /* Wait for the microcode to load and respond */
1612 i = 0;
1613 while (1) {
1614 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1615 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1616 break;
1617 i++;
1618 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1619 b43legacyerr(dev->wl, "Microcode not responding\n");
1620 b43legacy_print_fw_helptext(dev->wl);
1621 err = -ENODEV;
1622 goto error;
1624 msleep_interruptible(50);
1625 if (signal_pending(current)) {
1626 err = -EINTR;
1627 goto error;
1630 /* dummy read follows */
1631 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1633 /* Get and check the revisions. */
1634 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1635 B43legacy_SHM_SH_UCODEREV);
1636 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1637 B43legacy_SHM_SH_UCODEPATCH);
1638 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1639 B43legacy_SHM_SH_UCODEDATE);
1640 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1641 B43legacy_SHM_SH_UCODETIME);
1643 if (fwrev > 0x128) {
1644 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1645 " Only firmware from binary drivers version 3.x"
1646 " is supported. You must change your firmware"
1647 " files.\n");
1648 b43legacy_print_fw_helptext(dev->wl);
1649 err = -EOPNOTSUPP;
1650 goto error;
1652 <<<<<<< HEAD:drivers/net/wireless/b43legacy/main.c
1653 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1654 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1655 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1656 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F, fwtime & 0x1F);
1657 =======
1658 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1659 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1660 (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1661 (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1662 fwtime & 0x1F);
1663 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/b43legacy/main.c
1665 dev->fw.rev = fwrev;
1666 dev->fw.patch = fwpatch;
1668 return 0;
1670 error:
1671 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1672 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1673 macctl |= B43legacy_MACCTL_PSM_JMP0;
1674 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1676 return err;
1679 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1680 const struct b43legacy_iv *ivals,
1681 size_t count,
1682 size_t array_size)
1684 const struct b43legacy_iv *iv;
1685 u16 offset;
1686 size_t i;
1687 bool bit32;
1689 BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1690 iv = ivals;
1691 for (i = 0; i < count; i++) {
1692 if (array_size < sizeof(iv->offset_size))
1693 goto err_format;
1694 array_size -= sizeof(iv->offset_size);
1695 offset = be16_to_cpu(iv->offset_size);
1696 bit32 = !!(offset & B43legacy_IV_32BIT);
1697 offset &= B43legacy_IV_OFFSET_MASK;
1698 if (offset >= 0x1000)
1699 goto err_format;
1700 if (bit32) {
1701 u32 value;
1703 if (array_size < sizeof(iv->data.d32))
1704 goto err_format;
1705 array_size -= sizeof(iv->data.d32);
1707 value = be32_to_cpu(get_unaligned(&iv->data.d32));
1708 b43legacy_write32(dev, offset, value);
1710 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1711 sizeof(__be16) +
1712 sizeof(__be32));
1713 } else {
1714 u16 value;
1716 if (array_size < sizeof(iv->data.d16))
1717 goto err_format;
1718 array_size -= sizeof(iv->data.d16);
1720 value = be16_to_cpu(iv->data.d16);
1721 b43legacy_write16(dev, offset, value);
1723 iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1724 sizeof(__be16) +
1725 sizeof(__be16));
1728 if (array_size)
1729 goto err_format;
1731 return 0;
1733 err_format:
1734 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1735 b43legacy_print_fw_helptext(dev->wl);
1737 return -EPROTO;
1740 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1742 const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1743 const struct b43legacy_fw_header *hdr;
1744 struct b43legacy_firmware *fw = &dev->fw;
1745 const struct b43legacy_iv *ivals;
1746 size_t count;
1747 int err;
1749 hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1750 ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1751 count = be32_to_cpu(hdr->size);
1752 err = b43legacy_write_initvals(dev, ivals, count,
1753 fw->initvals->size - hdr_len);
1754 if (err)
1755 goto out;
1756 if (fw->initvals_band) {
1757 hdr = (const struct b43legacy_fw_header *)
1758 (fw->initvals_band->data);
1759 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1760 + hdr_len);
1761 count = be32_to_cpu(hdr->size);
1762 err = b43legacy_write_initvals(dev, ivals, count,
1763 fw->initvals_band->size - hdr_len);
1764 if (err)
1765 goto out;
1767 out:
1769 return err;
1772 /* Initialize the GPIOs
1773 * http://bcm-specs.sipsolutions.net/GPIO
1775 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1777 struct ssb_bus *bus = dev->dev->bus;
1778 struct ssb_device *gpiodev, *pcidev = NULL;
1779 u32 mask;
1780 u32 set;
1782 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1783 b43legacy_read32(dev,
1784 B43legacy_MMIO_MACCTL)
1785 & 0xFFFF3FFF);
1787 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1788 b43legacy_read16(dev,
1789 B43legacy_MMIO_GPIO_MASK)
1790 | 0x000F);
1792 mask = 0x0000001F;
1793 set = 0x0000000F;
1794 if (dev->dev->bus->chip_id == 0x4301) {
1795 mask |= 0x0060;
1796 set |= 0x0060;
1798 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1799 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1800 b43legacy_read16(dev,
1801 B43legacy_MMIO_GPIO_MASK)
1802 | 0x0200);
1803 mask |= 0x0200;
1804 set |= 0x0200;
1806 if (dev->dev->id.revision >= 2)
1807 mask |= 0x0010; /* FIXME: This is redundant. */
1809 #ifdef CONFIG_SSB_DRIVER_PCICORE
1810 pcidev = bus->pcicore.dev;
1811 #endif
1812 gpiodev = bus->chipco.dev ? : pcidev;
1813 if (!gpiodev)
1814 return 0;
1815 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1816 (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1817 & mask) | set);
1819 return 0;
1822 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1823 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1825 struct ssb_bus *bus = dev->dev->bus;
1826 struct ssb_device *gpiodev, *pcidev = NULL;
1828 #ifdef CONFIG_SSB_DRIVER_PCICORE
1829 pcidev = bus->pcicore.dev;
1830 #endif
1831 gpiodev = bus->chipco.dev ? : pcidev;
1832 if (!gpiodev)
1833 return;
1834 ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1837 /* http://bcm-specs.sipsolutions.net/EnableMac */
1838 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1840 dev->mac_suspended--;
1841 B43legacy_WARN_ON(dev->mac_suspended < 0);
1842 B43legacy_WARN_ON(irqs_disabled());
1843 if (dev->mac_suspended == 0) {
1844 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1845 b43legacy_read32(dev,
1846 B43legacy_MMIO_MACCTL)
1847 | B43legacy_MACCTL_ENABLED);
1848 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1849 B43legacy_IRQ_MAC_SUSPENDED);
1850 /* the next two are dummy reads */
1851 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1852 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1853 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1855 /* Re-enable IRQs. */
1856 spin_lock_irq(&dev->wl->irq_lock);
1857 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
1858 spin_unlock_irq(&dev->wl->irq_lock);
1862 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1863 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1865 int i;
1866 u32 tmp;
1868 might_sleep();
1869 B43legacy_WARN_ON(irqs_disabled());
1870 B43legacy_WARN_ON(dev->mac_suspended < 0);
1872 if (dev->mac_suspended == 0) {
1873 /* Mask IRQs before suspending MAC. Otherwise
1874 * the MAC stays busy and won't suspend. */
1875 spin_lock_irq(&dev->wl->irq_lock);
1876 tmp = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
1877 spin_unlock_irq(&dev->wl->irq_lock);
1878 b43legacy_synchronize_irq(dev);
1879 dev->irq_savedstate = tmp;
1881 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1882 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1883 b43legacy_read32(dev,
1884 B43legacy_MMIO_MACCTL)
1885 & ~B43legacy_MACCTL_ENABLED);
1886 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1887 for (i = 40; i; i--) {
1888 tmp = b43legacy_read32(dev,
1889 B43legacy_MMIO_GEN_IRQ_REASON);
1890 if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1891 goto out;
1892 msleep(1);
1894 b43legacyerr(dev->wl, "MAC suspend failed\n");
1896 out:
1897 dev->mac_suspended++;
1900 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1902 struct b43legacy_wl *wl = dev->wl;
1903 u32 ctl;
1904 u16 cfp_pretbtt;
1906 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1907 /* Reset status to STA infrastructure mode. */
1908 ctl &= ~B43legacy_MACCTL_AP;
1909 ctl &= ~B43legacy_MACCTL_KEEP_CTL;
1910 ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
1911 ctl &= ~B43legacy_MACCTL_KEEP_BAD;
1912 ctl &= ~B43legacy_MACCTL_PROMISC;
1913 ctl &= ~B43legacy_MACCTL_BEACPROMISC;
1914 ctl |= B43legacy_MACCTL_INFRA;
1916 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
1917 ctl |= B43legacy_MACCTL_AP;
1918 else if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_IBSS))
1919 ctl &= ~B43legacy_MACCTL_INFRA;
1921 if (wl->filter_flags & FIF_CONTROL)
1922 ctl |= B43legacy_MACCTL_KEEP_CTL;
1923 if (wl->filter_flags & FIF_FCSFAIL)
1924 ctl |= B43legacy_MACCTL_KEEP_BAD;
1925 if (wl->filter_flags & FIF_PLCPFAIL)
1926 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
1927 if (wl->filter_flags & FIF_PROMISC_IN_BSS)
1928 ctl |= B43legacy_MACCTL_PROMISC;
1929 if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
1930 ctl |= B43legacy_MACCTL_BEACPROMISC;
1932 /* Workaround: On old hardware the HW-MAC-address-filter
1933 * doesn't work properly, so always run promisc in filter
1934 * it in software. */
1935 if (dev->dev->id.revision <= 4)
1936 ctl |= B43legacy_MACCTL_PROMISC;
1938 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
1940 cfp_pretbtt = 2;
1941 if ((ctl & B43legacy_MACCTL_INFRA) &&
1942 !(ctl & B43legacy_MACCTL_AP)) {
1943 if (dev->dev->bus->chip_id == 0x4306 &&
1944 dev->dev->bus->chip_rev == 3)
1945 cfp_pretbtt = 100;
1946 else
1947 cfp_pretbtt = 50;
1949 b43legacy_write16(dev, 0x612, cfp_pretbtt);
1952 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
1953 u16 rate,
1954 int is_ofdm)
1956 u16 offset;
1958 if (is_ofdm) {
1959 offset = 0x480;
1960 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
1961 } else {
1962 offset = 0x4C0;
1963 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
1965 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
1966 b43legacy_shm_read16(dev,
1967 B43legacy_SHM_SHARED, offset));
1970 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
1972 switch (dev->phy.type) {
1973 case B43legacy_PHYTYPE_G:
1974 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
1975 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
1976 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
1977 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
1978 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
1979 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
1980 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
1981 /* fallthrough */
1982 case B43legacy_PHYTYPE_B:
1983 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
1984 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
1985 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
1986 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
1987 break;
1988 default:
1989 B43legacy_BUG_ON(1);
1993 /* Set the TX-Antenna for management frames sent by firmware. */
1994 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
1995 int antenna)
1997 u16 ant = 0;
1998 u16 tmp;
2000 switch (antenna) {
2001 case B43legacy_ANTENNA0:
2002 ant |= B43legacy_TX4_PHY_ANT0;
2003 break;
2004 case B43legacy_ANTENNA1:
2005 ant |= B43legacy_TX4_PHY_ANT1;
2006 break;
2007 case B43legacy_ANTENNA_AUTO:
2008 ant |= B43legacy_TX4_PHY_ANTLAST;
2009 break;
2010 default:
2011 B43legacy_BUG_ON(1);
2014 /* FIXME We also need to set the other flags of the PHY control
2015 * field somewhere. */
2017 /* For Beacons */
2018 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2019 B43legacy_SHM_SH_BEACPHYCTL);
2020 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2021 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2022 B43legacy_SHM_SH_BEACPHYCTL, tmp);
2023 /* For ACK/CTS */
2024 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2025 B43legacy_SHM_SH_ACKCTSPHYCTL);
2026 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2027 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2028 B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2029 /* For Probe Resposes */
2030 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2031 B43legacy_SHM_SH_PRPHYCTL);
2032 tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2034 B43legacy_SHM_SH_PRPHYCTL, tmp);
2037 /* This is the opposite of b43legacy_chip_init() */
2038 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2040 b43legacy_radio_turn_off(dev, 1);
2041 b43legacy_gpio_cleanup(dev);
2042 /* firmware is released later */
2045 /* Initialize the chip
2046 * http://bcm-specs.sipsolutions.net/ChipInit
2048 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2050 struct b43legacy_phy *phy = &dev->phy;
2051 int err;
2052 int tmp;
2053 u32 value32, macctl;
2054 u16 value16;
2056 /* Initialize the MAC control */
2057 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2058 if (dev->phy.gmode)
2059 macctl |= B43legacy_MACCTL_GMODE;
2060 macctl |= B43legacy_MACCTL_INFRA;
2061 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2063 err = b43legacy_request_firmware(dev);
2064 if (err)
2065 goto out;
2066 err = b43legacy_upload_microcode(dev);
2067 if (err)
2068 goto out; /* firmware is released later */
2070 err = b43legacy_gpio_init(dev);
2071 if (err)
2072 goto out; /* firmware is released later */
2074 err = b43legacy_upload_initvals(dev);
2075 if (err)
2076 goto err_gpio_clean;
2077 b43legacy_radio_turn_on(dev);
2079 b43legacy_write16(dev, 0x03E6, 0x0000);
2080 err = b43legacy_phy_init(dev);
2081 if (err)
2082 goto err_radio_off;
2084 /* Select initial Interference Mitigation. */
2085 tmp = phy->interfmode;
2086 phy->interfmode = B43legacy_INTERFMODE_NONE;
2087 b43legacy_radio_set_interference_mitigation(dev, tmp);
2089 b43legacy_phy_set_antenna_diversity(dev);
2090 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2092 if (phy->type == B43legacy_PHYTYPE_B) {
2093 value16 = b43legacy_read16(dev, 0x005E);
2094 value16 |= 0x0004;
2095 b43legacy_write16(dev, 0x005E, value16);
2097 b43legacy_write32(dev, 0x0100, 0x01000000);
2098 if (dev->dev->id.revision < 5)
2099 b43legacy_write32(dev, 0x010C, 0x01000000);
2101 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2102 value32 &= ~B43legacy_MACCTL_INFRA;
2103 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2104 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2105 value32 |= B43legacy_MACCTL_INFRA;
2106 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2108 if (b43legacy_using_pio(dev)) {
2109 b43legacy_write32(dev, 0x0210, 0x00000100);
2110 b43legacy_write32(dev, 0x0230, 0x00000100);
2111 b43legacy_write32(dev, 0x0250, 0x00000100);
2112 b43legacy_write32(dev, 0x0270, 0x00000100);
2113 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2114 0x0000);
2117 /* Probe Response Timeout value */
2118 /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2119 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2121 /* Initially set the wireless operation mode. */
2122 b43legacy_adjust_opmode(dev);
2124 if (dev->dev->id.revision < 3) {
2125 b43legacy_write16(dev, 0x060E, 0x0000);
2126 b43legacy_write16(dev, 0x0610, 0x8000);
2127 b43legacy_write16(dev, 0x0604, 0x0000);
2128 b43legacy_write16(dev, 0x0606, 0x0200);
2129 } else {
2130 b43legacy_write32(dev, 0x0188, 0x80000000);
2131 b43legacy_write32(dev, 0x018C, 0x02000000);
2133 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2134 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2135 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2136 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2137 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2138 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2139 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2141 value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2142 value32 |= 0x00100000;
2143 ssb_write32(dev->dev, SSB_TMSLOW, value32);
2145 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2146 dev->dev->bus->chipco.fast_pwrup_delay);
2148 /* PHY TX errors counter. */
2149 atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2151 B43legacy_WARN_ON(err != 0);
2152 b43legacydbg(dev->wl, "Chip initialized\n");
2153 out:
2154 return err;
2156 err_radio_off:
2157 b43legacy_radio_turn_off(dev, 1);
2158 err_gpio_clean:
2159 b43legacy_gpio_cleanup(dev);
2160 goto out;
2163 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2165 struct b43legacy_phy *phy = &dev->phy;
2167 if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2168 return;
2170 b43legacy_mac_suspend(dev);
2171 b43legacy_phy_lo_g_measure(dev);
2172 b43legacy_mac_enable(dev);
2175 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2177 b43legacy_phy_lo_mark_all_unused(dev);
2178 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2179 b43legacy_mac_suspend(dev);
2180 b43legacy_calc_nrssi_slope(dev);
2181 b43legacy_mac_enable(dev);
2185 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2187 /* Update device statistics. */
2188 b43legacy_calculate_link_quality(dev);
2191 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2193 b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2195 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2196 wmb();
2199 static void do_periodic_work(struct b43legacy_wldev *dev)
2201 unsigned int state;
2203 state = dev->periodic_state;
2204 if (state % 8 == 0)
2205 b43legacy_periodic_every120sec(dev);
2206 if (state % 4 == 0)
2207 b43legacy_periodic_every60sec(dev);
2208 if (state % 2 == 0)
2209 b43legacy_periodic_every30sec(dev);
2210 b43legacy_periodic_every15sec(dev);
2213 /* Periodic work locking policy:
2214 * The whole periodic work handler is protected by
2215 * wl->mutex. If another lock is needed somewhere in the
2216 * pwork callchain, it's aquired in-place, where it's needed.
2218 static void b43legacy_periodic_work_handler(struct work_struct *work)
2220 struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2221 periodic_work.work);
2222 struct b43legacy_wl *wl = dev->wl;
2223 unsigned long delay;
2225 mutex_lock(&wl->mutex);
2227 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2228 goto out;
2229 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2230 goto out_requeue;
2232 do_periodic_work(dev);
2234 dev->periodic_state++;
2235 out_requeue:
2236 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2237 delay = msecs_to_jiffies(50);
2238 else
2239 delay = round_jiffies_relative(HZ * 15);
2240 queue_delayed_work(wl->hw->workqueue, &dev->periodic_work, delay);
2241 out:
2242 mutex_unlock(&wl->mutex);
2245 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2247 struct delayed_work *work = &dev->periodic_work;
2249 dev->periodic_state = 0;
2250 INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2251 queue_delayed_work(dev->wl->hw->workqueue, work, 0);
2254 /* Validate access to the chip (SHM) */
2255 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2257 u32 value;
2258 u32 shm_backup;
2260 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2261 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2262 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2263 0xAA5555AA)
2264 goto error;
2265 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2266 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2267 0x55AAAA55)
2268 goto error;
2269 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2271 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2272 if ((value | B43legacy_MACCTL_GMODE) !=
2273 (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2274 goto error;
2276 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2277 if (value)
2278 goto error;
2280 return 0;
2281 error:
2282 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2283 return -ENODEV;
2286 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2288 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2289 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2290 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2291 0x0056);
2292 /* KTP is a word address, but we address SHM bytewise.
2293 * So multiply by two.
2295 dev->ktp *= 2;
2296 if (dev->dev->id.revision >= 5)
2297 /* Number of RCMTA address slots */
2298 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2299 dev->max_nr_keys - 8);
2302 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2304 struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2305 unsigned long flags;
2307 /* Don't take wl->mutex here, as it could deadlock with
2308 * hwrng internal locking. It's not needed to take
2309 * wl->mutex here, anyway. */
2311 spin_lock_irqsave(&wl->irq_lock, flags);
2312 *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2313 spin_unlock_irqrestore(&wl->irq_lock, flags);
2315 return (sizeof(u16));
2318 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2320 if (wl->rng_initialized)
2321 hwrng_unregister(&wl->rng);
2324 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2326 int err;
2328 snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2329 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2330 wl->rng.name = wl->rng_name;
2331 wl->rng.data_read = b43legacy_rng_read;
2332 wl->rng.priv = (unsigned long)wl;
2333 wl->rng_initialized = 1;
2334 err = hwrng_register(&wl->rng);
2335 if (err) {
2336 wl->rng_initialized = 0;
2337 b43legacyerr(wl, "Failed to register the random "
2338 "number generator (%d)\n", err);
2341 return err;
2344 static int b43legacy_op_tx(struct ieee80211_hw *hw,
2345 struct sk_buff *skb,
2346 struct ieee80211_tx_control *ctl)
2348 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2349 struct b43legacy_wldev *dev = wl->current_dev;
2350 int err = -ENODEV;
2351 unsigned long flags;
2353 if (unlikely(!dev))
2354 goto out;
2355 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
2356 goto out;
2357 /* DMA-TX is done without a global lock. */
2358 if (b43legacy_using_pio(dev)) {
2359 spin_lock_irqsave(&wl->irq_lock, flags);
2360 err = b43legacy_pio_tx(dev, skb, ctl);
2361 spin_unlock_irqrestore(&wl->irq_lock, flags);
2362 } else
2363 err = b43legacy_dma_tx(dev, skb, ctl);
2364 out:
2365 if (unlikely(err))
2366 return NETDEV_TX_BUSY;
2367 return NETDEV_TX_OK;
2370 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2371 int queue,
2372 const struct ieee80211_tx_queue_params *params)
2374 return 0;
2377 static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2378 struct ieee80211_tx_queue_stats *stats)
2380 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2381 struct b43legacy_wldev *dev = wl->current_dev;
2382 unsigned long flags;
2383 int err = -ENODEV;
2385 if (!dev)
2386 goto out;
2387 spin_lock_irqsave(&wl->irq_lock, flags);
2388 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2389 if (b43legacy_using_pio(dev))
2390 b43legacy_pio_get_tx_stats(dev, stats);
2391 else
2392 b43legacy_dma_get_tx_stats(dev, stats);
2393 err = 0;
2395 spin_unlock_irqrestore(&wl->irq_lock, flags);
2396 out:
2397 return err;
2400 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2401 struct ieee80211_low_level_stats *stats)
2403 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2404 unsigned long flags;
2406 spin_lock_irqsave(&wl->irq_lock, flags);
2407 memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2408 spin_unlock_irqrestore(&wl->irq_lock, flags);
2410 return 0;
2413 static const char *phymode_to_string(unsigned int phymode)
2415 switch (phymode) {
2416 case B43legacy_PHYMODE_B:
2417 return "B";
2418 case B43legacy_PHYMODE_G:
2419 return "G";
2420 default:
2421 B43legacy_BUG_ON(1);
2423 return "";
2426 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2427 unsigned int phymode,
2428 struct b43legacy_wldev **dev,
2429 bool *gmode)
2431 struct b43legacy_wldev *d;
2433 list_for_each_entry(d, &wl->devlist, list) {
2434 if (d->phy.possible_phymodes & phymode) {
2435 /* Ok, this device supports the PHY-mode.
2436 * Set the gmode bit. */
2437 *gmode = 1;
2438 *dev = d;
2440 return 0;
2444 return -ESRCH;
2447 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2449 struct ssb_device *sdev = dev->dev;
2450 u32 tmslow;
2452 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2453 tmslow &= ~B43legacy_TMSLOW_GMODE;
2454 tmslow |= B43legacy_TMSLOW_PHYRESET;
2455 tmslow |= SSB_TMSLOW_FGC;
2456 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2457 msleep(1);
2459 tmslow = ssb_read32(sdev, SSB_TMSLOW);
2460 tmslow &= ~SSB_TMSLOW_FGC;
2461 tmslow |= B43legacy_TMSLOW_PHYRESET;
2462 ssb_write32(sdev, SSB_TMSLOW, tmslow);
2463 msleep(1);
2466 /* Expects wl->mutex locked */
2467 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2468 unsigned int new_mode)
2470 struct b43legacy_wldev *up_dev;
2471 struct b43legacy_wldev *down_dev;
2472 int err;
2473 bool gmode = 0;
2474 int prev_status;
2476 err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2477 if (err) {
2478 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2479 phymode_to_string(new_mode));
2480 return err;
2482 if ((up_dev == wl->current_dev) &&
2483 (!!wl->current_dev->phy.gmode == !!gmode))
2484 /* This device is already running. */
2485 return 0;
2486 b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2487 phymode_to_string(new_mode));
2488 down_dev = wl->current_dev;
2490 prev_status = b43legacy_status(down_dev);
2491 /* Shutdown the currently running core. */
2492 if (prev_status >= B43legacy_STAT_STARTED)
2493 b43legacy_wireless_core_stop(down_dev);
2494 if (prev_status >= B43legacy_STAT_INITIALIZED)
2495 b43legacy_wireless_core_exit(down_dev);
2497 if (down_dev != up_dev)
2498 /* We switch to a different core, so we put PHY into
2499 * RESET on the old core. */
2500 b43legacy_put_phy_into_reset(down_dev);
2502 /* Now start the new core. */
2503 up_dev->phy.gmode = gmode;
2504 if (prev_status >= B43legacy_STAT_INITIALIZED) {
2505 err = b43legacy_wireless_core_init(up_dev);
2506 if (err) {
2507 b43legacyerr(wl, "Fatal: Could not initialize device"
2508 " for newly selected %s-PHY mode\n",
2509 phymode_to_string(new_mode));
2510 goto init_failure;
2513 if (prev_status >= B43legacy_STAT_STARTED) {
2514 err = b43legacy_wireless_core_start(up_dev);
2515 if (err) {
2516 b43legacyerr(wl, "Fatal: Coult not start device for "
2517 "newly selected %s-PHY mode\n",
2518 phymode_to_string(new_mode));
2519 b43legacy_wireless_core_exit(up_dev);
2520 goto init_failure;
2523 B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2525 b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2527 wl->current_dev = up_dev;
2529 return 0;
2530 init_failure:
2531 /* Whoops, failed to init the new core. No core is operating now. */
2532 wl->current_dev = NULL;
2533 return err;
2536 static int b43legacy_antenna_from_ieee80211(u8 antenna)
2538 switch (antenna) {
2539 case 0: /* default/diversity */
2540 return B43legacy_ANTENNA_DEFAULT;
2541 case 1: /* Antenna 0 */
2542 return B43legacy_ANTENNA0;
2543 case 2: /* Antenna 1 */
2544 return B43legacy_ANTENNA1;
2545 default:
2546 return B43legacy_ANTENNA_DEFAULT;
2550 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2551 struct ieee80211_conf *conf)
2553 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2554 struct b43legacy_wldev *dev;
2555 struct b43legacy_phy *phy;
2556 unsigned long flags;
2557 unsigned int new_phymode = 0xFFFF;
2558 int antenna_tx;
2559 int antenna_rx;
2560 int err = 0;
2561 u32 savedirqs;
2563 antenna_tx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_tx);
2564 antenna_rx = b43legacy_antenna_from_ieee80211(conf->antenna_sel_rx);
2566 mutex_lock(&wl->mutex);
2568 /* Switch the PHY mode (if necessary). */
2569 switch (conf->phymode) {
2570 case MODE_IEEE80211B:
2571 new_phymode = B43legacy_PHYMODE_B;
2572 break;
2573 case MODE_IEEE80211G:
2574 new_phymode = B43legacy_PHYMODE_G;
2575 break;
2576 default:
2577 B43legacy_WARN_ON(1);
2579 err = b43legacy_switch_phymode(wl, new_phymode);
2580 if (err)
2581 goto out_unlock_mutex;
2582 dev = wl->current_dev;
2583 phy = &dev->phy;
2585 /* Disable IRQs while reconfiguring the device.
2586 * This makes it possible to drop the spinlock throughout
2587 * the reconfiguration process. */
2588 spin_lock_irqsave(&wl->irq_lock, flags);
2589 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2590 spin_unlock_irqrestore(&wl->irq_lock, flags);
2591 goto out_unlock_mutex;
2593 savedirqs = b43legacy_interrupt_disable(dev, B43legacy_IRQ_ALL);
2594 spin_unlock_irqrestore(&wl->irq_lock, flags);
2595 b43legacy_synchronize_irq(dev);
2597 /* Switch to the requested channel.
2598 * The firmware takes care of races with the TX handler. */
2599 if (conf->channel_val != phy->channel)
2600 b43legacy_radio_selectchannel(dev, conf->channel_val, 0);
2602 /* Enable/Disable ShortSlot timing. */
2603 if ((!!(conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME))
2604 != dev->short_slot) {
2605 B43legacy_WARN_ON(phy->type != B43legacy_PHYTYPE_G);
2606 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME)
2607 b43legacy_short_slot_timing_enable(dev);
2608 else
2609 b43legacy_short_slot_timing_disable(dev);
2612 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
2614 /* Adjust the desired TX power level. */
2615 if (conf->power_level != 0) {
2616 if (conf->power_level != phy->power_level) {
2617 phy->power_level = conf->power_level;
2618 b43legacy_phy_xmitpower(dev);
2622 /* Antennas for RX and management frame TX. */
2623 b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2625 /* Update templates for AP mode. */
2626 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP))
2627 b43legacy_set_beacon_int(dev, conf->beacon_int);
2630 if (!!conf->radio_enabled != phy->radio_on) {
2631 if (conf->radio_enabled) {
2632 b43legacy_radio_turn_on(dev);
2633 b43legacyinfo(dev->wl, "Radio turned on by software\n");
2634 if (!dev->radio_hw_enable)
2635 b43legacyinfo(dev->wl, "The hardware RF-kill"
2636 " button still turns the radio"
2637 " physically off. Press the"
2638 " button to turn it on.\n");
2639 } else {
2640 b43legacy_radio_turn_off(dev, 0);
2641 b43legacyinfo(dev->wl, "Radio turned off by"
2642 " software\n");
2646 spin_lock_irqsave(&wl->irq_lock, flags);
2647 b43legacy_interrupt_enable(dev, savedirqs);
2648 mmiowb();
2649 spin_unlock_irqrestore(&wl->irq_lock, flags);
2650 out_unlock_mutex:
2651 mutex_unlock(&wl->mutex);
2653 return err;
2656 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2657 unsigned int changed,
2658 unsigned int *fflags,
2659 int mc_count,
2660 struct dev_addr_list *mc_list)
2662 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2663 struct b43legacy_wldev *dev = wl->current_dev;
2664 unsigned long flags;
2666 if (!dev) {
2667 *fflags = 0;
2668 return;
2671 spin_lock_irqsave(&wl->irq_lock, flags);
2672 *fflags &= FIF_PROMISC_IN_BSS |
2673 FIF_ALLMULTI |
2674 FIF_FCSFAIL |
2675 FIF_PLCPFAIL |
2676 FIF_CONTROL |
2677 FIF_OTHER_BSS |
2678 FIF_BCN_PRBRESP_PROMISC;
2680 changed &= FIF_PROMISC_IN_BSS |
2681 FIF_ALLMULTI |
2682 FIF_FCSFAIL |
2683 FIF_PLCPFAIL |
2684 FIF_CONTROL |
2685 FIF_OTHER_BSS |
2686 FIF_BCN_PRBRESP_PROMISC;
2688 wl->filter_flags = *fflags;
2690 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2691 b43legacy_adjust_opmode(dev);
2692 spin_unlock_irqrestore(&wl->irq_lock, flags);
2695 static int b43legacy_op_config_interface(struct ieee80211_hw *hw,
2696 struct ieee80211_vif *vif,
2697 struct ieee80211_if_conf *conf)
2699 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2700 struct b43legacy_wldev *dev = wl->current_dev;
2701 unsigned long flags;
2703 if (!dev)
2704 return -ENODEV;
2705 mutex_lock(&wl->mutex);
2706 spin_lock_irqsave(&wl->irq_lock, flags);
2707 B43legacy_WARN_ON(wl->vif != vif);
2708 if (conf->bssid)
2709 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2710 else
2711 memset(wl->bssid, 0, ETH_ALEN);
2712 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2713 if (b43legacy_is_mode(wl, IEEE80211_IF_TYPE_AP)) {
2714 B43legacy_WARN_ON(conf->type != IEEE80211_IF_TYPE_AP);
2715 b43legacy_set_ssid(dev, conf->ssid, conf->ssid_len);
2716 if (conf->beacon)
2717 b43legacy_refresh_templates(dev, conf->beacon);
2719 b43legacy_write_mac_bssid_templates(dev);
2721 spin_unlock_irqrestore(&wl->irq_lock, flags);
2722 mutex_unlock(&wl->mutex);
2724 return 0;
2727 /* Locking: wl->mutex */
2728 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2730 struct b43legacy_wl *wl = dev->wl;
2731 unsigned long flags;
2733 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2734 return;
2736 /* Disable and sync interrupts. We must do this before than
2737 * setting the status to INITIALIZED, as the interrupt handler
2738 * won't care about IRQs then. */
2739 spin_lock_irqsave(&wl->irq_lock, flags);
2740 dev->irq_savedstate = b43legacy_interrupt_disable(dev,
2741 B43legacy_IRQ_ALL);
2742 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2743 spin_unlock_irqrestore(&wl->irq_lock, flags);
2744 b43legacy_synchronize_irq(dev);
2746 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2748 mutex_unlock(&wl->mutex);
2749 /* Must unlock as it would otherwise deadlock. No races here.
2750 * Cancel the possibly running self-rearming periodic work. */
2751 cancel_delayed_work_sync(&dev->periodic_work);
2752 mutex_lock(&wl->mutex);
2754 ieee80211_stop_queues(wl->hw); /* FIXME this could cause a deadlock */
2756 b43legacy_mac_suspend(dev);
2757 free_irq(dev->dev->irq, dev);
2758 b43legacydbg(wl, "Wireless interface stopped\n");
2761 /* Locking: wl->mutex */
2762 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2764 int err;
2766 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2768 drain_txstatus_queue(dev);
2769 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2770 IRQF_SHARED, KBUILD_MODNAME, dev);
2771 if (err) {
2772 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2773 dev->dev->irq);
2774 goto out;
2776 /* We are ready to run. */
2777 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2779 /* Start data flow (TX/RX) */
2780 b43legacy_mac_enable(dev);
2781 b43legacy_interrupt_enable(dev, dev->irq_savedstate);
2782 ieee80211_start_queues(dev->wl->hw);
2784 /* Start maintenance work */
2785 b43legacy_periodic_tasks_setup(dev);
2787 b43legacydbg(dev->wl, "Wireless interface started\n");
2788 out:
2789 return err;
2792 /* Get PHY and RADIO versioning numbers */
2793 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2795 struct b43legacy_phy *phy = &dev->phy;
2796 u32 tmp;
2797 u8 analog_type;
2798 u8 phy_type;
2799 u8 phy_rev;
2800 u16 radio_manuf;
2801 u16 radio_ver;
2802 u16 radio_rev;
2803 int unsupported = 0;
2805 /* Get PHY versioning */
2806 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2807 analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2808 >> B43legacy_PHYVER_ANALOG_SHIFT;
2809 phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2810 phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2811 switch (phy_type) {
2812 case B43legacy_PHYTYPE_B:
2813 if (phy_rev != 2 && phy_rev != 4
2814 && phy_rev != 6 && phy_rev != 7)
2815 unsupported = 1;
2816 break;
2817 case B43legacy_PHYTYPE_G:
2818 if (phy_rev > 8)
2819 unsupported = 1;
2820 break;
2821 default:
2822 unsupported = 1;
2824 if (unsupported) {
2825 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
2826 "(Analog %u, Type %u, Revision %u)\n",
2827 analog_type, phy_type, phy_rev);
2828 return -EOPNOTSUPP;
2830 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
2831 analog_type, phy_type, phy_rev);
2834 /* Get RADIO versioning */
2835 if (dev->dev->bus->chip_id == 0x4317) {
2836 if (dev->dev->bus->chip_rev == 0)
2837 tmp = 0x3205017F;
2838 else if (dev->dev->bus->chip_rev == 1)
2839 tmp = 0x4205017F;
2840 else
2841 tmp = 0x5205017F;
2842 } else {
2843 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2844 B43legacy_RADIOCTL_ID);
2845 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
2846 tmp <<= 16;
2847 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
2848 B43legacy_RADIOCTL_ID);
2849 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
2851 radio_manuf = (tmp & 0x00000FFF);
2852 radio_ver = (tmp & 0x0FFFF000) >> 12;
2853 radio_rev = (tmp & 0xF0000000) >> 28;
2854 switch (phy_type) {
2855 case B43legacy_PHYTYPE_B:
2856 if ((radio_ver & 0xFFF0) != 0x2050)
2857 unsupported = 1;
2858 break;
2859 case B43legacy_PHYTYPE_G:
2860 if (radio_ver != 0x2050)
2861 unsupported = 1;
2862 break;
2863 default:
2864 B43legacy_BUG_ON(1);
2866 if (unsupported) {
2867 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
2868 "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
2869 radio_manuf, radio_ver, radio_rev);
2870 return -EOPNOTSUPP;
2872 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
2873 " Revision %u\n", radio_manuf, radio_ver, radio_rev);
2876 phy->radio_manuf = radio_manuf;
2877 phy->radio_ver = radio_ver;
2878 phy->radio_rev = radio_rev;
2880 phy->analog = analog_type;
2881 phy->type = phy_type;
2882 phy->rev = phy_rev;
2884 return 0;
2887 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
2888 struct b43legacy_phy *phy)
2890 struct b43legacy_lopair *lo;
2891 int i;
2893 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
2894 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
2896 /* Assume the radio is enabled. If it's not enabled, the state will
2897 * immediately get fixed on the first periodic work run. */
2898 dev->radio_hw_enable = 1;
2900 phy->savedpctlreg = 0xFFFF;
2901 phy->aci_enable = 0;
2902 phy->aci_wlan_automatic = 0;
2903 phy->aci_hw_rssi = 0;
2905 lo = phy->_lo_pairs;
2906 if (lo)
2907 memset(lo, 0, sizeof(struct b43legacy_lopair) *
2908 B43legacy_LO_COUNT);
2909 phy->max_lb_gain = 0;
2910 phy->trsw_rx_gain = 0;
2912 /* Set default attenuation values. */
2913 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
2914 phy->rfatt = b43legacy_default_radio_attenuation(dev);
2915 phy->txctl1 = b43legacy_default_txctl1(dev);
2916 phy->txpwr_offset = 0;
2918 /* NRSSI */
2919 phy->nrssislope = 0;
2920 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
2921 phy->nrssi[i] = -1000;
2922 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
2923 phy->nrssi_lt[i] = i;
2925 phy->lofcal = 0xFFFF;
2926 phy->initval = 0xFFFF;
2928 phy->interfmode = B43legacy_INTERFMODE_NONE;
2929 phy->channel = 0xFF;
2932 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
2934 /* Flags */
2935 dev->reg124_set_0x4 = 0;
2937 /* Stats */
2938 memset(&dev->stats, 0, sizeof(dev->stats));
2940 setup_struct_phy_for_init(dev, &dev->phy);
2942 /* IRQ related flags */
2943 dev->irq_reason = 0;
2944 memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
2945 dev->irq_savedstate = B43legacy_IRQ_MASKTEMPLATE;
2947 dev->mac_suspended = 1;
2949 /* Noise calculation context */
2950 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
2953 static void b43legacy_imcfglo_timeouts_workaround(struct b43legacy_wldev *dev)
2955 #ifdef CONFIG_SSB_DRIVER_PCICORE
2956 struct ssb_bus *bus = dev->dev->bus;
2957 u32 tmp;
2959 if (bus->pcicore.dev &&
2960 bus->pcicore.dev->id.coreid == SSB_DEV_PCI &&
2961 bus->pcicore.dev->id.revision <= 5) {
2962 /* IMCFGLO timeouts workaround. */
2963 tmp = ssb_read32(dev->dev, SSB_IMCFGLO);
2964 tmp &= ~SSB_IMCFGLO_REQTO;
2965 tmp &= ~SSB_IMCFGLO_SERTO;
2966 switch (bus->bustype) {
2967 case SSB_BUSTYPE_PCI:
2968 case SSB_BUSTYPE_PCMCIA:
2969 tmp |= 0x32;
2970 break;
2971 case SSB_BUSTYPE_SSB:
2972 tmp |= 0x53;
2973 break;
2975 ssb_write32(dev->dev, SSB_IMCFGLO, tmp);
2977 #endif /* CONFIG_SSB_DRIVER_PCICORE */
2980 /* Write the short and long frame retry limit values. */
2981 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2982 unsigned int short_retry,
2983 unsigned int long_retry)
2985 /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2986 * the chip-internal counter. */
2987 short_retry = min(short_retry, (unsigned int)0xF);
2988 long_retry = min(long_retry, (unsigned int)0xF);
2990 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2991 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2994 /* Shutdown a wireless core */
2995 /* Locking: wl->mutex */
2996 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2998 struct b43legacy_wl *wl = dev->wl;
2999 struct b43legacy_phy *phy = &dev->phy;
3000 u32 macctl;
3002 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3003 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3004 return;
3005 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3007 /* Stop the microcode PSM. */
3008 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3009 macctl &= ~B43legacy_MACCTL_PSM_RUN;
3010 macctl |= B43legacy_MACCTL_PSM_JMP0;
3011 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3013 mutex_unlock(&wl->mutex);
3014 /* Must unlock as it would otherwise deadlock. No races here.
3015 * Cancel possibly pending workqueues. */
3016 cancel_work_sync(&dev->restart_work);
3017 mutex_lock(&wl->mutex);
3019 b43legacy_leds_exit(dev);
3020 b43legacy_rng_exit(dev->wl);
3021 b43legacy_pio_free(dev);
3022 b43legacy_dma_free(dev);
3023 b43legacy_chip_exit(dev);
3024 b43legacy_radio_turn_off(dev, 1);
3025 b43legacy_switch_analog(dev, 0);
3026 if (phy->dyn_tssi_tbl)
3027 kfree(phy->tssi2dbm);
3028 kfree(phy->lo_control);
3029 phy->lo_control = NULL;
3030 ssb_device_disable(dev->dev, 0);
3031 ssb_bus_may_powerdown(dev->dev->bus);
3034 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3036 struct b43legacy_phy *phy = &dev->phy;
3037 int i;
3039 /* Set default attenuation values. */
3040 phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3041 phy->rfatt = b43legacy_default_radio_attenuation(dev);
3042 phy->txctl1 = b43legacy_default_txctl1(dev);
3043 phy->txctl2 = 0xFFFF;
3044 phy->txpwr_offset = 0;
3046 /* NRSSI */
3047 phy->nrssislope = 0;
3048 for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3049 phy->nrssi[i] = -1000;
3050 for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3051 phy->nrssi_lt[i] = i;
3053 phy->lofcal = 0xFFFF;
3054 phy->initval = 0xFFFF;
3056 phy->aci_enable = 0;
3057 phy->aci_wlan_automatic = 0;
3058 phy->aci_hw_rssi = 0;
3060 phy->antenna_diversity = 0xFFFF;
3061 memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3062 memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3064 /* Flags */
3065 phy->calibrated = 0;
3067 if (phy->_lo_pairs)
3068 memset(phy->_lo_pairs, 0,
3069 sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3070 memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3073 /* Initialize a wireless core */
3074 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3076 struct b43legacy_wl *wl = dev->wl;
3077 struct ssb_bus *bus = dev->dev->bus;
3078 struct b43legacy_phy *phy = &dev->phy;
3079 struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3080 int err;
3081 u32 hf;
3082 u32 tmp;
3084 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3086 err = ssb_bus_powerup(bus, 0);
3087 if (err)
3088 goto out;
3089 if (!ssb_device_is_enabled(dev->dev)) {
3090 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3091 b43legacy_wireless_core_reset(dev, tmp);
3094 if ((phy->type == B43legacy_PHYTYPE_B) ||
3095 (phy->type == B43legacy_PHYTYPE_G)) {
3096 phy->_lo_pairs = kzalloc(sizeof(struct b43legacy_lopair)
3097 * B43legacy_LO_COUNT,
3098 GFP_KERNEL);
3099 if (!phy->_lo_pairs)
3100 return -ENOMEM;
3102 setup_struct_wldev_for_init(dev);
3104 err = b43legacy_phy_init_tssi2dbm_table(dev);
3105 if (err)
3106 goto err_kfree_lo_control;
3108 /* Enable IRQ routing to this device. */
3109 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3111 b43legacy_imcfglo_timeouts_workaround(dev);
3112 prepare_phy_data_for_init(dev);
3113 b43legacy_phy_calibrate(dev);
3114 err = b43legacy_chip_init(dev);
3115 if (err)
3116 goto err_kfree_tssitbl;
3117 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3118 B43legacy_SHM_SH_WLCOREREV,
3119 dev->dev->id.revision);
3120 hf = b43legacy_hf_read(dev);
3121 if (phy->type == B43legacy_PHYTYPE_G) {
3122 hf |= B43legacy_HF_SYMW;
3123 if (phy->rev == 1)
3124 hf |= B43legacy_HF_GDCW;
3125 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3126 hf |= B43legacy_HF_OFDMPABOOST;
3127 } else if (phy->type == B43legacy_PHYTYPE_B) {
3128 hf |= B43legacy_HF_SYMW;
3129 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3130 hf &= ~B43legacy_HF_GDCW;
3132 b43legacy_hf_write(dev, hf);
3134 b43legacy_set_retry_limits(dev,
3135 B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3136 B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3138 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3139 0x0044, 3);
3140 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3141 0x0046, 2);
3143 /* Disable sending probe responses from firmware.
3144 * Setting the MaxTime to one usec will always trigger
3145 * a timeout, so we never send any probe resp.
3146 * A timeout of zero is infinite. */
3147 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3148 B43legacy_SHM_SH_PRMAXTIME, 1);
3150 b43legacy_rate_memory_init(dev);
3152 /* Minimum Contention Window */
3153 if (phy->type == B43legacy_PHYTYPE_B)
3154 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3155 0x0003, 31);
3156 else
3157 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3158 0x0003, 15);
3159 /* Maximum Contention Window */
3160 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3161 0x0004, 1023);
3163 do {
3164 if (b43legacy_using_pio(dev))
3165 err = b43legacy_pio_init(dev);
3166 else {
3167 err = b43legacy_dma_init(dev);
3168 if (!err)
3169 b43legacy_qos_init(dev);
3171 } while (err == -EAGAIN);
3172 if (err)
3173 goto err_chip_exit;
3175 b43legacy_write16(dev, 0x0612, 0x0050);
3176 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0416, 0x0050);
3177 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0414, 0x01F4);
3179 ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3180 b43legacy_upload_card_macaddress(dev);
3181 b43legacy_security_init(dev);
3182 b43legacy_rng_init(wl);
3184 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3186 b43legacy_leds_init(dev);
3187 out:
3188 return err;
3190 err_chip_exit:
3191 b43legacy_chip_exit(dev);
3192 err_kfree_tssitbl:
3193 if (phy->dyn_tssi_tbl)
3194 kfree(phy->tssi2dbm);
3195 err_kfree_lo_control:
3196 kfree(phy->lo_control);
3197 phy->lo_control = NULL;
3198 ssb_bus_may_powerdown(bus);
3199 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3200 return err;
3203 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3204 struct ieee80211_if_init_conf *conf)
3206 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3207 struct b43legacy_wldev *dev;
3208 unsigned long flags;
3209 int err = -EOPNOTSUPP;
3211 /* TODO: allow WDS/AP devices to coexist */
3213 if (conf->type != IEEE80211_IF_TYPE_AP &&
3214 conf->type != IEEE80211_IF_TYPE_STA &&
3215 conf->type != IEEE80211_IF_TYPE_WDS &&
3216 conf->type != IEEE80211_IF_TYPE_IBSS)
3217 return -EOPNOTSUPP;
3219 mutex_lock(&wl->mutex);
3220 if (wl->operating)
3221 goto out_mutex_unlock;
3223 b43legacydbg(wl, "Adding Interface type %d\n", conf->type);
3225 dev = wl->current_dev;
3226 wl->operating = 1;
3227 wl->vif = conf->vif;
3228 wl->if_type = conf->type;
3229 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN);
3231 spin_lock_irqsave(&wl->irq_lock, flags);
3232 b43legacy_adjust_opmode(dev);
3233 b43legacy_upload_card_macaddress(dev);
3234 spin_unlock_irqrestore(&wl->irq_lock, flags);
3236 err = 0;
3237 out_mutex_unlock:
3238 mutex_unlock(&wl->mutex);
3240 return err;
3243 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3244 struct ieee80211_if_init_conf *conf)
3246 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3247 struct b43legacy_wldev *dev = wl->current_dev;
3248 unsigned long flags;
3250 b43legacydbg(wl, "Removing Interface type %d\n", conf->type);
3252 mutex_lock(&wl->mutex);
3254 B43legacy_WARN_ON(!wl->operating);
3255 B43legacy_WARN_ON(wl->vif != conf->vif);
3256 wl->vif = NULL;
3258 wl->operating = 0;
3260 spin_lock_irqsave(&wl->irq_lock, flags);
3261 b43legacy_adjust_opmode(dev);
3262 memset(wl->mac_addr, 0, ETH_ALEN);
3263 b43legacy_upload_card_macaddress(dev);
3264 spin_unlock_irqrestore(&wl->irq_lock, flags);
3266 mutex_unlock(&wl->mutex);
3269 static int b43legacy_op_start(struct ieee80211_hw *hw)
3271 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3272 struct b43legacy_wldev *dev = wl->current_dev;
3273 int did_init = 0;
3274 int err = 0;
3275 bool do_rfkill_exit = 0;
3277 /* First register RFkill.
3278 * LEDs that are registered later depend on it. */
3279 b43legacy_rfkill_init(dev);
3281 /* Kill all old instance specific information to make sure
3282 * the card won't use it in the short timeframe between start
3283 * and mac80211 reconfiguring it. */
3284 memset(wl->bssid, 0, ETH_ALEN);
3285 memset(wl->mac_addr, 0, ETH_ALEN);
3286 wl->filter_flags = 0;
3288 mutex_lock(&wl->mutex);
3290 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3291 err = b43legacy_wireless_core_init(dev);
3292 if (err) {
3293 do_rfkill_exit = 1;
3294 goto out_mutex_unlock;
3296 did_init = 1;
3299 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3300 err = b43legacy_wireless_core_start(dev);
3301 if (err) {
3302 if (did_init)
3303 b43legacy_wireless_core_exit(dev);
3304 do_rfkill_exit = 1;
3305 goto out_mutex_unlock;
3309 out_mutex_unlock:
3310 mutex_unlock(&wl->mutex);
3312 if (do_rfkill_exit)
3313 b43legacy_rfkill_exit(dev);
3315 return err;
3318 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3320 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3321 struct b43legacy_wldev *dev = wl->current_dev;
3323 b43legacy_rfkill_exit(dev);
3325 mutex_lock(&wl->mutex);
3326 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3327 b43legacy_wireless_core_stop(dev);
3328 b43legacy_wireless_core_exit(dev);
3329 mutex_unlock(&wl->mutex);
3332 static int b43legacy_op_set_retry_limit(struct ieee80211_hw *hw,
3333 u32 short_retry_limit,
3334 u32 long_retry_limit)
3336 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3337 struct b43legacy_wldev *dev;
3338 int err = 0;
3340 mutex_lock(&wl->mutex);
3341 dev = wl->current_dev;
3342 if (unlikely(!dev ||
3343 (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED))) {
3344 err = -ENODEV;
3345 goto out_unlock;
3347 b43legacy_set_retry_limits(dev, short_retry_limit, long_retry_limit);
3348 out_unlock:
3349 mutex_unlock(&wl->mutex);
3351 return err;
3354 static const struct ieee80211_ops b43legacy_hw_ops = {
3355 .tx = b43legacy_op_tx,
3356 .conf_tx = b43legacy_op_conf_tx,
3357 .add_interface = b43legacy_op_add_interface,
3358 .remove_interface = b43legacy_op_remove_interface,
3359 .config = b43legacy_op_dev_config,
3360 .config_interface = b43legacy_op_config_interface,
3361 .configure_filter = b43legacy_op_configure_filter,
3362 .get_stats = b43legacy_op_get_stats,
3363 .get_tx_stats = b43legacy_op_get_tx_stats,
3364 .start = b43legacy_op_start,
3365 .stop = b43legacy_op_stop,
3366 .set_retry_limit = b43legacy_op_set_retry_limit,
3369 /* Hard-reset the chip. Do not call this directly.
3370 * Use b43legacy_controller_restart()
3372 static void b43legacy_chip_reset(struct work_struct *work)
3374 struct b43legacy_wldev *dev =
3375 container_of(work, struct b43legacy_wldev, restart_work);
3376 struct b43legacy_wl *wl = dev->wl;
3377 int err = 0;
3378 int prev_status;
3380 mutex_lock(&wl->mutex);
3382 prev_status = b43legacy_status(dev);
3383 /* Bring the device down... */
3384 if (prev_status >= B43legacy_STAT_STARTED)
3385 b43legacy_wireless_core_stop(dev);
3386 if (prev_status >= B43legacy_STAT_INITIALIZED)
3387 b43legacy_wireless_core_exit(dev);
3389 /* ...and up again. */
3390 if (prev_status >= B43legacy_STAT_INITIALIZED) {
3391 err = b43legacy_wireless_core_init(dev);
3392 if (err)
3393 goto out;
3395 if (prev_status >= B43legacy_STAT_STARTED) {
3396 err = b43legacy_wireless_core_start(dev);
3397 if (err) {
3398 b43legacy_wireless_core_exit(dev);
3399 goto out;
3402 out:
3403 mutex_unlock(&wl->mutex);
3404 if (err)
3405 b43legacyerr(wl, "Controller restart FAILED\n");
3406 else
3407 b43legacyinfo(wl, "Controller restarted\n");
3410 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3411 int have_bphy,
3412 int have_gphy)
3414 struct ieee80211_hw *hw = dev->wl->hw;
3415 struct ieee80211_hw_mode *mode;
3416 struct b43legacy_phy *phy = &dev->phy;
3417 int cnt = 0;
3418 int err;
3420 phy->possible_phymodes = 0;
3421 for (; 1; cnt++) {
3422 if (have_bphy) {
3423 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3424 mode = &phy->hwmodes[cnt];
3426 mode->mode = MODE_IEEE80211B;
3427 mode->num_channels = b43legacy_bg_chantable_size;
3428 mode->channels = b43legacy_bg_chantable;
3429 mode->num_rates = b43legacy_b_ratetable_size;
3430 mode->rates = b43legacy_b_ratetable;
3431 err = ieee80211_register_hwmode(hw, mode);
3432 if (err)
3433 return err;
3435 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3436 have_bphy = 0;
3437 continue;
3439 if (have_gphy) {
3440 B43legacy_WARN_ON(cnt >= B43legacy_MAX_PHYHWMODES);
3441 mode = &phy->hwmodes[cnt];
3443 mode->mode = MODE_IEEE80211G;
3444 mode->num_channels = b43legacy_bg_chantable_size;
3445 mode->channels = b43legacy_bg_chantable;
3446 mode->num_rates = b43legacy_g_ratetable_size;
3447 mode->rates = b43legacy_g_ratetable;
3448 err = ieee80211_register_hwmode(hw, mode);
3449 if (err)
3450 return err;
3452 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3453 have_gphy = 0;
3454 continue;
3456 break;
3459 return 0;
3462 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3464 /* We release firmware that late to not be required to re-request
3465 * is all the time when we reinit the core. */
3466 b43legacy_release_firmware(dev);
3469 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3471 struct b43legacy_wl *wl = dev->wl;
3472 struct ssb_bus *bus = dev->dev->bus;
3473 struct pci_dev *pdev = bus->host_pci;
3474 int err;
3475 int have_bphy = 0;
3476 int have_gphy = 0;
3477 u32 tmp;
3479 /* Do NOT do any device initialization here.
3480 * Do it in wireless_core_init() instead.
3481 * This function is for gathering basic information about the HW, only.
3482 * Also some structs may be set up here. But most likely you want to
3483 * have that in core_init(), too.
3486 err = ssb_bus_powerup(bus, 0);
3487 if (err) {
3488 b43legacyerr(wl, "Bus powerup failed\n");
3489 goto out;
3491 /* Get the PHY type. */
3492 if (dev->dev->id.revision >= 5) {
3493 u32 tmshigh;
3495 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3496 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3497 if (!have_gphy)
3498 have_bphy = 1;
3499 } else if (dev->dev->id.revision == 4)
3500 have_gphy = 1;
3501 else
3502 have_bphy = 1;
3504 dev->phy.gmode = (have_gphy || have_bphy);
3505 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3506 b43legacy_wireless_core_reset(dev, tmp);
3508 err = b43legacy_phy_versioning(dev);
3509 if (err)
3510 goto err_powerdown;
3511 /* Check if this device supports multiband. */
3512 if (!pdev ||
3513 (pdev->device != 0x4312 &&
3514 pdev->device != 0x4319 &&
3515 pdev->device != 0x4324)) {
3516 /* No multiband support. */
3517 have_bphy = 0;
3518 have_gphy = 0;
3519 switch (dev->phy.type) {
3520 case B43legacy_PHYTYPE_B:
3521 have_bphy = 1;
3522 break;
3523 case B43legacy_PHYTYPE_G:
3524 have_gphy = 1;
3525 break;
3526 default:
3527 B43legacy_BUG_ON(1);
3530 dev->phy.gmode = (have_gphy || have_bphy);
3531 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3532 b43legacy_wireless_core_reset(dev, tmp);
3534 err = b43legacy_validate_chipaccess(dev);
3535 if (err)
3536 goto err_powerdown;
3537 err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3538 if (err)
3539 goto err_powerdown;
3541 /* Now set some default "current_dev" */
3542 if (!wl->current_dev)
3543 wl->current_dev = dev;
3544 INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3546 b43legacy_radio_turn_off(dev, 1);
3547 b43legacy_switch_analog(dev, 0);
3548 ssb_device_disable(dev->dev, 0);
3549 ssb_bus_may_powerdown(bus);
3551 out:
3552 return err;
3554 err_powerdown:
3555 ssb_bus_may_powerdown(bus);
3556 return err;
3559 static void b43legacy_one_core_detach(struct ssb_device *dev)
3561 struct b43legacy_wldev *wldev;
3562 struct b43legacy_wl *wl;
3564 wldev = ssb_get_drvdata(dev);
3565 wl = wldev->wl;
3566 cancel_work_sync(&wldev->restart_work);
3567 b43legacy_debugfs_remove_device(wldev);
3568 b43legacy_wireless_core_detach(wldev);
3569 list_del(&wldev->list);
3570 wl->nr_devs--;
3571 ssb_set_drvdata(dev, NULL);
3572 kfree(wldev);
3575 static int b43legacy_one_core_attach(struct ssb_device *dev,
3576 struct b43legacy_wl *wl)
3578 struct b43legacy_wldev *wldev;
3579 struct pci_dev *pdev;
3580 int err = -ENOMEM;
3582 if (!list_empty(&wl->devlist)) {
3583 /* We are not the first core on this chip. */
3584 pdev = dev->bus->host_pci;
3585 /* Only special chips support more than one wireless
3586 * core, although some of the other chips have more than
3587 * one wireless core as well. Check for this and
3588 * bail out early.
3590 if (!pdev ||
3591 ((pdev->device != 0x4321) &&
3592 (pdev->device != 0x4313) &&
3593 (pdev->device != 0x431A))) {
3594 b43legacydbg(wl, "Ignoring unconnected 802.11 core\n");
3595 return -ENODEV;
3599 wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3600 if (!wldev)
3601 goto out;
3603 wldev->dev = dev;
3604 wldev->wl = wl;
3605 b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3606 wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3607 tasklet_init(&wldev->isr_tasklet,
3608 (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3609 (unsigned long)wldev);
3610 if (modparam_pio)
3611 wldev->__using_pio = 1;
3612 INIT_LIST_HEAD(&wldev->list);
3614 err = b43legacy_wireless_core_attach(wldev);
3615 if (err)
3616 goto err_kfree_wldev;
3618 list_add(&wldev->list, &wl->devlist);
3619 wl->nr_devs++;
3620 ssb_set_drvdata(dev, wldev);
3621 b43legacy_debugfs_add_device(wldev);
3622 out:
3623 return err;
3625 err_kfree_wldev:
3626 kfree(wldev);
3627 return err;
3630 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3632 /* boardflags workarounds */
3633 if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3634 bus->boardinfo.type == 0x4E &&
3635 bus->boardinfo.rev > 0x40)
3636 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3639 static void b43legacy_wireless_exit(struct ssb_device *dev,
3640 struct b43legacy_wl *wl)
3642 struct ieee80211_hw *hw = wl->hw;
3644 ssb_set_devtypedata(dev, NULL);
3645 ieee80211_free_hw(hw);
3648 static int b43legacy_wireless_init(struct ssb_device *dev)
3650 struct ssb_sprom *sprom = &dev->bus->sprom;
3651 struct ieee80211_hw *hw;
3652 struct b43legacy_wl *wl;
3653 int err = -ENOMEM;
3655 b43legacy_sprom_fixup(dev->bus);
3657 hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3658 if (!hw) {
3659 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3660 goto out;
3663 /* fill hw info */
3664 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
3665 IEEE80211_HW_RX_INCLUDES_FCS;
3666 hw->max_signal = 100;
3667 hw->max_rssi = -110;
3668 hw->max_noise = -110;
3669 hw->queues = 1; /* FIXME: hardware has more queues */
3670 SET_IEEE80211_DEV(hw, dev->dev);
3671 if (is_valid_ether_addr(sprom->et1mac))
3672 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3673 else
3674 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3676 /* Get and initialize struct b43legacy_wl */
3677 wl = hw_to_b43legacy_wl(hw);
3678 memset(wl, 0, sizeof(*wl));
3679 wl->hw = hw;
3680 spin_lock_init(&wl->irq_lock);
3681 spin_lock_init(&wl->leds_lock);
3682 mutex_init(&wl->mutex);
3683 INIT_LIST_HEAD(&wl->devlist);
3685 ssb_set_devtypedata(dev, wl);
3686 b43legacyinfo(wl, "Broadcom %04X WLAN found\n", dev->bus->chip_id);
3687 err = 0;
3688 out:
3689 return err;
3692 static int b43legacy_probe(struct ssb_device *dev,
3693 const struct ssb_device_id *id)
3695 struct b43legacy_wl *wl;
3696 int err;
3697 int first = 0;
3699 wl = ssb_get_devtypedata(dev);
3700 if (!wl) {
3701 /* Probing the first core - setup common struct b43legacy_wl */
3702 first = 1;
3703 err = b43legacy_wireless_init(dev);
3704 if (err)
3705 goto out;
3706 wl = ssb_get_devtypedata(dev);
3707 B43legacy_WARN_ON(!wl);
3709 err = b43legacy_one_core_attach(dev, wl);
3710 if (err)
3711 goto err_wireless_exit;
3713 if (first) {
3714 err = ieee80211_register_hw(wl->hw);
3715 if (err)
3716 goto err_one_core_detach;
3719 out:
3720 return err;
3722 err_one_core_detach:
3723 b43legacy_one_core_detach(dev);
3724 err_wireless_exit:
3725 if (first)
3726 b43legacy_wireless_exit(dev, wl);
3727 return err;
3730 static void b43legacy_remove(struct ssb_device *dev)
3732 struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3733 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3735 B43legacy_WARN_ON(!wl);
3736 if (wl->current_dev == wldev)
3737 ieee80211_unregister_hw(wl->hw);
3739 b43legacy_one_core_detach(dev);
3741 if (list_empty(&wl->devlist))
3742 /* Last core on the chip unregistered.
3743 * We can destroy common struct b43legacy_wl.
3745 b43legacy_wireless_exit(dev, wl);
3748 /* Perform a hardware reset. This can be called from any context. */
3749 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3750 const char *reason)
3752 /* Must avoid requeueing, if we are in shutdown. */
3753 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3754 return;
3755 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3756 queue_work(dev->wl->hw->workqueue, &dev->restart_work);
3759 #ifdef CONFIG_PM
3761 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3763 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3764 struct b43legacy_wl *wl = wldev->wl;
3766 b43legacydbg(wl, "Suspending...\n");
3768 mutex_lock(&wl->mutex);
3769 wldev->suspend_init_status = b43legacy_status(wldev);
3770 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3771 b43legacy_wireless_core_stop(wldev);
3772 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3773 b43legacy_wireless_core_exit(wldev);
3774 mutex_unlock(&wl->mutex);
3776 b43legacydbg(wl, "Device suspended.\n");
3778 return 0;
3781 static int b43legacy_resume(struct ssb_device *dev)
3783 struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3784 struct b43legacy_wl *wl = wldev->wl;
3785 int err = 0;
3787 b43legacydbg(wl, "Resuming...\n");
3789 mutex_lock(&wl->mutex);
3790 if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3791 err = b43legacy_wireless_core_init(wldev);
3792 if (err) {
3793 b43legacyerr(wl, "Resume failed at core init\n");
3794 goto out;
3797 if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3798 err = b43legacy_wireless_core_start(wldev);
3799 if (err) {
3800 b43legacy_wireless_core_exit(wldev);
3801 b43legacyerr(wl, "Resume failed at core start\n");
3802 goto out;
3805 mutex_unlock(&wl->mutex);
3807 b43legacydbg(wl, "Device resumed.\n");
3808 out:
3809 return err;
3812 #else /* CONFIG_PM */
3813 # define b43legacy_suspend NULL
3814 # define b43legacy_resume NULL
3815 #endif /* CONFIG_PM */
3817 static struct ssb_driver b43legacy_ssb_driver = {
3818 .name = KBUILD_MODNAME,
3819 .id_table = b43legacy_ssb_tbl,
3820 .probe = b43legacy_probe,
3821 .remove = b43legacy_remove,
3822 .suspend = b43legacy_suspend,
3823 .resume = b43legacy_resume,
3826 <<<<<<< HEAD:drivers/net/wireless/b43legacy/main.c
3827 =======
3828 static void b43legacy_print_driverinfo(void)
3830 const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "",
3831 *feat_pio = "", *feat_dma = "";
3833 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3834 feat_pci = "P";
3835 #endif
3836 #ifdef CONFIG_B43LEGACY_LEDS
3837 feat_leds = "L";
3838 #endif
3839 #ifdef CONFIG_B43LEGACY_RFKILL
3840 feat_rfkill = "R";
3841 #endif
3842 #ifdef CONFIG_B43LEGACY_PIO
3843 feat_pio = "I";
3844 #endif
3845 #ifdef CONFIG_B43LEGACY_DMA
3846 feat_dma = "D";
3847 #endif
3848 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3849 "[ Features: %s%s%s%s%s, Firmware-ID: "
3850 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3851 feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma);
3854 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/b43legacy/main.c
3855 static int __init b43legacy_init(void)
3857 int err;
3859 b43legacy_debugfs_init();
3861 err = ssb_driver_register(&b43legacy_ssb_driver);
3862 if (err)
3863 goto err_dfs_exit;
3865 <<<<<<< HEAD:drivers/net/wireless/b43legacy/main.c
3866 =======
3867 b43legacy_print_driverinfo();
3869 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/b43legacy/main.c
3870 return err;
3872 err_dfs_exit:
3873 b43legacy_debugfs_exit();
3874 return err;
3877 static void __exit b43legacy_exit(void)
3879 ssb_driver_unregister(&b43legacy_ssb_driver);
3880 b43legacy_debugfs_exit();
3883 module_init(b43legacy_init)
3884 module_exit(b43legacy_exit)