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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / net / wireless / iwlwifi / iwl3945-base.c
blob4a47120eb04ac548ed941c4665d74274eba1dd7e
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/version.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/delay.h>
37 #include <linux/skbuff.h>
38 #include <linux/netdevice.h>
39 #include <linux/wireless.h>
40 #include <linux/firmware.h>
41 #include <linux/etherdevice.h>
42 #include <linux/if_arp.h>
43
44 #include <net/ieee80211_radiotap.h>
45 #include <net/mac80211.h>
46
47 #include <asm/div64.h>
48
49 #include "iwl-3945.h"
50 #include "iwl-helpers.h"
51
52 #ifdef CONFIG_IWL3945_DEBUG
53 u32 iwl3945_debug_level;
54 #endif
55
56 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
57 struct iwl3945_tx_queue *txq);
58
59 /******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65 /* module parameters */
66 static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
67 static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
68 static int iwl3945_param_disable; /* def: 0 = enable radio */
69 static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
70 int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
71 static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
72 int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
73
74 /*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79 #define DRV_DESCRIPTION \
80 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
81
82 #ifdef CONFIG_IWL3945_DEBUG
83 #define VD "d"
84 #else
85 #define VD
86 #endif
87
88 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
89 #define VS "s"
90 #else
91 #define VS
92 #endif
93
94 #define IWLWIFI_VERSION "1.2.23k" VD VS
95 #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
96 #define DRV_VERSION IWLWIFI_VERSION
97
98 /* Change firmware file name, using "-" and incrementing number,
99 * *only* when uCode interface or architecture changes so that it
100 * is not compatible with earlier drivers.
101 * This number will also appear in << 8 position of 1st dword of uCode file */
102 #define IWL3945_UCODE_API "-1"
103
104 MODULE_DESCRIPTION(DRV_DESCRIPTION);
105 MODULE_VERSION(DRV_VERSION);
106 MODULE_AUTHOR(DRV_COPYRIGHT);
107 MODULE_LICENSE("GPL");
108
109 static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
110 {
111 u16 fc = le16_to_cpu(hdr->frame_control);
112 int hdr_len = ieee80211_get_hdrlen(fc);
113
114 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
115 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
116 return NULL;
117 }
118
119 static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
120 struct iwl3945_priv *priv, int mode)
121 {
122 int i;
123
124 for (i = 0; i < 3; i++)
125 if (priv->modes[i].mode == mode)
126 return &priv->modes[i];
127
128 return NULL;
129 }
130
131 static int iwl3945_is_empty_essid(const char *essid, int essid_len)
132 {
133 /* Single white space is for Linksys APs */
134 if (essid_len == 1 && essid[0] == ' ')
135 return 1;
136
137 /* Otherwise, if the entire essid is 0, we assume it is hidden */
138 while (essid_len) {
139 essid_len--;
140 if (essid[essid_len] != '\0')
141 return 0;
142 }
143
144 return 1;
145 }
146
147 static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
148 {
149 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
150 const char *s = essid;
151 char *d = escaped;
152
153 if (iwl3945_is_empty_essid(essid, essid_len)) {
154 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
155 return escaped;
156 }
157
158 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
159 while (essid_len--) {
160 if (*s == '\0') {
161 *d++ = '\\';
162 *d++ = '0';
163 s++;
164 } else
165 *d++ = *s++;
166 }
167 *d = '\0';
168 return escaped;
169 }
170
171 static void iwl3945_print_hex_dump(int level, void *p, u32 len)
172 {
173 #ifdef CONFIG_IWL3945_DEBUG
174 if (!(iwl3945_debug_level & level))
175 return;
176
177 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
178 p, len, 1);
179 #endif
180 }
181
182 /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
183 * DMA services
184 *
185 * Theory of operation
186 *
187 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
188 * of buffer descriptors, each of which points to one or more data buffers for
189 * the device to read from or fill. Driver and device exchange status of each
190 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
191 * entries in each circular buffer, to protect against confusing empty and full
192 * queue states.
193 *
194 * The device reads or writes the data in the queues via the device's several
195 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
196 *
197 * For Tx queue, there are low mark and high mark limits. If, after queuing
198 * the packet for Tx, free space become < low mark, Tx queue stopped. When
199 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
200 * Tx queue resumed.
201 *
202 * The 3945 operates with six queues: One receive queue, one transmit queue
203 * (#4) for sending commands to the device firmware, and four transmit queues
204 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
205 ***************************************************/
206
207 static int iwl3945_queue_space(const struct iwl3945_queue *q)
208 {
209 int s = q->read_ptr - q->write_ptr;
210
211 if (q->read_ptr > q->write_ptr)
212 s -= q->n_bd;
213
214 if (s <= 0)
215 s += q->n_window;
216 /* keep some reserve to not confuse empty and full situations */
217 s -= 2;
218 if (s < 0)
219 s = 0;
220 return s;
221 }
222
223 /**
224 * iwl3945_queue_inc_wrap - increment queue index, wrap back to beginning
225 * @index -- current index
226 * @n_bd -- total number of entries in queue (must be power of 2)
227 */
228 static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
229 {
230 return ++index & (n_bd - 1);
231 }
232
233 /**
234 * iwl3945_queue_dec_wrap - increment queue index, wrap back to end
235 * @index -- current index
236 * @n_bd -- total number of entries in queue (must be power of 2)
237 */
238 static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
239 {
240 return --index & (n_bd - 1);
241 }
242
243 static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
244 {
245 return q->write_ptr > q->read_ptr ?
246 (i >= q->read_ptr && i < q->write_ptr) :
247 !(i < q->read_ptr && i >= q->write_ptr);
248 }
249
250 static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
251 {
252 /* This is for scan command, the big buffer at end of command array */
253 if (is_huge)
254 return q->n_window; /* must be power of 2 */
255
256 /* Otherwise, use normal size buffers */
257 return index & (q->n_window - 1);
258 }
259
260 /**
261 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
262 */
263 static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
264 int count, int slots_num, u32 id)
265 {
266 q->n_bd = count;
267 q->n_window = slots_num;
268 q->id = id;
269
270 /* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
271 * and iwl3945_queue_dec_wrap are broken. */
272 BUG_ON(!is_power_of_2(count));
273
274 /* slots_num must be power-of-two size, otherwise
275 * get_cmd_index is broken. */
276 BUG_ON(!is_power_of_2(slots_num));
277
278 q->low_mark = q->n_window / 4;
279 if (q->low_mark < 4)
280 q->low_mark = 4;
281
282 q->high_mark = q->n_window / 8;
283 if (q->high_mark < 2)
284 q->high_mark = 2;
285
286 q->write_ptr = q->read_ptr = 0;
287
288 return 0;
289 }
290
291 /**
292 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
293 */
294 static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
295 struct iwl3945_tx_queue *txq, u32 id)
296 {
297 struct pci_dev *dev = priv->pci_dev;
298
299 /* Driver private data, only for Tx (not command) queues,
300 * not shared with device. */
301 if (id != IWL_CMD_QUEUE_NUM) {
302 txq->txb = kmalloc(sizeof(txq->txb[0]) *
303 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
304 if (!txq->txb) {
305 IWL_ERROR("kmalloc for auxiliary BD "
306 "structures failed\n");
307 goto error;
308 }
309 } else
310 txq->txb = NULL;
311
312 /* Circular buffer of transmit frame descriptors (TFDs),
313 * shared with device */
314 txq->bd = pci_alloc_consistent(dev,
315 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
316 &txq->q.dma_addr);
317
318 if (!txq->bd) {
319 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
320 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
321 goto error;
322 }
323 txq->q.id = id;
324
325 return 0;
326
327 error:
328 if (txq->txb) {
329 kfree(txq->txb);
330 txq->txb = NULL;
331 }
332
333 return -ENOMEM;
334 }
335
336 /**
337 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
338 */
339 int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
340 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
341 {
342 struct pci_dev *dev = priv->pci_dev;
343 int len;
344 int rc = 0;
345
346 /*
347 * Alloc buffer array for commands (Tx or other types of commands).
348 * For the command queue (#4), allocate command space + one big
349 * command for scan, since scan command is very huge; the system will
350 * not have two scans at the same time, so only one is needed.
351 * For data Tx queues (all other queues), no super-size command
352 * space is needed.
353 */
354 len = sizeof(struct iwl3945_cmd) * slots_num;
355 if (txq_id == IWL_CMD_QUEUE_NUM)
356 len += IWL_MAX_SCAN_SIZE;
357 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
358 if (!txq->cmd)
359 return -ENOMEM;
360
361 /* Alloc driver data array and TFD circular buffer */
362 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
363 if (rc) {
364 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
365
366 return -ENOMEM;
367 }
368 txq->need_update = 0;
369
370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
371 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
373
374 /* Initialize queue high/low-water, head/tail indexes */
375 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
376
377 /* Tell device where to find queue, enable DMA channel. */
378 iwl3945_hw_tx_queue_init(priv, txq);
379
380 return 0;
381 }
382
383 /**
384 * iwl3945_tx_queue_free - Deallocate DMA queue.
385 * @txq: Transmit queue to deallocate.
386 *
387 * Empty queue by removing and destroying all BD's.
388 * Free all buffers.
389 * 0-fill, but do not free "txq" descriptor structure.
390 */
391 void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
392 {
393 struct iwl3945_queue *q = &txq->q;
394 struct pci_dev *dev = priv->pci_dev;
395 int len;
396
397 if (q->n_bd == 0)
398 return;
399
400 /* first, empty all BD's */
401 for (; q->write_ptr != q->read_ptr;
402 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
403 iwl3945_hw_txq_free_tfd(priv, txq);
404
405 len = sizeof(struct iwl3945_cmd) * q->n_window;
406 if (q->id == IWL_CMD_QUEUE_NUM)
407 len += IWL_MAX_SCAN_SIZE;
408
409 /* De-alloc array of command/tx buffers */
410 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
411
412 /* De-alloc circular buffer of TFDs */
413 if (txq->q.n_bd)
414 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
415 txq->q.n_bd, txq->bd, txq->q.dma_addr);
416
417 /* De-alloc array of per-TFD driver data */
418 if (txq->txb) {
419 kfree(txq->txb);
420 txq->txb = NULL;
421 }
422
423 /* 0-fill queue descriptor structure */
424 memset(txq, 0, sizeof(*txq));
425 }
426
427 const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
428
429 /*************** STATION TABLE MANAGEMENT ****
430 * mac80211 should be examined to determine if sta_info is duplicating
431 * the functionality provided here
432 */
433
434 /**************************************************************/
435 #if 0 /* temporary disable till we add real remove station */
436 /**
437 * iwl3945_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
441 static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
442 {
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472 out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475 }
476 #endif
477
478 /**
479 * iwl3945_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
483 static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
484 {
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493 }
494
495 /**
496 * iwl3945_add_station - Add station to station tables in driver and device
497 */
498 u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
499 {
500 int i;
501 int index = IWL_INVALID_STATION;
502 struct iwl3945_station_entry *station;
503 unsigned long flags_spin;
504 DECLARE_MAC_BUF(mac);
505 u8 rate;
506
507 spin_lock_irqsave(&priv->sta_lock, flags_spin);
508 if (is_ap)
509 index = IWL_AP_ID;
510 else if (is_broadcast_ether_addr(addr))
511 index = priv->hw_setting.bcast_sta_id;
512 else
513 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
514 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
515 addr)) {
516 index = i;
517 break;
518 }
519
520 if (!priv->stations[i].used &&
521 index == IWL_INVALID_STATION)
522 index = i;
523 }
524
525 /* These two conditions has the same outcome but keep them separate
526 since they have different meaning */
527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
538 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
539 station = &priv->stations[index];
540 station->used = 1;
541 priv->num_stations++;
542
543 /* Set up the REPLY_ADD_STA command to send to device */
544 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
545 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
546 station->sta.mode = 0;
547 station->sta.sta.sta_id = index;
548 station->sta.station_flags = 0;
549
550 if (priv->phymode == MODE_IEEE80211A)
551 rate = IWL_RATE_6M_PLCP;
552 else
553 rate = IWL_RATE_1M_PLCP;
554
555 /* Turn on both antennas for the station... */
556 station->sta.rate_n_flags =
557 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
558 station->current_rate.rate_n_flags =
559 le16_to_cpu(station->sta.rate_n_flags);
560
561 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
562
563 /* Add station to device's station table */
564 iwl3945_send_add_station(priv, &station->sta, flags);
565 return index;
566
567 }
568
569 /*************** DRIVER STATUS FUNCTIONS *****/
570
571 static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
572 {
573 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
574 * set but EXIT_PENDING is not */
575 return test_bit(STATUS_READY, &priv->status) &&
576 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
577 !test_bit(STATUS_EXIT_PENDING, &priv->status);
578 }
579
580 static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
581 {
582 return test_bit(STATUS_ALIVE, &priv->status);
583 }
584
585 static inline int iwl3945_is_init(struct iwl3945_priv *priv)
586 {
587 return test_bit(STATUS_INIT, &priv->status);
588 }
589
590 static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
591 {
592 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
593 test_bit(STATUS_RF_KILL_SW, &priv->status);
594 }
595
596 static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
597 {
598
599 if (iwl3945_is_rfkill(priv))
600 return 0;
601
602 return iwl3945_is_ready(priv);
603 }
604
605 /*************** HOST COMMAND QUEUE FUNCTIONS *****/
606
607 #define IWL_CMD(x) case x : return #x
608
609 static const char *get_cmd_string(u8 cmd)
610 {
611 switch (cmd) {
612 IWL_CMD(REPLY_ALIVE);
613 IWL_CMD(REPLY_ERROR);
614 IWL_CMD(REPLY_RXON);
615 IWL_CMD(REPLY_RXON_ASSOC);
616 IWL_CMD(REPLY_QOS_PARAM);
617 IWL_CMD(REPLY_RXON_TIMING);
618 IWL_CMD(REPLY_ADD_STA);
619 IWL_CMD(REPLY_REMOVE_STA);
620 IWL_CMD(REPLY_REMOVE_ALL_STA);
621 IWL_CMD(REPLY_3945_RX);
622 IWL_CMD(REPLY_TX);
623 IWL_CMD(REPLY_RATE_SCALE);
624 IWL_CMD(REPLY_LEDS_CMD);
625 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
626 IWL_CMD(RADAR_NOTIFICATION);
627 IWL_CMD(REPLY_QUIET_CMD);
628 IWL_CMD(REPLY_CHANNEL_SWITCH);
629 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
630 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
631 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
632 IWL_CMD(POWER_TABLE_CMD);
633 IWL_CMD(PM_SLEEP_NOTIFICATION);
634 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
635 IWL_CMD(REPLY_SCAN_CMD);
636 IWL_CMD(REPLY_SCAN_ABORT_CMD);
637 IWL_CMD(SCAN_START_NOTIFICATION);
638 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
639 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
640 IWL_CMD(BEACON_NOTIFICATION);
641 IWL_CMD(REPLY_TX_BEACON);
642 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
643 IWL_CMD(QUIET_NOTIFICATION);
644 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
645 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
646 IWL_CMD(REPLY_BT_CONFIG);
647 IWL_CMD(REPLY_STATISTICS_CMD);
648 IWL_CMD(STATISTICS_NOTIFICATION);
649 IWL_CMD(REPLY_CARD_STATE_CMD);
650 IWL_CMD(CARD_STATE_NOTIFICATION);
651 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
652 default:
653 return "UNKNOWN";
654
655 }
656 }
657
658 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
659
660 /**
661 * iwl3945_enqueue_hcmd - enqueue a uCode command
662 * @priv: device private data point
663 * @cmd: a point to the ucode command structure
664 *
665 * The function returns < 0 values to indicate the operation is
666 * failed. On success, it turns the index (> 0) of command in the
667 * command queue.
668 */
669 static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
670 {
671 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
672 struct iwl3945_queue *q = &txq->q;
673 struct iwl3945_tfd_frame *tfd;
674 u32 *control_flags;
675 struct iwl3945_cmd *out_cmd;
676 u32 idx;
677 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
678 dma_addr_t phys_addr;
679 int pad;
680 u16 count;
681 int ret;
682 unsigned long flags;
683
684 /* If any of the command structures end up being larger than
685 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
686 * we will need to increase the size of the TFD entries */
687 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
688 !(cmd->meta.flags & CMD_SIZE_HUGE));
689
690 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
691 =======
692
693 if (iwl3945_is_rfkill(priv)) {
694 IWL_DEBUG_INFO("Not sending command - RF KILL");
695 return -EIO;
696 }
697
698 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
699 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
700 IWL_ERROR("No space for Tx\n");
701 return -ENOSPC;
702 }
703
704 spin_lock_irqsave(&priv->hcmd_lock, flags);
705
706 tfd = &txq->bd[q->write_ptr];
707 memset(tfd, 0, sizeof(*tfd));
708
709 control_flags = (u32 *) tfd;
710
711 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
712 out_cmd = &txq->cmd[idx];
713
714 out_cmd->hdr.cmd = cmd->id;
715 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
716 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
717
718 /* At this point, the out_cmd now has all of the incoming cmd
719 * information */
720
721 out_cmd->hdr.flags = 0;
722 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
723 INDEX_TO_SEQ(q->write_ptr));
724 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
725 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
726
727 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
728 offsetof(struct iwl3945_cmd, hdr);
729 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
730
731 pad = U32_PAD(cmd->len);
732 count = TFD_CTL_COUNT_GET(*control_flags);
733 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
734
735 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
736 "%d bytes at %d[%d]:%d\n",
737 get_cmd_string(out_cmd->hdr.cmd),
738 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
739 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
740
741 txq->need_update = 1;
742
743 /* Increment and update queue's write index */
744 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
745 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
746
747 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
748 return ret ? ret : idx;
749 }
750
751 static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
752 {
753 int ret;
754
755 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
756
757 /* An asynchronous command can not expect an SKB to be set. */
758 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
759
760 /* An asynchronous command MUST have a callback. */
761 BUG_ON(!cmd->meta.u.callback);
762
763 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
764 return -EBUSY;
765
766 ret = iwl3945_enqueue_hcmd(priv, cmd);
767 if (ret < 0) {
768 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
769 get_cmd_string(cmd->id), ret);
770 return ret;
771 }
772 return 0;
773 }
774
775 static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
776 {
777 int cmd_idx;
778 int ret;
779 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
780
781 BUG_ON(cmd->meta.flags & CMD_ASYNC);
782
783 /* A synchronous command can not have a callback set. */
784 BUG_ON(cmd->meta.u.callback != NULL);
785
786 if (atomic_xchg(&entry, 1)) {
787 IWL_ERROR("Error sending %s: Already sending a host command\n",
788 get_cmd_string(cmd->id));
789 return -EBUSY;
790 }
791
792 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
793
794 if (cmd->meta.flags & CMD_WANT_SKB)
795 cmd->meta.source = &cmd->meta;
796
797 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
798 if (cmd_idx < 0) {
799 ret = cmd_idx;
800 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
801 get_cmd_string(cmd->id), ret);
802 goto out;
803 }
804
805 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
806 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
807 HOST_COMPLETE_TIMEOUT);
808 if (!ret) {
809 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
810 IWL_ERROR("Error sending %s: time out after %dms.\n",
811 get_cmd_string(cmd->id),
812 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
813
814 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
815 ret = -ETIMEDOUT;
816 goto cancel;
817 }
818 }
819
820 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
821 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
822 get_cmd_string(cmd->id));
823 ret = -ECANCELED;
824 goto fail;
825 }
826 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
827 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
828 get_cmd_string(cmd->id));
829 ret = -EIO;
830 goto fail;
831 }
832 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
833 IWL_ERROR("Error: Response NULL in '%s'\n",
834 get_cmd_string(cmd->id));
835 ret = -EIO;
836 goto out;
837 }
838
839 ret = 0;
840 goto out;
841
842 cancel:
843 if (cmd->meta.flags & CMD_WANT_SKB) {
844 struct iwl3945_cmd *qcmd;
845
846 /* Cancel the CMD_WANT_SKB flag for the cmd in the
847 * TX cmd queue. Otherwise in case the cmd comes
848 * in later, it will possibly set an invalid
849 * address (cmd->meta.source). */
850 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
851 qcmd->meta.flags &= ~CMD_WANT_SKB;
852 }
853 fail:
854 if (cmd->meta.u.skb) {
855 dev_kfree_skb_any(cmd->meta.u.skb);
856 cmd->meta.u.skb = NULL;
857 }
858 out:
859 atomic_set(&entry, 0);
860 return ret;
861 }
862
863 int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
864 {
865 if (cmd->meta.flags & CMD_ASYNC)
866 return iwl3945_send_cmd_async(priv, cmd);
867
868 return iwl3945_send_cmd_sync(priv, cmd);
869 }
870
871 int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
872 {
873 struct iwl3945_host_cmd cmd = {
874 .id = id,
875 .len = len,
876 .data = data,
877 };
878
879 return iwl3945_send_cmd_sync(priv, &cmd);
880 }
881
882 static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
883 {
884 struct iwl3945_host_cmd cmd = {
885 .id = id,
886 .len = sizeof(val),
887 .data = &val,
888 };
889
890 return iwl3945_send_cmd_sync(priv, &cmd);
891 }
892
893 int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
894 {
895 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
896 }
897
898 /**
899 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
900 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
901 * @channel: Any channel valid for the requested phymode
902
903 * In addition to setting the staging RXON, priv->phymode is also set.
904 *
905 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
906 * in the staging RXON flag structure based on the phymode
907 */
908 static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
909 {
910 if (!iwl3945_get_channel_info(priv, phymode, channel)) {
911 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
912 channel, phymode);
913 return -EINVAL;
914 }
915
916 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
917 (priv->phymode == phymode))
918 return 0;
919
920 priv->staging_rxon.channel = cpu_to_le16(channel);
921 if (phymode == MODE_IEEE80211A)
922 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
923 else
924 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
925
926 priv->phymode = phymode;
927
928 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
929
930 return 0;
931 }
932
933 /**
934 * iwl3945_check_rxon_cmd - validate RXON structure is valid
935 *
936 * NOTE: This is really only useful during development and can eventually
937 * be #ifdef'd out once the driver is stable and folks aren't actively
938 * making changes
939 */
940 static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
941 {
942 int error = 0;
943 int counter = 1;
944
945 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
946 error |= le32_to_cpu(rxon->flags &
947 (RXON_FLG_TGJ_NARROW_BAND_MSK |
948 RXON_FLG_RADAR_DETECT_MSK));
949 if (error)
950 IWL_WARNING("check 24G fields %d | %d\n",
951 counter++, error);
952 } else {
953 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
954 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
955 if (error)
956 IWL_WARNING("check 52 fields %d | %d\n",
957 counter++, error);
958 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
959 if (error)
960 IWL_WARNING("check 52 CCK %d | %d\n",
961 counter++, error);
962 }
963 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
964 if (error)
965 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
966
967 /* make sure basic rates 6Mbps and 1Mbps are supported */
968 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
969 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
970 if (error)
971 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
972
973 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
974 if (error)
975 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
976
977 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
978 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
979 if (error)
980 IWL_WARNING("check CCK and short slot %d | %d\n",
981 counter++, error);
982
983 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
984 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
985 if (error)
986 IWL_WARNING("check CCK & auto detect %d | %d\n",
987 counter++, error);
988
989 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
990 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
991 if (error)
992 IWL_WARNING("check TGG and auto detect %d | %d\n",
993 counter++, error);
994
995 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
996 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
997 RXON_FLG_ANT_A_MSK)) == 0);
998 if (error)
999 IWL_WARNING("check antenna %d %d\n", counter++, error);
1000
1001 if (error)
1002 IWL_WARNING("Tuning to channel %d\n",
1003 le16_to_cpu(rxon->channel));
1004
1005 if (error) {
1006 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
1007 return -1;
1008 }
1009 return 0;
1010 }
1011
1012 /**
1013 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
1014 * @priv: staging_rxon is compared to active_rxon
1015 *
1016 * If the RXON structure is changing enough to require a new tune,
1017 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1018 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
1019 */
1020 static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
1021 {
1022
1023 /* These items are only settable from the full RXON command */
1024 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1025 compare_ether_addr(priv->staging_rxon.bssid_addr,
1026 priv->active_rxon.bssid_addr) ||
1027 compare_ether_addr(priv->staging_rxon.node_addr,
1028 priv->active_rxon.node_addr) ||
1029 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1030 priv->active_rxon.wlap_bssid_addr) ||
1031 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1032 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1033 (priv->staging_rxon.air_propagation !=
1034 priv->active_rxon.air_propagation) ||
1035 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1036 return 1;
1037
1038 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1039 * be updated with the RXON_ASSOC command -- however only some
1040 * flag transitions are allowed using RXON_ASSOC */
1041
1042 /* Check if we are not switching bands */
1043 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1044 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1045 return 1;
1046
1047 /* Check if we are switching association toggle */
1048 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1049 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1050 return 1;
1051
1052 return 0;
1053 }
1054
1055 static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1056 {
1057 int rc = 0;
1058 struct iwl3945_rx_packet *res = NULL;
1059 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1060 struct iwl3945_host_cmd cmd = {
1061 .id = REPLY_RXON_ASSOC,
1062 .len = sizeof(rxon_assoc),
1063 .meta.flags = CMD_WANT_SKB,
1064 .data = &rxon_assoc,
1065 };
1066 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1067 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1068
1069 if ((rxon1->flags == rxon2->flags) &&
1070 (rxon1->filter_flags == rxon2->filter_flags) &&
1071 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1072 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1073 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1074 return 0;
1075 }
1076
1077 rxon_assoc.flags = priv->staging_rxon.flags;
1078 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1079 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1080 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1081 rxon_assoc.reserved = 0;
1082
1083 rc = iwl3945_send_cmd_sync(priv, &cmd);
1084 if (rc)
1085 return rc;
1086
1087 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1088 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1089 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1090 rc = -EIO;
1091 }
1092
1093 priv->alloc_rxb_skb--;
1094 dev_kfree_skb_any(cmd.meta.u.skb);
1095
1096 return rc;
1097 }
1098
1099 /**
1100 * iwl3945_commit_rxon - commit staging_rxon to hardware
1101 *
1102 * The RXON command in staging_rxon is committed to the hardware and
1103 * the active_rxon structure is updated with the new data. This
1104 * function correctly transitions out of the RXON_ASSOC_MSK state if
1105 * a HW tune is required based on the RXON structure changes.
1106 */
1107 static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1108 {
1109 /* cast away the const for active_rxon in this function */
1110 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1111 int rc = 0;
1112 DECLARE_MAC_BUF(mac);
1113
1114 if (!iwl3945_is_alive(priv))
1115 return -1;
1116
1117 /* always get timestamp with Rx frame */
1118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1119
1120 /* select antenna */
1121 priv->staging_rxon.flags &=
1122 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1123 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1124
1125 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1126 if (rc) {
1127 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1128 return -EINVAL;
1129 }
1130
1131 /* If we don't need to send a full RXON, we can use
1132 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1133 * and other flags for the current radio configuration. */
1134 if (!iwl3945_full_rxon_required(priv)) {
1135 rc = iwl3945_send_rxon_assoc(priv);
1136 if (rc) {
1137 IWL_ERROR("Error setting RXON_ASSOC "
1138 "configuration (%d).\n", rc);
1139 return rc;
1140 }
1141
1142 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1143
1144 return 0;
1145 }
1146
1147 /* If we are currently associated and the new config requires
1148 * an RXON_ASSOC and the new config wants the associated mask enabled,
1149 * we must clear the associated from the active configuration
1150 * before we apply the new config */
1151 if (iwl3945_is_associated(priv) &&
1152 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1153 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1154 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1155
1156 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1157 sizeof(struct iwl3945_rxon_cmd),
1158 &priv->active_rxon);
1159
1160 /* If the mask clearing failed then we set
1161 * active_rxon back to what it was previously */
1162 if (rc) {
1163 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1164 IWL_ERROR("Error clearing ASSOC_MSK on current "
1165 "configuration (%d).\n", rc);
1166 return rc;
1167 }
1168 }
1169
1170 IWL_DEBUG_INFO("Sending RXON\n"
1171 "* with%s RXON_FILTER_ASSOC_MSK\n"
1172 "* channel = %d\n"
1173 "* bssid = %s\n",
1174 ((priv->staging_rxon.filter_flags &
1175 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1176 le16_to_cpu(priv->staging_rxon.channel),
1177 print_mac(mac, priv->staging_rxon.bssid_addr));
1178
1179 /* Apply the new configuration */
1180 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1181 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1182 if (rc) {
1183 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1184 return rc;
1185 }
1186
1187 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1188
1189 iwl3945_clear_stations_table(priv);
1190
1191 /* If we issue a new RXON command which required a tune then we must
1192 * send a new TXPOWER command or we won't be able to Tx any frames */
1193 rc = iwl3945_hw_reg_send_txpower(priv);
1194 if (rc) {
1195 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1196 return rc;
1197 }
1198
1199 /* Add the broadcast address so we can send broadcast frames */
1200 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1201 IWL_INVALID_STATION) {
1202 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1203 return -EIO;
1204 }
1205
1206 /* If we have set the ASSOC_MSK and we are in BSS mode then
1207 * add the IWL_AP_ID to the station rate table */
1208 if (iwl3945_is_associated(priv) &&
1209 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1210 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1211 == IWL_INVALID_STATION) {
1212 IWL_ERROR("Error adding AP address for transmit.\n");
1213 return -EIO;
1214 }
1215
1216 /* Init the hardware's rate fallback order based on the
1217 * phymode */
1218 rc = iwl3945_init_hw_rate_table(priv);
1219 if (rc) {
1220 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1221 return -EIO;
1222 }
1223
1224 return 0;
1225 }
1226
1227 static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1228 {
1229 struct iwl3945_bt_cmd bt_cmd = {
1230 .flags = 3,
1231 .lead_time = 0xAA,
1232 .max_kill = 1,
1233 .kill_ack_mask = 0,
1234 .kill_cts_mask = 0,
1235 };
1236
1237 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1238 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1239 }
1240
1241 static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1242 {
1243 int rc = 0;
1244 struct iwl3945_rx_packet *res;
1245 struct iwl3945_host_cmd cmd = {
1246 .id = REPLY_SCAN_ABORT_CMD,
1247 .meta.flags = CMD_WANT_SKB,
1248 };
1249
1250 /* If there isn't a scan actively going on in the hardware
1251 * then we are in between scan bands and not actually
1252 * actively scanning, so don't send the abort command */
1253 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1254 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1255 return 0;
1256 }
1257
1258 rc = iwl3945_send_cmd_sync(priv, &cmd);
1259 if (rc) {
1260 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1261 return rc;
1262 }
1263
1264 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1265 if (res->u.status != CAN_ABORT_STATUS) {
1266 /* The scan abort will return 1 for success or
1267 * 2 for "failure". A failure condition can be
1268 * due to simply not being in an active scan which
1269 * can occur if we send the scan abort before we
1270 * the microcode has notified us that a scan is
1271 * completed. */
1272 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1273 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1274 clear_bit(STATUS_SCAN_HW, &priv->status);
1275 }
1276
1277 dev_kfree_skb_any(cmd.meta.u.skb);
1278
1279 return rc;
1280 }
1281
1282 static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1283 struct iwl3945_cmd *cmd,
1284 struct sk_buff *skb)
1285 {
1286 return 1;
1287 }
1288
1289 /*
1290 * CARD_STATE_CMD
1291 *
1292 * Use: Sets the device's internal card state to enable, disable, or halt
1293 *
1294 * When in the 'enable' state the card operates as normal.
1295 * When in the 'disable' state, the card enters into a low power mode.
1296 * When in the 'halt' state, the card is shut down and must be fully
1297 * restarted to come back on.
1298 */
1299 static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1300 {
1301 struct iwl3945_host_cmd cmd = {
1302 .id = REPLY_CARD_STATE_CMD,
1303 .len = sizeof(u32),
1304 .data = &flags,
1305 .meta.flags = meta_flag,
1306 };
1307
1308 if (meta_flag & CMD_ASYNC)
1309 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1310
1311 return iwl3945_send_cmd(priv, &cmd);
1312 }
1313
1314 static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1315 struct iwl3945_cmd *cmd, struct sk_buff *skb)
1316 {
1317 struct iwl3945_rx_packet *res = NULL;
1318
1319 if (!skb) {
1320 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1321 return 1;
1322 }
1323
1324 res = (struct iwl3945_rx_packet *)skb->data;
1325 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1326 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1327 res->hdr.flags);
1328 return 1;
1329 }
1330
1331 switch (res->u.add_sta.status) {
1332 case ADD_STA_SUCCESS_MSK:
1333 break;
1334 default:
1335 break;
1336 }
1337
1338 /* We didn't cache the SKB; let the caller free it */
1339 return 1;
1340 }
1341
1342 int iwl3945_send_add_station(struct iwl3945_priv *priv,
1343 struct iwl3945_addsta_cmd *sta, u8 flags)
1344 {
1345 struct iwl3945_rx_packet *res = NULL;
1346 int rc = 0;
1347 struct iwl3945_host_cmd cmd = {
1348 .id = REPLY_ADD_STA,
1349 .len = sizeof(struct iwl3945_addsta_cmd),
1350 .meta.flags = flags,
1351 .data = sta,
1352 };
1353
1354 if (flags & CMD_ASYNC)
1355 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1356 else
1357 cmd.meta.flags |= CMD_WANT_SKB;
1358
1359 rc = iwl3945_send_cmd(priv, &cmd);
1360
1361 if (rc || (flags & CMD_ASYNC))
1362 return rc;
1363
1364 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1365 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1366 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1367 res->hdr.flags);
1368 rc = -EIO;
1369 }
1370
1371 if (rc == 0) {
1372 switch (res->u.add_sta.status) {
1373 case ADD_STA_SUCCESS_MSK:
1374 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1375 break;
1376 default:
1377 rc = -EIO;
1378 IWL_WARNING("REPLY_ADD_STA failed\n");
1379 break;
1380 }
1381 }
1382
1383 priv->alloc_rxb_skb--;
1384 dev_kfree_skb_any(cmd.meta.u.skb);
1385
1386 return rc;
1387 }
1388
1389 static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1390 struct ieee80211_key_conf *keyconf,
1391 u8 sta_id)
1392 {
1393 unsigned long flags;
1394 __le16 key_flags = 0;
1395
1396 switch (keyconf->alg) {
1397 case ALG_CCMP:
1398 key_flags |= STA_KEY_FLG_CCMP;
1399 key_flags |= cpu_to_le16(
1400 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1401 key_flags &= ~STA_KEY_FLG_INVALID;
1402 break;
1403 case ALG_TKIP:
1404 case ALG_WEP:
1405 default:
1406 return -EINVAL;
1407 }
1408 spin_lock_irqsave(&priv->sta_lock, flags);
1409 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1410 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1411 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1412 keyconf->keylen);
1413
1414 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1415 keyconf->keylen);
1416 priv->stations[sta_id].sta.key.key_flags = key_flags;
1417 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1418 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1419
1420 spin_unlock_irqrestore(&priv->sta_lock, flags);
1421
1422 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1423 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1424 return 0;
1425 }
1426
1427 static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1428 {
1429 unsigned long flags;
1430
1431 spin_lock_irqsave(&priv->sta_lock, flags);
1432 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1433 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1434 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1435 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1436 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1437 spin_unlock_irqrestore(&priv->sta_lock, flags);
1438
1439 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1440 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1441 return 0;
1442 }
1443
1444 static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1445 {
1446 struct list_head *element;
1447
1448 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1449 priv->frames_count);
1450
1451 while (!list_empty(&priv->free_frames)) {
1452 element = priv->free_frames.next;
1453 list_del(element);
1454 kfree(list_entry(element, struct iwl3945_frame, list));
1455 priv->frames_count--;
1456 }
1457
1458 if (priv->frames_count) {
1459 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1460 priv->frames_count);
1461 priv->frames_count = 0;
1462 }
1463 }
1464
1465 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1466 {
1467 struct iwl3945_frame *frame;
1468 struct list_head *element;
1469 if (list_empty(&priv->free_frames)) {
1470 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1471 if (!frame) {
1472 IWL_ERROR("Could not allocate frame!\n");
1473 return NULL;
1474 }
1475
1476 priv->frames_count++;
1477 return frame;
1478 }
1479
1480 element = priv->free_frames.next;
1481 list_del(element);
1482 return list_entry(element, struct iwl3945_frame, list);
1483 }
1484
1485 static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1486 {
1487 memset(frame, 0, sizeof(*frame));
1488 list_add(&frame->list, &priv->free_frames);
1489 }
1490
1491 unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1492 struct ieee80211_hdr *hdr,
1493 const u8 *dest, int left)
1494 {
1495
1496 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1497 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1498 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1499 return 0;
1500
1501 if (priv->ibss_beacon->len > left)
1502 return 0;
1503
1504 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1505
1506 return priv->ibss_beacon->len;
1507 }
1508
1509 static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1510 {
1511 u8 i;
1512
1513 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1514 i = iwl3945_rates[i].next_ieee) {
1515 if (rate_mask & (1 << i))
1516 return iwl3945_rates[i].plcp;
1517 }
1518
1519 return IWL_RATE_INVALID;
1520 }
1521
1522 static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1523 {
1524 struct iwl3945_frame *frame;
1525 unsigned int frame_size;
1526 int rc;
1527 u8 rate;
1528
1529 frame = iwl3945_get_free_frame(priv);
1530
1531 if (!frame) {
1532 IWL_ERROR("Could not obtain free frame buffer for beacon "
1533 "command.\n");
1534 return -ENOMEM;
1535 }
1536
1537 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1538 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1539 0xFF0);
1540 if (rate == IWL_INVALID_RATE)
1541 rate = IWL_RATE_6M_PLCP;
1542 } else {
1543 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1544 if (rate == IWL_INVALID_RATE)
1545 rate = IWL_RATE_1M_PLCP;
1546 }
1547
1548 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1549
1550 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1551 &frame->u.cmd[0]);
1552
1553 iwl3945_free_frame(priv, frame);
1554
1555 return rc;
1556 }
1557
1558 /******************************************************************************
1559 *
1560 * EEPROM related functions
1561 *
1562 ******************************************************************************/
1563
1564 static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1565 {
1566 memcpy(mac, priv->eeprom.mac_address, 6);
1567 }
1568
1569 /*
1570 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1571 * embedded controller) as EEPROM reader; each read is a series of pulses
1572 * to/from the EEPROM chip, not a single event, so even reads could conflict
1573 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1574 * simply claims ownership, which should be safe when this function is called
1575 * (i.e. before loading uCode!).
1576 */
1577 static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1578 {
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1580 return 0;
1581 }
1582
1583 /**
1584 * iwl3945_eeprom_init - read EEPROM contents
1585 *
1586 * Load the EEPROM contents from adapter into priv->eeprom
1587 *
1588 * NOTE: This routine uses the non-debug IO access functions.
1589 */
1590 int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1591 {
1592 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
1593 __le16 *e = (__le16 *)&priv->eeprom;
1594 =======
1595 u16 *e = (u16 *)&priv->eeprom;
1596 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
1597 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1598 u32 r;
1599 int sz = sizeof(priv->eeprom);
1600 int rc;
1601 int i;
1602 u16 addr;
1603
1604 /* The EEPROM structure has several padding buffers within it
1605 * and when adding new EEPROM maps is subject to programmer errors
1606 * which may be very difficult to identify without explicitly
1607 * checking the resulting size of the eeprom map. */
1608 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1609
1610 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1611 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1612 return -ENOENT;
1613 }
1614
1615 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
1616 rc = iwl3945_eeprom_acquire_semaphore(priv);
1617 if (rc < 0) {
1618 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1619 return -ENOENT;
1620 }
1621
1622 /* eeprom is an array of 16bit values */
1623 for (addr = 0; addr < sz; addr += sizeof(u16)) {
1624 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1625 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1626
1627 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1628 i += IWL_EEPROM_ACCESS_DELAY) {
1629 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1630 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1631 break;
1632 udelay(IWL_EEPROM_ACCESS_DELAY);
1633 }
1634
1635 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1636 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1637 return -ETIMEDOUT;
1638 }
1639 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
1640 e[addr / 2] = cpu_to_le16(r >> 16);
1641 =======
1642 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
1643 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
1644 }
1645
1646 return 0;
1647 }
1648
1649 /******************************************************************************
1650 *
1651 * Misc. internal state and helper functions
1652 *
1653 ******************************************************************************/
1654 #ifdef CONFIG_IWL3945_DEBUG
1655
1656 /**
1657 * iwl3945_report_frame - dump frame to syslog during debug sessions
1658 *
1659 * You may hack this function to show different aspects of received frames,
1660 * including selective frame dumps.
1661 * group100 parameter selects whether to show 1 out of 100 good frames.
1662 */
1663 void iwl3945_report_frame(struct iwl3945_priv *priv,
1664 struct iwl3945_rx_packet *pkt,
1665 struct ieee80211_hdr *header, int group100)
1666 {
1667 u32 to_us;
1668 u32 print_summary = 0;
1669 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1670 u32 hundred = 0;
1671 u32 dataframe = 0;
1672 u16 fc;
1673 u16 seq_ctl;
1674 u16 channel;
1675 u16 phy_flags;
1676 int rate_sym;
1677 u16 length;
1678 u16 status;
1679 u16 bcn_tmr;
1680 u32 tsf_low;
1681 u64 tsf;
1682 u8 rssi;
1683 u8 agc;
1684 u16 sig_avg;
1685 u16 noise_diff;
1686 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1687 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1688 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1689 u8 *data = IWL_RX_DATA(pkt);
1690
1691 /* MAC header */
1692 fc = le16_to_cpu(header->frame_control);
1693 seq_ctl = le16_to_cpu(header->seq_ctrl);
1694
1695 /* metadata */
1696 channel = le16_to_cpu(rx_hdr->channel);
1697 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1698 rate_sym = rx_hdr->rate;
1699 length = le16_to_cpu(rx_hdr->len);
1700
1701 /* end-of-frame status and timestamp */
1702 status = le32_to_cpu(rx_end->status);
1703 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1704 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1705 tsf = le64_to_cpu(rx_end->timestamp);
1706
1707 /* signal statistics */
1708 rssi = rx_stats->rssi;
1709 agc = rx_stats->agc;
1710 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1711 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1712
1713 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1714
1715 /* if data frame is to us and all is good,
1716 * (optionally) print summary for only 1 out of every 100 */
1717 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1718 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1719 dataframe = 1;
1720 if (!group100)
1721 print_summary = 1; /* print each frame */
1722 else if (priv->framecnt_to_us < 100) {
1723 priv->framecnt_to_us++;
1724 print_summary = 0;
1725 } else {
1726 priv->framecnt_to_us = 0;
1727 print_summary = 1;
1728 hundred = 1;
1729 }
1730 } else {
1731 /* print summary for all other frames */
1732 print_summary = 1;
1733 }
1734
1735 if (print_summary) {
1736 char *title;
1737 u32 rate;
1738
1739 if (hundred)
1740 title = "100Frames";
1741 else if (fc & IEEE80211_FCTL_RETRY)
1742 title = "Retry";
1743 else if (ieee80211_is_assoc_response(fc))
1744 title = "AscRsp";
1745 else if (ieee80211_is_reassoc_response(fc))
1746 title = "RasRsp";
1747 else if (ieee80211_is_probe_response(fc)) {
1748 title = "PrbRsp";
1749 print_dump = 1; /* dump frame contents */
1750 } else if (ieee80211_is_beacon(fc)) {
1751 title = "Beacon";
1752 print_dump = 1; /* dump frame contents */
1753 } else if (ieee80211_is_atim(fc))
1754 title = "ATIM";
1755 else if (ieee80211_is_auth(fc))
1756 title = "Auth";
1757 else if (ieee80211_is_deauth(fc))
1758 title = "DeAuth";
1759 else if (ieee80211_is_disassoc(fc))
1760 title = "DisAssoc";
1761 else
1762 title = "Frame";
1763
1764 rate = iwl3945_rate_index_from_plcp(rate_sym);
1765 if (rate == -1)
1766 rate = 0;
1767 else
1768 rate = iwl3945_rates[rate].ieee / 2;
1769
1770 /* print frame summary.
1771 * MAC addresses show just the last byte (for brevity),
1772 * but you can hack it to show more, if you'd like to. */
1773 if (dataframe)
1774 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1775 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1776 title, fc, header->addr1[5],
1777 length, rssi, channel, rate);
1778 else {
1779 /* src/dst addresses assume managed mode */
1780 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1781 "src=0x%02x, rssi=%u, tim=%lu usec, "
1782 "phy=0x%02x, chnl=%d\n",
1783 title, fc, header->addr1[5],
1784 header->addr3[5], rssi,
1785 tsf_low - priv->scan_start_tsf,
1786 phy_flags, channel);
1787 }
1788 }
1789 if (print_dump)
1790 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1791 }
1792 #endif
1793
1794 static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1795 {
1796 if (priv->hw_setting.shared_virt)
1797 pci_free_consistent(priv->pci_dev,
1798 sizeof(struct iwl3945_shared),
1799 priv->hw_setting.shared_virt,
1800 priv->hw_setting.shared_phys);
1801 }
1802
1803 /**
1804 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1805 *
1806 * return : set the bit for each supported rate insert in ie
1807 */
1808 static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1809 u16 basic_rate, int *left)
1810 {
1811 u16 ret_rates = 0, bit;
1812 int i;
1813 u8 *cnt = ie;
1814 u8 *rates = ie + 1;
1815
1816 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1817 if (bit & supported_rate) {
1818 ret_rates |= bit;
1819 rates[*cnt] = iwl3945_rates[i].ieee |
1820 ((bit & basic_rate) ? 0x80 : 0x00);
1821 (*cnt)++;
1822 (*left)--;
1823 if ((*left <= 0) ||
1824 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1825 break;
1826 }
1827 }
1828
1829 return ret_rates;
1830 }
1831
1832 /**
1833 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1834 */
1835 static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1836 struct ieee80211_mgmt *frame,
1837 int left, int is_direct)
1838 {
1839 int len = 0;
1840 u8 *pos = NULL;
1841 u16 active_rates, ret_rates, cck_rates;
1842
1843 /* Make sure there is enough space for the probe request,
1844 * two mandatory IEs and the data */
1845 left -= 24;
1846 if (left < 0)
1847 return 0;
1848 len += 24;
1849
1850 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1851 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1852 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1853 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1854 frame->seq_ctrl = 0;
1855
1856 /* fill in our indirect SSID IE */
1857 /* ...next IE... */
1858
1859 left -= 2;
1860 if (left < 0)
1861 return 0;
1862 len += 2;
1863 pos = &(frame->u.probe_req.variable[0]);
1864 *pos++ = WLAN_EID_SSID;
1865 *pos++ = 0;
1866
1867 /* fill in our direct SSID IE... */
1868 if (is_direct) {
1869 /* ...next IE... */
1870 left -= 2 + priv->essid_len;
1871 if (left < 0)
1872 return 0;
1873 /* ... fill it in... */
1874 *pos++ = WLAN_EID_SSID;
1875 *pos++ = priv->essid_len;
1876 memcpy(pos, priv->essid, priv->essid_len);
1877 pos += priv->essid_len;
1878 len += 2 + priv->essid_len;
1879 }
1880
1881 /* fill in supported rate */
1882 /* ...next IE... */
1883 left -= 2;
1884 if (left < 0)
1885 return 0;
1886
1887 /* ... fill it in... */
1888 *pos++ = WLAN_EID_SUPP_RATES;
1889 *pos = 0;
1890
1891 priv->active_rate = priv->rates_mask;
1892 active_rates = priv->active_rate;
1893 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1894
1895 cck_rates = IWL_CCK_RATES_MASK & active_rates;
1896 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1897 priv->active_rate_basic, &left);
1898 active_rates &= ~ret_rates;
1899
1900 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1901 priv->active_rate_basic, &left);
1902 active_rates &= ~ret_rates;
1903
1904 len += 2 + *pos;
1905 pos += (*pos) + 1;
1906 if (active_rates == 0)
1907 goto fill_end;
1908
1909 /* fill in supported extended rate */
1910 /* ...next IE... */
1911 left -= 2;
1912 if (left < 0)
1913 return 0;
1914 /* ... fill it in... */
1915 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1916 *pos = 0;
1917 iwl3945_supported_rate_to_ie(pos, active_rates,
1918 priv->active_rate_basic, &left);
1919 if (*pos > 0)
1920 len += 2 + *pos;
1921
1922 fill_end:
1923 return (u16)len;
1924 }
1925
1926 /*
1927 * QoS support
1928 */
1929 #ifdef CONFIG_IWL3945_QOS
1930 static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1931 struct iwl3945_qosparam_cmd *qos)
1932 {
1933
1934 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1935 sizeof(struct iwl3945_qosparam_cmd), qos);
1936 }
1937
1938 static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1939 {
1940 u16 cw_min = 15;
1941 u16 cw_max = 1023;
1942 u8 aifs = 2;
1943 u8 is_legacy = 0;
1944 unsigned long flags;
1945 int i;
1946
1947 spin_lock_irqsave(&priv->lock, flags);
1948 priv->qos_data.qos_active = 0;
1949
1950 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1951 if (priv->qos_data.qos_enable)
1952 priv->qos_data.qos_active = 1;
1953 if (!(priv->active_rate & 0xfff0)) {
1954 cw_min = 31;
1955 is_legacy = 1;
1956 }
1957 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1958 if (priv->qos_data.qos_enable)
1959 priv->qos_data.qos_active = 1;
1960 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1961 cw_min = 31;
1962 is_legacy = 1;
1963 }
1964
1965 if (priv->qos_data.qos_active)
1966 aifs = 3;
1967
1968 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1969 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1970 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1971 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1972 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1973
1974 if (priv->qos_data.qos_active) {
1975 i = 1;
1976 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1977 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1978 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1979 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1980 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1981
1982 i = 2;
1983 priv->qos_data.def_qos_parm.ac[i].cw_min =
1984 cpu_to_le16((cw_min + 1) / 2 - 1);
1985 priv->qos_data.def_qos_parm.ac[i].cw_max =
1986 cpu_to_le16(cw_max);
1987 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1988 if (is_legacy)
1989 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1990 cpu_to_le16(6016);
1991 else
1992 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1993 cpu_to_le16(3008);
1994 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1995
1996 i = 3;
1997 priv->qos_data.def_qos_parm.ac[i].cw_min =
1998 cpu_to_le16((cw_min + 1) / 4 - 1);
1999 priv->qos_data.def_qos_parm.ac[i].cw_max =
2000 cpu_to_le16((cw_max + 1) / 2 - 1);
2001 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2002 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2003 if (is_legacy)
2004 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2005 cpu_to_le16(3264);
2006 else
2007 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2008 cpu_to_le16(1504);
2009 } else {
2010 for (i = 1; i < 4; i++) {
2011 priv->qos_data.def_qos_parm.ac[i].cw_min =
2012 cpu_to_le16(cw_min);
2013 priv->qos_data.def_qos_parm.ac[i].cw_max =
2014 cpu_to_le16(cw_max);
2015 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2016 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2017 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2018 }
2019 }
2020 IWL_DEBUG_QOS("set QoS to default \n");
2021
2022 spin_unlock_irqrestore(&priv->lock, flags);
2023 }
2024
2025 static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
2026 {
2027 unsigned long flags;
2028
2029 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2030 return;
2031
2032 if (!priv->qos_data.qos_enable)
2033 return;
2034
2035 spin_lock_irqsave(&priv->lock, flags);
2036 priv->qos_data.def_qos_parm.qos_flags = 0;
2037
2038 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2039 !priv->qos_data.qos_cap.q_AP.txop_request)
2040 priv->qos_data.def_qos_parm.qos_flags |=
2041 QOS_PARAM_FLG_TXOP_TYPE_MSK;
2042
2043 if (priv->qos_data.qos_active)
2044 priv->qos_data.def_qos_parm.qos_flags |=
2045 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2046
2047 spin_unlock_irqrestore(&priv->lock, flags);
2048
2049 if (force || iwl3945_is_associated(priv)) {
2050 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
2051 priv->qos_data.qos_active);
2052
2053 iwl3945_send_qos_params_command(priv,
2054 &(priv->qos_data.def_qos_parm));
2055 }
2056 }
2057
2058 #endif /* CONFIG_IWL3945_QOS */
2059 /*
2060 * Power management (not Tx power!) functions
2061 */
2062 #define MSEC_TO_USEC 1024
2063
2064 #define NOSLP __constant_cpu_to_le32(0)
2065 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
2066 #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2067 #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2068 __constant_cpu_to_le32(X1), \
2069 __constant_cpu_to_le32(X2), \
2070 __constant_cpu_to_le32(X3), \
2071 __constant_cpu_to_le32(X4)}
2072
2073
2074 /* default power management (not Tx power) table values */
2075 /* for tim 0-10 */
2076 static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2077 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2078 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2079 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2080 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2081 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2082 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2083 };
2084
2085 /* for tim > 10 */
2086 static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2087 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2088 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2089 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2090 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2091 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2092 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2093 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2094 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2095 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2096 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2097 };
2098
2099 int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2100 {
2101 int rc = 0, i;
2102 struct iwl3945_power_mgr *pow_data;
2103 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2104 u16 pci_pm;
2105
2106 IWL_DEBUG_POWER("Initialize power \n");
2107
2108 pow_data = &(priv->power_data);
2109
2110 memset(pow_data, 0, sizeof(*pow_data));
2111
2112 pow_data->active_index = IWL_POWER_RANGE_0;
2113 pow_data->dtim_val = 0xffff;
2114
2115 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2116 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2117
2118 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2119 if (rc != 0)
2120 return 0;
2121 else {
2122 struct iwl3945_powertable_cmd *cmd;
2123
2124 IWL_DEBUG_POWER("adjust power command flags\n");
2125
2126 for (i = 0; i < IWL_POWER_AC; i++) {
2127 cmd = &pow_data->pwr_range_0[i].cmd;
2128
2129 if (pci_pm & 0x1)
2130 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2131 else
2132 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2133 }
2134 }
2135 return rc;
2136 }
2137
2138 static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
2139 struct iwl3945_powertable_cmd *cmd, u32 mode)
2140 {
2141 int rc = 0, i;
2142 u8 skip;
2143 u32 max_sleep = 0;
2144 struct iwl3945_power_vec_entry *range;
2145 u8 period = 0;
2146 struct iwl3945_power_mgr *pow_data;
2147
2148 if (mode > IWL_POWER_INDEX_5) {
2149 IWL_DEBUG_POWER("Error invalid power mode \n");
2150 return -1;
2151 }
2152 pow_data = &(priv->power_data);
2153
2154 if (pow_data->active_index == IWL_POWER_RANGE_0)
2155 range = &pow_data->pwr_range_0[0];
2156 else
2157 range = &pow_data->pwr_range_1[1];
2158
2159 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2160
2161 #ifdef IWL_MAC80211_DISABLE
2162 if (priv->assoc_network != NULL) {
2163 unsigned long flags;
2164
2165 period = priv->assoc_network->tim.tim_period;
2166 }
2167 #endif /*IWL_MAC80211_DISABLE */
2168 skip = range[mode].no_dtim;
2169
2170 if (period == 0) {
2171 period = 1;
2172 skip = 0;
2173 }
2174
2175 if (skip == 0) {
2176 max_sleep = period;
2177 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2178 } else {
2179 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2180 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2181 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2182 }
2183
2184 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2185 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2186 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2187 }
2188
2189 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2190 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2191 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2192 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2193 le32_to_cpu(cmd->sleep_interval[0]),
2194 le32_to_cpu(cmd->sleep_interval[1]),
2195 le32_to_cpu(cmd->sleep_interval[2]),
2196 le32_to_cpu(cmd->sleep_interval[3]),
2197 le32_to_cpu(cmd->sleep_interval[4]));
2198
2199 return rc;
2200 }
2201
2202 static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2203 {
2204 u32 uninitialized_var(final_mode);
2205 int rc;
2206 struct iwl3945_powertable_cmd cmd;
2207
2208 /* If on battery, set to 3,
2209 * if plugged into AC power, set to CAM ("continuously aware mode"),
2210 * else user level */
2211 switch (mode) {
2212 case IWL_POWER_BATTERY:
2213 final_mode = IWL_POWER_INDEX_3;
2214 break;
2215 case IWL_POWER_AC:
2216 final_mode = IWL_POWER_MODE_CAM;
2217 break;
2218 default:
2219 final_mode = mode;
2220 break;
2221 }
2222
2223 iwl3945_update_power_cmd(priv, &cmd, final_mode);
2224
2225 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2226
2227 if (final_mode == IWL_POWER_MODE_CAM)
2228 clear_bit(STATUS_POWER_PMI, &priv->status);
2229 else
2230 set_bit(STATUS_POWER_PMI, &priv->status);
2231
2232 return rc;
2233 }
2234
2235 int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2236 {
2237 /* Filter incoming packets to determine if they are targeted toward
2238 * this network, discarding packets coming from ourselves */
2239 switch (priv->iw_mode) {
2240 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2241 /* packets from our adapter are dropped (echo) */
2242 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2243 return 0;
2244 /* {broad,multi}cast packets to our IBSS go through */
2245 if (is_multicast_ether_addr(header->addr1))
2246 return !compare_ether_addr(header->addr3, priv->bssid);
2247 /* packets to our adapter go through */
2248 return !compare_ether_addr(header->addr1, priv->mac_addr);
2249 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2250 /* packets from our adapter are dropped (echo) */
2251 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2252 return 0;
2253 /* {broad,multi}cast packets to our BSS go through */
2254 if (is_multicast_ether_addr(header->addr1))
2255 return !compare_ether_addr(header->addr2, priv->bssid);
2256 /* packets to our adapter go through */
2257 return !compare_ether_addr(header->addr1, priv->mac_addr);
2258 }
2259
2260 return 1;
2261 }
2262
2263 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2264
2265 static const char *iwl3945_get_tx_fail_reason(u32 status)
2266 {
2267 switch (status & TX_STATUS_MSK) {
2268 case TX_STATUS_SUCCESS:
2269 return "SUCCESS";
2270 TX_STATUS_ENTRY(SHORT_LIMIT);
2271 TX_STATUS_ENTRY(LONG_LIMIT);
2272 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2273 TX_STATUS_ENTRY(MGMNT_ABORT);
2274 TX_STATUS_ENTRY(NEXT_FRAG);
2275 TX_STATUS_ENTRY(LIFE_EXPIRE);
2276 TX_STATUS_ENTRY(DEST_PS);
2277 TX_STATUS_ENTRY(ABORTED);
2278 TX_STATUS_ENTRY(BT_RETRY);
2279 TX_STATUS_ENTRY(STA_INVALID);
2280 TX_STATUS_ENTRY(FRAG_DROPPED);
2281 TX_STATUS_ENTRY(TID_DISABLE);
2282 TX_STATUS_ENTRY(FRAME_FLUSHED);
2283 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2284 TX_STATUS_ENTRY(TX_LOCKED);
2285 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2286 }
2287
2288 return "UNKNOWN";
2289 }
2290
2291 /**
2292 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2293 *
2294 * NOTE: priv->mutex is not required before calling this function
2295 */
2296 static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2297 {
2298 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2299 clear_bit(STATUS_SCANNING, &priv->status);
2300 return 0;
2301 }
2302
2303 if (test_bit(STATUS_SCANNING, &priv->status)) {
2304 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2305 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2306 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2307 queue_work(priv->workqueue, &priv->abort_scan);
2308
2309 } else
2310 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2311
2312 return test_bit(STATUS_SCANNING, &priv->status);
2313 }
2314
2315 return 0;
2316 }
2317
2318 /**
2319 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2320 * @ms: amount of time to wait (in milliseconds) for scan to abort
2321 *
2322 * NOTE: priv->mutex must be held before calling this function
2323 */
2324 static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2325 {
2326 unsigned long now = jiffies;
2327 int ret;
2328
2329 ret = iwl3945_scan_cancel(priv);
2330 if (ret && ms) {
2331 mutex_unlock(&priv->mutex);
2332 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2333 test_bit(STATUS_SCANNING, &priv->status))
2334 msleep(1);
2335 mutex_lock(&priv->mutex);
2336
2337 return test_bit(STATUS_SCANNING, &priv->status);
2338 }
2339
2340 return ret;
2341 }
2342
2343 static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2344 {
2345 /* Reset ieee stats */
2346
2347 /* We don't reset the net_device_stats (ieee->stats) on
2348 * re-association */
2349
2350 priv->last_seq_num = -1;
2351 priv->last_frag_num = -1;
2352 priv->last_packet_time = 0;
2353
2354 iwl3945_scan_cancel(priv);
2355 }
2356
2357 #define MAX_UCODE_BEACON_INTERVAL 1024
2358 #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2359
2360 static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2361 {
2362 u16 new_val = 0;
2363 u16 beacon_factor = 0;
2364
2365 beacon_factor =
2366 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2367 / MAX_UCODE_BEACON_INTERVAL;
2368 new_val = beacon_val / beacon_factor;
2369
2370 return cpu_to_le16(new_val);
2371 }
2372
2373 static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2374 {
2375 u64 interval_tm_unit;
2376 u64 tsf, result;
2377 unsigned long flags;
2378 struct ieee80211_conf *conf = NULL;
2379 u16 beacon_int = 0;
2380
2381 conf = ieee80211_get_hw_conf(priv->hw);
2382
2383 spin_lock_irqsave(&priv->lock, flags);
2384 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2385 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2386
2387 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2388
2389 tsf = priv->timestamp1;
2390 tsf = ((tsf << 32) | priv->timestamp0);
2391
2392 beacon_int = priv->beacon_int;
2393 spin_unlock_irqrestore(&priv->lock, flags);
2394
2395 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2396 if (beacon_int == 0) {
2397 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2398 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2399 } else {
2400 priv->rxon_timing.beacon_interval =
2401 cpu_to_le16(beacon_int);
2402 priv->rxon_timing.beacon_interval =
2403 iwl3945_adjust_beacon_interval(
2404 le16_to_cpu(priv->rxon_timing.beacon_interval));
2405 }
2406
2407 priv->rxon_timing.atim_window = 0;
2408 } else {
2409 priv->rxon_timing.beacon_interval =
2410 iwl3945_adjust_beacon_interval(conf->beacon_int);
2411 /* TODO: we need to get atim_window from upper stack
2412 * for now we set to 0 */
2413 priv->rxon_timing.atim_window = 0;
2414 }
2415
2416 interval_tm_unit =
2417 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2418 result = do_div(tsf, interval_tm_unit);
2419 priv->rxon_timing.beacon_init_val =
2420 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2421
2422 IWL_DEBUG_ASSOC
2423 ("beacon interval %d beacon timer %d beacon tim %d\n",
2424 le16_to_cpu(priv->rxon_timing.beacon_interval),
2425 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2426 le16_to_cpu(priv->rxon_timing.atim_window));
2427 }
2428
2429 static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2430 {
2431 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2432 IWL_ERROR("APs don't scan.\n");
2433 return 0;
2434 }
2435
2436 if (!iwl3945_is_ready_rf(priv)) {
2437 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2438 return -EIO;
2439 }
2440
2441 if (test_bit(STATUS_SCANNING, &priv->status)) {
2442 IWL_DEBUG_SCAN("Scan already in progress.\n");
2443 return -EAGAIN;
2444 }
2445
2446 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2447 IWL_DEBUG_SCAN("Scan request while abort pending. "
2448 "Queuing.\n");
2449 return -EAGAIN;
2450 }
2451
2452 IWL_DEBUG_INFO("Starting scan...\n");
2453 priv->scan_bands = 2;
2454 set_bit(STATUS_SCANNING, &priv->status);
2455 priv->scan_start = jiffies;
2456 priv->scan_pass_start = priv->scan_start;
2457
2458 queue_work(priv->workqueue, &priv->request_scan);
2459
2460 return 0;
2461 }
2462
2463 static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2464 {
2465 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2466
2467 if (hw_decrypt)
2468 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2469 else
2470 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2471
2472 return 0;
2473 }
2474
2475 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
2476 {
2477 if (phymode == MODE_IEEE80211A) {
2478 priv->staging_rxon.flags &=
2479 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2480 | RXON_FLG_CCK_MSK);
2481 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2482 } else {
2483 /* Copied from iwl3945_bg_post_associate() */
2484 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2485 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2486 else
2487 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2488
2489 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2490 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2491
2492 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2493 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2494 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2495 }
2496 }
2497
2498 /*
2499 * initialize rxon structure with default values from eeprom
2500 */
2501 static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2502 {
2503 const struct iwl3945_channel_info *ch_info;
2504
2505 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2506
2507 switch (priv->iw_mode) {
2508 case IEEE80211_IF_TYPE_AP:
2509 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2510 break;
2511
2512 case IEEE80211_IF_TYPE_STA:
2513 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2514 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2515 break;
2516
2517 case IEEE80211_IF_TYPE_IBSS:
2518 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2519 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2520 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2521 RXON_FILTER_ACCEPT_GRP_MSK;
2522 break;
2523
2524 case IEEE80211_IF_TYPE_MNTR:
2525 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2526 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2527 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2528 break;
2529 }
2530
2531 #if 0
2532 /* TODO: Figure out when short_preamble would be set and cache from
2533 * that */
2534 if (!hw_to_local(priv->hw)->short_preamble)
2535 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2536 else
2537 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2538 #endif
2539
2540 ch_info = iwl3945_get_channel_info(priv, priv->phymode,
2541 le16_to_cpu(priv->staging_rxon.channel));
2542
2543 if (!ch_info)
2544 ch_info = &priv->channel_info[0];
2545
2546 /*
2547 * in some case A channels are all non IBSS
2548 * in this case force B/G channel
2549 */
2550 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2551 !(is_channel_ibss(ch_info)))
2552 ch_info = &priv->channel_info[0];
2553
2554 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2555 if (is_channel_a_band(ch_info))
2556 priv->phymode = MODE_IEEE80211A;
2557 else
2558 priv->phymode = MODE_IEEE80211G;
2559
2560 iwl3945_set_flags_for_phymode(priv, priv->phymode);
2561
2562 priv->staging_rxon.ofdm_basic_rates =
2563 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2564 priv->staging_rxon.cck_basic_rates =
2565 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2566 }
2567
2568 static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2569 {
2570 if (mode == IEEE80211_IF_TYPE_IBSS) {
2571 const struct iwl3945_channel_info *ch_info;
2572
2573 ch_info = iwl3945_get_channel_info(priv,
2574 priv->phymode,
2575 le16_to_cpu(priv->staging_rxon.channel));
2576
2577 if (!ch_info || !is_channel_ibss(ch_info)) {
2578 IWL_ERROR("channel %d not IBSS channel\n",
2579 le16_to_cpu(priv->staging_rxon.channel));
2580 return -EINVAL;
2581 }
2582 }
2583
2584 priv->iw_mode = mode;
2585
2586 iwl3945_connection_init_rx_config(priv);
2587 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2588
2589 iwl3945_clear_stations_table(priv);
2590
2591 /* dont commit rxon if rf-kill is on*/
2592 if (!iwl3945_is_ready_rf(priv))
2593 return -EAGAIN;
2594
2595 cancel_delayed_work(&priv->scan_check);
2596 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2597 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2598 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2599 return -EAGAIN;
2600 }
2601
2602 iwl3945_commit_rxon(priv);
2603
2604 return 0;
2605 }
2606
2607 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2608 struct ieee80211_tx_control *ctl,
2609 struct iwl3945_cmd *cmd,
2610 struct sk_buff *skb_frag,
2611 int last_frag)
2612 {
2613 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2614
2615 switch (keyinfo->alg) {
2616 case ALG_CCMP:
2617 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2618 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2619 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2620 break;
2621
2622 case ALG_TKIP:
2623 #if 0
2624 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2625
2626 if (last_frag)
2627 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2628 8);
2629 else
2630 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2631 #endif
2632 break;
2633
2634 case ALG_WEP:
2635 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2636 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2637
2638 if (keyinfo->keylen == 13)
2639 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2640
2641 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2642
2643 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2644 "with key %d\n", ctl->key_idx);
2645 break;
2646
2647 default:
2648 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2649 break;
2650 }
2651 }
2652
2653 /*
2654 * handle build REPLY_TX command notification.
2655 */
2656 static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2657 struct iwl3945_cmd *cmd,
2658 struct ieee80211_tx_control *ctrl,
2659 struct ieee80211_hdr *hdr,
2660 int is_unicast, u8 std_id)
2661 {
2662 __le16 *qc;
2663 u16 fc = le16_to_cpu(hdr->frame_control);
2664 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2665
2666 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2667 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2668 tx_flags |= TX_CMD_FLG_ACK_MSK;
2669 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2670 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2671 if (ieee80211_is_probe_response(fc) &&
2672 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2673 tx_flags |= TX_CMD_FLG_TSF_MSK;
2674 } else {
2675 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2676 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2677 }
2678
2679 cmd->cmd.tx.sta_id = std_id;
2680 if (ieee80211_get_morefrag(hdr))
2681 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2682
2683 qc = ieee80211_get_qos_ctrl(hdr);
2684 if (qc) {
2685 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2686 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2687 } else
2688 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2689
2690 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2691 tx_flags |= TX_CMD_FLG_RTS_MSK;
2692 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2693 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2694 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2695 tx_flags |= TX_CMD_FLG_CTS_MSK;
2696 }
2697
2698 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2699 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2700
2701 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2702 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2703 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2704 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2705 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2706 else
2707 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2708 } else
2709 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2710
2711 cmd->cmd.tx.driver_txop = 0;
2712 cmd->cmd.tx.tx_flags = tx_flags;
2713 cmd->cmd.tx.next_frame_len = 0;
2714 }
2715
2716 /**
2717 * iwl3945_get_sta_id - Find station's index within station table
2718 */
2719 static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2720 {
2721 int sta_id;
2722 u16 fc = le16_to_cpu(hdr->frame_control);
2723
2724 /* If this frame is broadcast or management, use broadcast station id */
2725 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2726 is_multicast_ether_addr(hdr->addr1))
2727 return priv->hw_setting.bcast_sta_id;
2728
2729 switch (priv->iw_mode) {
2730
2731 /* If we are a client station in a BSS network, use the special
2732 * AP station entry (that's the only station we communicate with) */
2733 case IEEE80211_IF_TYPE_STA:
2734 return IWL_AP_ID;
2735
2736 /* If we are an AP, then find the station, or use BCAST */
2737 case IEEE80211_IF_TYPE_AP:
2738 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2739 if (sta_id != IWL_INVALID_STATION)
2740 return sta_id;
2741 return priv->hw_setting.bcast_sta_id;
2742
2743 /* If this frame is going out to an IBSS network, find the station,
2744 * or create a new station table entry */
2745 case IEEE80211_IF_TYPE_IBSS: {
2746 DECLARE_MAC_BUF(mac);
2747
2748 /* Create new station table entry */
2749 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2750 if (sta_id != IWL_INVALID_STATION)
2751 return sta_id;
2752
2753 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2754
2755 if (sta_id != IWL_INVALID_STATION)
2756 return sta_id;
2757
2758 IWL_DEBUG_DROP("Station %s not in station map. "
2759 "Defaulting to broadcast...\n",
2760 print_mac(mac, hdr->addr1));
2761 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2762 return priv->hw_setting.bcast_sta_id;
2763 }
2764 default:
2765 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2766 return priv->hw_setting.bcast_sta_id;
2767 }
2768 }
2769
2770 /*
2771 * start REPLY_TX command process
2772 */
2773 static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2774 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2775 {
2776 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2777 struct iwl3945_tfd_frame *tfd;
2778 u32 *control_flags;
2779 int txq_id = ctl->queue;
2780 struct iwl3945_tx_queue *txq = NULL;
2781 struct iwl3945_queue *q = NULL;
2782 dma_addr_t phys_addr;
2783 dma_addr_t txcmd_phys;
2784 struct iwl3945_cmd *out_cmd = NULL;
2785 u16 len, idx, len_org;
2786 u8 id, hdr_len, unicast;
2787 u8 sta_id;
2788 u16 seq_number = 0;
2789 u16 fc;
2790 __le16 *qc;
2791 u8 wait_write_ptr = 0;
2792 unsigned long flags;
2793 int rc;
2794
2795 spin_lock_irqsave(&priv->lock, flags);
2796 if (iwl3945_is_rfkill(priv)) {
2797 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2798 goto drop_unlock;
2799 }
2800
2801 if (!priv->vif) {
2802 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
2803 goto drop_unlock;
2804 }
2805
2806 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2807 IWL_ERROR("ERROR: No TX rate available.\n");
2808 goto drop_unlock;
2809 }
2810
2811 unicast = !is_multicast_ether_addr(hdr->addr1);
2812 id = 0;
2813
2814 fc = le16_to_cpu(hdr->frame_control);
2815
2816 #ifdef CONFIG_IWL3945_DEBUG
2817 if (ieee80211_is_auth(fc))
2818 IWL_DEBUG_TX("Sending AUTH frame\n");
2819 else if (ieee80211_is_assoc_request(fc))
2820 IWL_DEBUG_TX("Sending ASSOC frame\n");
2821 else if (ieee80211_is_reassoc_request(fc))
2822 IWL_DEBUG_TX("Sending REASSOC frame\n");
2823 #endif
2824
2825 /* drop all data frame if we are not associated */
2826 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
2827 if ((!iwl3945_is_associated(priv) || !priv->assoc_id) &&
2828 =======
2829 if ((!iwl3945_is_associated(priv) ||
2830 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
2831 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
2832 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2833 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2834 goto drop_unlock;
2835 }
2836
2837 spin_unlock_irqrestore(&priv->lock, flags);
2838
2839 hdr_len = ieee80211_get_hdrlen(fc);
2840
2841 /* Find (or create) index into station table for destination station */
2842 sta_id = iwl3945_get_sta_id(priv, hdr);
2843 if (sta_id == IWL_INVALID_STATION) {
2844 DECLARE_MAC_BUF(mac);
2845
2846 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2847 print_mac(mac, hdr->addr1));
2848 goto drop;
2849 }
2850
2851 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2852
2853 qc = ieee80211_get_qos_ctrl(hdr);
2854 if (qc) {
2855 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2856 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2857 IEEE80211_SCTL_SEQ;
2858 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2859 (hdr->seq_ctrl &
2860 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2861 seq_number += 0x10;
2862 }
2863
2864 /* Descriptor for chosen Tx queue */
2865 txq = &priv->txq[txq_id];
2866 q = &txq->q;
2867
2868 spin_lock_irqsave(&priv->lock, flags);
2869
2870 /* Set up first empty TFD within this queue's circular TFD buffer */
2871 tfd = &txq->bd[q->write_ptr];
2872 memset(tfd, 0, sizeof(*tfd));
2873 control_flags = (u32 *) tfd;
2874 idx = get_cmd_index(q, q->write_ptr, 0);
2875
2876 /* Set up driver data for this TFD */
2877 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2878 txq->txb[q->write_ptr].skb[0] = skb;
2879 memcpy(&(txq->txb[q->write_ptr].status.control),
2880 ctl, sizeof(struct ieee80211_tx_control));
2881
2882 /* Init first empty entry in queue's array of Tx/cmd buffers */
2883 out_cmd = &txq->cmd[idx];
2884 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2885 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
2886
2887 /*
2888 * Set up the Tx-command (not MAC!) header.
2889 * Store the chosen Tx queue and TFD index within the sequence field;
2890 * after Tx, uCode's Tx response will return this value so driver can
2891 * locate the frame within the tx queue and do post-tx processing.
2892 */
2893 out_cmd->hdr.cmd = REPLY_TX;
2894 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2895 INDEX_TO_SEQ(q->write_ptr)));
2896
2897 /* Copy MAC header from skb into command buffer */
2898 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2899
2900 /*
2901 * Use the first empty entry in this queue's command buffer array
2902 * to contain the Tx command and MAC header concatenated together
2903 * (payload data will be in another buffer).
2904 * Size of this varies, due to varying MAC header length.
2905 * If end is not dword aligned, we'll have 2 extra bytes at the end
2906 * of the MAC header (device reads on dword boundaries).
2907 * We'll tell device about this padding later.
2908 */
2909 len = priv->hw_setting.tx_cmd_len +
2910 sizeof(struct iwl3945_cmd_header) + hdr_len;
2911
2912 len_org = len;
2913 len = (len + 3) & ~3;
2914
2915 if (len_org != len)
2916 len_org = 1;
2917 else
2918 len_org = 0;
2919
2920 /* Physical address of this Tx command's header (not MAC header!),
2921 * within command buffer array. */
2922 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2923 offsetof(struct iwl3945_cmd, hdr);
2924
2925 /* Add buffer containing Tx command and MAC(!) header to TFD's
2926 * first entry */
2927 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2928
2929 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2930 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2931
2932 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2933 * if any (802.11 null frames have no payload). */
2934 len = skb->len - hdr_len;
2935 if (len) {
2936 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2937 len, PCI_DMA_TODEVICE);
2938 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2939 }
2940
2941 if (!len)
2942 /* If there is no payload, then we use only one Tx buffer */
2943 *control_flags = TFD_CTL_COUNT_SET(1);
2944 else
2945 /* Else use 2 buffers.
2946 * Tell 3945 about any padding after MAC header */
2947 *control_flags = TFD_CTL_COUNT_SET(2) |
2948 TFD_CTL_PAD_SET(U32_PAD(len));
2949
2950 /* Total # bytes to be transmitted */
2951 len = (u16)skb->len;
2952 out_cmd->cmd.tx.len = cpu_to_le16(len);
2953
2954 /* TODO need this for burst mode later on */
2955 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2956
2957 /* set is_hcca to 0; it probably will never be implemented */
2958 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2959
2960 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2961 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2962
2963 if (!ieee80211_get_morefrag(hdr)) {
2964 txq->need_update = 1;
2965 if (qc) {
2966 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2967 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2968 }
2969 } else {
2970 wait_write_ptr = 1;
2971 txq->need_update = 0;
2972 }
2973
2974 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2975 sizeof(out_cmd->cmd.tx));
2976
2977 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2978 ieee80211_get_hdrlen(fc));
2979
2980 /* Tell device the write index *just past* this latest filled TFD */
2981 q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
2982 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2983 spin_unlock_irqrestore(&priv->lock, flags);
2984
2985 if (rc)
2986 return rc;
2987
2988 if ((iwl3945_queue_space(q) < q->high_mark)
2989 && priv->mac80211_registered) {
2990 if (wait_write_ptr) {
2991 spin_lock_irqsave(&priv->lock, flags);
2992 txq->need_update = 1;
2993 iwl3945_tx_queue_update_write_ptr(priv, txq);
2994 spin_unlock_irqrestore(&priv->lock, flags);
2995 }
2996
2997 ieee80211_stop_queue(priv->hw, ctl->queue);
2998 }
2999
3000 return 0;
3001
3002 drop_unlock:
3003 spin_unlock_irqrestore(&priv->lock, flags);
3004 drop:
3005 return -1;
3006 }
3007
3008 static void iwl3945_set_rate(struct iwl3945_priv *priv)
3009 {
3010 const struct ieee80211_hw_mode *hw = NULL;
3011 struct ieee80211_rate *rate;
3012 int i;
3013
3014 hw = iwl3945_get_hw_mode(priv, priv->phymode);
3015 if (!hw) {
3016 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3017 return;
3018 }
3019
3020 priv->active_rate = 0;
3021 priv->active_rate_basic = 0;
3022
3023 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3024 hw->mode == MODE_IEEE80211A ?
3025 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3026
3027 for (i = 0; i < hw->num_rates; i++) {
3028 rate = &(hw->rates[i]);
3029 if ((rate->val < IWL_RATE_COUNT) &&
3030 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3031 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
3032 rate->val, iwl3945_rates[rate->val].plcp,
3033 (rate->flags & IEEE80211_RATE_BASIC) ?
3034 "*" : "");
3035 priv->active_rate |= (1 << rate->val);
3036 if (rate->flags & IEEE80211_RATE_BASIC)
3037 priv->active_rate_basic |= (1 << rate->val);
3038 } else
3039 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
3040 rate->val, iwl3945_rates[rate->val].plcp);
3041 }
3042
3043 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3044 priv->active_rate, priv->active_rate_basic);
3045
3046 /*
3047 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3048 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3049 * OFDM
3050 */
3051 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3052 priv->staging_rxon.cck_basic_rates =
3053 ((priv->active_rate_basic &
3054 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3055 else
3056 priv->staging_rxon.cck_basic_rates =
3057 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3058
3059 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3060 priv->staging_rxon.ofdm_basic_rates =
3061 ((priv->active_rate_basic &
3062 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3063 IWL_FIRST_OFDM_RATE) & 0xFF;
3064 else
3065 priv->staging_rxon.ofdm_basic_rates =
3066 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3067 }
3068
3069 static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
3070 {
3071 unsigned long flags;
3072
3073 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3074 return;
3075
3076 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3077 disable_radio ? "OFF" : "ON");
3078
3079 if (disable_radio) {
3080 iwl3945_scan_cancel(priv);
3081 /* FIXME: This is a workaround for AP */
3082 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3083 spin_lock_irqsave(&priv->lock, flags);
3084 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3085 CSR_UCODE_SW_BIT_RFKILL);
3086 spin_unlock_irqrestore(&priv->lock, flags);
3087 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
3088 set_bit(STATUS_RF_KILL_SW, &priv->status);
3089 }
3090 return;
3091 }
3092
3093 spin_lock_irqsave(&priv->lock, flags);
3094 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3095
3096 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3097 spin_unlock_irqrestore(&priv->lock, flags);
3098
3099 /* wake up ucode */
3100 msleep(10);
3101
3102 spin_lock_irqsave(&priv->lock, flags);
3103 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3104 if (!iwl3945_grab_nic_access(priv))
3105 iwl3945_release_nic_access(priv);
3106 spin_unlock_irqrestore(&priv->lock, flags);
3107
3108 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3109 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3110 "disabled by HW switch\n");
3111 return;
3112 }
3113
3114 queue_work(priv->workqueue, &priv->restart);
3115 return;
3116 }
3117
3118 void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3119 u32 decrypt_res, struct ieee80211_rx_status *stats)
3120 {
3121 u16 fc =
3122 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3123
3124 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3125 return;
3126
3127 if (!(fc & IEEE80211_FCTL_PROTECTED))
3128 return;
3129
3130 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3131 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3132 case RX_RES_STATUS_SEC_TYPE_TKIP:
3133 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3134 RX_RES_STATUS_BAD_ICV_MIC)
3135 stats->flag |= RX_FLAG_MMIC_ERROR;
3136 case RX_RES_STATUS_SEC_TYPE_WEP:
3137 case RX_RES_STATUS_SEC_TYPE_CCMP:
3138 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3139 RX_RES_STATUS_DECRYPT_OK) {
3140 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3141 stats->flag |= RX_FLAG_DECRYPTED;
3142 }
3143 break;
3144
3145 default:
3146 break;
3147 }
3148 }
3149
3150 #define IWL_PACKET_RETRY_TIME HZ
3151
3152 int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3153 {
3154 u16 sc = le16_to_cpu(header->seq_ctrl);
3155 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3156 u16 frag = sc & IEEE80211_SCTL_FRAG;
3157 u16 *last_seq, *last_frag;
3158 unsigned long *last_time;
3159
3160 switch (priv->iw_mode) {
3161 case IEEE80211_IF_TYPE_IBSS:{
3162 struct list_head *p;
3163 struct iwl3945_ibss_seq *entry = NULL;
3164 u8 *mac = header->addr2;
3165 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3166
3167 __list_for_each(p, &priv->ibss_mac_hash[index]) {
3168 entry = list_entry(p, struct iwl3945_ibss_seq, list);
3169 if (!compare_ether_addr(entry->mac, mac))
3170 break;
3171 }
3172 if (p == &priv->ibss_mac_hash[index]) {
3173 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3174 if (!entry) {
3175 IWL_ERROR("Cannot malloc new mac entry\n");
3176 return 0;
3177 }
3178 memcpy(entry->mac, mac, ETH_ALEN);
3179 entry->seq_num = seq;
3180 entry->frag_num = frag;
3181 entry->packet_time = jiffies;
3182 list_add(&entry->list, &priv->ibss_mac_hash[index]);
3183 return 0;
3184 }
3185 last_seq = &entry->seq_num;
3186 last_frag = &entry->frag_num;
3187 last_time = &entry->packet_time;
3188 break;
3189 }
3190 case IEEE80211_IF_TYPE_STA:
3191 last_seq = &priv->last_seq_num;
3192 last_frag = &priv->last_frag_num;
3193 last_time = &priv->last_packet_time;
3194 break;
3195 default:
3196 return 0;
3197 }
3198 if ((*last_seq == seq) &&
3199 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3200 if (*last_frag == frag)
3201 goto drop;
3202 if (*last_frag + 1 != frag)
3203 /* out-of-order fragment */
3204 goto drop;
3205 } else
3206 *last_seq = seq;
3207
3208 *last_frag = frag;
3209 *last_time = jiffies;
3210 return 0;
3211
3212 drop:
3213 return 1;
3214 }
3215
3216 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3217
3218 #include "iwl-spectrum.h"
3219
3220 #define BEACON_TIME_MASK_LOW 0x00FFFFFF
3221 #define BEACON_TIME_MASK_HIGH 0xFF000000
3222 #define TIME_UNIT 1024
3223
3224 /*
3225 * extended beacon time format
3226 * time in usec will be changed into a 32-bit value in 8:24 format
3227 * the high 1 byte is the beacon counts
3228 * the lower 3 bytes is the time in usec within one beacon interval
3229 */
3230
3231 static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3232 {
3233 u32 quot;
3234 u32 rem;
3235 u32 interval = beacon_interval * 1024;
3236
3237 if (!interval || !usec)
3238 return 0;
3239
3240 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3241 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3242
3243 return (quot << 24) + rem;
3244 }
3245
3246 /* base is usually what we get from ucode with each received frame,
3247 * the same as HW timer counter counting down
3248 */
3249
3250 static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3251 {
3252 u32 base_low = base & BEACON_TIME_MASK_LOW;
3253 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3254 u32 interval = beacon_interval * TIME_UNIT;
3255 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3256 (addon & BEACON_TIME_MASK_HIGH);
3257
3258 if (base_low > addon_low)
3259 res += base_low - addon_low;
3260 else if (base_low < addon_low) {
3261 res += interval + base_low - addon_low;
3262 res += (1 << 24);
3263 } else
3264 res += (1 << 24);
3265
3266 return cpu_to_le32(res);
3267 }
3268
3269 static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3270 struct ieee80211_measurement_params *params,
3271 u8 type)
3272 {
3273 struct iwl3945_spectrum_cmd spectrum;
3274 struct iwl3945_rx_packet *res;
3275 struct iwl3945_host_cmd cmd = {
3276 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3277 .data = (void *)&spectrum,
3278 .meta.flags = CMD_WANT_SKB,
3279 };
3280 u32 add_time = le64_to_cpu(params->start_time);
3281 int rc;
3282 int spectrum_resp_status;
3283 int duration = le16_to_cpu(params->duration);
3284
3285 if (iwl3945_is_associated(priv))
3286 add_time =
3287 iwl3945_usecs_to_beacons(
3288 le64_to_cpu(params->start_time) - priv->last_tsf,
3289 le16_to_cpu(priv->rxon_timing.beacon_interval));
3290
3291 memset(&spectrum, 0, sizeof(spectrum));
3292
3293 spectrum.channel_count = cpu_to_le16(1);
3294 spectrum.flags =
3295 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3296 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3297 cmd.len = sizeof(spectrum);
3298 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3299
3300 if (iwl3945_is_associated(priv))
3301 spectrum.start_time =
3302 iwl3945_add_beacon_time(priv->last_beacon_time,
3303 add_time,
3304 le16_to_cpu(priv->rxon_timing.beacon_interval));
3305 else
3306 spectrum.start_time = 0;
3307
3308 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3309 spectrum.channels[0].channel = params->channel;
3310 spectrum.channels[0].type = type;
3311 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3312 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3313 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3314
3315 rc = iwl3945_send_cmd_sync(priv, &cmd);
3316 if (rc)
3317 return rc;
3318
3319 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3320 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3321 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3322 rc = -EIO;
3323 }
3324
3325 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3326 switch (spectrum_resp_status) {
3327 case 0: /* Command will be handled */
3328 if (res->u.spectrum.id != 0xff) {
3329 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3330 res->u.spectrum.id);
3331 priv->measurement_status &= ~MEASUREMENT_READY;
3332 }
3333 priv->measurement_status |= MEASUREMENT_ACTIVE;
3334 rc = 0;
3335 break;
3336
3337 case 1: /* Command will not be handled */
3338 rc = -EAGAIN;
3339 break;
3340 }
3341
3342 dev_kfree_skb_any(cmd.meta.u.skb);
3343
3344 return rc;
3345 }
3346 #endif
3347
3348 static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
3349 struct iwl3945_tx_info *tx_sta)
3350 {
3351
3352 tx_sta->status.ack_signal = 0;
3353 tx_sta->status.excessive_retries = 0;
3354 tx_sta->status.queue_length = 0;
3355 tx_sta->status.queue_number = 0;
3356
3357 if (in_interrupt())
3358 ieee80211_tx_status_irqsafe(priv->hw,
3359 tx_sta->skb[0], &(tx_sta->status));
3360 else
3361 ieee80211_tx_status(priv->hw,
3362 tx_sta->skb[0], &(tx_sta->status));
3363
3364 tx_sta->skb[0] = NULL;
3365 }
3366
3367 /**
3368 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
3369 *
3370 * When FW advances 'R' index, all entries between old and new 'R' index
3371 * need to be reclaimed. As result, some free space forms. If there is
3372 * enough free space (> low mark), wake the stack that feeds us.
3373 */
3374 static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3375 {
3376 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3377 struct iwl3945_queue *q = &txq->q;
3378 int nfreed = 0;
3379
3380 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3381 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3382 "is out of range [0-%d] %d %d.\n", txq_id,
3383 index, q->n_bd, q->write_ptr, q->read_ptr);
3384 return 0;
3385 }
3386
3387 for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3388 q->read_ptr != index;
3389 q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3390 if (txq_id != IWL_CMD_QUEUE_NUM) {
3391 iwl3945_txstatus_to_ieee(priv,
3392 &(txq->txb[txq->q.read_ptr]));
3393 iwl3945_hw_txq_free_tfd(priv, txq);
3394 } else if (nfreed > 1) {
3395 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3396 q->write_ptr, q->read_ptr);
3397 queue_work(priv->workqueue, &priv->restart);
3398 }
3399 nfreed++;
3400 }
3401
3402 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3403 (txq_id != IWL_CMD_QUEUE_NUM) &&
3404 priv->mac80211_registered)
3405 ieee80211_wake_queue(priv->hw, txq_id);
3406
3407
3408 return nfreed;
3409 }
3410
3411 static int iwl3945_is_tx_success(u32 status)
3412 {
3413 return (status & 0xFF) == 0x1;
3414 }
3415
3416 /******************************************************************************
3417 *
3418 * Generic RX handler implementations
3419 *
3420 ******************************************************************************/
3421 /**
3422 * iwl3945_rx_reply_tx - Handle Tx response
3423 */
3424 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
3425 struct iwl3945_rx_mem_buffer *rxb)
3426 {
3427 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3428 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3429 int txq_id = SEQ_TO_QUEUE(sequence);
3430 int index = SEQ_TO_INDEX(sequence);
3431 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3432 struct ieee80211_tx_status *tx_status;
3433 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3434 u32 status = le32_to_cpu(tx_resp->status);
3435
3436 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3437 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3438 "is out of range [0-%d] %d %d\n", txq_id,
3439 index, txq->q.n_bd, txq->q.write_ptr,
3440 txq->q.read_ptr);
3441 return;
3442 }
3443
3444 tx_status = &(txq->txb[txq->q.read_ptr].status);
3445
3446 tx_status->retry_count = tx_resp->failure_frame;
3447 tx_status->queue_number = status;
3448 tx_status->queue_length = tx_resp->bt_kill_count;
3449 tx_status->queue_length |= tx_resp->failure_rts;
3450
3451 tx_status->flags =
3452 iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3453
3454 tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
3455
3456 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3457 txq_id, iwl3945_get_tx_fail_reason(status), status,
3458 tx_resp->rate, tx_resp->failure_frame);
3459
3460 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3461 if (index != -1)
3462 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3463
3464 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3465 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3466 }
3467
3468
3469 static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3470 struct iwl3945_rx_mem_buffer *rxb)
3471 {
3472 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3473 struct iwl3945_alive_resp *palive;
3474 struct delayed_work *pwork;
3475
3476 palive = &pkt->u.alive_frame;
3477
3478 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3479 "0x%01X 0x%01X\n",
3480 palive->is_valid, palive->ver_type,
3481 palive->ver_subtype);
3482
3483 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3484 IWL_DEBUG_INFO("Initialization Alive received.\n");
3485 memcpy(&priv->card_alive_init,
3486 &pkt->u.alive_frame,
3487 sizeof(struct iwl3945_init_alive_resp));
3488 pwork = &priv->init_alive_start;
3489 } else {
3490 IWL_DEBUG_INFO("Runtime Alive received.\n");
3491 memcpy(&priv->card_alive, &pkt->u.alive_frame,
3492 sizeof(struct iwl3945_alive_resp));
3493 pwork = &priv->alive_start;
3494 iwl3945_disable_events(priv);
3495 }
3496
3497 /* We delay the ALIVE response by 5ms to
3498 * give the HW RF Kill time to activate... */
3499 if (palive->is_valid == UCODE_VALID_OK)
3500 queue_delayed_work(priv->workqueue, pwork,
3501 msecs_to_jiffies(5));
3502 else
3503 IWL_WARNING("uCode did not respond OK.\n");
3504 }
3505
3506 static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3507 struct iwl3945_rx_mem_buffer *rxb)
3508 {
3509 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3510
3511 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3512 return;
3513 }
3514
3515 static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3516 struct iwl3945_rx_mem_buffer *rxb)
3517 {
3518 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3519
3520 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3521 "seq 0x%04X ser 0x%08X\n",
3522 le32_to_cpu(pkt->u.err_resp.error_type),
3523 get_cmd_string(pkt->u.err_resp.cmd_id),
3524 pkt->u.err_resp.cmd_id,
3525 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3526 le32_to_cpu(pkt->u.err_resp.error_info));
3527 }
3528
3529 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3530
3531 static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3532 {
3533 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3534 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3535 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3536 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3537 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3538 rxon->channel = csa->channel;
3539 priv->staging_rxon.channel = csa->channel;
3540 }
3541
3542 static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3543 struct iwl3945_rx_mem_buffer *rxb)
3544 {
3545 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3546 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3547 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3548
3549 if (!report->state) {
3550 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3551 "Spectrum Measure Notification: Start\n");
3552 return;
3553 }
3554
3555 memcpy(&priv->measure_report, report, sizeof(*report));
3556 priv->measurement_status |= MEASUREMENT_READY;
3557 #endif
3558 }
3559
3560 static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3561 struct iwl3945_rx_mem_buffer *rxb)
3562 {
3563 #ifdef CONFIG_IWL3945_DEBUG
3564 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3565 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3566 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3567 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3568 #endif
3569 }
3570
3571 static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3572 struct iwl3945_rx_mem_buffer *rxb)
3573 {
3574 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3575 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3576 "notification for %s:\n",
3577 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3578 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3579 }
3580
3581 static void iwl3945_bg_beacon_update(struct work_struct *work)
3582 {
3583 struct iwl3945_priv *priv =
3584 container_of(work, struct iwl3945_priv, beacon_update);
3585 struct sk_buff *beacon;
3586
3587 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3588 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
3589
3590 if (!beacon) {
3591 IWL_ERROR("update beacon failed\n");
3592 return;
3593 }
3594
3595 mutex_lock(&priv->mutex);
3596 /* new beacon skb is allocated every time; dispose previous.*/
3597 if (priv->ibss_beacon)
3598 dev_kfree_skb(priv->ibss_beacon);
3599
3600 priv->ibss_beacon = beacon;
3601 mutex_unlock(&priv->mutex);
3602
3603 iwl3945_send_beacon_cmd(priv);
3604 }
3605
3606 static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3607 struct iwl3945_rx_mem_buffer *rxb)
3608 {
3609 #ifdef CONFIG_IWL3945_DEBUG
3610 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3611 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3612 u8 rate = beacon->beacon_notify_hdr.rate;
3613
3614 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3615 "tsf %d %d rate %d\n",
3616 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3617 beacon->beacon_notify_hdr.failure_frame,
3618 le32_to_cpu(beacon->ibss_mgr_status),
3619 le32_to_cpu(beacon->high_tsf),
3620 le32_to_cpu(beacon->low_tsf), rate);
3621 #endif
3622
3623 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3624 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3625 queue_work(priv->workqueue, &priv->beacon_update);
3626 }
3627
3628 /* Service response to REPLY_SCAN_CMD (0x80) */
3629 static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3630 struct iwl3945_rx_mem_buffer *rxb)
3631 {
3632 #ifdef CONFIG_IWL3945_DEBUG
3633 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3634 struct iwl3945_scanreq_notification *notif =
3635 (struct iwl3945_scanreq_notification *)pkt->u.raw;
3636
3637 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3638 #endif
3639 }
3640
3641 /* Service SCAN_START_NOTIFICATION (0x82) */
3642 static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3643 struct iwl3945_rx_mem_buffer *rxb)
3644 {
3645 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3646 struct iwl3945_scanstart_notification *notif =
3647 (struct iwl3945_scanstart_notification *)pkt->u.raw;
3648 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3649 IWL_DEBUG_SCAN("Scan start: "
3650 "%d [802.11%s] "
3651 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3652 notif->channel,
3653 notif->band ? "bg" : "a",
3654 notif->tsf_high,
3655 notif->tsf_low, notif->status, notif->beacon_timer);
3656 }
3657
3658 /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3659 static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3660 struct iwl3945_rx_mem_buffer *rxb)
3661 {
3662 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3663 struct iwl3945_scanresults_notification *notif =
3664 (struct iwl3945_scanresults_notification *)pkt->u.raw;
3665
3666 IWL_DEBUG_SCAN("Scan ch.res: "
3667 "%d [802.11%s] "
3668 "(TSF: 0x%08X:%08X) - %d "
3669 "elapsed=%lu usec (%dms since last)\n",
3670 notif->channel,
3671 notif->band ? "bg" : "a",
3672 le32_to_cpu(notif->tsf_high),
3673 le32_to_cpu(notif->tsf_low),
3674 le32_to_cpu(notif->statistics[0]),
3675 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3676 jiffies_to_msecs(elapsed_jiffies
3677 (priv->last_scan_jiffies, jiffies)));
3678
3679 priv->last_scan_jiffies = jiffies;
3680 priv->next_scan_jiffies = 0;
3681 }
3682
3683 /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3684 static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3685 struct iwl3945_rx_mem_buffer *rxb)
3686 {
3687 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3688 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3689
3690 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3691 scan_notif->scanned_channels,
3692 scan_notif->tsf_low,
3693 scan_notif->tsf_high, scan_notif->status);
3694
3695 /* The HW is no longer scanning */
3696 clear_bit(STATUS_SCAN_HW, &priv->status);
3697
3698 /* The scan completion notification came in, so kill that timer... */
3699 cancel_delayed_work(&priv->scan_check);
3700
3701 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3702 (priv->scan_bands == 2) ? "2.4" : "5.2",
3703 jiffies_to_msecs(elapsed_jiffies
3704 (priv->scan_pass_start, jiffies)));
3705
3706 /* Remove this scanned band from the list
3707 * of pending bands to scan */
3708 priv->scan_bands--;
3709
3710 /* If a request to abort was given, or the scan did not succeed
3711 * then we reset the scan state machine and terminate,
3712 * re-queuing another scan if one has been requested */
3713 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3714 IWL_DEBUG_INFO("Aborted scan completed.\n");
3715 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3716 } else {
3717 /* If there are more bands on this scan pass reschedule */
3718 if (priv->scan_bands > 0)
3719 goto reschedule;
3720 }
3721
3722 priv->last_scan_jiffies = jiffies;
3723 priv->next_scan_jiffies = 0;
3724 IWL_DEBUG_INFO("Setting scan to off\n");
3725
3726 clear_bit(STATUS_SCANNING, &priv->status);
3727
3728 IWL_DEBUG_INFO("Scan took %dms\n",
3729 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3730
3731 queue_work(priv->workqueue, &priv->scan_completed);
3732
3733 return;
3734
3735 reschedule:
3736 priv->scan_pass_start = jiffies;
3737 queue_work(priv->workqueue, &priv->request_scan);
3738 }
3739
3740 /* Handle notification from uCode that card's power state is changing
3741 * due to software, hardware, or critical temperature RFKILL */
3742 static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3743 struct iwl3945_rx_mem_buffer *rxb)
3744 {
3745 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3746 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3747 unsigned long status = priv->status;
3748
3749 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3750 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3751 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3752
3753 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3754 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3755
3756 if (flags & HW_CARD_DISABLED)
3757 set_bit(STATUS_RF_KILL_HW, &priv->status);
3758 else
3759 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3760
3761
3762 if (flags & SW_CARD_DISABLED)
3763 set_bit(STATUS_RF_KILL_SW, &priv->status);
3764 else
3765 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3766
3767 iwl3945_scan_cancel(priv);
3768
3769 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3770 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3771 (test_bit(STATUS_RF_KILL_SW, &status) !=
3772 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3773 queue_work(priv->workqueue, &priv->rf_kill);
3774 else
3775 wake_up_interruptible(&priv->wait_command_queue);
3776 }
3777
3778 /**
3779 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3780 *
3781 * Setup the RX handlers for each of the reply types sent from the uCode
3782 * to the host.
3783 *
3784 * This function chains into the hardware specific files for them to setup
3785 * any hardware specific handlers as well.
3786 */
3787 static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3788 {
3789 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3790 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3791 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3792 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3793 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3794 iwl3945_rx_spectrum_measure_notif;
3795 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3796 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3797 iwl3945_rx_pm_debug_statistics_notif;
3798 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3799
3800 /*
3801 * The same handler is used for both the REPLY to a discrete
3802 * statistics request from the host as well as for the periodic
3803 * statistics notifications (after received beacons) from the uCode.
3804 */
3805 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3806 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3807
3808 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3809 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3810 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3811 iwl3945_rx_scan_results_notif;
3812 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3813 iwl3945_rx_scan_complete_notif;
3814 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
3815 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3816
3817 /* Set up hardware specific Rx handlers */
3818 iwl3945_hw_rx_handler_setup(priv);
3819 }
3820
3821 /**
3822 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3823 * @rxb: Rx buffer to reclaim
3824 *
3825 * If an Rx buffer has an async callback associated with it the callback
3826 * will be executed. The attached skb (if present) will only be freed
3827 * if the callback returns 1
3828 */
3829 static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3830 struct iwl3945_rx_mem_buffer *rxb)
3831 {
3832 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3833 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3834 int txq_id = SEQ_TO_QUEUE(sequence);
3835 int index = SEQ_TO_INDEX(sequence);
3836 int huge = sequence & SEQ_HUGE_FRAME;
3837 int cmd_index;
3838 struct iwl3945_cmd *cmd;
3839
3840 /* If a Tx command is being handled and it isn't in the actual
3841 * command queue then there a command routing bug has been introduced
3842 * in the queue management code. */
3843 if (txq_id != IWL_CMD_QUEUE_NUM)
3844 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3845 txq_id, pkt->hdr.cmd);
3846 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3847
3848 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3849 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3850
3851 /* Input error checking is done when commands are added to queue. */
3852 if (cmd->meta.flags & CMD_WANT_SKB) {
3853 cmd->meta.source->u.skb = rxb->skb;
3854 rxb->skb = NULL;
3855 } else if (cmd->meta.u.callback &&
3856 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3857 rxb->skb = NULL;
3858
3859 iwl3945_tx_queue_reclaim(priv, txq_id, index);
3860
3861 if (!(cmd->meta.flags & CMD_ASYNC)) {
3862 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3863 wake_up_interruptible(&priv->wait_command_queue);
3864 }
3865 }
3866
3867 /************************** RX-FUNCTIONS ****************************/
3868 /*
3869 * Rx theory of operation
3870 *
3871 * The host allocates 32 DMA target addresses and passes the host address
3872 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3873 * 0 to 31
3874 *
3875 * Rx Queue Indexes
3876 * The host/firmware share two index registers for managing the Rx buffers.
3877 *
3878 * The READ index maps to the first position that the firmware may be writing
3879 * to -- the driver can read up to (but not including) this position and get
3880 * good data.
3881 * The READ index is managed by the firmware once the card is enabled.
3882 *
3883 * The WRITE index maps to the last position the driver has read from -- the
3884 * position preceding WRITE is the last slot the firmware can place a packet.
3885 *
3886 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3887 * WRITE = READ.
3888 *
3889 * During initialization, the host sets up the READ queue position to the first
3890 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3891 *
3892 * When the firmware places a packet in a buffer, it will advance the READ index
3893 * and fire the RX interrupt. The driver can then query the READ index and
3894 * process as many packets as possible, moving the WRITE index forward as it
3895 * resets the Rx queue buffers with new memory.
3896 *
3897 * The management in the driver is as follows:
3898 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3899 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3900 * to replenish the iwl->rxq->rx_free.
3901 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3902 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3903 * 'processed' and 'read' driver indexes as well)
3904 * + A received packet is processed and handed to the kernel network stack,
3905 * detached from the iwl->rxq. The driver 'processed' index is updated.
3906 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3907 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3908 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3909 * were enough free buffers and RX_STALLED is set it is cleared.
3910 *
3911 *
3912 * Driver sequence:
3913 *
3914 * iwl3945_rx_queue_alloc() Allocates rx_free
3915 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
3916 * iwl3945_rx_queue_restock
3917 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
3918 * queue, updates firmware pointers, and updates
3919 * the WRITE index. If insufficient rx_free buffers
3920 * are available, schedules iwl3945_rx_replenish
3921 *
3922 * -- enable interrupts --
3923 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
3924 * READ INDEX, detaching the SKB from the pool.
3925 * Moves the packet buffer from queue to rx_used.
3926 * Calls iwl3945_rx_queue_restock to refill any empty
3927 * slots.
3928 * ...
3929 *
3930 */
3931
3932 /**
3933 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3934 */
3935 static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3936 {
3937 int s = q->read - q->write;
3938 if (s <= 0)
3939 s += RX_QUEUE_SIZE;
3940 /* keep some buffer to not confuse full and empty queue */
3941 s -= 2;
3942 if (s < 0)
3943 s = 0;
3944 return s;
3945 }
3946
3947 /**
3948 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3949 */
3950 int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3951 {
3952 u32 reg = 0;
3953 int rc = 0;
3954 unsigned long flags;
3955
3956 spin_lock_irqsave(&q->lock, flags);
3957
3958 if (q->need_update == 0)
3959 goto exit_unlock;
3960
3961 /* If power-saving is in use, make sure device is awake */
3962 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3963 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3964
3965 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3966 iwl3945_set_bit(priv, CSR_GP_CNTRL,
3967 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3968 goto exit_unlock;
3969 }
3970
3971 rc = iwl3945_grab_nic_access(priv);
3972 if (rc)
3973 goto exit_unlock;
3974
3975 /* Device expects a multiple of 8 */
3976 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3977 q->write & ~0x7);
3978 iwl3945_release_nic_access(priv);
3979
3980 /* Else device is assumed to be awake */
3981 } else
3982 /* Device expects a multiple of 8 */
3983 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3984
3985
3986 q->need_update = 0;
3987
3988 exit_unlock:
3989 spin_unlock_irqrestore(&q->lock, flags);
3990 return rc;
3991 }
3992
3993 /**
3994 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
3995 */
3996 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3997 dma_addr_t dma_addr)
3998 {
3999 return cpu_to_le32((u32)dma_addr);
4000 }
4001
4002 /**
4003 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
4004 *
4005 * If there are slots in the RX queue that need to be restocked,
4006 * and we have free pre-allocated buffers, fill the ranks as much
4007 * as we can, pulling from rx_free.
4008 *
4009 * This moves the 'write' index forward to catch up with 'processed', and
4010 * also updates the memory address in the firmware to reference the new
4011 * target buffer.
4012 */
4013 static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
4014 {
4015 struct iwl3945_rx_queue *rxq = &priv->rxq;
4016 struct list_head *element;
4017 struct iwl3945_rx_mem_buffer *rxb;
4018 unsigned long flags;
4019 int write, rc;
4020
4021 spin_lock_irqsave(&rxq->lock, flags);
4022 write = rxq->write & ~0x7;
4023 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4024 /* Get next free Rx buffer, remove from free list */
4025 element = rxq->rx_free.next;
4026 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4027 list_del(element);
4028
4029 /* Point to Rx buffer via next RBD in circular buffer */
4030 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4031 rxq->queue[rxq->write] = rxb;
4032 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4033 rxq->free_count--;
4034 }
4035 spin_unlock_irqrestore(&rxq->lock, flags);
4036 /* If the pre-allocated buffer pool is dropping low, schedule to
4037 * refill it */
4038 if (rxq->free_count <= RX_LOW_WATERMARK)
4039 queue_work(priv->workqueue, &priv->rx_replenish);
4040
4041
4042 /* If we've added more space for the firmware to place data, tell it.
4043 * Increment device's write pointer in multiples of 8. */
4044 if ((write != (rxq->write & ~0x7))
4045 || (abs(rxq->write - rxq->read) > 7)) {
4046 spin_lock_irqsave(&rxq->lock, flags);
4047 rxq->need_update = 1;
4048 spin_unlock_irqrestore(&rxq->lock, flags);
4049 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4050 if (rc)
4051 return rc;
4052 }
4053
4054 return 0;
4055 }
4056
4057 /**
4058 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4059 *
4060 * When moving to rx_free an SKB is allocated for the slot.
4061 *
4062 * Also restock the Rx queue via iwl3945_rx_queue_restock.
4063 * This is called as a scheduled work item (except for during initialization)
4064 */
4065 static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
4066 {
4067 struct iwl3945_rx_queue *rxq = &priv->rxq;
4068 struct list_head *element;
4069 struct iwl3945_rx_mem_buffer *rxb;
4070 unsigned long flags;
4071 spin_lock_irqsave(&rxq->lock, flags);
4072 while (!list_empty(&rxq->rx_used)) {
4073 element = rxq->rx_used.next;
4074 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4075
4076 /* Alloc a new receive buffer */
4077 rxb->skb =
4078 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4079 if (!rxb->skb) {
4080 if (net_ratelimit())
4081 printk(KERN_CRIT DRV_NAME
4082 ": Can not allocate SKB buffers\n");
4083 /* We don't reschedule replenish work here -- we will
4084 * call the restock method and if it still needs
4085 * more buffers it will schedule replenish */
4086 break;
4087 }
4088
4089 /* If radiotap head is required, reserve some headroom here.
4090 * The physical head count is a variable rx_stats->phy_count.
4091 * We reserve 4 bytes here. Plus these extra bytes, the
4092 * headroom of the physical head should be enough for the
4093 * radiotap head that iwl3945 supported. See iwl3945_rt.
4094 */
4095 skb_reserve(rxb->skb, 4);
4096
4097 priv->alloc_rxb_skb++;
4098 list_del(element);
4099
4100 /* Get physical address of RB/SKB */
4101 rxb->dma_addr =
4102 pci_map_single(priv->pci_dev, rxb->skb->data,
4103 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4104 list_add_tail(&rxb->list, &rxq->rx_free);
4105 rxq->free_count++;
4106 }
4107 spin_unlock_irqrestore(&rxq->lock, flags);
4108 }
4109
4110 /*
4111 * this should be called while priv->lock is locked
4112 */
4113 static void __iwl3945_rx_replenish(void *data)
4114 {
4115 struct iwl3945_priv *priv = data;
4116
4117 iwl3945_rx_allocate(priv);
4118 iwl3945_rx_queue_restock(priv);
4119 }
4120
4121
4122 void iwl3945_rx_replenish(void *data)
4123 {
4124 struct iwl3945_priv *priv = data;
4125 unsigned long flags;
4126
4127 iwl3945_rx_allocate(priv);
4128
4129 spin_lock_irqsave(&priv->lock, flags);
4130 iwl3945_rx_queue_restock(priv);
4131 spin_unlock_irqrestore(&priv->lock, flags);
4132 }
4133
4134 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
4135 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
4136 * This free routine walks the list of POOL entries and if SKB is set to
4137 * non NULL it is unmapped and freed
4138 */
4139 static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4140 {
4141 int i;
4142 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4143 if (rxq->pool[i].skb != NULL) {
4144 pci_unmap_single(priv->pci_dev,
4145 rxq->pool[i].dma_addr,
4146 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4147 dev_kfree_skb(rxq->pool[i].skb);
4148 }
4149 }
4150
4151 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4152 rxq->dma_addr);
4153 rxq->bd = NULL;
4154 }
4155
4156 int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4157 {
4158 struct iwl3945_rx_queue *rxq = &priv->rxq;
4159 struct pci_dev *dev = priv->pci_dev;
4160 int i;
4161
4162 spin_lock_init(&rxq->lock);
4163 INIT_LIST_HEAD(&rxq->rx_free);
4164 INIT_LIST_HEAD(&rxq->rx_used);
4165
4166 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
4167 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4168 if (!rxq->bd)
4169 return -ENOMEM;
4170
4171 /* Fill the rx_used queue with _all_ of the Rx buffers */
4172 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4173 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4174
4175 /* Set us so that we have processed and used all buffers, but have
4176 * not restocked the Rx queue with fresh buffers */
4177 rxq->read = rxq->write = 0;
4178 rxq->free_count = 0;
4179 rxq->need_update = 0;
4180 return 0;
4181 }
4182
4183 void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4184 {
4185 unsigned long flags;
4186 int i;
4187 spin_lock_irqsave(&rxq->lock, flags);
4188 INIT_LIST_HEAD(&rxq->rx_free);
4189 INIT_LIST_HEAD(&rxq->rx_used);
4190 /* Fill the rx_used queue with _all_ of the Rx buffers */
4191 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4192 /* In the reset function, these buffers may have been allocated
4193 * to an SKB, so we need to unmap and free potential storage */
4194 if (rxq->pool[i].skb != NULL) {
4195 pci_unmap_single(priv->pci_dev,
4196 rxq->pool[i].dma_addr,
4197 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4198 priv->alloc_rxb_skb--;
4199 dev_kfree_skb(rxq->pool[i].skb);
4200 rxq->pool[i].skb = NULL;
4201 }
4202 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4203 }
4204
4205 /* Set us so that we have processed and used all buffers, but have
4206 * not restocked the Rx queue with fresh buffers */
4207 rxq->read = rxq->write = 0;
4208 rxq->free_count = 0;
4209 spin_unlock_irqrestore(&rxq->lock, flags);
4210 }
4211
4212 /* Convert linear signal-to-noise ratio into dB */
4213 static u8 ratio2dB[100] = {
4214 /* 0 1 2 3 4 5 6 7 8 9 */
4215 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4216 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4217 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4218 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4219 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4220 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4221 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4222 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4223 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4224 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4225 };
4226
4227 /* Calculates a relative dB value from a ratio of linear
4228 * (i.e. not dB) signal levels.
4229 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4230 int iwl3945_calc_db_from_ratio(int sig_ratio)
4231 {
4232 /* 1000:1 or higher just report as 60 dB */
4233 if (sig_ratio >= 1000)
4234 return 60;
4235
4236 /* 100:1 or higher, divide by 10 and use table,
4237 * add 20 dB to make up for divide by 10 */
4238 if (sig_ratio >= 100)
4239 return (20 + (int)ratio2dB[sig_ratio/10]);
4240
4241 /* We shouldn't see this */
4242 if (sig_ratio < 1)
4243 return 0;
4244
4245 /* Use table for ratios 1:1 - 99:1 */
4246 return (int)ratio2dB[sig_ratio];
4247 }
4248
4249 #define PERFECT_RSSI (-20) /* dBm */
4250 #define WORST_RSSI (-95) /* dBm */
4251 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4252
4253 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
4254 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4255 * about formulas used below. */
4256 int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4257 {
4258 int sig_qual;
4259 int degradation = PERFECT_RSSI - rssi_dbm;
4260
4261 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4262 * as indicator; formula is (signal dbm - noise dbm).
4263 * SNR at or above 40 is a great signal (100%).
4264 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4265 * Weakest usable signal is usually 10 - 15 dB SNR. */
4266 if (noise_dbm) {
4267 if (rssi_dbm - noise_dbm >= 40)
4268 return 100;
4269 else if (rssi_dbm < noise_dbm)
4270 return 0;
4271 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4272
4273 /* Else use just the signal level.
4274 * This formula is a least squares fit of data points collected and
4275 * compared with a reference system that had a percentage (%) display
4276 * for signal quality. */
4277 } else
4278 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4279 (15 * RSSI_RANGE + 62 * degradation)) /
4280 (RSSI_RANGE * RSSI_RANGE);
4281
4282 if (sig_qual > 100)
4283 sig_qual = 100;
4284 else if (sig_qual < 1)
4285 sig_qual = 0;
4286
4287 return sig_qual;
4288 }
4289
4290 /**
4291 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
4292 *
4293 * Uses the priv->rx_handlers callback function array to invoke
4294 * the appropriate handlers, including command responses,
4295 * frame-received notifications, and other notifications.
4296 */
4297 static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4298 {
4299 struct iwl3945_rx_mem_buffer *rxb;
4300 struct iwl3945_rx_packet *pkt;
4301 struct iwl3945_rx_queue *rxq = &priv->rxq;
4302 u32 r, i;
4303 int reclaim;
4304 unsigned long flags;
4305 u8 fill_rx = 0;
4306 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
4307 u32 count = 0;
4308 =======
4309 u32 count = 8;
4310 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
4311
4312 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4313 * buffer that the driver may process (last buffer filled by ucode). */
4314 r = iwl3945_hw_get_rx_read(priv);
4315 i = rxq->read;
4316
4317 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4318 fill_rx = 1;
4319 /* Rx interrupt, but nothing sent from uCode */
4320 if (i == r)
4321 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4322
4323 while (i != r) {
4324 rxb = rxq->queue[i];
4325
4326 /* If an RXB doesn't have a Rx queue slot associated with it,
4327 * then a bug has been introduced in the queue refilling
4328 * routines -- catch it here */
4329 BUG_ON(rxb == NULL);
4330
4331 rxq->queue[i] = NULL;
4332
4333 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4334 IWL_RX_BUF_SIZE,
4335 PCI_DMA_FROMDEVICE);
4336 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4337
4338 /* Reclaim a command buffer only if this packet is a response
4339 * to a (driver-originated) command.
4340 * If the packet (e.g. Rx frame) originated from uCode,
4341 * there is no command buffer to reclaim.
4342 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4343 * but apparently a few don't get set; catch them here. */
4344 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4345 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4346 (pkt->hdr.cmd != REPLY_TX);
4347
4348 /* Based on type of command response or notification,
4349 * handle those that need handling via function in
4350 * rx_handlers table. See iwl3945_setup_rx_handlers() */
4351 if (priv->rx_handlers[pkt->hdr.cmd]) {
4352 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4353 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4354 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4355 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4356 } else {
4357 /* No handling needed */
4358 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4359 "r %d i %d No handler needed for %s, 0x%02x\n",
4360 r, i, get_cmd_string(pkt->hdr.cmd),
4361 pkt->hdr.cmd);
4362 }
4363
4364 if (reclaim) {
4365 /* Invoke any callbacks, transfer the skb to caller, and
4366 * fire off the (possibly) blocking iwl3945_send_cmd()
4367 * as we reclaim the driver command queue */
4368 if (rxb && rxb->skb)
4369 iwl3945_tx_cmd_complete(priv, rxb);
4370 else
4371 IWL_WARNING("Claim null rxb?\n");
4372 }
4373
4374 /* For now we just don't re-use anything. We can tweak this
4375 * later to try and re-use notification packets and SKBs that
4376 * fail to Rx correctly */
4377 if (rxb->skb != NULL) {
4378 priv->alloc_rxb_skb--;
4379 dev_kfree_skb_any(rxb->skb);
4380 rxb->skb = NULL;
4381 }
4382
4383 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4384 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4385 spin_lock_irqsave(&rxq->lock, flags);
4386 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4387 spin_unlock_irqrestore(&rxq->lock, flags);
4388 i = (i + 1) & RX_QUEUE_MASK;
4389 /* If there are a lot of unused frames,
4390 * restock the Rx queue so ucode won't assert. */
4391 if (fill_rx) {
4392 count++;
4393 if (count >= 8) {
4394 priv->rxq.read = i;
4395 __iwl3945_rx_replenish(priv);
4396 count = 0;
4397 }
4398 }
4399 }
4400
4401 /* Backtrack one entry */
4402 priv->rxq.read = i;
4403 iwl3945_rx_queue_restock(priv);
4404 }
4405
4406 /**
4407 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4408 */
4409 static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4410 struct iwl3945_tx_queue *txq)
4411 {
4412 u32 reg = 0;
4413 int rc = 0;
4414 int txq_id = txq->q.id;
4415
4416 if (txq->need_update == 0)
4417 return rc;
4418
4419 /* if we're trying to save power */
4420 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4421 /* wake up nic if it's powered down ...
4422 * uCode will wake up, and interrupt us again, so next
4423 * time we'll skip this part. */
4424 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4425
4426 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4427 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4428 iwl3945_set_bit(priv, CSR_GP_CNTRL,
4429 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4430 return rc;
4431 }
4432
4433 /* restore this queue's parameters in nic hardware. */
4434 rc = iwl3945_grab_nic_access(priv);
4435 if (rc)
4436 return rc;
4437 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4438 txq->q.write_ptr | (txq_id << 8));
4439 iwl3945_release_nic_access(priv);
4440
4441 /* else not in power-save mode, uCode will never sleep when we're
4442 * trying to tx (during RFKILL, we're not trying to tx). */
4443 } else
4444 iwl3945_write32(priv, HBUS_TARG_WRPTR,
4445 txq->q.write_ptr | (txq_id << 8));
4446
4447 txq->need_update = 0;
4448
4449 return rc;
4450 }
4451
4452 #ifdef CONFIG_IWL3945_DEBUG
4453 static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4454 {
4455 DECLARE_MAC_BUF(mac);
4456
4457 IWL_DEBUG_RADIO("RX CONFIG:\n");
4458 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4459 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4460 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4461 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4462 le32_to_cpu(rxon->filter_flags));
4463 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4464 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4465 rxon->ofdm_basic_rates);
4466 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4467 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4468 print_mac(mac, rxon->node_addr));
4469 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4470 print_mac(mac, rxon->bssid_addr));
4471 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4472 }
4473 #endif
4474
4475 static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4476 {
4477 IWL_DEBUG_ISR("Enabling interrupts\n");
4478 set_bit(STATUS_INT_ENABLED, &priv->status);
4479 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4480 }
4481
4482 static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4483 {
4484 clear_bit(STATUS_INT_ENABLED, &priv->status);
4485
4486 /* disable interrupts from uCode/NIC to host */
4487 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4488
4489 /* acknowledge/clear/reset any interrupts still pending
4490 * from uCode or flow handler (Rx/Tx DMA) */
4491 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4492 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4493 IWL_DEBUG_ISR("Disabled interrupts\n");
4494 }
4495
4496 static const char *desc_lookup(int i)
4497 {
4498 switch (i) {
4499 case 1:
4500 return "FAIL";
4501 case 2:
4502 return "BAD_PARAM";
4503 case 3:
4504 return "BAD_CHECKSUM";
4505 case 4:
4506 return "NMI_INTERRUPT";
4507 case 5:
4508 return "SYSASSERT";
4509 case 6:
4510 return "FATAL_ERROR";
4511 }
4512
4513 return "UNKNOWN";
4514 }
4515
4516 #define ERROR_START_OFFSET (1 * sizeof(u32))
4517 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
4518
4519 static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4520 {
4521 u32 i;
4522 u32 desc, time, count, base, data1;
4523 u32 blink1, blink2, ilink1, ilink2;
4524 int rc;
4525
4526 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4527
4528 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4529 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4530 return;
4531 }
4532
4533 rc = iwl3945_grab_nic_access(priv);
4534 if (rc) {
4535 IWL_WARNING("Can not read from adapter at this time.\n");
4536 return;
4537 }
4538
4539 count = iwl3945_read_targ_mem(priv, base);
4540
4541 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4542 IWL_ERROR("Start IWL Error Log Dump:\n");
4543 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4544 priv->status, priv->config, count);
4545 }
4546
4547 IWL_ERROR("Desc Time asrtPC blink2 "
4548 "ilink1 nmiPC Line\n");
4549 for (i = ERROR_START_OFFSET;
4550 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4551 i += ERROR_ELEM_SIZE) {
4552 desc = iwl3945_read_targ_mem(priv, base + i);
4553 time =
4554 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4555 blink1 =
4556 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4557 blink2 =
4558 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4559 ilink1 =
4560 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4561 ilink2 =
4562 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4563 data1 =
4564 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4565
4566 IWL_ERROR
4567 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4568 desc_lookup(desc), desc, time, blink1, blink2,
4569 ilink1, ilink2, data1);
4570 }
4571
4572 iwl3945_release_nic_access(priv);
4573
4574 }
4575
4576 #define EVENT_START_OFFSET (6 * sizeof(u32))
4577
4578 /**
4579 * iwl3945_print_event_log - Dump error event log to syslog
4580 *
4581 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4582 */
4583 static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4584 u32 num_events, u32 mode)
4585 {
4586 u32 i;
4587 u32 base; /* SRAM byte address of event log header */
4588 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4589 u32 ptr; /* SRAM byte address of log data */
4590 u32 ev, time, data; /* event log data */
4591
4592 if (num_events == 0)
4593 return;
4594
4595 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4596
4597 if (mode == 0)
4598 event_size = 2 * sizeof(u32);
4599 else
4600 event_size = 3 * sizeof(u32);
4601
4602 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4603
4604 /* "time" is actually "data" for mode 0 (no timestamp).
4605 * place event id # at far right for easier visual parsing. */
4606 for (i = 0; i < num_events; i++) {
4607 ev = iwl3945_read_targ_mem(priv, ptr);
4608 ptr += sizeof(u32);
4609 time = iwl3945_read_targ_mem(priv, ptr);
4610 ptr += sizeof(u32);
4611 if (mode == 0)
4612 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4613 else {
4614 data = iwl3945_read_targ_mem(priv, ptr);
4615 ptr += sizeof(u32);
4616 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4617 }
4618 }
4619 }
4620
4621 static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4622 {
4623 int rc;
4624 u32 base; /* SRAM byte address of event log header */
4625 u32 capacity; /* event log capacity in # entries */
4626 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4627 u32 num_wraps; /* # times uCode wrapped to top of log */
4628 u32 next_entry; /* index of next entry to be written by uCode */
4629 u32 size; /* # entries that we'll print */
4630
4631 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4632 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4633 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4634 return;
4635 }
4636
4637 rc = iwl3945_grab_nic_access(priv);
4638 if (rc) {
4639 IWL_WARNING("Can not read from adapter at this time.\n");
4640 return;
4641 }
4642
4643 /* event log header */
4644 capacity = iwl3945_read_targ_mem(priv, base);
4645 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4646 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4647 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4648
4649 size = num_wraps ? capacity : next_entry;
4650
4651 /* bail out if nothing in log */
4652 if (size == 0) {
4653 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4654 iwl3945_release_nic_access(priv);
4655 return;
4656 }
4657
4658 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4659 size, num_wraps);
4660
4661 /* if uCode has wrapped back to top of log, start at the oldest entry,
4662 * i.e the next one that uCode would fill. */
4663 if (num_wraps)
4664 iwl3945_print_event_log(priv, next_entry,
4665 capacity - next_entry, mode);
4666
4667 /* (then/else) start at top of log */
4668 iwl3945_print_event_log(priv, 0, next_entry, mode);
4669
4670 iwl3945_release_nic_access(priv);
4671 }
4672
4673 /**
4674 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4675 */
4676 static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4677 {
4678 /* Set the FW error flag -- cleared on iwl3945_down */
4679 set_bit(STATUS_FW_ERROR, &priv->status);
4680
4681 /* Cancel currently queued command. */
4682 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4683
4684 #ifdef CONFIG_IWL3945_DEBUG
4685 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4686 iwl3945_dump_nic_error_log(priv);
4687 iwl3945_dump_nic_event_log(priv);
4688 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4689 }
4690 #endif
4691
4692 wake_up_interruptible(&priv->wait_command_queue);
4693
4694 /* Keep the restart process from trying to send host
4695 * commands by clearing the INIT status bit */
4696 clear_bit(STATUS_READY, &priv->status);
4697
4698 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4699 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4700 "Restarting adapter due to uCode error.\n");
4701
4702 if (iwl3945_is_associated(priv)) {
4703 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4704 sizeof(priv->recovery_rxon));
4705 priv->error_recovering = 1;
4706 }
4707 queue_work(priv->workqueue, &priv->restart);
4708 }
4709 }
4710
4711 static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4712 {
4713 unsigned long flags;
4714
4715 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4716 sizeof(priv->staging_rxon));
4717 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4718 iwl3945_commit_rxon(priv);
4719
4720 iwl3945_add_station(priv, priv->bssid, 1, 0);
4721
4722 spin_lock_irqsave(&priv->lock, flags);
4723 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4724 priv->error_recovering = 0;
4725 spin_unlock_irqrestore(&priv->lock, flags);
4726 }
4727
4728 static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4729 {
4730 u32 inta, handled = 0;
4731 u32 inta_fh;
4732 unsigned long flags;
4733 #ifdef CONFIG_IWL3945_DEBUG
4734 u32 inta_mask;
4735 #endif
4736
4737 spin_lock_irqsave(&priv->lock, flags);
4738
4739 /* Ack/clear/reset pending uCode interrupts.
4740 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4741 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4742 inta = iwl3945_read32(priv, CSR_INT);
4743 iwl3945_write32(priv, CSR_INT, inta);
4744
4745 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4746 * Any new interrupts that happen after this, either while we're
4747 * in this tasklet, or later, will show up in next ISR/tasklet. */
4748 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4749 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4750
4751 #ifdef CONFIG_IWL3945_DEBUG
4752 if (iwl3945_debug_level & IWL_DL_ISR) {
4753 /* just for debug */
4754 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4755 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4756 inta, inta_mask, inta_fh);
4757 }
4758 #endif
4759
4760 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4761 * atomic, make sure that inta covers all the interrupts that
4762 * we've discovered, even if FH interrupt came in just after
4763 * reading CSR_INT. */
4764 if (inta_fh & CSR_FH_INT_RX_MASK)
4765 inta |= CSR_INT_BIT_FH_RX;
4766 if (inta_fh & CSR_FH_INT_TX_MASK)
4767 inta |= CSR_INT_BIT_FH_TX;
4768
4769 /* Now service all interrupt bits discovered above. */
4770 if (inta & CSR_INT_BIT_HW_ERR) {
4771 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4772
4773 /* Tell the device to stop sending interrupts */
4774 iwl3945_disable_interrupts(priv);
4775
4776 iwl3945_irq_handle_error(priv);
4777
4778 handled |= CSR_INT_BIT_HW_ERR;
4779
4780 spin_unlock_irqrestore(&priv->lock, flags);
4781
4782 return;
4783 }
4784
4785 #ifdef CONFIG_IWL3945_DEBUG
4786 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4787 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4788 if (inta & CSR_INT_BIT_SCD)
4789 IWL_DEBUG_ISR("Scheduler finished to transmit "
4790 "the frame/frames.\n");
4791
4792 /* Alive notification via Rx interrupt will do the real work */
4793 if (inta & CSR_INT_BIT_ALIVE)
4794 IWL_DEBUG_ISR("Alive interrupt\n");
4795 }
4796 #endif
4797 /* Safely ignore these bits for debug checks below */
4798 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4799
4800 /* HW RF KILL switch toggled (4965 only) */
4801 if (inta & CSR_INT_BIT_RF_KILL) {
4802 int hw_rf_kill = 0;
4803 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4804 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4805 hw_rf_kill = 1;
4806
4807 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4808 "RF_KILL bit toggled to %s.\n",
4809 hw_rf_kill ? "disable radio":"enable radio");
4810
4811 /* Queue restart only if RF_KILL switch was set to "kill"
4812 * when we loaded driver, and is now set to "enable".
4813 * After we're Alive, RF_KILL gets handled by
4814 * iwl_rx_card_state_notif() */
4815 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4816 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4817 queue_work(priv->workqueue, &priv->restart);
4818 }
4819
4820 handled |= CSR_INT_BIT_RF_KILL;
4821 }
4822
4823 /* Chip got too hot and stopped itself (4965 only) */
4824 if (inta & CSR_INT_BIT_CT_KILL) {
4825 IWL_ERROR("Microcode CT kill error detected.\n");
4826 handled |= CSR_INT_BIT_CT_KILL;
4827 }
4828
4829 /* Error detected by uCode */
4830 if (inta & CSR_INT_BIT_SW_ERR) {
4831 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4832 inta);
4833 iwl3945_irq_handle_error(priv);
4834 handled |= CSR_INT_BIT_SW_ERR;
4835 }
4836
4837 /* uCode wakes up after power-down sleep */
4838 if (inta & CSR_INT_BIT_WAKEUP) {
4839 IWL_DEBUG_ISR("Wakeup interrupt\n");
4840 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4841 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4842 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4843 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4844 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4845 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4846 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4847
4848 handled |= CSR_INT_BIT_WAKEUP;
4849 }
4850
4851 /* All uCode command responses, including Tx command responses,
4852 * Rx "responses" (frame-received notification), and other
4853 * notifications from uCode come through here*/
4854 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4855 iwl3945_rx_handle(priv);
4856 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4857 }
4858
4859 if (inta & CSR_INT_BIT_FH_TX) {
4860 IWL_DEBUG_ISR("Tx interrupt\n");
4861
4862 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4863 if (!iwl3945_grab_nic_access(priv)) {
4864 iwl3945_write_direct32(priv,
4865 FH_TCSR_CREDIT
4866 (ALM_FH_SRVC_CHNL), 0x0);
4867 iwl3945_release_nic_access(priv);
4868 }
4869 handled |= CSR_INT_BIT_FH_TX;
4870 }
4871
4872 if (inta & ~handled)
4873 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4874
4875 if (inta & ~CSR_INI_SET_MASK) {
4876 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4877 inta & ~CSR_INI_SET_MASK);
4878 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4879 }
4880
4881 /* Re-enable all interrupts */
4882 iwl3945_enable_interrupts(priv);
4883
4884 #ifdef CONFIG_IWL3945_DEBUG
4885 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4886 inta = iwl3945_read32(priv, CSR_INT);
4887 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4888 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4889 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4890 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4891 }
4892 #endif
4893 spin_unlock_irqrestore(&priv->lock, flags);
4894 }
4895
4896 static irqreturn_t iwl3945_isr(int irq, void *data)
4897 {
4898 struct iwl3945_priv *priv = data;
4899 u32 inta, inta_mask;
4900 u32 inta_fh;
4901 if (!priv)
4902 return IRQ_NONE;
4903
4904 spin_lock(&priv->lock);
4905
4906 /* Disable (but don't clear!) interrupts here to avoid
4907 * back-to-back ISRs and sporadic interrupts from our NIC.
4908 * If we have something to service, the tasklet will re-enable ints.
4909 * If we *don't* have something, we'll re-enable before leaving here. */
4910 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4911 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4912
4913 /* Discover which interrupts are active/pending */
4914 inta = iwl3945_read32(priv, CSR_INT);
4915 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4916
4917 /* Ignore interrupt if there's nothing in NIC to service.
4918 * This may be due to IRQ shared with another device,
4919 * or due to sporadic interrupts thrown from our NIC. */
4920 if (!inta && !inta_fh) {
4921 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4922 goto none;
4923 }
4924
4925 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4926 /* Hardware disappeared */
4927 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4928 goto unplugged;
4929 }
4930
4931 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4932 inta, inta_mask, inta_fh);
4933
4934 inta &= ~CSR_INT_BIT_SCD;
4935
4936 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4937 if (likely(inta || inta_fh))
4938 tasklet_schedule(&priv->irq_tasklet);
4939 unplugged:
4940 spin_unlock(&priv->lock);
4941
4942 return IRQ_HANDLED;
4943
4944 none:
4945 /* re-enable interrupts here since we don't have anything to service. */
4946 iwl3945_enable_interrupts(priv);
4947 spin_unlock(&priv->lock);
4948 return IRQ_NONE;
4949 }
4950
4951 /************************** EEPROM BANDS ****************************
4952 *
4953 * The iwl3945_eeprom_band definitions below provide the mapping from the
4954 * EEPROM contents to the specific channel number supported for each
4955 * band.
4956 *
4957 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4958 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4959 * The specific geography and calibration information for that channel
4960 * is contained in the eeprom map itself.
4961 *
4962 * During init, we copy the eeprom information and channel map
4963 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4964 *
4965 * channel_map_24/52 provides the index in the channel_info array for a
4966 * given channel. We have to have two separate maps as there is channel
4967 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4968 * band_2
4969 *
4970 * A value of 0xff stored in the channel_map indicates that the channel
4971 * is not supported by the hardware at all.
4972 *
4973 * A value of 0xfe in the channel_map indicates that the channel is not
4974 * valid for Tx with the current hardware. This means that
4975 * while the system can tune and receive on a given channel, it may not
4976 * be able to associate or transmit any frames on that
4977 * channel. There is no corresponding channel information for that
4978 * entry.
4979 *
4980 *********************************************************************/
4981
4982 /* 2.4 GHz */
4983 static const u8 iwl3945_eeprom_band_1[14] = {
4984 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4985 };
4986
4987 /* 5.2 GHz bands */
4988 static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
4989 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4990 };
4991
4992 static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
4993 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4994 };
4995
4996 static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
4997 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4998 };
4999
5000 static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
5001 145, 149, 153, 157, 161, 165
5002 };
5003
5004 static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
5005 int *eeprom_ch_count,
5006 const struct iwl3945_eeprom_channel
5007 **eeprom_ch_info,
5008 const u8 **eeprom_ch_index)
5009 {
5010 switch (band) {
5011 case 1: /* 2.4GHz band */
5012 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
5013 *eeprom_ch_info = priv->eeprom.band_1_channels;
5014 *eeprom_ch_index = iwl3945_eeprom_band_1;
5015 break;
5016 case 2: /* 4.9GHz band */
5017 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
5018 *eeprom_ch_info = priv->eeprom.band_2_channels;
5019 *eeprom_ch_index = iwl3945_eeprom_band_2;
5020 break;
5021 case 3: /* 5.2GHz band */
5022 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
5023 *eeprom_ch_info = priv->eeprom.band_3_channels;
5024 *eeprom_ch_index = iwl3945_eeprom_band_3;
5025 break;
5026 case 4: /* 5.5GHz band */
5027 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
5028 *eeprom_ch_info = priv->eeprom.band_4_channels;
5029 *eeprom_ch_index = iwl3945_eeprom_band_4;
5030 break;
5031 case 5: /* 5.7GHz band */
5032 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
5033 *eeprom_ch_info = priv->eeprom.band_5_channels;
5034 *eeprom_ch_index = iwl3945_eeprom_band_5;
5035 break;
5036 default:
5037 BUG();
5038 return;
5039 }
5040 }
5041
5042 /**
5043 * iwl3945_get_channel_info - Find driver's private channel info
5044 *
5045 * Based on band and channel number.
5046 */
5047 const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
5048 int phymode, u16 channel)
5049 {
5050 int i;
5051
5052 switch (phymode) {
5053 case MODE_IEEE80211A:
5054 for (i = 14; i < priv->channel_count; i++) {
5055 if (priv->channel_info[i].channel == channel)
5056 return &priv->channel_info[i];
5057 }
5058 break;
5059
5060 case MODE_IEEE80211B:
5061 case MODE_IEEE80211G:
5062 if (channel >= 1 && channel <= 14)
5063 return &priv->channel_info[channel - 1];
5064 break;
5065
5066 }
5067
5068 return NULL;
5069 }
5070
5071 #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5072 ? # x " " : "")
5073
5074 /**
5075 * iwl3945_init_channel_map - Set up driver's info for all possible channels
5076 */
5077 static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
5078 {
5079 int eeprom_ch_count = 0;
5080 const u8 *eeprom_ch_index = NULL;
5081 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
5082 int band, ch;
5083 struct iwl3945_channel_info *ch_info;
5084
5085 if (priv->channel_count) {
5086 IWL_DEBUG_INFO("Channel map already initialized.\n");
5087 return 0;
5088 }
5089
5090 if (priv->eeprom.version < 0x2f) {
5091 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5092 priv->eeprom.version);
5093 return -EINVAL;
5094 }
5095
5096 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5097
5098 priv->channel_count =
5099 ARRAY_SIZE(iwl3945_eeprom_band_1) +
5100 ARRAY_SIZE(iwl3945_eeprom_band_2) +
5101 ARRAY_SIZE(iwl3945_eeprom_band_3) +
5102 ARRAY_SIZE(iwl3945_eeprom_band_4) +
5103 ARRAY_SIZE(iwl3945_eeprom_band_5);
5104
5105 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5106
5107 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5108 priv->channel_count, GFP_KERNEL);
5109 if (!priv->channel_info) {
5110 IWL_ERROR("Could not allocate channel_info\n");
5111 priv->channel_count = 0;
5112 return -ENOMEM;
5113 }
5114
5115 ch_info = priv->channel_info;
5116
5117 /* Loop through the 5 EEPROM bands adding them in order to the
5118 * channel map we maintain (that contains additional information than
5119 * what just in the EEPROM) */
5120 for (band = 1; band <= 5; band++) {
5121
5122 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5123 &eeprom_ch_info, &eeprom_ch_index);
5124
5125 /* Loop through each band adding each of the channels */
5126 for (ch = 0; ch < eeprom_ch_count; ch++) {
5127 ch_info->channel = eeprom_ch_index[ch];
5128 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5129 MODE_IEEE80211A;
5130
5131 /* permanently store EEPROM's channel regulatory flags
5132 * and max power in channel info database. */
5133 ch_info->eeprom = eeprom_ch_info[ch];
5134
5135 /* Copy the run-time flags so they are there even on
5136 * invalid channels */
5137 ch_info->flags = eeprom_ch_info[ch].flags;
5138
5139 if (!(is_channel_valid(ch_info))) {
5140 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5141 "No traffic\n",
5142 ch_info->channel,
5143 ch_info->flags,
5144 is_channel_a_band(ch_info) ?
5145 "5.2" : "2.4");
5146 ch_info++;
5147 continue;
5148 }
5149
5150 /* Initialize regulatory-based run-time data */
5151 ch_info->max_power_avg = ch_info->curr_txpow =
5152 eeprom_ch_info[ch].max_power_avg;
5153 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5154 ch_info->min_power = 0;
5155
5156 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5157 " %ddBm): Ad-Hoc %ssupported\n",
5158 ch_info->channel,
5159 is_channel_a_band(ch_info) ?
5160 "5.2" : "2.4",
5161 CHECK_AND_PRINT(IBSS),
5162 CHECK_AND_PRINT(ACTIVE),
5163 CHECK_AND_PRINT(RADAR),
5164 CHECK_AND_PRINT(WIDE),
5165 CHECK_AND_PRINT(NARROW),
5166 CHECK_AND_PRINT(DFS),
5167 eeprom_ch_info[ch].flags,
5168 eeprom_ch_info[ch].max_power_avg,
5169 ((eeprom_ch_info[ch].
5170 flags & EEPROM_CHANNEL_IBSS)
5171 && !(eeprom_ch_info[ch].
5172 flags & EEPROM_CHANNEL_RADAR))
5173 ? "" : "not ");
5174
5175 /* Set the user_txpower_limit to the highest power
5176 * supported by any channel */
5177 if (eeprom_ch_info[ch].max_power_avg >
5178 priv->user_txpower_limit)
5179 priv->user_txpower_limit =
5180 eeprom_ch_info[ch].max_power_avg;
5181
5182 ch_info++;
5183 }
5184 }
5185
5186 /* Set up txpower settings in driver for all channels */
5187 if (iwl3945_txpower_set_from_eeprom(priv))
5188 return -EIO;
5189
5190 return 0;
5191 }
5192
5193 /*
5194 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
5195 */
5196 static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
5197 {
5198 kfree(priv->channel_info);
5199 priv->channel_count = 0;
5200 }
5201
5202 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5203 * sending probe req. This should be set long enough to hear probe responses
5204 * from more than one AP. */
5205 #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5206 #define IWL_ACTIVE_DWELL_TIME_52 (10)
5207
5208 /* For faster active scanning, scan will move to the next channel if fewer than
5209 * PLCP_QUIET_THRESH packets are heard on this channel within
5210 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5211 * time if it's a quiet channel (nothing responded to our probe, and there's
5212 * no other traffic).
5213 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5214 #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5215 #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5216
5217 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5218 * Must be set longer than active dwell time.
5219 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5220 #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5221 #define IWL_PASSIVE_DWELL_TIME_52 (10)
5222 #define IWL_PASSIVE_DWELL_BASE (100)
5223 #define IWL_CHANNEL_TUNE_TIME 5
5224
5225 static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
5226 {
5227 if (phymode == MODE_IEEE80211A)
5228 return IWL_ACTIVE_DWELL_TIME_52;
5229 else
5230 return IWL_ACTIVE_DWELL_TIME_24;
5231 }
5232
5233 static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
5234 {
5235 u16 active = iwl3945_get_active_dwell_time(priv, phymode);
5236 u16 passive = (phymode != MODE_IEEE80211A) ?
5237 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5238 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5239
5240 if (iwl3945_is_associated(priv)) {
5241 /* If we're associated, we clamp the maximum passive
5242 * dwell time to be 98% of the beacon interval (minus
5243 * 2 * channel tune time) */
5244 passive = priv->beacon_int;
5245 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5246 passive = IWL_PASSIVE_DWELL_BASE;
5247 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5248 }
5249
5250 if (passive <= active)
5251 passive = active + 1;
5252
5253 return passive;
5254 }
5255
5256 static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
5257 u8 is_active, u8 direct_mask,
5258 struct iwl3945_scan_channel *scan_ch)
5259 {
5260 const struct ieee80211_channel *channels = NULL;
5261 const struct ieee80211_hw_mode *hw_mode;
5262 const struct iwl3945_channel_info *ch_info;
5263 u16 passive_dwell = 0;
5264 u16 active_dwell = 0;
5265 int added, i;
5266
5267 hw_mode = iwl3945_get_hw_mode(priv, phymode);
5268 if (!hw_mode)
5269 return 0;
5270
5271 channels = hw_mode->channels;
5272
5273 active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
5274 passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
5275
5276 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5277 if (channels[i].chan ==
5278 le16_to_cpu(priv->active_rxon.channel)) {
5279 if (iwl3945_is_associated(priv)) {
5280 IWL_DEBUG_SCAN
5281 ("Skipping current channel %d\n",
5282 le16_to_cpu(priv->active_rxon.channel));
5283 continue;
5284 }
5285 } else if (priv->only_active_channel)
5286 continue;
5287
5288 scan_ch->channel = channels[i].chan;
5289
5290 ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
5291 if (!is_channel_valid(ch_info)) {
5292 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5293 scan_ch->channel);
5294 continue;
5295 }
5296
5297 if (!is_active || is_channel_passive(ch_info) ||
5298 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5299 scan_ch->type = 0; /* passive */
5300 else
5301 scan_ch->type = 1; /* active */
5302
5303 if (scan_ch->type & 1)
5304 scan_ch->type |= (direct_mask << 1);
5305
5306 if (is_channel_narrow(ch_info))
5307 scan_ch->type |= (1 << 7);
5308
5309 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5310 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5311
5312 /* Set txpower levels to defaults */
5313 scan_ch->tpc.dsp_atten = 110;
5314 /* scan_pwr_info->tpc.dsp_atten; */
5315
5316 /*scan_pwr_info->tpc.tx_gain; */
5317 if (phymode == MODE_IEEE80211A)
5318 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5319 else {
5320 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5321 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
5322 * power level:
5323 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
5324 */
5325 }
5326
5327 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5328 scan_ch->channel,
5329 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5330 (scan_ch->type & 1) ?
5331 active_dwell : passive_dwell);
5332
5333 scan_ch++;
5334 added++;
5335 }
5336
5337 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5338 return added;
5339 }
5340
5341 static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
5342 {
5343 int i, j;
5344 for (i = 0; i < 3; i++) {
5345 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5346 for (j = 0; j < hw_mode->num_channels; j++)
5347 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5348 }
5349 }
5350
5351 static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5352 struct ieee80211_rate *rates)
5353 {
5354 int i;
5355
5356 for (i = 0; i < IWL_RATE_COUNT; i++) {
5357 rates[i].rate = iwl3945_rates[i].ieee * 5;
5358 rates[i].val = i; /* Rate scaling will work on indexes */
5359 rates[i].val2 = i;
5360 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5361 /* Only OFDM have the bits-per-symbol set */
5362 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5363 rates[i].flags |= IEEE80211_RATE_OFDM;
5364 else {
5365 /*
5366 * If CCK 1M then set rate flag to CCK else CCK_2
5367 * which is CCK | PREAMBLE2
5368 */
5369 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5370 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5371 }
5372
5373 /* Set up which ones are basic rates... */
5374 if (IWL_BASIC_RATES_MASK & (1 << i))
5375 rates[i].flags |= IEEE80211_RATE_BASIC;
5376 }
5377 }
5378
5379 /**
5380 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5381 */
5382 static int iwl3945_init_geos(struct iwl3945_priv *priv)
5383 {
5384 struct iwl3945_channel_info *ch;
5385 struct ieee80211_hw_mode *modes;
5386 struct ieee80211_channel *channels;
5387 struct ieee80211_channel *geo_ch;
5388 struct ieee80211_rate *rates;
5389 int i = 0;
5390 enum {
5391 A = 0,
5392 B = 1,
5393 G = 2,
5394 };
5395 int mode_count = 3;
5396
5397 if (priv->modes) {
5398 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5399 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5400 return 0;
5401 }
5402
5403 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5404 GFP_KERNEL);
5405 if (!modes)
5406 return -ENOMEM;
5407
5408 channels = kzalloc(sizeof(struct ieee80211_channel) *
5409 priv->channel_count, GFP_KERNEL);
5410 if (!channels) {
5411 kfree(modes);
5412 return -ENOMEM;
5413 }
5414
5415 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5416 GFP_KERNEL);
5417 if (!rates) {
5418 kfree(modes);
5419 kfree(channels);
5420 return -ENOMEM;
5421 }
5422
5423 /* 0 = 802.11a
5424 * 1 = 802.11b
5425 * 2 = 802.11g
5426 */
5427
5428 /* 5.2GHz channels start after the 2.4GHz channels */
5429 modes[A].mode = MODE_IEEE80211A;
5430 modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5431 modes[A].rates = &rates[4];
5432 modes[A].num_rates = 8; /* just OFDM */
5433 modes[A].num_channels = 0;
5434
5435 modes[B].mode = MODE_IEEE80211B;
5436 modes[B].channels = channels;
5437 modes[B].rates = rates;
5438 modes[B].num_rates = 4; /* just CCK */
5439 modes[B].num_channels = 0;
5440
5441 modes[G].mode = MODE_IEEE80211G;
5442 modes[G].channels = channels;
5443 modes[G].rates = rates;
5444 modes[G].num_rates = 12; /* OFDM & CCK */
5445 modes[G].num_channels = 0;
5446
5447 priv->ieee_channels = channels;
5448 priv->ieee_rates = rates;
5449
5450 iwl3945_init_hw_rates(priv, rates);
5451
5452 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5453 ch = &priv->channel_info[i];
5454
5455 if (!is_channel_valid(ch)) {
5456 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5457 "skipping.\n",
5458 ch->channel, is_channel_a_band(ch) ?
5459 "5.2" : "2.4");
5460 continue;
5461 }
5462
5463 if (is_channel_a_band(ch))
5464 geo_ch = &modes[A].channels[modes[A].num_channels++];
5465 else {
5466 geo_ch = &modes[B].channels[modes[B].num_channels++];
5467 modes[G].num_channels++;
5468 }
5469
5470 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5471 geo_ch->chan = ch->channel;
5472 geo_ch->power_level = ch->max_power_avg;
5473 geo_ch->antenna_max = 0xff;
5474
5475 if (is_channel_valid(ch)) {
5476 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5477 if (ch->flags & EEPROM_CHANNEL_IBSS)
5478 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5479
5480 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5481 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5482
5483 if (ch->flags & EEPROM_CHANNEL_RADAR)
5484 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5485
5486 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5487 priv->max_channel_txpower_limit =
5488 ch->max_power_avg;
5489 }
5490
5491 geo_ch->val = geo_ch->flag;
5492 }
5493
5494 if ((modes[A].num_channels == 0) && priv->is_abg) {
5495 printk(KERN_INFO DRV_NAME
5496 ": Incorrectly detected BG card as ABG. Please send "
5497 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5498 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5499 priv->is_abg = 0;
5500 }
5501
5502 printk(KERN_INFO DRV_NAME
5503 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5504 modes[G].num_channels, modes[A].num_channels);
5505
5506 /*
5507 * NOTE: We register these in preference of order -- the
5508 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5509 * a phymode based on rates or AP capabilities but seems to
5510 * configure it purely on if the channel being configured
5511 * is supported by a mode -- and the first match is taken
5512 */
5513
5514 if (modes[G].num_channels)
5515 ieee80211_register_hwmode(priv->hw, &modes[G]);
5516 if (modes[B].num_channels)
5517 ieee80211_register_hwmode(priv->hw, &modes[B]);
5518 if (modes[A].num_channels)
5519 ieee80211_register_hwmode(priv->hw, &modes[A]);
5520
5521 priv->modes = modes;
5522 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5523
5524 return 0;
5525 }
5526
5527 /*
5528 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5529 */
5530 static void iwl3945_free_geos(struct iwl3945_priv *priv)
5531 {
5532 kfree(priv->modes);
5533 kfree(priv->ieee_channels);
5534 kfree(priv->ieee_rates);
5535 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5536 }
5537
5538 /******************************************************************************
5539 *
5540 * uCode download functions
5541 *
5542 ******************************************************************************/
5543
5544 static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5545 {
5546 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5547 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5548 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5549 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5550 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5551 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
5552 }
5553
5554 /**
5555 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5556 * looking at all data.
5557 */
5558 static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5559 {
5560 u32 val;
5561 u32 save_len = len;
5562 int rc = 0;
5563 u32 errcnt;
5564
5565 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5566
5567 rc = iwl3945_grab_nic_access(priv);
5568 if (rc)
5569 return rc;
5570
5571 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5572
5573 errcnt = 0;
5574 for (; len > 0; len -= sizeof(u32), image++) {
5575 /* read data comes through single port, auto-incr addr */
5576 /* NOTE: Use the debugless read so we don't flood kernel log
5577 * if IWL_DL_IO is set */
5578 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5579 if (val != le32_to_cpu(*image)) {
5580 IWL_ERROR("uCode INST section is invalid at "
5581 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5582 save_len - len, val, le32_to_cpu(*image));
5583 rc = -EIO;
5584 errcnt++;
5585 if (errcnt >= 20)
5586 break;
5587 }
5588 }
5589
5590 iwl3945_release_nic_access(priv);
5591
5592 if (!errcnt)
5593 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5594
5595 return rc;
5596 }
5597
5598
5599 /**
5600 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5601 * using sample data 100 bytes apart. If these sample points are good,
5602 * it's a pretty good bet that everything between them is good, too.
5603 */
5604 static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5605 {
5606 u32 val;
5607 int rc = 0;
5608 u32 errcnt = 0;
5609 u32 i;
5610
5611 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5612
5613 rc = iwl3945_grab_nic_access(priv);
5614 if (rc)
5615 return rc;
5616
5617 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5618 /* read data comes through single port, auto-incr addr */
5619 /* NOTE: Use the debugless read so we don't flood kernel log
5620 * if IWL_DL_IO is set */
5621 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5622 i + RTC_INST_LOWER_BOUND);
5623 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5624 if (val != le32_to_cpu(*image)) {
5625 #if 0 /* Enable this if you want to see details */
5626 IWL_ERROR("uCode INST section is invalid at "
5627 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5628 i, val, *image);
5629 #endif
5630 rc = -EIO;
5631 errcnt++;
5632 if (errcnt >= 3)
5633 break;
5634 }
5635 }
5636
5637 iwl3945_release_nic_access(priv);
5638
5639 return rc;
5640 }
5641
5642
5643 /**
5644 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5645 * and verify its contents
5646 */
5647 static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5648 {
5649 __le32 *image;
5650 u32 len;
5651 int rc = 0;
5652
5653 /* Try bootstrap */
5654 image = (__le32 *)priv->ucode_boot.v_addr;
5655 len = priv->ucode_boot.len;
5656 rc = iwl3945_verify_inst_sparse(priv, image, len);
5657 if (rc == 0) {
5658 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5659 return 0;
5660 }
5661
5662 /* Try initialize */
5663 image = (__le32 *)priv->ucode_init.v_addr;
5664 len = priv->ucode_init.len;
5665 rc = iwl3945_verify_inst_sparse(priv, image, len);
5666 if (rc == 0) {
5667 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5668 return 0;
5669 }
5670
5671 /* Try runtime/protocol */
5672 image = (__le32 *)priv->ucode_code.v_addr;
5673 len = priv->ucode_code.len;
5674 rc = iwl3945_verify_inst_sparse(priv, image, len);
5675 if (rc == 0) {
5676 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5677 return 0;
5678 }
5679
5680 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5681
5682 /* Since nothing seems to match, show first several data entries in
5683 * instruction SRAM, so maybe visual inspection will give a clue.
5684 * Selection of bootstrap image (vs. other images) is arbitrary. */
5685 image = (__le32 *)priv->ucode_boot.v_addr;
5686 len = priv->ucode_boot.len;
5687 rc = iwl3945_verify_inst_full(priv, image, len);
5688
5689 return rc;
5690 }
5691
5692
5693 /* check contents of special bootstrap uCode SRAM */
5694 static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5695 {
5696 __le32 *image = priv->ucode_boot.v_addr;
5697 u32 len = priv->ucode_boot.len;
5698 u32 reg;
5699 u32 val;
5700
5701 IWL_DEBUG_INFO("Begin verify bsm\n");
5702
5703 /* verify BSM SRAM contents */
5704 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5705 for (reg = BSM_SRAM_LOWER_BOUND;
5706 reg < BSM_SRAM_LOWER_BOUND + len;
5707 reg += sizeof(u32), image ++) {
5708 val = iwl3945_read_prph(priv, reg);
5709 if (val != le32_to_cpu(*image)) {
5710 IWL_ERROR("BSM uCode verification failed at "
5711 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5712 BSM_SRAM_LOWER_BOUND,
5713 reg - BSM_SRAM_LOWER_BOUND, len,
5714 val, le32_to_cpu(*image));
5715 return -EIO;
5716 }
5717 }
5718
5719 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5720
5721 return 0;
5722 }
5723
5724 /**
5725 * iwl3945_load_bsm - Load bootstrap instructions
5726 *
5727 * BSM operation:
5728 *
5729 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5730 * in special SRAM that does not power down during RFKILL. When powering back
5731 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5732 * the bootstrap program into the on-board processor, and starts it.
5733 *
5734 * The bootstrap program loads (via DMA) instructions and data for a new
5735 * program from host DRAM locations indicated by the host driver in the
5736 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5737 * automatically.
5738 *
5739 * When initializing the NIC, the host driver points the BSM to the
5740 * "initialize" uCode image. This uCode sets up some internal data, then
5741 * notifies host via "initialize alive" that it is complete.
5742 *
5743 * The host then replaces the BSM_DRAM_* pointer values to point to the
5744 * normal runtime uCode instructions and a backup uCode data cache buffer
5745 * (filled initially with starting data values for the on-board processor),
5746 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5747 * which begins normal operation.
5748 *
5749 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5750 * the backup data cache in DRAM before SRAM is powered down.
5751 *
5752 * When powering back up, the BSM loads the bootstrap program. This reloads
5753 * the runtime uCode instructions and the backup data cache into SRAM,
5754 * and re-launches the runtime uCode from where it left off.
5755 */
5756 static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5757 {
5758 __le32 *image = priv->ucode_boot.v_addr;
5759 u32 len = priv->ucode_boot.len;
5760 dma_addr_t pinst;
5761 dma_addr_t pdata;
5762 u32 inst_len;
5763 u32 data_len;
5764 int rc;
5765 int i;
5766 u32 done;
5767 u32 reg_offset;
5768
5769 IWL_DEBUG_INFO("Begin load bsm\n");
5770
5771 /* make sure bootstrap program is no larger than BSM's SRAM size */
5772 if (len > IWL_MAX_BSM_SIZE)
5773 return -EINVAL;
5774
5775 /* Tell bootstrap uCode where to find the "Initialize" uCode
5776 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
5777 * NOTE: iwl3945_initialize_alive_start() will replace these values,
5778 * after the "initialize" uCode has run, to point to
5779 * runtime/protocol instructions and backup data cache. */
5780 pinst = priv->ucode_init.p_addr;
5781 pdata = priv->ucode_init_data.p_addr;
5782 inst_len = priv->ucode_init.len;
5783 data_len = priv->ucode_init_data.len;
5784
5785 rc = iwl3945_grab_nic_access(priv);
5786 if (rc)
5787 return rc;
5788
5789 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5790 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5791 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5792 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5793
5794 /* Fill BSM memory with bootstrap instructions */
5795 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5796 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5797 reg_offset += sizeof(u32), image++)
5798 _iwl3945_write_prph(priv, reg_offset,
5799 le32_to_cpu(*image));
5800
5801 rc = iwl3945_verify_bsm(priv);
5802 if (rc) {
5803 iwl3945_release_nic_access(priv);
5804 return rc;
5805 }
5806
5807 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5808 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5809 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5810 RTC_INST_LOWER_BOUND);
5811 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5812
5813 /* Load bootstrap code into instruction SRAM now,
5814 * to prepare to load "initialize" uCode */
5815 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5816 BSM_WR_CTRL_REG_BIT_START);
5817
5818 /* Wait for load of bootstrap uCode to finish */
5819 for (i = 0; i < 100; i++) {
5820 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5821 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5822 break;
5823 udelay(10);
5824 }
5825 if (i < 100)
5826 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5827 else {
5828 IWL_ERROR("BSM write did not complete!\n");
5829 return -EIO;
5830 }
5831
5832 /* Enable future boot loads whenever power management unit triggers it
5833 * (e.g. when powering back up after power-save shutdown) */
5834 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5835 BSM_WR_CTRL_REG_BIT_START_EN);
5836
5837 iwl3945_release_nic_access(priv);
5838
5839 return 0;
5840 }
5841
5842 static void iwl3945_nic_start(struct iwl3945_priv *priv)
5843 {
5844 /* Remove all resets to allow NIC to operate */
5845 iwl3945_write32(priv, CSR_RESET, 0);
5846 }
5847
5848 /**
5849 * iwl3945_read_ucode - Read uCode images from disk file.
5850 *
5851 * Copy into buffers for card to fetch via bus-mastering
5852 */
5853 static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5854 {
5855 struct iwl3945_ucode *ucode;
5856 int ret = 0;
5857 const struct firmware *ucode_raw;
5858 /* firmware file name contains uCode/driver compatibility version */
5859 const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
5860 u8 *src;
5861 size_t len;
5862 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5863
5864 /* Ask kernel firmware_class module to get the boot firmware off disk.
5865 * request_firmware() is synchronous, file is in memory on return. */
5866 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5867 if (ret < 0) {
5868 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5869 name, ret);
5870 goto error;
5871 }
5872
5873 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5874 name, ucode_raw->size);
5875
5876 /* Make sure that we got at least our header! */
5877 if (ucode_raw->size < sizeof(*ucode)) {
5878 IWL_ERROR("File size way too small!\n");
5879 ret = -EINVAL;
5880 goto err_release;
5881 }
5882
5883 /* Data from ucode file: header followed by uCode images */
5884 ucode = (void *)ucode_raw->data;
5885
5886 ver = le32_to_cpu(ucode->ver);
5887 inst_size = le32_to_cpu(ucode->inst_size);
5888 data_size = le32_to_cpu(ucode->data_size);
5889 init_size = le32_to_cpu(ucode->init_size);
5890 init_data_size = le32_to_cpu(ucode->init_data_size);
5891 boot_size = le32_to_cpu(ucode->boot_size);
5892
5893 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5894 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5895 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5896 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5897 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5898 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5899
5900 /* Verify size of file vs. image size info in file's header */
5901 if (ucode_raw->size < sizeof(*ucode) +
5902 inst_size + data_size + init_size +
5903 init_data_size + boot_size) {
5904
5905 IWL_DEBUG_INFO("uCode file size %d too small\n",
5906 (int)ucode_raw->size);
5907 ret = -EINVAL;
5908 goto err_release;
5909 }
5910
5911 /* Verify that uCode images will fit in card's SRAM */
5912 if (inst_size > IWL_MAX_INST_SIZE) {
5913 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5914 inst_size);
5915 ret = -EINVAL;
5916 goto err_release;
5917 }
5918
5919 if (data_size > IWL_MAX_DATA_SIZE) {
5920 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5921 data_size);
5922 ret = -EINVAL;
5923 goto err_release;
5924 }
5925 if (init_size > IWL_MAX_INST_SIZE) {
5926 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5927 init_size);
5928 ret = -EINVAL;
5929 goto err_release;
5930 }
5931 if (init_data_size > IWL_MAX_DATA_SIZE) {
5932 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5933 init_data_size);
5934 ret = -EINVAL;
5935 goto err_release;
5936 }
5937 if (boot_size > IWL_MAX_BSM_SIZE) {
5938 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5939 boot_size);
5940 ret = -EINVAL;
5941 goto err_release;
5942 }
5943
5944 /* Allocate ucode buffers for card's bus-master loading ... */
5945
5946 /* Runtime instructions and 2 copies of data:
5947 * 1) unmodified from disk
5948 * 2) backup cache for save/restore during power-downs */
5949 priv->ucode_code.len = inst_size;
5950 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
5951
5952 priv->ucode_data.len = data_size;
5953 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
5954
5955 priv->ucode_data_backup.len = data_size;
5956 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5957
5958 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
5959 !priv->ucode_data_backup.v_addr)
5960 goto err_pci_alloc;
5961
5962 /* Initialization instructions and data */
5963 if (init_size && init_data_size) {
5964 priv->ucode_init.len = init_size;
5965 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
5966
5967 priv->ucode_init_data.len = init_data_size;
5968 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5969
5970 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5971 goto err_pci_alloc;
5972 }
5973
5974 /* Bootstrap (instructions only, no data) */
5975 if (boot_size) {
5976 priv->ucode_boot.len = boot_size;
5977 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
5978
5979 if (!priv->ucode_boot.v_addr)
5980 goto err_pci_alloc;
5981 }
5982
5983 /* Copy images into buffers for card's bus-master reads ... */
5984
5985 /* Runtime instructions (first block of data in file) */
5986 src = &ucode->data[0];
5987 len = priv->ucode_code.len;
5988 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
5989 memcpy(priv->ucode_code.v_addr, src, len);
5990 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5991 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5992
5993 /* Runtime data (2nd block)
5994 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
5995 src = &ucode->data[inst_size];
5996 len = priv->ucode_data.len;
5997 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
5998 memcpy(priv->ucode_data.v_addr, src, len);
5999 memcpy(priv->ucode_data_backup.v_addr, src, len);
6000
6001 /* Initialization instructions (3rd block) */
6002 if (init_size) {
6003 src = &ucode->data[inst_size + data_size];
6004 len = priv->ucode_init.len;
6005 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6006 len);
6007 memcpy(priv->ucode_init.v_addr, src, len);
6008 }
6009
6010 /* Initialization data (4th block) */
6011 if (init_data_size) {
6012 src = &ucode->data[inst_size + data_size + init_size];
6013 len = priv->ucode_init_data.len;
6014 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
6015 (int)len);
6016 memcpy(priv->ucode_init_data.v_addr, src, len);
6017 }
6018
6019 /* Bootstrap instructions (5th block) */
6020 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6021 len = priv->ucode_boot.len;
6022 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
6023 (int)len);
6024 memcpy(priv->ucode_boot.v_addr, src, len);
6025
6026 /* We have our copies now, allow OS release its copies */
6027 release_firmware(ucode_raw);
6028 return 0;
6029
6030 err_pci_alloc:
6031 IWL_ERROR("failed to allocate pci memory\n");
6032 ret = -ENOMEM;
6033 iwl3945_dealloc_ucode_pci(priv);
6034
6035 err_release:
6036 release_firmware(ucode_raw);
6037
6038 error:
6039 return ret;
6040 }
6041
6042
6043 /**
6044 * iwl3945_set_ucode_ptrs - Set uCode address location
6045 *
6046 * Tell initialization uCode where to find runtime uCode.
6047 *
6048 * BSM registers initially contain pointers to initialization uCode.
6049 * We need to replace them to load runtime uCode inst and data,
6050 * and to save runtime data when powering down.
6051 */
6052 static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
6053 {
6054 dma_addr_t pinst;
6055 dma_addr_t pdata;
6056 int rc = 0;
6057 unsigned long flags;
6058
6059 /* bits 31:0 for 3945 */
6060 pinst = priv->ucode_code.p_addr;
6061 pdata = priv->ucode_data_backup.p_addr;
6062
6063 spin_lock_irqsave(&priv->lock, flags);
6064 rc = iwl3945_grab_nic_access(priv);
6065 if (rc) {
6066 spin_unlock_irqrestore(&priv->lock, flags);
6067 return rc;
6068 }
6069
6070 /* Tell bootstrap uCode where to find image to load */
6071 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6072 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6073 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6074 priv->ucode_data.len);
6075
6076 /* Inst bytecount must be last to set up, bit 31 signals uCode
6077 * that all new ptr/size info is in place */
6078 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6079 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6080
6081 iwl3945_release_nic_access(priv);
6082
6083 spin_unlock_irqrestore(&priv->lock, flags);
6084
6085 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6086
6087 return rc;
6088 }
6089
6090 /**
6091 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6092 *
6093 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6094 *
6095 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6096 */
6097 static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6098 {
6099 /* Check alive response for "valid" sign from uCode */
6100 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6101 /* We had an error bringing up the hardware, so take it
6102 * all the way back down so we can try again */
6103 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6104 goto restart;
6105 }
6106
6107 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6108 * This is a paranoid check, because we would not have gotten the
6109 * "initialize" alive if code weren't properly loaded. */
6110 if (iwl3945_verify_ucode(priv)) {
6111 /* Runtime instruction load was bad;
6112 * take it all the way back down so we can try again */
6113 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6114 goto restart;
6115 }
6116
6117 /* Send pointers to protocol/runtime uCode image ... init code will
6118 * load and launch runtime uCode, which will send us another "Alive"
6119 * notification. */
6120 IWL_DEBUG_INFO("Initialization Alive received.\n");
6121 if (iwl3945_set_ucode_ptrs(priv)) {
6122 /* Runtime instruction load won't happen;
6123 * take it all the way back down so we can try again */
6124 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6125 goto restart;
6126 }
6127 return;
6128
6129 restart:
6130 queue_work(priv->workqueue, &priv->restart);
6131 }
6132
6133
6134 /**
6135 * iwl3945_alive_start - called after REPLY_ALIVE notification received
6136 * from protocol/runtime uCode (initialization uCode's
6137 * Alive gets handled by iwl3945_init_alive_start()).
6138 */
6139 static void iwl3945_alive_start(struct iwl3945_priv *priv)
6140 {
6141 int rc = 0;
6142 int thermal_spin = 0;
6143 u32 rfkill;
6144
6145 IWL_DEBUG_INFO("Runtime Alive received.\n");
6146
6147 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6148 /* We had an error bringing up the hardware, so take it
6149 * all the way back down so we can try again */
6150 IWL_DEBUG_INFO("Alive failed.\n");
6151 goto restart;
6152 }
6153
6154 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6155 * This is a paranoid check, because we would not have gotten the
6156 * "runtime" alive if code weren't properly loaded. */
6157 if (iwl3945_verify_ucode(priv)) {
6158 /* Runtime instruction load was bad;
6159 * take it all the way back down so we can try again */
6160 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6161 goto restart;
6162 }
6163
6164 iwl3945_clear_stations_table(priv);
6165
6166 rc = iwl3945_grab_nic_access(priv);
6167 if (rc) {
6168 IWL_WARNING("Can not read rfkill status from adapter\n");
6169 return;
6170 }
6171
6172 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6173 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6174 iwl3945_release_nic_access(priv);
6175
6176 if (rfkill & 0x1) {
6177 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6178 /* if rfkill is not on, then wait for thermal
6179 * sensor in adapter to kick in */
6180 while (iwl3945_hw_get_temperature(priv) == 0) {
6181 thermal_spin++;
6182 udelay(10);
6183 }
6184
6185 if (thermal_spin)
6186 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
6187 thermal_spin * 10);
6188 } else
6189 set_bit(STATUS_RF_KILL_HW, &priv->status);
6190
6191 /* After the ALIVE response, we can send commands to 3945 uCode */
6192 set_bit(STATUS_ALIVE, &priv->status);
6193
6194 /* Clear out the uCode error bit if it is set */
6195 clear_bit(STATUS_FW_ERROR, &priv->status);
6196
6197 if (iwl3945_is_rfkill(priv))
6198 return;
6199
6200 ieee80211_start_queues(priv->hw);
6201
6202 priv->active_rate = priv->rates_mask;
6203 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6204
6205 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6206
6207 if (iwl3945_is_associated(priv)) {
6208 struct iwl3945_rxon_cmd *active_rxon =
6209 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6210
6211 memcpy(&priv->staging_rxon, &priv->active_rxon,
6212 sizeof(priv->staging_rxon));
6213 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6214 } else {
6215 /* Initialize our rx_config data */
6216 iwl3945_connection_init_rx_config(priv);
6217 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6218 }
6219
6220 /* Configure Bluetooth device coexistence support */
6221 iwl3945_send_bt_config(priv);
6222
6223 /* Configure the adapter for unassociated operation */
6224 iwl3945_commit_rxon(priv);
6225
6226 /* At this point, the NIC is initialized and operational */
6227 priv->notif_missed_beacons = 0;
6228 set_bit(STATUS_READY, &priv->status);
6229
6230 iwl3945_reg_txpower_periodic(priv);
6231
6232 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6233 wake_up_interruptible(&priv->wait_command_queue);
6234
6235 if (priv->error_recovering)
6236 iwl3945_error_recovery(priv);
6237
6238 return;
6239
6240 restart:
6241 queue_work(priv->workqueue, &priv->restart);
6242 }
6243
6244 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6245
6246 static void __iwl3945_down(struct iwl3945_priv *priv)
6247 {
6248 unsigned long flags;
6249 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6250 struct ieee80211_conf *conf = NULL;
6251
6252 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6253
6254 conf = ieee80211_get_hw_conf(priv->hw);
6255
6256 if (!exit_pending)
6257 set_bit(STATUS_EXIT_PENDING, &priv->status);
6258
6259 iwl3945_clear_stations_table(priv);
6260
6261 /* Unblock any waiting calls */
6262 wake_up_interruptible_all(&priv->wait_command_queue);
6263
6264 /* Wipe out the EXIT_PENDING status bit if we are not actually
6265 * exiting the module */
6266 if (!exit_pending)
6267 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6268
6269 /* stop and reset the on-board processor */
6270 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6271
6272 /* tell the device to stop sending interrupts */
6273 iwl3945_disable_interrupts(priv);
6274
6275 if (priv->mac80211_registered)
6276 ieee80211_stop_queues(priv->hw);
6277
6278 /* If we have not previously called iwl3945_init() then
6279 * clear all bits but the RF Kill and SUSPEND bits and return */
6280 if (!iwl3945_is_init(priv)) {
6281 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6282 STATUS_RF_KILL_HW |
6283 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6284 STATUS_RF_KILL_SW |
6285 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
6286 =======
6287 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6288 STATUS_GEO_CONFIGURED |
6289 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
6290 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6291 STATUS_IN_SUSPEND;
6292 goto exit;
6293 }
6294
6295 /* ...otherwise clear out all the status bits but the RF Kill and
6296 * SUSPEND bits and continue taking the NIC down. */
6297 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6298 STATUS_RF_KILL_HW |
6299 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6300 STATUS_RF_KILL_SW |
6301 <<<<<<< HEAD:drivers/net/wireless/iwlwifi/iwl3945-base.c
6302 =======
6303 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6304 STATUS_GEO_CONFIGURED |
6305 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/net/wireless/iwlwifi/iwl3945-base.c
6306 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6307 STATUS_IN_SUSPEND |
6308 test_bit(STATUS_FW_ERROR, &priv->status) <<
6309 STATUS_FW_ERROR;
6310
6311 spin_lock_irqsave(&priv->lock, flags);
6312 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6313 spin_unlock_irqrestore(&priv->lock, flags);
6314
6315 iwl3945_hw_txq_ctx_stop(priv);
6316 iwl3945_hw_rxq_stop(priv);
6317
6318 spin_lock_irqsave(&priv->lock, flags);
6319 if (!iwl3945_grab_nic_access(priv)) {
6320 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6321 APMG_CLK_VAL_DMA_CLK_RQT);
6322 iwl3945_release_nic_access(priv);
6323 }
6324 spin_unlock_irqrestore(&priv->lock, flags);
6325
6326 udelay(5);
6327
6328 iwl3945_hw_nic_stop_master(priv);
6329 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6330 iwl3945_hw_nic_reset(priv);
6331
6332 exit:
6333 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6334
6335 if (priv->ibss_beacon)
6336 dev_kfree_skb(priv->ibss_beacon);
6337 priv->ibss_beacon = NULL;
6338
6339 /* clear out any free frames */
6340 iwl3945_clear_free_frames(priv);
6341 }
6342
6343 static void iwl3945_down(struct iwl3945_priv *priv)
6344 {
6345 mutex_lock(&priv->mutex);
6346 __iwl3945_down(priv);
6347 mutex_unlock(&priv->mutex);
6348
6349 iwl3945_cancel_deferred_work(priv);
6350 }
6351
6352 #define MAX_HW_RESTARTS 5
6353
6354 static int __iwl3945_up(struct iwl3945_priv *priv)
6355 {
6356 int rc, i;
6357
6358 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6359 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6360 return -EIO;
6361 }
6362
6363 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6364 IWL_WARNING("Radio disabled by SW RF kill (module "
6365 "parameter)\n");
6366 return -ENODEV;
6367 }
6368
6369 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6370 IWL_ERROR("ucode not available for device bringup\n");
6371 return -EIO;
6372 }
6373
6374 /* If platform's RF_KILL switch is NOT set to KILL */
6375 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
6376 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6377 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6378 else {
6379 set_bit(STATUS_RF_KILL_HW, &priv->status);
6380 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6381 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6382 return -ENODEV;
6383 }
6384 }
6385
6386 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6387
6388 rc = iwl3945_hw_nic_init(priv);
6389 if (rc) {
6390 IWL_ERROR("Unable to int nic\n");
6391 return rc;
6392 }
6393
6394 /* make sure rfkill handshake bits are cleared */
6395 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6396 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6397 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6398
6399 /* clear (again), then enable host interrupts */
6400 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6401 iwl3945_enable_interrupts(priv);
6402
6403 /* really make sure rfkill handshake bits are cleared */
6404 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6405 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6406
6407 /* Copy original ucode data image from disk into backup cache.
6408 * This will be used to initialize the on-board processor's
6409 * data SRAM for a clean start when the runtime program first loads. */
6410 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6411 priv->ucode_data.len);
6412
6413 /* We return success when we resume from suspend and rf_kill is on. */
6414 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6415 return 0;
6416
6417 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6418
6419 iwl3945_clear_stations_table(priv);
6420
6421 /* load bootstrap state machine,
6422 * load bootstrap program into processor's memory,
6423 * prepare to load the "initialize" uCode */
6424 rc = iwl3945_load_bsm(priv);
6425
6426 if (rc) {
6427 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6428 continue;
6429 }
6430
6431 /* start card; "initialize" will load runtime ucode */
6432 iwl3945_nic_start(priv);
6433
6434 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6435
6436 return 0;
6437 }
6438
6439 set_bit(STATUS_EXIT_PENDING, &priv->status);
6440 __iwl3945_down(priv);
6441
6442 /* tried to restart and config the device for as long as our
6443 * patience could withstand */
6444 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6445 return -EIO;
6446 }
6447
6448
6449 /*****************************************************************************
6450 *
6451 * Workqueue callbacks
6452 *
6453 *****************************************************************************/
6454
6455 static void iwl3945_bg_init_alive_start(struct work_struct *data)
6456 {
6457 struct iwl3945_priv *priv =
6458 container_of(data, struct iwl3945_priv, init_alive_start.work);
6459
6460 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6461 return;
6462
6463 mutex_lock(&priv->mutex);
6464 iwl3945_init_alive_start(priv);
6465 mutex_unlock(&priv->mutex);
6466 }
6467
6468 static void iwl3945_bg_alive_start(struct work_struct *data)
6469 {
6470 struct iwl3945_priv *priv =
6471 container_of(data, struct iwl3945_priv, alive_start.work);
6472
6473 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6474 return;
6475
6476 mutex_lock(&priv->mutex);
6477 iwl3945_alive_start(priv);
6478 mutex_unlock(&priv->mutex);
6479 }
6480
6481 static void iwl3945_bg_rf_kill(struct work_struct *work)
6482 {
6483 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6484
6485 wake_up_interruptible(&priv->wait_command_queue);
6486
6487 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6488 return;
6489
6490 mutex_lock(&priv->mutex);
6491
6492 if (!iwl3945_is_rfkill(priv)) {
6493 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6494 "HW and/or SW RF Kill no longer active, restarting "
6495 "device\n");
6496 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6497 queue_work(priv->workqueue, &priv->restart);
6498 } else {
6499
6500 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6501 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6502 "disabled by SW switch\n");
6503 else
6504 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6505 "Kill switch must be turned off for "
6506 "wireless networking to work.\n");
6507 }
6508 mutex_unlock(&priv->mutex);
6509 }
6510
6511 #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6512
6513 static void iwl3945_bg_scan_check(struct work_struct *data)
6514 {
6515 struct iwl3945_priv *priv =
6516 container_of(data, struct iwl3945_priv, scan_check.work);
6517
6518 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6519 return;
6520
6521 mutex_lock(&priv->mutex);
6522 if (test_bit(STATUS_SCANNING, &priv->status) ||
6523 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6524 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6525 "Scan completion watchdog resetting adapter (%dms)\n",
6526 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6527
6528 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6529 iwl3945_send_scan_abort(priv);
6530 }
6531 mutex_unlock(&priv->mutex);
6532 }
6533
6534 static void iwl3945_bg_request_scan(struct work_struct *data)
6535 {
6536 struct iwl3945_priv *priv =
6537 container_of(data, struct iwl3945_priv, request_scan);
6538 struct iwl3945_host_cmd cmd = {
6539 .id = REPLY_SCAN_CMD,
6540 .len = sizeof(struct iwl3945_scan_cmd),
6541 .meta.flags = CMD_SIZE_HUGE,
6542 };
6543 int rc = 0;
6544 struct iwl3945_scan_cmd *scan;
6545 struct ieee80211_conf *conf = NULL;
6546 u8 direct_mask;
6547 int phymode;
6548
6549 conf = ieee80211_get_hw_conf(priv->hw);
6550
6551 mutex_lock(&priv->mutex);
6552
6553 if (!iwl3945_is_ready(priv)) {
6554 IWL_WARNING("request scan called when driver not ready.\n");
6555 goto done;
6556 }
6557
6558 /* Make sure the scan wasn't cancelled before this queued work
6559 * was given the chance to run... */
6560 if (!test_bit(STATUS_SCANNING, &priv->status))
6561 goto done;
6562
6563 /* This should never be called or scheduled if there is currently
6564 * a scan active in the hardware. */
6565 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6566 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6567 "Ignoring second request.\n");
6568 rc = -EIO;
6569 goto done;
6570 }
6571
6572 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6573 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6574 goto done;
6575 }
6576
6577 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6578 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6579 goto done;
6580 }
6581
6582 if (iwl3945_is_rfkill(priv)) {
6583 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6584 goto done;
6585 }
6586
6587 if (!test_bit(STATUS_READY, &priv->status)) {
6588 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6589 goto done;
6590 }
6591
6592 if (!priv->scan_bands) {
6593 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6594 goto done;
6595 }
6596
6597 if (!priv->scan) {
6598 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6599 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6600 if (!priv->scan) {
6601 rc = -ENOMEM;
6602 goto done;
6603 }
6604 }
6605 scan = priv->scan;
6606 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6607
6608 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6609 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6610
6611 if (iwl3945_is_associated(priv)) {
6612 u16 interval = 0;
6613 u32 extra;
6614 u32 suspend_time = 100;
6615 u32 scan_suspend_time = 100;
6616 unsigned long flags;
6617
6618 IWL_DEBUG_INFO("Scanning while associated...\n");
6619
6620 spin_lock_irqsave(&priv->lock, flags);
6621 interval = priv->beacon_int;
6622 spin_unlock_irqrestore(&priv->lock, flags);
6623
6624 scan->suspend_time = 0;
6625 scan->max_out_time = cpu_to_le32(200 * 1024);
6626 if (!interval)
6627 interval = suspend_time;
6628 /*
6629 * suspend time format:
6630 * 0-19: beacon interval in usec (time before exec.)
6631 * 20-23: 0
6632 * 24-31: number of beacons (suspend between channels)
6633 */
6634
6635 extra = (suspend_time / interval) << 24;
6636 scan_suspend_time = 0xFF0FFFFF &
6637 (extra | ((suspend_time % interval) * 1024));
6638
6639 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6640 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6641 scan_suspend_time, interval);
6642 }
6643
6644 /* We should add the ability for user to lock to PASSIVE ONLY */
6645 if (priv->one_direct_scan) {
6646 IWL_DEBUG_SCAN
6647 ("Kicking off one direct scan for '%s'\n",
6648 iwl3945_escape_essid(priv->direct_ssid,
6649 priv->direct_ssid_len));
6650 scan->direct_scan[0].id = WLAN_EID_SSID;
6651 scan->direct_scan[0].len = priv->direct_ssid_len;
6652 memcpy(scan->direct_scan[0].ssid,
6653 priv->direct_ssid, priv->direct_ssid_len);
6654 direct_mask = 1;
6655 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6656 scan->direct_scan[0].id = WLAN_EID_SSID;
6657 scan->direct_scan[0].len = priv->essid_len;
6658 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6659 direct_mask = 1;
6660 } else
6661 direct_mask = 0;
6662
6663 /* We don't build a direct scan probe request; the uCode will do
6664 * that based on the direct_mask added to each channel entry */
6665 scan->tx_cmd.len = cpu_to_le16(
6666 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6667 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
6668 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6669 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6670 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6671
6672 /* flags + rate selection */
6673
6674 switch (priv->scan_bands) {
6675 case 2:
6676 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6677 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6678 scan->good_CRC_th = 0;
6679 phymode = MODE_IEEE80211G;
6680 break;
6681
6682 case 1:
6683 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6684 scan->good_CRC_th = IWL_GOOD_CRC_TH;
6685 phymode = MODE_IEEE80211A;
6686 break;
6687
6688 default:
6689 IWL_WARNING("Invalid scan band count\n");
6690 goto done;
6691 }
6692
6693 /* select Rx antennas */
6694 scan->flags |= iwl3945_get_antenna_flags(priv);
6695
6696 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6697 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6698
6699 if (direct_mask)
6700 IWL_DEBUG_SCAN
6701 ("Initiating direct scan for %s.\n",
6702 iwl3945_escape_essid(priv->essid, priv->essid_len));
6703 else
6704 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
6705
6706 scan->channel_count =
6707 iwl3945_get_channels_for_scan(
6708 priv, phymode, 1, /* active */
6709 direct_mask,
6710 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6711
6712 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6713 scan->channel_count * sizeof(struct iwl3945_scan_channel);
6714 cmd.data = scan;
6715 scan->len = cpu_to_le16(cmd.len);
6716
6717 set_bit(STATUS_SCAN_HW, &priv->status);
6718 rc = iwl3945_send_cmd_sync(priv, &cmd);
6719 if (rc)
6720 goto done;
6721
6722 queue_delayed_work(priv->workqueue, &priv->scan_check,
6723 IWL_SCAN_CHECK_WATCHDOG);
6724
6725 mutex_unlock(&priv->mutex);
6726 return;
6727
6728 done:
6729 /* inform mac80211 scan aborted */
6730 queue_work(priv->workqueue, &priv->scan_completed);
6731 mutex_unlock(&priv->mutex);
6732 }
6733
6734 static void iwl3945_bg_up(struct work_struct *data)
6735 {
6736 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6737
6738 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6739 return;
6740
6741 mutex_lock(&priv->mutex);
6742 __iwl3945_up(priv);
6743 mutex_unlock(&priv->mutex);
6744 }
6745
6746 static void iwl3945_bg_restart(struct work_struct *data)
6747 {
6748 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6749
6750 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6751 return;
6752
6753 iwl3945_down(priv);
6754 queue_work(priv->workqueue, &priv->up);
6755 }
6756
6757 static void iwl3945_bg_rx_replenish(struct work_struct *data)
6758 {
6759 struct iwl3945_priv *priv =
6760 container_of(data, struct iwl3945_priv, rx_replenish);
6761
6762 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6763 return;
6764
6765 mutex_lock(&priv->mutex);
6766 iwl3945_rx_replenish(priv);
6767 mutex_unlock(&priv->mutex);
6768 }
6769
6770 #define IWL_DELAY_NEXT_SCAN (HZ*2)
6771
6772 static void iwl3945_bg_post_associate(struct work_struct *data)
6773 {
6774 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6775 post_associate.work);
6776
6777 int rc = 0;
6778 struct ieee80211_conf *conf = NULL;
6779 DECLARE_MAC_BUF(mac);
6780
6781 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6782 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6783 return;
6784 }
6785
6786
6787 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6788 priv->assoc_id,
6789 print_mac(mac, priv->active_rxon.bssid_addr));
6790
6791 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6792 return;
6793
6794 mutex_lock(&priv->mutex);
6795
6796 if (!priv->vif || !priv->is_open) {
6797 mutex_unlock(&priv->mutex);
6798 return;
6799 }
6800 iwl3945_scan_cancel_timeout(priv, 200);
6801
6802 conf = ieee80211_get_hw_conf(priv->hw);
6803
6804 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6805 iwl3945_commit_rxon(priv);
6806
6807 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6808 iwl3945_setup_rxon_timing(priv);
6809 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6810 sizeof(priv->rxon_timing), &priv->rxon_timing);
6811 if (rc)
6812 IWL_WARNING("REPLY_RXON_TIMING failed - "
6813 "Attempting to continue.\n");
6814
6815 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6816
6817 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6818
6819 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6820 priv->assoc_id, priv->beacon_int);
6821
6822 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6823 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6824 else
6825 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6826
6827 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6828 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6829 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6830 else
6831 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6832
6833 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6834 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6835
6836 }
6837
6838 iwl3945_commit_rxon(priv);
6839
6840 switch (priv->iw_mode) {
6841 case IEEE80211_IF_TYPE_STA:
6842 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6843 break;
6844
6845 case IEEE80211_IF_TYPE_IBSS:
6846
6847 /* clear out the station table */
6848 iwl3945_clear_stations_table(priv);
6849
6850 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6851 iwl3945_add_station(priv, priv->bssid, 0, 0);
6852 iwl3945_sync_sta(priv, IWL_STA_ID,
6853 (priv->phymode == MODE_IEEE80211A)?
6854 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6855 CMD_ASYNC);
6856 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6857 iwl3945_send_beacon_cmd(priv);
6858
6859 break;
6860
6861 default:
6862 IWL_ERROR("%s Should not be called in %d mode\n",
6863 __FUNCTION__, priv->iw_mode);
6864 break;
6865 }
6866
6867 iwl3945_sequence_reset(priv);
6868
6869 #ifdef CONFIG_IWL3945_QOS
6870 iwl3945_activate_qos(priv, 0);
6871 #endif /* CONFIG_IWL3945_QOS */
6872 /* we have just associated, don't start scan too early */
6873 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
6874 mutex_unlock(&priv->mutex);
6875 }
6876
6877 static void iwl3945_bg_abort_scan(struct work_struct *work)
6878 {
6879 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6880
6881 if (!iwl3945_is_ready(priv))
6882 return;
6883
6884 mutex_lock(&priv->mutex);
6885
6886 set_bit(STATUS_SCAN_ABORTING, &priv->status);
6887 iwl3945_send_scan_abort(priv);
6888
6889 mutex_unlock(&priv->mutex);
6890 }
6891
6892 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6893
6894 static void iwl3945_bg_scan_completed(struct work_struct *work)
6895 {
6896 struct iwl3945_priv *priv =
6897 container_of(work, struct iwl3945_priv, scan_completed);
6898
6899 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6900
6901 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6902 return;
6903
6904 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6905 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
6906
6907 ieee80211_scan_completed(priv->hw);
6908
6909 /* Since setting the TXPOWER may have been deferred while
6910 * performing the scan, fire one off */
6911 mutex_lock(&priv->mutex);
6912 iwl3945_hw_reg_send_txpower(priv);
6913 mutex_unlock(&priv->mutex);
6914 }
6915
6916 /*****************************************************************************
6917 *
6918 * mac80211 entry point functions
6919 *
6920 *****************************************************************************/
6921
6922 #define UCODE_READY_TIMEOUT (2 * HZ)
6923
6924 static int iwl3945_mac_start(struct ieee80211_hw *hw)
6925 {
6926 struct iwl3945_priv *priv = hw->priv;
6927 int ret;
6928
6929 IWL_DEBUG_MAC80211("enter\n");
6930
6931 if (pci_enable_device(priv->pci_dev)) {
6932 IWL_ERROR("Fail to pci_enable_device\n");
6933 return -ENODEV;
6934 }
6935 pci_restore_state(priv->pci_dev);
6936 pci_enable_msi(priv->pci_dev);
6937
6938 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6939 DRV_NAME, priv);
6940 if (ret) {
6941 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6942 goto out_disable_msi;
6943 }
6944
6945 /* we should be verifying the device is ready to be opened */
6946 mutex_lock(&priv->mutex);
6947
6948 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6949 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6950 * ucode filename and max sizes are card-specific. */
6951
6952 if (!priv->ucode_code.len) {
6953 ret = iwl3945_read_ucode(priv);
6954 if (ret) {
6955 IWL_ERROR("Could not read microcode: %d\n", ret);
6956 mutex_unlock(&priv->mutex);
6957 goto out_release_irq;
6958 }
6959 }
6960
6961 ret = __iwl3945_up(priv);
6962
6963 mutex_unlock(&priv->mutex);
6964
6965 if (ret)
6966 goto out_release_irq;
6967
6968 IWL_DEBUG_INFO("Start UP work.\n");
6969
6970 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6971 return 0;
6972
6973 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6974 * mac80211 will not be run successfully. */
6975 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6976 test_bit(STATUS_READY, &priv->status),
6977 UCODE_READY_TIMEOUT);
6978 if (!ret) {
6979 if (!test_bit(STATUS_READY, &priv->status)) {
6980 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6981 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6982 ret = -ETIMEDOUT;
6983 goto out_release_irq;
6984 }
6985 }
6986
6987 priv->is_open = 1;
6988 IWL_DEBUG_MAC80211("leave\n");
6989 return 0;
6990
6991 out_release_irq:
6992 free_irq(priv->pci_dev->irq, priv);
6993 out_disable_msi:
6994 pci_disable_msi(priv->pci_dev);
6995 pci_disable_device(priv->pci_dev);
6996 priv->is_open = 0;
6997 IWL_DEBUG_MAC80211("leave - failed\n");
6998 return ret;
6999 }
7000
7001 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
7002 {
7003 struct iwl3945_priv *priv = hw->priv;
7004
7005 IWL_DEBUG_MAC80211("enter\n");
7006
7007 if (!priv->is_open) {
7008 IWL_DEBUG_MAC80211("leave - skip\n");
7009 return;
7010 }
7011
7012 priv->is_open = 0;
7013
7014 if (iwl3945_is_ready_rf(priv)) {
7015 /* stop mac, cancel any scan request and clear
7016 * RXON_FILTER_ASSOC_MSK BIT
7017 */
7018 mutex_lock(&priv->mutex);
7019 iwl3945_scan_cancel_timeout(priv, 100);
7020 cancel_delayed_work(&priv->post_associate);
7021 mutex_unlock(&priv->mutex);
7022 }
7023
7024 iwl3945_down(priv);
7025
7026 flush_workqueue(priv->workqueue);
7027 free_irq(priv->pci_dev->irq, priv);
7028 pci_disable_msi(priv->pci_dev);
7029 pci_save_state(priv->pci_dev);
7030 pci_disable_device(priv->pci_dev);
7031
7032 IWL_DEBUG_MAC80211("leave\n");
7033 }
7034
7035 static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
7036 struct ieee80211_tx_control *ctl)
7037 {
7038 struct iwl3945_priv *priv = hw->priv;
7039
7040 IWL_DEBUG_MAC80211("enter\n");
7041
7042 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7043 IWL_DEBUG_MAC80211("leave - monitor\n");
7044 return -1;
7045 }
7046
7047 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7048 ctl->tx_rate);
7049
7050 if (iwl3945_tx_skb(priv, skb, ctl))
7051 dev_kfree_skb_any(skb);
7052
7053 IWL_DEBUG_MAC80211("leave\n");
7054 return 0;
7055 }
7056
7057 static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
7058 struct ieee80211_if_init_conf *conf)
7059 {
7060 struct iwl3945_priv *priv = hw->priv;
7061 unsigned long flags;
7062 DECLARE_MAC_BUF(mac);
7063
7064 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
7065
7066 if (priv->vif) {
7067 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
7068 return -EOPNOTSUPP;
7069 }
7070
7071 spin_lock_irqsave(&priv->lock, flags);
7072 priv->vif = conf->vif;
7073
7074 spin_unlock_irqrestore(&priv->lock, flags);
7075
7076 mutex_lock(&priv->mutex);
7077
7078 if (conf->mac_addr) {
7079 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
7080 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7081 }
7082
7083 if (iwl3945_is_ready(priv))
7084 iwl3945_set_mode(priv, conf->type);
7085
7086 mutex_unlock(&priv->mutex);
7087
7088 IWL_DEBUG_MAC80211("leave\n");
7089 return 0;
7090 }
7091
7092 /**
7093 * iwl3945_mac_config - mac80211 config callback
7094 *
7095 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7096 * be set inappropriately and the driver currently sets the hardware up to
7097 * use it whenever needed.
7098 */
7099 static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
7100 {
7101 struct iwl3945_priv *priv = hw->priv;
7102 const struct iwl3945_channel_info *ch_info;
7103 unsigned long flags;
7104 int ret = 0;
7105
7106 mutex_lock(&priv->mutex);
7107 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7108
7109 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7110
7111 if (!iwl3945_is_ready(priv)) {
7112 IWL_DEBUG_MAC80211("leave - not ready\n");
7113 ret = -EIO;
7114 goto out;
7115 }
7116
7117 if (unlikely(!iwl3945_param_disable_hw_scan &&
7118 test_bit(STATUS_SCANNING, &priv->status))) {
7119 IWL_DEBUG_MAC80211("leave - scanning\n");
7120 set_bit(STATUS_CONF_PENDING, &priv->status);
7121 mutex_unlock(&priv->mutex);
7122 return 0;
7123 }
7124
7125 spin_lock_irqsave(&priv->lock, flags);
7126
7127 ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
7128 if (!is_channel_valid(ch_info)) {
7129 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7130 conf->channel, conf->phymode);
7131 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7132 spin_unlock_irqrestore(&priv->lock, flags);
7133 ret = -EINVAL;
7134 goto out;
7135 }
7136
7137 iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
7138
7139 iwl3945_set_flags_for_phymode(priv, conf->phymode);
7140
7141 /* The list of supported rates and rate mask can be different
7142 * for each phymode; since the phymode may have changed, reset
7143 * the rate mask to what mac80211 lists */
7144 iwl3945_set_rate(priv);
7145
7146 spin_unlock_irqrestore(&priv->lock, flags);
7147
7148 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
7149 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7150 iwl3945_hw_channel_switch(priv, conf->channel);
7151 goto out;
7152 }
7153 #endif
7154
7155 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7156
7157 if (!conf->radio_enabled) {
7158 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7159 goto out;
7160 }
7161
7162 if (iwl3945_is_rfkill(priv)) {
7163 IWL_DEBUG_MAC80211("leave - RF kill\n");
7164 ret = -EIO;
7165 goto out;
7166 }
7167
7168 iwl3945_set_rate(priv);
7169
7170 if (memcmp(&priv->active_rxon,
7171 &priv->staging_rxon, sizeof(priv->staging_rxon)))
7172 iwl3945_commit_rxon(priv);
7173 else
7174 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7175
7176 IWL_DEBUG_MAC80211("leave\n");
7177
7178 out:
7179 clear_bit(STATUS_CONF_PENDING, &priv->status);
7180 mutex_unlock(&priv->mutex);
7181 return ret;
7182 }
7183
7184 static void iwl3945_config_ap(struct iwl3945_priv *priv)
7185 {
7186 int rc = 0;
7187
7188 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7189 return;
7190
7191 /* The following should be done only at AP bring up */
7192 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7193
7194 /* RXON - unassoc (to set timing command) */
7195 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7196 iwl3945_commit_rxon(priv);
7197
7198 /* RXON Timing */
7199 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
7200 iwl3945_setup_rxon_timing(priv);
7201 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7202 sizeof(priv->rxon_timing), &priv->rxon_timing);
7203 if (rc)
7204 IWL_WARNING("REPLY_RXON_TIMING failed - "
7205 "Attempting to continue.\n");
7206
7207 /* FIXME: what should be the assoc_id for AP? */
7208 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7209 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7210 priv->staging_rxon.flags |=
7211 RXON_FLG_SHORT_PREAMBLE_MSK;
7212 else
7213 priv->staging_rxon.flags &=
7214 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7215
7216 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7217 if (priv->assoc_capability &
7218 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7219 priv->staging_rxon.flags |=
7220 RXON_FLG_SHORT_SLOT_MSK;
7221 else
7222 priv->staging_rxon.flags &=
7223 ~RXON_FLG_SHORT_SLOT_MSK;
7224
7225 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7226 priv->staging_rxon.flags &=
7227 ~RXON_FLG_SHORT_SLOT_MSK;
7228 }
7229 /* restore RXON assoc */
7230 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7231 iwl3945_commit_rxon(priv);
7232 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7233 }
7234 iwl3945_send_beacon_cmd(priv);
7235
7236 /* FIXME - we need to add code here to detect a totally new
7237 * configuration, reset the AP, unassoc, rxon timing, assoc,
7238 * clear sta table, add BCAST sta... */
7239 }
7240
7241 static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
7242 struct ieee80211_vif *vif,
7243 struct ieee80211_if_conf *conf)
7244 {
7245 struct iwl3945_priv *priv = hw->priv;
7246 DECLARE_MAC_BUF(mac);
7247 unsigned long flags;
7248 int rc;
7249
7250 if (conf == NULL)
7251 return -EIO;
7252
7253 /* XXX: this MUST use conf->mac_addr */
7254
7255 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7256 (!conf->beacon || !conf->ssid_len)) {
7257 IWL_DEBUG_MAC80211
7258 ("Leaving in AP mode because HostAPD is not ready.\n");
7259 return 0;
7260 }
7261
7262 if (!iwl3945_is_alive(priv))
7263 return -EAGAIN;
7264
7265 mutex_lock(&priv->mutex);
7266
7267 if (conf->bssid)
7268 IWL_DEBUG_MAC80211("bssid: %s\n",
7269 print_mac(mac, conf->bssid));
7270
7271 /*
7272 * very dubious code was here; the probe filtering flag is never set:
7273 *
7274 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7275 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7276 */
7277 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7278 IWL_DEBUG_MAC80211("leave - scanning\n");
7279 mutex_unlock(&priv->mutex);
7280 return 0;
7281 }
7282
7283 if (priv->vif != vif) {
7284 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7285 mutex_unlock(&priv->mutex);
7286 return 0;
7287 }
7288
7289 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7290 if (!conf->bssid) {
7291 conf->bssid = priv->mac_addr;
7292 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7293 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7294 print_mac(mac, conf->bssid));
7295 }
7296 if (priv->ibss_beacon)
7297 dev_kfree_skb(priv->ibss_beacon);
7298
7299 priv->ibss_beacon = conf->beacon;
7300 }
7301
7302 if (iwl3945_is_rfkill(priv))
7303 goto done;
7304
7305 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7306 !is_multicast_ether_addr(conf->bssid)) {
7307 /* If there is currently a HW scan going on in the background
7308 * then we need to cancel it else the RXON below will fail. */
7309 if (iwl3945_scan_cancel_timeout(priv, 100)) {
7310 IWL_WARNING("Aborted scan still in progress "
7311 "after 100ms\n");
7312 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7313 mutex_unlock(&priv->mutex);
7314 return -EAGAIN;
7315 }
7316 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7317
7318 /* TODO: Audit driver for usage of these members and see
7319 * if mac80211 deprecates them (priv->bssid looks like it
7320 * shouldn't be there, but I haven't scanned the IBSS code
7321 * to verify) - jpk */
7322 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7323
7324 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7325 iwl3945_config_ap(priv);
7326 else {
7327 rc = iwl3945_commit_rxon(priv);
7328 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7329 iwl3945_add_station(priv,
7330 priv->active_rxon.bssid_addr, 1, 0);
7331 }
7332
7333 } else {
7334 iwl3945_scan_cancel_timeout(priv, 100);
7335 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7336 iwl3945_commit_rxon(priv);
7337 }
7338
7339 done:
7340 spin_lock_irqsave(&priv->lock, flags);
7341 if (!conf->ssid_len)
7342 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7343 else
7344 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7345
7346 priv->essid_len = conf->ssid_len;
7347 spin_unlock_irqrestore(&priv->lock, flags);
7348
7349 IWL_DEBUG_MAC80211("leave\n");
7350 mutex_unlock(&priv->mutex);
7351
7352 return 0;
7353 }
7354
7355 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
7356 unsigned int changed_flags,
7357 unsigned int *total_flags,
7358 int mc_count, struct dev_addr_list *mc_list)
7359 {
7360 /*
7361 * XXX: dummy
7362 * see also iwl3945_connection_init_rx_config
7363 */
7364 *total_flags = 0;
7365 }
7366
7367 static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7368 struct ieee80211_if_init_conf *conf)
7369 {
7370 struct iwl3945_priv *priv = hw->priv;
7371
7372 IWL_DEBUG_MAC80211("enter\n");
7373
7374 mutex_lock(&priv->mutex);
7375
7376 if (iwl3945_is_ready_rf(priv)) {
7377 iwl3945_scan_cancel_timeout(priv, 100);
7378 cancel_delayed_work(&priv->post_associate);
7379 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7380 iwl3945_commit_rxon(priv);
7381 }
7382 if (priv->vif == conf->vif) {
7383 priv->vif = NULL;
7384 memset(priv->bssid, 0, ETH_ALEN);
7385 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7386 priv->essid_len = 0;
7387 }
7388 mutex_unlock(&priv->mutex);
7389
7390 IWL_DEBUG_MAC80211("leave\n");
7391 }
7392
7393 static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7394 {
7395 int rc = 0;
7396 unsigned long flags;
7397 struct iwl3945_priv *priv = hw->priv;
7398
7399 IWL_DEBUG_MAC80211("enter\n");
7400
7401 mutex_lock(&priv->mutex);
7402 spin_lock_irqsave(&priv->lock, flags);
7403
7404 if (!iwl3945_is_ready_rf(priv)) {
7405 rc = -EIO;
7406 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7407 goto out_unlock;
7408 }
7409
7410 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7411 rc = -EIO;
7412 IWL_ERROR("ERROR: APs don't scan\n");
7413 goto out_unlock;
7414 }
7415
7416 /* we don't schedule scan within next_scan_jiffies period */
7417 if (priv->next_scan_jiffies &&
7418 time_after(priv->next_scan_jiffies, jiffies)) {
7419 rc = -EAGAIN;
7420 goto out_unlock;
7421 }
7422 /* if we just finished scan ask for delay */
7423 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7424 IWL_DELAY_NEXT_SCAN, jiffies)) {
7425 rc = -EAGAIN;
7426 goto out_unlock;
7427 }
7428 if (len) {
7429 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
7430 iwl3945_escape_essid(ssid, len), (int)len);
7431
7432 priv->one_direct_scan = 1;
7433 priv->direct_ssid_len = (u8)
7434 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7435 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7436 } else
7437 priv->one_direct_scan = 0;
7438
7439 rc = iwl3945_scan_initiate(priv);
7440
7441 IWL_DEBUG_MAC80211("leave\n");
7442
7443 out_unlock:
7444 spin_unlock_irqrestore(&priv->lock, flags);
7445 mutex_unlock(&priv->mutex);
7446
7447 return rc;
7448 }
7449
7450 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7451 const u8 *local_addr, const u8 *addr,
7452 struct ieee80211_key_conf *key)
7453 {
7454 struct iwl3945_priv *priv = hw->priv;
7455 int rc = 0;
7456 u8 sta_id;
7457
7458 IWL_DEBUG_MAC80211("enter\n");
7459
7460 if (!iwl3945_param_hwcrypto) {
7461 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7462 return -EOPNOTSUPP;
7463 }
7464
7465 if (is_zero_ether_addr(addr))
7466 /* only support pairwise keys */
7467 return -EOPNOTSUPP;
7468
7469 sta_id = iwl3945_hw_find_station(priv, addr);
7470 if (sta_id == IWL_INVALID_STATION) {
7471 DECLARE_MAC_BUF(mac);
7472
7473 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7474 print_mac(mac, addr));
7475 return -EINVAL;
7476 }
7477
7478 mutex_lock(&priv->mutex);
7479
7480 iwl3945_scan_cancel_timeout(priv, 100);
7481
7482 switch (cmd) {
7483 case SET_KEY:
7484 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7485 if (!rc) {
7486 iwl3945_set_rxon_hwcrypto(priv, 1);
7487 iwl3945_commit_rxon(priv);
7488 key->hw_key_idx = sta_id;
7489 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7490 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7491 }
7492 break;
7493 case DISABLE_KEY:
7494 rc = iwl3945_clear_sta_key_info(priv, sta_id);
7495 if (!rc) {
7496 iwl3945_set_rxon_hwcrypto(priv, 0);
7497 iwl3945_commit_rxon(priv);
7498 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7499 }
7500 break;
7501 default:
7502 rc = -EINVAL;
7503 }
7504
7505 IWL_DEBUG_MAC80211("leave\n");
7506 mutex_unlock(&priv->mutex);
7507
7508 return rc;
7509 }
7510
7511 static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7512 const struct ieee80211_tx_queue_params *params)
7513 {
7514 struct iwl3945_priv *priv = hw->priv;
7515 #ifdef CONFIG_IWL3945_QOS
7516 unsigned long flags;
7517 int q;
7518 #endif /* CONFIG_IWL3945_QOS */
7519
7520 IWL_DEBUG_MAC80211("enter\n");
7521
7522 if (!iwl3945_is_ready_rf(priv)) {
7523 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7524 return -EIO;
7525 }
7526
7527 if (queue >= AC_NUM) {
7528 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7529 return 0;
7530 }
7531
7532 #ifdef CONFIG_IWL3945_QOS
7533 if (!priv->qos_data.qos_enable) {
7534 priv->qos_data.qos_active = 0;
7535 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7536 return 0;
7537 }
7538 q = AC_NUM - 1 - queue;
7539
7540 spin_lock_irqsave(&priv->lock, flags);
7541
7542 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7543 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7544 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7545 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7546 cpu_to_le16((params->burst_time * 100));
7547
7548 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7549 priv->qos_data.qos_active = 1;
7550
7551 spin_unlock_irqrestore(&priv->lock, flags);
7552
7553 mutex_lock(&priv->mutex);
7554 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7555 iwl3945_activate_qos(priv, 1);
7556 else if (priv->assoc_id && iwl3945_is_associated(priv))
7557 iwl3945_activate_qos(priv, 0);
7558
7559 mutex_unlock(&priv->mutex);
7560
7561 #endif /*CONFIG_IWL3945_QOS */
7562
7563 IWL_DEBUG_MAC80211("leave\n");
7564 return 0;
7565 }
7566
7567 static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7568 struct ieee80211_tx_queue_stats *stats)
7569 {
7570 struct iwl3945_priv *priv = hw->priv;
7571 int i, avail;
7572 struct iwl3945_tx_queue *txq;
7573 struct iwl3945_queue *q;
7574 unsigned long flags;
7575
7576 IWL_DEBUG_MAC80211("enter\n");
7577
7578 if (!iwl3945_is_ready_rf(priv)) {
7579 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7580 return -EIO;
7581 }
7582
7583 spin_lock_irqsave(&priv->lock, flags);
7584
7585 for (i = 0; i < AC_NUM; i++) {
7586 txq = &priv->txq[i];
7587 q = &txq->q;
7588 avail = iwl3945_queue_space(q);
7589
7590 stats->data[i].len = q->n_window - avail;
7591 stats->data[i].limit = q->n_window - q->high_mark;
7592 stats->data[i].count = q->n_window;
7593
7594 }
7595 spin_unlock_irqrestore(&priv->lock, flags);
7596
7597 IWL_DEBUG_MAC80211("leave\n");
7598
7599 return 0;
7600 }
7601
7602 static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7603 struct ieee80211_low_level_stats *stats)
7604 {
7605 IWL_DEBUG_MAC80211("enter\n");
7606 IWL_DEBUG_MAC80211("leave\n");
7607
7608 return 0;
7609 }
7610
7611 static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7612 {
7613 IWL_DEBUG_MAC80211("enter\n");
7614 IWL_DEBUG_MAC80211("leave\n");
7615
7616 return 0;
7617 }
7618
7619 static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7620 {
7621 struct iwl3945_priv *priv = hw->priv;
7622 unsigned long flags;
7623
7624 mutex_lock(&priv->mutex);
7625 IWL_DEBUG_MAC80211("enter\n");
7626
7627 #ifdef CONFIG_IWL3945_QOS
7628 iwl3945_reset_qos(priv);
7629 #endif
7630 cancel_delayed_work(&priv->post_associate);
7631
7632 spin_lock_irqsave(&priv->lock, flags);
7633 priv->assoc_id = 0;
7634 priv->assoc_capability = 0;
7635 priv->call_post_assoc_from_beacon = 0;
7636
7637 /* new association get rid of ibss beacon skb */
7638 if (priv->ibss_beacon)
7639 dev_kfree_skb(priv->ibss_beacon);
7640
7641 priv->ibss_beacon = NULL;
7642
7643 priv->beacon_int = priv->hw->conf.beacon_int;
7644 priv->timestamp1 = 0;
7645 priv->timestamp0 = 0;
7646 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7647 priv->beacon_int = 0;
7648
7649 spin_unlock_irqrestore(&priv->lock, flags);
7650
7651 if (!iwl3945_is_ready_rf(priv)) {
7652 IWL_DEBUG_MAC80211("leave - not ready\n");
7653 mutex_unlock(&priv->mutex);
7654 return;
7655 }
7656
7657 /* we are restarting association process
7658 * clear RXON_FILTER_ASSOC_MSK bit
7659 */
7660 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7661 iwl3945_scan_cancel_timeout(priv, 100);
7662 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7663 iwl3945_commit_rxon(priv);
7664 }
7665
7666 /* Per mac80211.h: This is only used in IBSS mode... */
7667 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7668
7669 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7670 mutex_unlock(&priv->mutex);
7671 return;
7672 }
7673
7674 priv->only_active_channel = 0;
7675
7676 iwl3945_set_rate(priv);
7677
7678 mutex_unlock(&priv->mutex);
7679
7680 IWL_DEBUG_MAC80211("leave\n");
7681
7682 }
7683
7684 static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7685 struct ieee80211_tx_control *control)
7686 {
7687 struct iwl3945_priv *priv = hw->priv;
7688 unsigned long flags;
7689
7690 mutex_lock(&priv->mutex);
7691 IWL_DEBUG_MAC80211("enter\n");
7692
7693 if (!iwl3945_is_ready_rf(priv)) {
7694 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7695 mutex_unlock(&priv->mutex);
7696 return -EIO;
7697 }
7698
7699 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7700 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7701 mutex_unlock(&priv->mutex);
7702 return -EIO;
7703 }
7704
7705 spin_lock_irqsave(&priv->lock, flags);
7706
7707 if (priv->ibss_beacon)
7708 dev_kfree_skb(priv->ibss_beacon);
7709
7710 priv->ibss_beacon = skb;
7711
7712 priv->assoc_id = 0;
7713
7714 IWL_DEBUG_MAC80211("leave\n");
7715 spin_unlock_irqrestore(&priv->lock, flags);
7716
7717 #ifdef CONFIG_IWL3945_QOS
7718 iwl3945_reset_qos(priv);
7719 #endif
7720
7721 queue_work(priv->workqueue, &priv->post_associate.work);
7722
7723 mutex_unlock(&priv->mutex);
7724
7725 return 0;
7726 }
7727
7728 /*****************************************************************************
7729 *
7730 * sysfs attributes
7731 *
7732 *****************************************************************************/
7733
7734 #ifdef CONFIG_IWL3945_DEBUG
7735
7736 /*
7737 * The following adds a new attribute to the sysfs representation
7738 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7739 * used for controlling the debug level.
7740 *
7741 * See the level definitions in iwl for details.
7742 */
7743
7744 static ssize_t show_debug_level(struct device_driver *d, char *buf)
7745 {
7746 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7747 }
7748 static ssize_t store_debug_level(struct device_driver *d,
7749 const char *buf, size_t count)
7750 {
7751 char *p = (char *)buf;
7752 u32 val;
7753
7754 val = simple_strtoul(p, &p, 0);
7755 if (p == buf)
7756 printk(KERN_INFO DRV_NAME
7757 ": %s is not in hex or decimal form.\n", buf);
7758 else
7759 iwl3945_debug_level = val;
7760
7761 return strnlen(buf, count);
7762 }
7763
7764 static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7765 show_debug_level, store_debug_level);
7766
7767 #endif /* CONFIG_IWL3945_DEBUG */
7768
7769 static ssize_t show_rf_kill(struct device *d,
7770 struct device_attribute *attr, char *buf)
7771 {
7772 /*
7773 * 0 - RF kill not enabled
7774 * 1 - SW based RF kill active (sysfs)
7775 * 2 - HW based RF kill active
7776 * 3 - Both HW and SW based RF kill active
7777 */
7778 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7779 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7780 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7781
7782 return sprintf(buf, "%i\n", val);
7783 }
7784
7785 static ssize_t store_rf_kill(struct device *d,
7786 struct device_attribute *attr,
7787 const char *buf, size_t count)
7788 {
7789 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7790
7791 mutex_lock(&priv->mutex);
7792 iwl3945_radio_kill_sw(priv, buf[0] == '1');
7793 mutex_unlock(&priv->mutex);
7794
7795 return count;
7796 }
7797
7798 static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7799
7800 static ssize_t show_temperature(struct device *d,
7801 struct device_attribute *attr, char *buf)
7802 {
7803 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7804
7805 if (!iwl3945_is_alive(priv))
7806 return -EAGAIN;
7807
7808 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7809 }
7810
7811 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7812
7813 static ssize_t show_rs_window(struct device *d,
7814 struct device_attribute *attr,
7815 char *buf)
7816 {
7817 struct iwl3945_priv *priv = d->driver_data;
7818 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7819 }
7820 static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7821
7822 static ssize_t show_tx_power(struct device *d,
7823 struct device_attribute *attr, char *buf)
7824 {
7825 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7826 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7827 }
7828
7829 static ssize_t store_tx_power(struct device *d,
7830 struct device_attribute *attr,
7831 const char *buf, size_t count)
7832 {
7833 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7834 char *p = (char *)buf;
7835 u32 val;
7836
7837 val = simple_strtoul(p, &p, 10);
7838 if (p == buf)
7839 printk(KERN_INFO DRV_NAME
7840 ": %s is not in decimal form.\n", buf);
7841 else
7842 iwl3945_hw_reg_set_txpower(priv, val);
7843
7844 return count;
7845 }
7846
7847 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7848
7849 static ssize_t show_flags(struct device *d,
7850 struct device_attribute *attr, char *buf)
7851 {
7852 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7853
7854 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7855 }
7856
7857 static ssize_t store_flags(struct device *d,
7858 struct device_attribute *attr,
7859 const char *buf, size_t count)
7860 {
7861 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7862 u32 flags = simple_strtoul(buf, NULL, 0);
7863
7864 mutex_lock(&priv->mutex);
7865 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7866 /* Cancel any currently running scans... */
7867 if (iwl3945_scan_cancel_timeout(priv, 100))
7868 IWL_WARNING("Could not cancel scan.\n");
7869 else {
7870 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7871 flags);
7872 priv->staging_rxon.flags = cpu_to_le32(flags);
7873 iwl3945_commit_rxon(priv);
7874 }
7875 }
7876 mutex_unlock(&priv->mutex);
7877
7878 return count;
7879 }
7880
7881 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7882
7883 static ssize_t show_filter_flags(struct device *d,
7884 struct device_attribute *attr, char *buf)
7885 {
7886 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7887
7888 return sprintf(buf, "0x%04X\n",
7889 le32_to_cpu(priv->active_rxon.filter_flags));
7890 }
7891
7892 static ssize_t store_filter_flags(struct device *d,
7893 struct device_attribute *attr,
7894 const char *buf, size_t count)
7895 {
7896 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7897 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7898
7899 mutex_lock(&priv->mutex);
7900 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7901 /* Cancel any currently running scans... */
7902 if (iwl3945_scan_cancel_timeout(priv, 100))
7903 IWL_WARNING("Could not cancel scan.\n");
7904 else {
7905 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7906 "0x%04X\n", filter_flags);
7907 priv->staging_rxon.filter_flags =
7908 cpu_to_le32(filter_flags);
7909 iwl3945_commit_rxon(priv);
7910 }
7911 }
7912 mutex_unlock(&priv->mutex);
7913
7914 return count;
7915 }
7916
7917 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7918 store_filter_flags);
7919
7920 static ssize_t show_tune(struct device *d,
7921 struct device_attribute *attr, char *buf)
7922 {
7923 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7924
7925 return sprintf(buf, "0x%04X\n",
7926 (priv->phymode << 8) |
7927 le16_to_cpu(priv->active_rxon.channel));
7928 }
7929
7930 static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
7931
7932 static ssize_t store_tune(struct device *d,
7933 struct device_attribute *attr,
7934 const char *buf, size_t count)
7935 {
7936 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7937 char *p = (char *)buf;
7938 u16 tune = simple_strtoul(p, &p, 0);
7939 u8 phymode = (tune >> 8) & 0xff;
7940 u16 channel = tune & 0xff;
7941
7942 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
7943
7944 mutex_lock(&priv->mutex);
7945 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
7946 (priv->phymode != phymode)) {
7947 const struct iwl3945_channel_info *ch_info;
7948
7949 ch_info = iwl3945_get_channel_info(priv, phymode, channel);
7950 if (!ch_info) {
7951 IWL_WARNING("Requested invalid phymode/channel "
7952 "combination: %d %d\n", phymode, channel);
7953 mutex_unlock(&priv->mutex);
7954 return -EINVAL;
7955 }
7956
7957 /* Cancel any currently running scans... */
7958 if (iwl3945_scan_cancel_timeout(priv, 100))
7959 IWL_WARNING("Could not cancel scan.\n");
7960 else {
7961 IWL_DEBUG_INFO("Committing phymode and "
7962 "rxon.channel = %d %d\n",
7963 phymode, channel);
7964
7965 iwl3945_set_rxon_channel(priv, phymode, channel);
7966 iwl3945_set_flags_for_phymode(priv, phymode);
7967
7968 iwl3945_set_rate(priv);
7969 iwl3945_commit_rxon(priv);
7970 }
7971 }
7972 mutex_unlock(&priv->mutex);
7973
7974 return count;
7975 }
7976
7977 static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
7978
7979 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7980
7981 static ssize_t show_measurement(struct device *d,
7982 struct device_attribute *attr, char *buf)
7983 {
7984 struct iwl3945_priv *priv = dev_get_drvdata(d);
7985 struct iwl3945_spectrum_notification measure_report;
7986 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7987 u8 *data = (u8 *) & measure_report;
7988 unsigned long flags;
7989
7990 spin_lock_irqsave(&priv->lock, flags);
7991 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7992 spin_unlock_irqrestore(&priv->lock, flags);
7993 return 0;
7994 }
7995 memcpy(&measure_report, &priv->measure_report, size);
7996 priv->measurement_status = 0;
7997 spin_unlock_irqrestore(&priv->lock, flags);
7998
7999 while (size && (PAGE_SIZE - len)) {
8000 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8001 PAGE_SIZE - len, 1);
8002 len = strlen(buf);
8003 if (PAGE_SIZE - len)
8004 buf[len++] = '\n';
8005
8006 ofs += 16;
8007 size -= min(size, 16U);
8008 }
8009
8010 return len;
8011 }
8012
8013 static ssize_t store_measurement(struct device *d,
8014 struct device_attribute *attr,
8015 const char *buf, size_t count)
8016 {
8017 struct iwl3945_priv *priv = dev_get_drvdata(d);
8018 struct ieee80211_measurement_params params = {
8019 .channel = le16_to_cpu(priv->active_rxon.channel),
8020 .start_time = cpu_to_le64(priv->last_tsf),
8021 .duration = cpu_to_le16(1),
8022 };
8023 u8 type = IWL_MEASURE_BASIC;
8024 u8 buffer[32];
8025 u8 channel;
8026
8027 if (count) {
8028 char *p = buffer;
8029 strncpy(buffer, buf, min(sizeof(buffer), count));
8030 channel = simple_strtoul(p, NULL, 0);
8031 if (channel)
8032 params.channel = channel;
8033
8034 p = buffer;
8035 while (*p && *p != ' ')
8036 p++;
8037 if (*p)
8038 type = simple_strtoul(p + 1, NULL, 0);
8039 }
8040
8041 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8042 "channel %d (for '%s')\n", type, params.channel, buf);
8043 iwl3945_get_measurement(priv, &params, type);
8044
8045 return count;
8046 }
8047
8048 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8049 show_measurement, store_measurement);
8050 #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
8051
8052 static ssize_t show_rate(struct device *d,
8053 struct device_attribute *attr, char *buf)
8054 {
8055 struct iwl3945_priv *priv = dev_get_drvdata(d);
8056 unsigned long flags;
8057 int i;
8058
8059 spin_lock_irqsave(&priv->sta_lock, flags);
8060 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
8061 i = priv->stations[IWL_AP_ID].current_rate.s.rate;
8062 else
8063 i = priv->stations[IWL_STA_ID].current_rate.s.rate;
8064 spin_unlock_irqrestore(&priv->sta_lock, flags);
8065
8066 i = iwl3945_rate_index_from_plcp(i);
8067 if (i == -1)
8068 return sprintf(buf, "0\n");
8069
8070 return sprintf(buf, "%d%s\n",
8071 (iwl3945_rates[i].ieee >> 1),
8072 (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
8073 }
8074
8075 static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
8076
8077 static ssize_t store_retry_rate(struct device *d,
8078 struct device_attribute *attr,
8079 const char *buf, size_t count)
8080 {
8081 struct iwl3945_priv *priv = dev_get_drvdata(d);
8082
8083 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8084 if (priv->retry_rate <= 0)
8085 priv->retry_rate = 1;
8086
8087 return count;
8088 }
8089
8090 static ssize_t show_retry_rate(struct device *d,
8091 struct device_attribute *attr, char *buf)
8092 {
8093 struct iwl3945_priv *priv = dev_get_drvdata(d);
8094 return sprintf(buf, "%d", priv->retry_rate);
8095 }
8096
8097 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8098 store_retry_rate);
8099
8100 static ssize_t store_power_level(struct device *d,
8101 struct device_attribute *attr,
8102 const char *buf, size_t count)
8103 {
8104 struct iwl3945_priv *priv = dev_get_drvdata(d);
8105 int rc;
8106 int mode;
8107
8108 mode = simple_strtoul(buf, NULL, 0);
8109 mutex_lock(&priv->mutex);
8110
8111 if (!iwl3945_is_ready(priv)) {
8112 rc = -EAGAIN;
8113 goto out;
8114 }
8115
8116 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8117 mode = IWL_POWER_AC;
8118 else
8119 mode |= IWL_POWER_ENABLED;
8120
8121 if (mode != priv->power_mode) {
8122 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
8123 if (rc) {
8124 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8125 goto out;
8126 }
8127 priv->power_mode = mode;
8128 }
8129
8130 rc = count;
8131
8132 out:
8133 mutex_unlock(&priv->mutex);
8134 return rc;
8135 }
8136
8137 #define MAX_WX_STRING 80
8138
8139 /* Values are in microsecond */
8140 static const s32 timeout_duration[] = {
8141 350000,
8142 250000,
8143 75000,
8144 37000,
8145 25000,
8146 };
8147 static const s32 period_duration[] = {
8148 400000,
8149 700000,
8150 1000000,
8151 1000000,
8152 1000000
8153 };
8154
8155 static ssize_t show_power_level(struct device *d,
8156 struct device_attribute *attr, char *buf)
8157 {
8158 struct iwl3945_priv *priv = dev_get_drvdata(d);
8159 int level = IWL_POWER_LEVEL(priv->power_mode);
8160 char *p = buf;
8161
8162 p += sprintf(p, "%d ", level);
8163 switch (level) {
8164 case IWL_POWER_MODE_CAM:
8165 case IWL_POWER_AC:
8166 p += sprintf(p, "(AC)");
8167 break;
8168 case IWL_POWER_BATTERY:
8169 p += sprintf(p, "(BATTERY)");
8170 break;
8171 default:
8172 p += sprintf(p,
8173 "(Timeout %dms, Period %dms)",
8174 timeout_duration[level - 1] / 1000,
8175 period_duration[level - 1] / 1000);
8176 }
8177
8178 if (!(priv->power_mode & IWL_POWER_ENABLED))
8179 p += sprintf(p, " OFF\n");
8180 else
8181 p += sprintf(p, " \n");
8182
8183 return (p - buf + 1);
8184
8185 }
8186
8187 static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8188 store_power_level);
8189
8190 static ssize_t show_channels(struct device *d,
8191 struct device_attribute *attr, char *buf)
8192 {
8193 struct iwl3945_priv *priv = dev_get_drvdata(d);
8194 int len = 0, i;
8195 struct ieee80211_channel *channels = NULL;
8196 const struct ieee80211_hw_mode *hw_mode = NULL;
8197 int count = 0;
8198
8199 if (!iwl3945_is_ready(priv))
8200 return -EAGAIN;
8201
8202 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
8203 if (!hw_mode)
8204 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
8205 if (hw_mode) {
8206 channels = hw_mode->channels;
8207 count = hw_mode->num_channels;
8208 }
8209
8210 len +=
8211 sprintf(&buf[len],
8212 "Displaying %d channels in 2.4GHz band "
8213 "(802.11bg):\n", count);
8214
8215 for (i = 0; i < count; i++)
8216 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8217 channels[i].chan,
8218 channels[i].power_level,
8219 channels[i].
8220 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8221 " (IEEE 802.11h required)" : "",
8222 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8223 || (channels[i].
8224 flag &
8225 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8226 ", IBSS",
8227 channels[i].
8228 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8229 "active/passive" : "passive only");
8230
8231 hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
8232 if (hw_mode) {
8233 channels = hw_mode->channels;
8234 count = hw_mode->num_channels;
8235 } else {
8236 channels = NULL;
8237 count = 0;
8238 }
8239
8240 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8241 "(802.11a):\n", count);
8242
8243 for (i = 0; i < count; i++)
8244 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8245 channels[i].chan,
8246 channels[i].power_level,
8247 channels[i].
8248 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8249 " (IEEE 802.11h required)" : "",
8250 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8251 || (channels[i].
8252 flag &
8253 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8254 ", IBSS",
8255 channels[i].
8256 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8257 "active/passive" : "passive only");
8258
8259 return len;
8260 }
8261
8262 static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8263
8264 static ssize_t show_statistics(struct device *d,
8265 struct device_attribute *attr, char *buf)
8266 {
8267 struct iwl3945_priv *priv = dev_get_drvdata(d);
8268 u32 size = sizeof(struct iwl3945_notif_statistics);
8269 u32 len = 0, ofs = 0;
8270 u8 *data = (u8 *) & priv->statistics;
8271 int rc = 0;
8272
8273 if (!iwl3945_is_alive(priv))
8274 return -EAGAIN;
8275
8276 mutex_lock(&priv->mutex);
8277 rc = iwl3945_send_statistics_request(priv);
8278 mutex_unlock(&priv->mutex);
8279
8280 if (rc) {
8281 len = sprintf(buf,
8282 "Error sending statistics request: 0x%08X\n", rc);
8283 return len;
8284 }
8285
8286 while (size && (PAGE_SIZE - len)) {
8287 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8288 PAGE_SIZE - len, 1);
8289 len = strlen(buf);
8290 if (PAGE_SIZE - len)
8291 buf[len++] = '\n';
8292
8293 ofs += 16;
8294 size -= min(size, 16U);
8295 }
8296
8297 return len;
8298 }
8299
8300 static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8301
8302 static ssize_t show_antenna(struct device *d,
8303 struct device_attribute *attr, char *buf)
8304 {
8305 struct iwl3945_priv *priv = dev_get_drvdata(d);
8306
8307 if (!iwl3945_is_alive(priv))
8308 return -EAGAIN;
8309
8310 return sprintf(buf, "%d\n", priv->antenna);
8311 }
8312
8313 static ssize_t store_antenna(struct device *d,
8314 struct device_attribute *attr,
8315 const char *buf, size_t count)
8316 {
8317 int ant;
8318 struct iwl3945_priv *priv = dev_get_drvdata(d);
8319
8320 if (count == 0)
8321 return 0;
8322
8323 if (sscanf(buf, "%1i", &ant) != 1) {
8324 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8325 return count;
8326 }
8327
8328 if ((ant >= 0) && (ant <= 2)) {
8329 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8330 priv->antenna = (enum iwl3945_antenna)ant;
8331 } else
8332 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8333
8334
8335 return count;
8336 }
8337
8338 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8339
8340 static ssize_t show_status(struct device *d,
8341 struct device_attribute *attr, char *buf)
8342 {
8343 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
8344 if (!iwl3945_is_alive(priv))
8345 return -EAGAIN;
8346 return sprintf(buf, "0x%08x\n", (int)priv->status);
8347 }
8348
8349 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8350
8351 static ssize_t dump_error_log(struct device *d,
8352 struct device_attribute *attr,
8353 const char *buf, size_t count)
8354 {
8355 char *p = (char *)buf;
8356
8357 if (p[0] == '1')
8358 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8359
8360 return strnlen(buf, count);
8361 }
8362
8363 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8364
8365 static ssize_t dump_event_log(struct device *d,
8366 struct device_attribute *attr,
8367 const char *buf, size_t count)
8368 {
8369 char *p = (char *)buf;
8370
8371 if (p[0] == '1')
8372 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8373
8374 return strnlen(buf, count);
8375 }
8376
8377 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8378
8379 /*****************************************************************************
8380 *
8381 * driver setup and teardown
8382 *
8383 *****************************************************************************/
8384
8385 static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8386 {
8387 priv->workqueue = create_workqueue(DRV_NAME);
8388
8389 init_waitqueue_head(&priv->wait_command_queue);
8390
8391 INIT_WORK(&priv->up, iwl3945_bg_up);
8392 INIT_WORK(&priv->restart, iwl3945_bg_restart);
8393 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
8394 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
8395 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
8396 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
8397 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
8398 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
8399 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
8400 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
8401 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
8402 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
8403
8404 iwl3945_hw_setup_deferred_work(priv);
8405
8406 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8407 iwl3945_irq_tasklet, (unsigned long)priv);
8408 }
8409
8410 static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8411 {
8412 iwl3945_hw_cancel_deferred_work(priv);
8413
8414 cancel_delayed_work_sync(&priv->init_alive_start);
8415 cancel_delayed_work(&priv->scan_check);
8416 cancel_delayed_work(&priv->alive_start);
8417 cancel_delayed_work(&priv->post_associate);
8418 cancel_work_sync(&priv->beacon_update);
8419 }
8420
8421 static struct attribute *iwl3945_sysfs_entries[] = {
8422 &dev_attr_antenna.attr,
8423 &dev_attr_channels.attr,
8424 &dev_attr_dump_errors.attr,
8425 &dev_attr_dump_events.attr,
8426 &dev_attr_flags.attr,
8427 &dev_attr_filter_flags.attr,
8428 #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8429 &dev_attr_measurement.attr,
8430 #endif
8431 &dev_attr_power_level.attr,
8432 &dev_attr_rate.attr,
8433 &dev_attr_retry_rate.attr,
8434 &dev_attr_rf_kill.attr,
8435 &dev_attr_rs_window.attr,
8436 &dev_attr_statistics.attr,
8437 &dev_attr_status.attr,
8438 &dev_attr_temperature.attr,
8439 &dev_attr_tune.attr,
8440 &dev_attr_tx_power.attr,
8441
8442 NULL
8443 };
8444
8445 static struct attribute_group iwl3945_attribute_group = {
8446 .name = NULL, /* put in device directory */
8447 .attrs = iwl3945_sysfs_entries,
8448 };
8449
8450 static struct ieee80211_ops iwl3945_hw_ops = {
8451 .tx = iwl3945_mac_tx,
8452 .start = iwl3945_mac_start,
8453 .stop = iwl3945_mac_stop,
8454 .add_interface = iwl3945_mac_add_interface,
8455 .remove_interface = iwl3945_mac_remove_interface,
8456 .config = iwl3945_mac_config,
8457 .config_interface = iwl3945_mac_config_interface,
8458 .configure_filter = iwl3945_configure_filter,
8459 .set_key = iwl3945_mac_set_key,
8460 .get_stats = iwl3945_mac_get_stats,
8461 .get_tx_stats = iwl3945_mac_get_tx_stats,
8462 .conf_tx = iwl3945_mac_conf_tx,
8463 .get_tsf = iwl3945_mac_get_tsf,
8464 .reset_tsf = iwl3945_mac_reset_tsf,
8465 .beacon_update = iwl3945_mac_beacon_update,
8466 .hw_scan = iwl3945_mac_hw_scan
8467 };
8468
8469 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8470 {
8471 int err = 0;
8472 u32 pci_id;
8473 struct iwl3945_priv *priv;
8474 struct ieee80211_hw *hw;
8475 int i;
8476 DECLARE_MAC_BUF(mac);
8477
8478 /* Disabling hardware scan means that mac80211 will perform scans
8479 * "the hard way", rather than using device's scan. */
8480 if (iwl3945_param_disable_hw_scan) {
8481 IWL_DEBUG_INFO("Disabling hw_scan\n");
8482 iwl3945_hw_ops.hw_scan = NULL;
8483 }
8484
8485 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8486 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8487 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8488 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8489 err = -EINVAL;
8490 goto out;
8491 }
8492
8493 /* mac80211 allocates memory for this device instance, including
8494 * space for this driver's private structure */
8495 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8496 if (hw == NULL) {
8497 IWL_ERROR("Can not allocate network device\n");
8498 err = -ENOMEM;
8499 goto out;
8500 }
8501 SET_IEEE80211_DEV(hw, &pdev->dev);
8502
8503 hw->rate_control_algorithm = "iwl-3945-rs";
8504
8505 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8506 priv = hw->priv;
8507 priv->hw = hw;
8508
8509 priv->pci_dev = pdev;
8510
8511 /* Select antenna (may be helpful if only one antenna is connected) */
8512 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8513 #ifdef CONFIG_IWL3945_DEBUG
8514 iwl3945_debug_level = iwl3945_param_debug;
8515 atomic_set(&priv->restrict_refcnt, 0);
8516 #endif
8517 priv->retry_rate = 1;
8518
8519 priv->ibss_beacon = NULL;
8520
8521 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8522 * the range of signal quality values that we'll provide.
8523 * Negative values for level/noise indicate that we'll provide dBm.
8524 * For WE, at least, non-0 values here *enable* display of values
8525 * in app (iwconfig). */
8526 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8527 hw->max_noise = -20; /* noise level, negative indicates dBm */
8528 hw->max_signal = 100; /* link quality indication (%) */
8529
8530 /* Tell mac80211 our Tx characteristics */
8531 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8532
8533 /* 4 EDCA QOS priorities */
8534 hw->queues = 4;
8535
8536 spin_lock_init(&priv->lock);
8537 spin_lock_init(&priv->power_data.lock);
8538 spin_lock_init(&priv->sta_lock);
8539 spin_lock_init(&priv->hcmd_lock);
8540
8541 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8542 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8543
8544 INIT_LIST_HEAD(&priv->free_frames);
8545
8546 mutex_init(&priv->mutex);
8547 if (pci_enable_device(pdev)) {
8548 err = -ENODEV;
8549 goto out_ieee80211_free_hw;
8550 }
8551
8552 pci_set_master(pdev);
8553
8554 /* Clear the driver's (not device's) station table */
8555 iwl3945_clear_stations_table(priv);
8556
8557 priv->data_retry_limit = -1;
8558 priv->ieee_channels = NULL;
8559 priv->ieee_rates = NULL;
8560 priv->phymode = -1;
8561
8562 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8563 if (!err)
8564 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8565 if (err) {
8566 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8567 goto out_pci_disable_device;
8568 }
8569
8570 pci_set_drvdata(pdev, priv);
8571 err = pci_request_regions(pdev, DRV_NAME);
8572 if (err)
8573 goto out_pci_disable_device;
8574
8575 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8576 * PCI Tx retries from interfering with C3 CPU state */
8577 pci_write_config_byte(pdev, 0x41, 0x00);
8578
8579 priv->hw_base = pci_iomap(pdev, 0, 0);
8580 if (!priv->hw_base) {
8581 err = -ENODEV;
8582 goto out_pci_release_regions;
8583 }
8584
8585 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8586 (unsigned long long) pci_resource_len(pdev, 0));
8587 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8588
8589 /* Initialize module parameter values here */
8590
8591 /* Disable radio (SW RF KILL) via parameter when loading driver */
8592 if (iwl3945_param_disable) {
8593 set_bit(STATUS_RF_KILL_SW, &priv->status);
8594 IWL_DEBUG_INFO("Radio disabled.\n");
8595 }
8596
8597 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8598
8599 pci_id =
8600 (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
8601
8602 switch (pci_id) {
8603 case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
8604 case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
8605 case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
8606 case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
8607 priv->is_abg = 0;
8608 break;
8609
8610 /*
8611 * Rest are assumed ABG SKU -- if this is not the
8612 * case then the card will get the wrong 'Detected'
8613 * line in the kernel log however the code that
8614 * initializes the GEO table will detect no A-band
8615 * channels and remove the is_abg mask.
8616 */
8617 default:
8618 priv->is_abg = 1;
8619 break;
8620 }
8621
8622 printk(KERN_INFO DRV_NAME
8623 ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
8624 priv->is_abg ? "A" : "");
8625
8626 /* Device-specific setup */
8627 if (iwl3945_hw_set_hw_setting(priv)) {
8628 IWL_ERROR("failed to set hw settings\n");
8629 goto out_iounmap;
8630 }
8631
8632 #ifdef CONFIG_IWL3945_QOS
8633 if (iwl3945_param_qos_enable)
8634 priv->qos_data.qos_enable = 1;
8635
8636 iwl3945_reset_qos(priv);
8637
8638 priv->qos_data.qos_active = 0;
8639 priv->qos_data.qos_cap.val = 0;
8640 #endif /* CONFIG_IWL3945_QOS */
8641
8642 iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
8643 iwl3945_setup_deferred_work(priv);
8644 iwl3945_setup_rx_handlers(priv);
8645
8646 priv->rates_mask = IWL_RATES_MASK;
8647 /* If power management is turned on, default to AC mode */
8648 priv->power_mode = IWL_POWER_AC;
8649 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8650
8651 iwl3945_disable_interrupts(priv);
8652
8653 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8654 if (err) {
8655 IWL_ERROR("failed to create sysfs device attributes\n");
8656 goto out_release_irq;
8657 }
8658
8659 /* nic init */
8660 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8661 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8662
8663 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8664 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8665 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8666 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8667 if (err < 0) {
8668 IWL_DEBUG_INFO("Failed to init the card\n");
8669 goto out_remove_sysfs;
8670 }
8671 /* Read the EEPROM */
8672 err = iwl3945_eeprom_init(priv);
8673 if (err) {
8674 IWL_ERROR("Unable to init EEPROM\n");
8675 goto out_remove_sysfs;
8676 }
8677 /* MAC Address location in EEPROM same for 3945/4965 */
8678 get_eeprom_mac(priv, priv->mac_addr);
8679 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8680 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8681
8682 err = iwl3945_init_channel_map(priv);
8683 if (err) {
8684 IWL_ERROR("initializing regulatory failed: %d\n", err);
8685 goto out_remove_sysfs;
8686 }
8687
8688 err = iwl3945_init_geos(priv);
8689 if (err) {
8690 IWL_ERROR("initializing geos failed: %d\n", err);
8691 goto out_free_channel_map;
8692 }
8693 iwl3945_reset_channel_flag(priv);
8694
8695 iwl3945_rate_control_register(priv->hw);
8696 err = ieee80211_register_hw(priv->hw);
8697 if (err) {
8698 IWL_ERROR("Failed to register network device (error %d)\n", err);
8699 goto out_free_geos;
8700 }
8701
8702 priv->hw->conf.beacon_int = 100;
8703 priv->mac80211_registered = 1;
8704 pci_save_state(pdev);
8705 pci_disable_device(pdev);
8706
8707 return 0;
8708
8709 out_free_geos:
8710 iwl3945_free_geos(priv);
8711 out_free_channel_map:
8712 iwl3945_free_channel_map(priv);
8713 out_remove_sysfs:
8714 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8715
8716 out_release_irq:
8717 destroy_workqueue(priv->workqueue);
8718 priv->workqueue = NULL;
8719 iwl3945_unset_hw_setting(priv);
8720
8721 out_iounmap:
8722 pci_iounmap(pdev, priv->hw_base);
8723 out_pci_release_regions:
8724 pci_release_regions(pdev);
8725 out_pci_disable_device:
8726 pci_disable_device(pdev);
8727 pci_set_drvdata(pdev, NULL);
8728 out_ieee80211_free_hw:
8729 ieee80211_free_hw(priv->hw);
8730 out:
8731 return err;
8732 }
8733
8734 static void iwl3945_pci_remove(struct pci_dev *pdev)
8735 {
8736 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8737 struct list_head *p, *q;
8738 int i;
8739
8740 if (!priv)
8741 return;
8742
8743 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8744
8745 set_bit(STATUS_EXIT_PENDING, &priv->status);
8746
8747 iwl3945_down(priv);
8748
8749 /* Free MAC hash list for ADHOC */
8750 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8751 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8752 list_del(p);
8753 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8754 }
8755 }
8756
8757 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8758
8759 iwl3945_dealloc_ucode_pci(priv);
8760
8761 if (priv->rxq.bd)
8762 iwl3945_rx_queue_free(priv, &priv->rxq);
8763 iwl3945_hw_txq_ctx_free(priv);
8764
8765 iwl3945_unset_hw_setting(priv);
8766 iwl3945_clear_stations_table(priv);
8767
8768 if (priv->mac80211_registered) {
8769 ieee80211_unregister_hw(priv->hw);
8770 iwl3945_rate_control_unregister(priv->hw);
8771 }
8772
8773 /*netif_stop_queue(dev); */
8774 flush_workqueue(priv->workqueue);
8775
8776 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8777 * priv->workqueue... so we can't take down the workqueue
8778 * until now... */
8779 destroy_workqueue(priv->workqueue);
8780 priv->workqueue = NULL;
8781
8782 pci_iounmap(pdev, priv->hw_base);
8783 pci_release_regions(pdev);
8784 pci_disable_device(pdev);
8785 pci_set_drvdata(pdev, NULL);
8786
8787 iwl3945_free_channel_map(priv);
8788 iwl3945_free_geos(priv);
8789
8790 if (priv->ibss_beacon)
8791 dev_kfree_skb(priv->ibss_beacon);
8792
8793 ieee80211_free_hw(priv->hw);
8794 }
8795
8796 #ifdef CONFIG_PM
8797
8798 static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8799 {
8800 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8801
8802 if (priv->is_open) {
8803 set_bit(STATUS_IN_SUSPEND, &priv->status);
8804 iwl3945_mac_stop(priv->hw);
8805 priv->is_open = 1;
8806 }
8807
8808 pci_set_power_state(pdev, PCI_D3hot);
8809
8810 return 0;
8811 }
8812
8813 static int iwl3945_pci_resume(struct pci_dev *pdev)
8814 {
8815 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8816
8817 pci_set_power_state(pdev, PCI_D0);
8818
8819 if (priv->is_open)
8820 iwl3945_mac_start(priv->hw);
8821
8822 clear_bit(STATUS_IN_SUSPEND, &priv->status);
8823 return 0;
8824 }
8825
8826 #endif /* CONFIG_PM */
8827
8828 /*****************************************************************************
8829 *
8830 * driver and module entry point
8831 *
8832 *****************************************************************************/
8833
8834 static struct pci_driver iwl3945_driver = {
8835 .name = DRV_NAME,
8836 .id_table = iwl3945_hw_card_ids,
8837 .probe = iwl3945_pci_probe,
8838 .remove = __devexit_p(iwl3945_pci_remove),
8839 #ifdef CONFIG_PM
8840 .suspend = iwl3945_pci_suspend,
8841 .resume = iwl3945_pci_resume,
8842 #endif
8843 };
8844
8845 static int __init iwl3945_init(void)
8846 {
8847
8848 int ret;
8849 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8850 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8851 ret = pci_register_driver(&iwl3945_driver);
8852 if (ret) {
8853 IWL_ERROR("Unable to initialize PCI module\n");
8854 return ret;
8855 }
8856 #ifdef CONFIG_IWL3945_DEBUG
8857 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8858 if (ret) {
8859 IWL_ERROR("Unable to create driver sysfs file\n");
8860 pci_unregister_driver(&iwl3945_driver);
8861 return ret;
8862 }
8863 #endif
8864
8865 return ret;
8866 }
8867
8868 static void __exit iwl3945_exit(void)
8869 {
8870 #ifdef CONFIG_IWL3945_DEBUG
8871 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8872 #endif
8873 pci_unregister_driver(&iwl3945_driver);
8874 }
8875
8876 module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8877 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8878 module_param_named(disable, iwl3945_param_disable, int, 0444);
8879 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8880 module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8881 MODULE_PARM_DESC(hwcrypto,
8882 "using hardware crypto engine (default 0 [software])\n");
8883 module_param_named(debug, iwl3945_param_debug, int, 0444);
8884 MODULE_PARM_DESC(debug, "debug output mask");
8885 module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8886 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8887
8888 module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8889 MODULE_PARM_DESC(queues_num, "number of hw queues.");
8890
8891 /* QoS */
8892 module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8893 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8894
8895 module_exit(iwl3945_exit);
8896 module_init(iwl3945_init);
WRT350N Kernel Patches