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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / ssb / main.c
blobceb806d68cdb3c9e1dd6a2c3478d0f969f152023
1 /*
2 * Sonics Silicon Backplane
3 * Subsystem core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11 #include "ssb_private.h"
12
13 #include <linux/delay.h>
14 #include <linux/io.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/pci.h>
19
20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/cs.h>
22 #include <pcmcia/cistpl.h>
23 #include <pcmcia/ds.h>
24
25
26 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
27 MODULE_LICENSE("GPL");
28
29
30 /* Temporary list of yet-to-be-attached buses */
31 static LIST_HEAD(attach_queue);
32 /* List if running buses */
33 static LIST_HEAD(buses);
34 /* Software ID counter */
35 static unsigned int next_busnumber;
36 /* buses_mutes locks the two buslists and the next_busnumber.
37 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
38 static DEFINE_MUTEX(buses_mutex);
39
40 /* There are differences in the codeflow, if the bus is
41 * initialized from early boot, as various needed services
42 * are not available early. This is a mechanism to delay
43 * these initializations to after early boot has finished.
44 * It's also used to avoid mutex locking, as that's not
45 * available and needed early. */
46 static bool ssb_is_early_boot = 1;
47
48 static void ssb_buses_lock(void);
49 static void ssb_buses_unlock(void);
50
51
52 #ifdef CONFIG_SSB_PCIHOST
53 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
54 {
55 struct ssb_bus *bus;
56
57 ssb_buses_lock();
58 list_for_each_entry(bus, &buses, list) {
59 if (bus->bustype == SSB_BUSTYPE_PCI &&
60 bus->host_pci == pdev)
61 goto found;
62 }
63 bus = NULL;
64 found:
65 ssb_buses_unlock();
66
67 return bus;
68 }
69 #endif /* CONFIG_SSB_PCIHOST */
70
71 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
72 {
73 if (dev)
74 get_device(dev->dev);
75 return dev;
76 }
77
78 static void ssb_device_put(struct ssb_device *dev)
79 {
80 if (dev)
81 put_device(dev->dev);
82 }
83
84 static int ssb_bus_resume(struct ssb_bus *bus)
85 {
86 int err;
87
88 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
89 err = ssb_pcmcia_init(bus);
90 if (err) {
91 /* No need to disable XTAL, as we don't have one on PCMCIA. */
92 return err;
93 }
94 ssb_chipco_resume(&bus->chipco);
95
96 return 0;
97 }
98
99 static int ssb_device_resume(struct device *dev)
100 {
101 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
102 struct ssb_driver *ssb_drv;
103 struct ssb_bus *bus;
104 int err = 0;
105
106 bus = ssb_dev->bus;
107 if (bus->suspend_cnt == bus->nr_devices) {
108 err = ssb_bus_resume(bus);
109 if (err)
110 return err;
111 }
112 bus->suspend_cnt--;
113 if (dev->driver) {
114 ssb_drv = drv_to_ssb_drv(dev->driver);
115 if (ssb_drv && ssb_drv->resume)
116 err = ssb_drv->resume(ssb_dev);
117 if (err)
118 goto out;
119 }
120 out:
121 return err;
122 }
123
124 static void ssb_bus_suspend(struct ssb_bus *bus, pm_message_t state)
125 {
126 ssb_chipco_suspend(&bus->chipco, state);
127 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
128
129 /* Reset HW state information in memory, so that HW is
130 * completely reinitialized on resume. */
131 bus->mapped_device = NULL;
132 #ifdef CONFIG_SSB_DRIVER_PCICORE
133 bus->pcicore.setup_done = 0;
134 #endif
135 #ifdef CONFIG_SSB_DEBUG
136 bus->powered_up = 0;
137 #endif
138 }
139
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
141 {
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
144 struct ssb_bus *bus;
145 int err = 0;
146
147 if (dev->driver) {
148 ssb_drv = drv_to_ssb_drv(dev->driver);
149 if (ssb_drv && ssb_drv->suspend)
150 err = ssb_drv->suspend(ssb_dev, state);
151 if (err)
152 goto out;
153 }
154
155 bus = ssb_dev->bus;
156 bus->suspend_cnt++;
157 if (bus->suspend_cnt == bus->nr_devices) {
158 /* All devices suspended. Shutdown the bus. */
159 ssb_bus_suspend(bus, state);
160 }
161
162 out:
163 return err;
164 }
165
166 #ifdef CONFIG_SSB_PCIHOST
167 int ssb_devices_freeze(struct ssb_bus *bus)
168 {
169 struct ssb_device *dev;
170 struct ssb_driver *drv;
171 int err = 0;
172 int i;
173 pm_message_t state = PMSG_FREEZE;
174
175 /* First check that we are capable to freeze all devices. */
176 for (i = 0; i < bus->nr_devices; i++) {
177 dev = &(bus->devices[i]);
178 if (!dev->dev ||
179 !dev->dev->driver ||
180 !device_is_registered(dev->dev))
181 continue;
182 drv = drv_to_ssb_drv(dev->dev->driver);
183 if (!drv)
184 continue;
185 if (!drv->suspend) {
186 /* Nope, can't suspend this one. */
187 return -EOPNOTSUPP;
188 }
189 }
190 /* Now suspend all devices */
191 for (i = 0; i < bus->nr_devices; i++) {
192 dev = &(bus->devices[i]);
193 if (!dev->dev ||
194 !dev->dev->driver ||
195 !device_is_registered(dev->dev))
196 continue;
197 drv = drv_to_ssb_drv(dev->dev->driver);
198 if (!drv)
199 continue;
200 err = drv->suspend(dev, state);
201 if (err) {
202 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
203 dev->dev->bus_id);
204 goto err_unwind;
205 }
206 }
207
208 return 0;
209 err_unwind:
210 for (i--; i >= 0; i--) {
211 dev = &(bus->devices[i]);
212 if (!dev->dev ||
213 !dev->dev->driver ||
214 !device_is_registered(dev->dev))
215 continue;
216 drv = drv_to_ssb_drv(dev->dev->driver);
217 if (!drv)
218 continue;
219 if (drv->resume)
220 drv->resume(dev);
221 }
222 return err;
223 }
224
225 int ssb_devices_thaw(struct ssb_bus *bus)
226 {
227 struct ssb_device *dev;
228 struct ssb_driver *drv;
229 int err;
230 int i;
231
232 for (i = 0; i < bus->nr_devices; i++) {
233 dev = &(bus->devices[i]);
234 if (!dev->dev ||
235 !dev->dev->driver ||
236 !device_is_registered(dev->dev))
237 continue;
238 drv = drv_to_ssb_drv(dev->dev->driver);
239 if (!drv)
240 continue;
241 if (SSB_WARN_ON(!drv->resume))
242 continue;
243 err = drv->resume(dev);
244 if (err) {
245 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
246 dev->dev->bus_id);
247 }
248 }
249
250 return 0;
251 }
252 #endif /* CONFIG_SSB_PCIHOST */
253
254 static void ssb_device_shutdown(struct device *dev)
255 {
256 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
257 struct ssb_driver *ssb_drv;
258
259 if (!dev->driver)
260 return;
261 ssb_drv = drv_to_ssb_drv(dev->driver);
262 if (ssb_drv && ssb_drv->shutdown)
263 ssb_drv->shutdown(ssb_dev);
264 }
265
266 static int ssb_device_remove(struct device *dev)
267 {
268 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
269 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
270
271 if (ssb_drv && ssb_drv->remove)
272 ssb_drv->remove(ssb_dev);
273 ssb_device_put(ssb_dev);
274
275 return 0;
276 }
277
278 static int ssb_device_probe(struct device *dev)
279 {
280 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
281 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
282 int err = 0;
283
284 ssb_device_get(ssb_dev);
285 if (ssb_drv && ssb_drv->probe)
286 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
287 if (err)
288 ssb_device_put(ssb_dev);
289
290 return err;
291 }
292
293 static int ssb_match_devid(const struct ssb_device_id *tabid,
294 const struct ssb_device_id *devid)
295 {
296 if ((tabid->vendor != devid->vendor) &&
297 tabid->vendor != SSB_ANY_VENDOR)
298 return 0;
299 if ((tabid->coreid != devid->coreid) &&
300 tabid->coreid != SSB_ANY_ID)
301 return 0;
302 if ((tabid->revision != devid->revision) &&
303 tabid->revision != SSB_ANY_REV)
304 return 0;
305 return 1;
306 }
307
308 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
309 {
310 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
311 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
312 const struct ssb_device_id *id;
313
314 for (id = ssb_drv->id_table;
315 id->vendor || id->coreid || id->revision;
316 id++) {
317 if (ssb_match_devid(id, &ssb_dev->id))
318 return 1; /* found */
319 }
320
321 return 0;
322 }
323
324 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
325 {
326 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
327
328 if (!dev)
329 return -ENODEV;
330
331 return add_uevent_var(env,
332 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
333 ssb_dev->id.vendor, ssb_dev->id.coreid,
334 ssb_dev->id.revision);
335 }
336
337 static struct bus_type ssb_bustype = {
338 .name = "ssb",
339 .match = ssb_bus_match,
340 .probe = ssb_device_probe,
341 .remove = ssb_device_remove,
342 .shutdown = ssb_device_shutdown,
343 .suspend = ssb_device_suspend,
344 .resume = ssb_device_resume,
345 .uevent = ssb_device_uevent,
346 };
347
348 static void ssb_buses_lock(void)
349 {
350 /* See the comment at the ssb_is_early_boot definition */
351 if (!ssb_is_early_boot)
352 mutex_lock(&buses_mutex);
353 }
354
355 static void ssb_buses_unlock(void)
356 {
357 /* See the comment at the ssb_is_early_boot definition */
358 if (!ssb_is_early_boot)
359 mutex_unlock(&buses_mutex);
360 }
361
362 static void ssb_devices_unregister(struct ssb_bus *bus)
363 {
364 struct ssb_device *sdev;
365 int i;
366
367 for (i = bus->nr_devices - 1; i >= 0; i--) {
368 sdev = &(bus->devices[i]);
369 if (sdev->dev)
370 device_unregister(sdev->dev);
371 }
372 }
373
374 void ssb_bus_unregister(struct ssb_bus *bus)
375 {
376 ssb_buses_lock();
377 ssb_devices_unregister(bus);
378 list_del(&bus->list);
379 ssb_buses_unlock();
380
381 /* ssb_pcmcia_exit(bus); */
382 ssb_pci_exit(bus);
383 ssb_iounmap(bus);
384 }
385 EXPORT_SYMBOL(ssb_bus_unregister);
386
387 static void ssb_release_dev(struct device *dev)
388 {
389 struct __ssb_dev_wrapper *devwrap;
390
391 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
392 kfree(devwrap);
393 }
394
395 static int ssb_devices_register(struct ssb_bus *bus)
396 {
397 struct ssb_device *sdev;
398 struct device *dev;
399 struct __ssb_dev_wrapper *devwrap;
400 int i, err = 0;
401 int dev_idx = 0;
402
403 for (i = 0; i < bus->nr_devices; i++) {
404 sdev = &(bus->devices[i]);
405
406 /* We don't register SSB-system devices to the kernel,
407 * as the drivers for them are built into SSB. */
408 switch (sdev->id.coreid) {
409 case SSB_DEV_CHIPCOMMON:
410 case SSB_DEV_PCI:
411 case SSB_DEV_PCIE:
412 case SSB_DEV_PCMCIA:
413 case SSB_DEV_MIPS:
414 case SSB_DEV_MIPS_3302:
415 case SSB_DEV_EXTIF:
416 continue;
417 }
418
419 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
420 if (!devwrap) {
421 ssb_printk(KERN_ERR PFX
422 "Could not allocate device\n");
423 err = -ENOMEM;
424 goto error;
425 }
426 dev = &devwrap->dev;
427 devwrap->sdev = sdev;
428
429 dev->release = ssb_release_dev;
430 dev->bus = &ssb_bustype;
431 snprintf(dev->bus_id, sizeof(dev->bus_id),
432 "ssb%u:%d", bus->busnumber, dev_idx);
433
434 switch (bus->bustype) {
435 case SSB_BUSTYPE_PCI:
436 #ifdef CONFIG_SSB_PCIHOST
437 sdev->irq = bus->host_pci->irq;
438 dev->parent = &bus->host_pci->dev;
439 #endif
440 break;
441 case SSB_BUSTYPE_PCMCIA:
442 #ifdef CONFIG_SSB_PCMCIAHOST
443 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
444 dev->parent = &bus->host_pcmcia->dev;
445 #endif
446 break;
447 case SSB_BUSTYPE_SSB:
448 break;
449 }
450
451 sdev->dev = dev;
452 err = device_register(dev);
453 if (err) {
454 ssb_printk(KERN_ERR PFX
455 "Could not register %s\n",
456 dev->bus_id);
457 /* Set dev to NULL to not unregister
458 * dev on error unwinding. */
459 sdev->dev = NULL;
460 kfree(devwrap);
461 goto error;
462 }
463 dev_idx++;
464 }
465
466 return 0;
467 error:
468 /* Unwind the already registered devices. */
469 ssb_devices_unregister(bus);
470 return err;
471 }
472
473 /* Needs ssb_buses_lock() */
474 static int ssb_attach_queued_buses(void)
475 {
476 struct ssb_bus *bus, *n;
477 int err = 0;
478 int drop_them_all = 0;
479
480 list_for_each_entry_safe(bus, n, &attach_queue, list) {
481 if (drop_them_all) {
482 list_del(&bus->list);
483 continue;
484 }
485 /* Can't init the PCIcore in ssb_bus_register(), as that
486 * is too early in boot for embedded systems
487 * (no udelay() available). So do it here in attach stage.
488 */
489 err = ssb_bus_powerup(bus, 0);
490 if (err)
491 goto error;
492 ssb_pcicore_init(&bus->pcicore);
493 ssb_bus_may_powerdown(bus);
494
495 err = ssb_devices_register(bus);
496 error:
497 if (err) {
498 drop_them_all = 1;
499 list_del(&bus->list);
500 continue;
501 }
502 list_move_tail(&bus->list, &buses);
503 }
504
505 return err;
506 }
507
508 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
509 {
510 struct ssb_bus *bus = dev->bus;
511
512 offset += dev->core_index * SSB_CORE_SIZE;
513 return readw(bus->mmio + offset);
514 }
515
516 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
517 {
518 struct ssb_bus *bus = dev->bus;
519
520 offset += dev->core_index * SSB_CORE_SIZE;
521 return readl(bus->mmio + offset);
522 }
523
524 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
525 {
526 struct ssb_bus *bus = dev->bus;
527
528 offset += dev->core_index * SSB_CORE_SIZE;
529 writew(value, bus->mmio + offset);
530 }
531
532 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
533 {
534 struct ssb_bus *bus = dev->bus;
535
536 offset += dev->core_index * SSB_CORE_SIZE;
537 writel(value, bus->mmio + offset);
538 }
539
540 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
541 static const struct ssb_bus_ops ssb_ssb_ops = {
542 .read16 = ssb_ssb_read16,
543 .read32 = ssb_ssb_read32,
544 .write16 = ssb_ssb_write16,
545 .write32 = ssb_ssb_write32,
546 };
547
548 static int ssb_fetch_invariants(struct ssb_bus *bus,
549 ssb_invariants_func_t get_invariants)
550 {
551 struct ssb_init_invariants iv;
552 int err;
553
554 memset(&iv, 0, sizeof(iv));
555 err = get_invariants(bus, &iv);
556 if (err)
557 goto out;
558 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
559 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
560 <<<<<<< HEAD:drivers/ssb/main.c
561 =======
562 bus->has_cardbus_slot = iv.has_cardbus_slot;
563 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/ssb/main.c
564 out:
565 return err;
566 }
567
568 static int ssb_bus_register(struct ssb_bus *bus,
569 ssb_invariants_func_t get_invariants,
570 unsigned long baseaddr)
571 {
572 int err;
573
574 spin_lock_init(&bus->bar_lock);
575 INIT_LIST_HEAD(&bus->list);
576 <<<<<<< HEAD:drivers/ssb/main.c
577 =======
578 #ifdef CONFIG_SSB_EMBEDDED
579 spin_lock_init(&bus->gpio_lock);
580 #endif
581 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/ssb/main.c
582
583 /* Powerup the bus */
584 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
585 if (err)
586 goto out;
587 ssb_buses_lock();
588 bus->busnumber = next_busnumber;
589 /* Scan for devices (cores) */
590 err = ssb_bus_scan(bus, baseaddr);
591 if (err)
592 goto err_disable_xtal;
593
594 /* Init PCI-host device (if any) */
595 err = ssb_pci_init(bus);
596 if (err)
597 goto err_unmap;
598 /* Init PCMCIA-host device (if any) */
599 err = ssb_pcmcia_init(bus);
600 if (err)
601 goto err_pci_exit;
602
603 /* Initialize basic system devices (if available) */
604 err = ssb_bus_powerup(bus, 0);
605 if (err)
606 goto err_pcmcia_exit;
607 ssb_chipcommon_init(&bus->chipco);
608 ssb_mipscore_init(&bus->mipscore);
609 err = ssb_fetch_invariants(bus, get_invariants);
610 if (err) {
611 ssb_bus_may_powerdown(bus);
612 goto err_pcmcia_exit;
613 }
614 ssb_bus_may_powerdown(bus);
615
616 /* Queue it for attach.
617 * See the comment at the ssb_is_early_boot definition. */
618 list_add_tail(&bus->list, &attach_queue);
619 if (!ssb_is_early_boot) {
620 /* This is not early boot, so we must attach the bus now */
621 err = ssb_attach_queued_buses();
622 if (err)
623 goto err_dequeue;
624 }
625 next_busnumber++;
626 ssb_buses_unlock();
627
628 out:
629 return err;
630
631 err_dequeue:
632 list_del(&bus->list);
633 err_pcmcia_exit:
634 /* ssb_pcmcia_exit(bus); */
635 err_pci_exit:
636 ssb_pci_exit(bus);
637 err_unmap:
638 ssb_iounmap(bus);
639 err_disable_xtal:
640 ssb_buses_unlock();
641 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
642 return err;
643 }
644
645 #ifdef CONFIG_SSB_PCIHOST
646 int ssb_bus_pcibus_register(struct ssb_bus *bus,
647 struct pci_dev *host_pci)
648 {
649 int err;
650
651 bus->bustype = SSB_BUSTYPE_PCI;
652 bus->host_pci = host_pci;
653 bus->ops = &ssb_pci_ops;
654
655 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
656 if (!err) {
657 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
658 "PCI device %s\n", host_pci->dev.bus_id);
659 }
660
661 return err;
662 }
663 EXPORT_SYMBOL(ssb_bus_pcibus_register);
664 #endif /* CONFIG_SSB_PCIHOST */
665
666 #ifdef CONFIG_SSB_PCMCIAHOST
667 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
668 struct pcmcia_device *pcmcia_dev,
669 unsigned long baseaddr)
670 {
671 int err;
672
673 bus->bustype = SSB_BUSTYPE_PCMCIA;
674 bus->host_pcmcia = pcmcia_dev;
675 bus->ops = &ssb_pcmcia_ops;
676
677 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
678 if (!err) {
679 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
680 "PCMCIA device %s\n", pcmcia_dev->devname);
681 }
682
683 return err;
684 }
685 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
686 #endif /* CONFIG_SSB_PCMCIAHOST */
687
688 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
689 unsigned long baseaddr,
690 ssb_invariants_func_t get_invariants)
691 {
692 int err;
693
694 bus->bustype = SSB_BUSTYPE_SSB;
695 bus->ops = &ssb_ssb_ops;
696
697 err = ssb_bus_register(bus, get_invariants, baseaddr);
698 if (!err) {
699 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
700 "address 0x%08lX\n", baseaddr);
701 }
702
703 return err;
704 }
705
706 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
707 {
708 drv->drv.name = drv->name;
709 drv->drv.bus = &ssb_bustype;
710 drv->drv.owner = owner;
711
712 return driver_register(&drv->drv);
713 }
714 EXPORT_SYMBOL(__ssb_driver_register);
715
716 void ssb_driver_unregister(struct ssb_driver *drv)
717 {
718 driver_unregister(&drv->drv);
719 }
720 EXPORT_SYMBOL(ssb_driver_unregister);
721
722 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
723 {
724 struct ssb_bus *bus = dev->bus;
725 struct ssb_device *ent;
726 int i;
727
728 for (i = 0; i < bus->nr_devices; i++) {
729 ent = &(bus->devices[i]);
730 if (ent->id.vendor != dev->id.vendor)
731 continue;
732 if (ent->id.coreid != dev->id.coreid)
733 continue;
734
735 ent->devtypedata = data;
736 }
737 }
738 EXPORT_SYMBOL(ssb_set_devtypedata);
739
740 static u32 clkfactor_f6_resolve(u32 v)
741 {
742 /* map the magic values */
743 switch (v) {
744 case SSB_CHIPCO_CLK_F6_2:
745 return 2;
746 case SSB_CHIPCO_CLK_F6_3:
747 return 3;
748 case SSB_CHIPCO_CLK_F6_4:
749 return 4;
750 case SSB_CHIPCO_CLK_F6_5:
751 return 5;
752 case SSB_CHIPCO_CLK_F6_6:
753 return 6;
754 case SSB_CHIPCO_CLK_F6_7:
755 return 7;
756 }
757 return 0;
758 }
759
760 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
761 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
762 {
763 u32 n1, n2, clock, m1, m2, m3, mc;
764
765 n1 = (n & SSB_CHIPCO_CLK_N1);
766 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
767
768 switch (plltype) {
769 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
770 if (m & SSB_CHIPCO_CLK_T6_MMASK)
771 return SSB_CHIPCO_CLK_T6_M0;
772 return SSB_CHIPCO_CLK_T6_M1;
773 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
774 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
775 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
776 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
777 n1 = clkfactor_f6_resolve(n1);
778 n2 += SSB_CHIPCO_CLK_F5_BIAS;
779 break;
780 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
781 n1 += SSB_CHIPCO_CLK_T2_BIAS;
782 n2 += SSB_CHIPCO_CLK_T2_BIAS;
783 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
784 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
785 break;
786 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
787 return 100000000;
788 default:
789 SSB_WARN_ON(1);
790 }
791
792 switch (plltype) {
793 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
794 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
795 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
796 break;
797 default:
798 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
799 }
800 if (!clock)
801 return 0;
802
803 m1 = (m & SSB_CHIPCO_CLK_M1);
804 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
805 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
806 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
807
808 switch (plltype) {
809 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
810 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
811 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
812 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
813 m1 = clkfactor_f6_resolve(m1);
814 if ((plltype == SSB_PLLTYPE_1) ||
815 (plltype == SSB_PLLTYPE_3))
816 m2 += SSB_CHIPCO_CLK_F5_BIAS;
817 else
818 m2 = clkfactor_f6_resolve(m2);
819 m3 = clkfactor_f6_resolve(m3);
820
821 switch (mc) {
822 case SSB_CHIPCO_CLK_MC_BYPASS:
823 return clock;
824 case SSB_CHIPCO_CLK_MC_M1:
825 return (clock / m1);
826 case SSB_CHIPCO_CLK_MC_M1M2:
827 return (clock / (m1 * m2));
828 case SSB_CHIPCO_CLK_MC_M1M2M3:
829 return (clock / (m1 * m2 * m3));
830 case SSB_CHIPCO_CLK_MC_M1M3:
831 return (clock / (m1 * m3));
832 }
833 return 0;
834 case SSB_PLLTYPE_2:
835 m1 += SSB_CHIPCO_CLK_T2_BIAS;
836 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
837 m3 += SSB_CHIPCO_CLK_T2_BIAS;
838 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
839 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
840 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
841
842 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
843 clock /= m1;
844 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
845 clock /= m2;
846 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
847 clock /= m3;
848 return clock;
849 default:
850 SSB_WARN_ON(1);
851 }
852 return 0;
853 }
854
855 /* Get the current speed the backplane is running at */
856 u32 ssb_clockspeed(struct ssb_bus *bus)
857 {
858 u32 rate;
859 u32 plltype;
860 u32 clkctl_n, clkctl_m;
861
862 if (ssb_extif_available(&bus->extif))
863 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
864 &clkctl_n, &clkctl_m);
865 else if (bus->chipco.dev)
866 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
867 &clkctl_n, &clkctl_m);
868 else
869 return 0;
870
871 if (bus->chip_id == 0x5365) {
872 rate = 100000000;
873 } else {
874 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
875 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
876 rate /= 2;
877 }
878
879 return rate;
880 }
881 EXPORT_SYMBOL(ssb_clockspeed);
882
883 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
884 {
885 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
886
887 /* The REJECT bit changed position in TMSLOW between
888 * Backplane revisions. */
889 switch (rev) {
890 case SSB_IDLOW_SSBREV_22:
891 return SSB_TMSLOW_REJECT_22;
892 case SSB_IDLOW_SSBREV_23:
893 return SSB_TMSLOW_REJECT_23;
894 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
895 case SSB_IDLOW_SSBREV_25: /* same here */
896 case SSB_IDLOW_SSBREV_26: /* same here */
897 case SSB_IDLOW_SSBREV_27: /* same here */
898 return SSB_TMSLOW_REJECT_23; /* this is a guess */
899 default:
900 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
901 WARN_ON(1);
902 }
903 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
904 }
905
906 int ssb_device_is_enabled(struct ssb_device *dev)
907 {
908 u32 val;
909 u32 reject;
910
911 reject = ssb_tmslow_reject_bitmask(dev);
912 val = ssb_read32(dev, SSB_TMSLOW);
913 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
914
915 return (val == SSB_TMSLOW_CLOCK);
916 }
917 EXPORT_SYMBOL(ssb_device_is_enabled);
918
919 static void ssb_flush_tmslow(struct ssb_device *dev)
920 {
921 /* Make _really_ sure the device has finished the TMSLOW
922 * register write transaction, as we risk running into
923 * a machine check exception otherwise.
924 * Do this by reading the register back to commit the
925 * PCI write and delay an additional usec for the device
926 * to react to the change. */
927 ssb_read32(dev, SSB_TMSLOW);
928 udelay(1);
929 }
930
931 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
932 {
933 u32 val;
934
935 ssb_device_disable(dev, core_specific_flags);
936 ssb_write32(dev, SSB_TMSLOW,
937 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
938 SSB_TMSLOW_FGC | core_specific_flags);
939 ssb_flush_tmslow(dev);
940
941 /* Clear SERR if set. This is a hw bug workaround. */
942 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
943 ssb_write32(dev, SSB_TMSHIGH, 0);
944
945 val = ssb_read32(dev, SSB_IMSTATE);
946 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
947 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
948 ssb_write32(dev, SSB_IMSTATE, val);
949 }
950
951 ssb_write32(dev, SSB_TMSLOW,
952 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
953 core_specific_flags);
954 ssb_flush_tmslow(dev);
955
956 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
957 core_specific_flags);
958 ssb_flush_tmslow(dev);
959 }
960 EXPORT_SYMBOL(ssb_device_enable);
961
962 /* Wait for a bit in a register to get set or unset.
963 * timeout is in units of ten-microseconds */
964 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
965 int timeout, int set)
966 {
967 int i;
968 u32 val;
969
970 for (i = 0; i < timeout; i++) {
971 val = ssb_read32(dev, reg);
972 if (set) {
973 if (val & bitmask)
974 return 0;
975 } else {
976 if (!(val & bitmask))
977 return 0;
978 }
979 udelay(10);
980 }
981 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
982 "register %04X to %s.\n",
983 bitmask, reg, (set ? "set" : "clear"));
984
985 return -ETIMEDOUT;
986 }
987
988 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
989 {
990 u32 reject;
991
992 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
993 return;
994
995 reject = ssb_tmslow_reject_bitmask(dev);
996 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
997 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
998 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
999 ssb_write32(dev, SSB_TMSLOW,
1000 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1001 reject | SSB_TMSLOW_RESET |
1002 core_specific_flags);
1003 ssb_flush_tmslow(dev);
1004
1005 ssb_write32(dev, SSB_TMSLOW,
1006 reject | SSB_TMSLOW_RESET |
1007 core_specific_flags);
1008 ssb_flush_tmslow(dev);
1009 }
1010 EXPORT_SYMBOL(ssb_device_disable);
1011
1012 u32 ssb_dma_translation(struct ssb_device *dev)
1013 {
1014 switch (dev->bus->bustype) {
1015 case SSB_BUSTYPE_SSB:
1016 return 0;
1017 case SSB_BUSTYPE_PCI:
1018 case SSB_BUSTYPE_PCMCIA:
1019 return SSB_PCI_DMA;
1020 }
1021 return 0;
1022 }
1023 EXPORT_SYMBOL(ssb_dma_translation);
1024
1025 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1026 {
1027 struct device *dev = ssb_dev->dev;
1028
1029 #ifdef CONFIG_SSB_PCIHOST
1030 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1031 !dma_supported(dev, mask))
1032 return -EIO;
1033 #endif
1034 dev->coherent_dma_mask = mask;
1035 dev->dma_mask = &dev->coherent_dma_mask;
1036
1037 return 0;
1038 }
1039 EXPORT_SYMBOL(ssb_dma_set_mask);
1040
1041 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1042 {
1043 struct ssb_chipcommon *cc;
1044 int err = 0;
1045
1046 /* On buses where more than one core may be working
1047 * at a time, we must not powerdown stuff if there are
1048 * still cores that may want to run. */
1049 if (bus->bustype == SSB_BUSTYPE_SSB)
1050 goto out;
1051
1052 cc = &bus->chipco;
1053 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1054 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1055 if (err)
1056 goto error;
1057 out:
1058 #ifdef CONFIG_SSB_DEBUG
1059 bus->powered_up = 0;
1060 #endif
1061 return err;
1062 error:
1063 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1064 goto out;
1065 }
1066 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1067
1068 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1069 {
1070 struct ssb_chipcommon *cc;
1071 int err;
1072 enum ssb_clkmode mode;
1073
1074 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1075 if (err)
1076 goto error;
1077 cc = &bus->chipco;
1078 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1079 ssb_chipco_set_clockmode(cc, mode);
1080
1081 #ifdef CONFIG_SSB_DEBUG
1082 bus->powered_up = 1;
1083 #endif
1084 return 0;
1085 error:
1086 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1087 return err;
1088 }
1089 EXPORT_SYMBOL(ssb_bus_powerup);
1090
1091 u32 ssb_admatch_base(u32 adm)
1092 {
1093 u32 base = 0;
1094
1095 switch (adm & SSB_ADM_TYPE) {
1096 case SSB_ADM_TYPE0:
1097 base = (adm & SSB_ADM_BASE0);
1098 break;
1099 case SSB_ADM_TYPE1:
1100 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1101 base = (adm & SSB_ADM_BASE1);
1102 break;
1103 case SSB_ADM_TYPE2:
1104 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1105 base = (adm & SSB_ADM_BASE2);
1106 break;
1107 default:
1108 SSB_WARN_ON(1);
1109 }
1110
1111 return base;
1112 }
1113 EXPORT_SYMBOL(ssb_admatch_base);
1114
1115 u32 ssb_admatch_size(u32 adm)
1116 {
1117 u32 size = 0;
1118
1119 switch (adm & SSB_ADM_TYPE) {
1120 case SSB_ADM_TYPE0:
1121 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1122 break;
1123 case SSB_ADM_TYPE1:
1124 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1125 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1126 break;
1127 case SSB_ADM_TYPE2:
1128 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1129 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1130 break;
1131 default:
1132 SSB_WARN_ON(1);
1133 }
1134 size = (1 << (size + 1));
1135
1136 return size;
1137 }
1138 EXPORT_SYMBOL(ssb_admatch_size);
1139
1140 static int __init ssb_modinit(void)
1141 {
1142 int err;
1143
1144 /* See the comment at the ssb_is_early_boot definition */
1145 ssb_is_early_boot = 0;
1146 err = bus_register(&ssb_bustype);
1147 if (err)
1148 return err;
1149
1150 /* Maybe we already registered some buses at early boot.
1151 * Check for this and attach them
1152 */
1153 ssb_buses_lock();
1154 err = ssb_attach_queued_buses();
1155 ssb_buses_unlock();
1156 if (err)
1157 bus_unregister(&ssb_bustype);
1158
1159 err = b43_pci_ssb_bridge_init();
1160 if (err) {
1161 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1162 "initialization failed");
1163 /* don't fail SSB init because of this */
1164 err = 0;
1165 }
1166
1167 return err;
1168 }
1169 /* ssb must be initialized after PCI but before the ssb drivers.
1170 * That means we must use some initcall between subsys_initcall
1171 * and device_initcall. */
1172 fs_initcall(ssb_modinit);
1173
1174 static void __exit ssb_modexit(void)
1175 {
1176 b43_pci_ssb_bridge_exit();
1177 bus_unregister(&ssb_bustype);
1178 }
1179 module_exit(ssb_modexit)
WRT350N Kernel Patches