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Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / usb / gadget / pxa2xx_udc.c
blob764e7dc7c89ee92497a77b7cf4407245d6bb591e
1 /*
2 * linux/drivers/usb/gadget/pxa2xx_udc.c
3 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
6 * Copyright (C) 2003 Robert Schwebel, Pengutronix
7 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8 * Copyright (C) 2003 David Brownell
9 * Copyright (C) 2003 Joshua Wise
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27 /* #define VERBOSE_DEBUG */
28
29 #include <linux/device.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/types.h>
34 #include <linux/errno.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/mm.h>
42 #include <linux/platform_device.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/irq.h>
45 #include <linux/clk.h>
46 #include <linux/err.h>
47 #include <linux/seq_file.h>
48 #include <linux/debugfs.h>
49
50 #include <asm/byteorder.h>
51 #include <asm/dma.h>
52 #include <asm/gpio.h>
53 #include <asm/io.h>
54 #include <asm/system.h>
55 #include <asm/mach-types.h>
56 #include <asm/unaligned.h>
57 #include <asm/hardware.h>
58
59 #include <linux/usb/ch9.h>
60 #include <linux/usb/gadget.h>
61
62 #include <asm/mach/udc_pxa2xx.h>
63
64
65 /*
66 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
67 * series processors. The UDC for the IXP 4xx series is very similar.
68 * There are fifteen endpoints, in addition to ep0.
69 *
70 * Such controller drivers work with a gadget driver. The gadget driver
71 * returns descriptors, implements configuration and data protocols used
72 * by the host to interact with this device, and allocates endpoints to
73 * the different protocol interfaces. The controller driver virtualizes
74 * usb hardware so that the gadget drivers will be more portable.
75 *
76 * This UDC hardware wants to implement a bit too much USB protocol, so
77 * it constrains the sorts of USB configuration change events that work.
78 * The errata for these chips are misleading; some "fixed" bugs from
79 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
80 *
81 * Note that the UDC hardware supports DMA (except on IXP) but that's
82 * not used here. IN-DMA (to host) is simple enough, when the data is
83 * suitably aligned (16 bytes) ... the network stack doesn't do that,
84 * other software can. OUT-DMA is buggy in most chip versions, as well
85 * as poorly designed (data toggle not automatic). So this driver won't
86 * bother using DMA. (Mostly-working IN-DMA support was available in
87 * kernels before 2.6.23, but was never enabled or well tested.)
88 */
89
90 #define DRIVER_VERSION "30-June-2007"
91 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
92
93
94 static const char driver_name [] = "pxa2xx_udc";
95
96 static const char ep0name [] = "ep0";
97
98
99 #ifdef CONFIG_ARCH_IXP4XX
100
101 /* cpu-specific register addresses are compiled in to this code */
102 #ifdef CONFIG_ARCH_PXA
103 #error "Can't configure both IXP and PXA"
104 #endif
105
106 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
107 =======
108 /* IXP doesn't yet support <linux/clk.h> */
109 #define clk_get(dev,name) NULL
110 #define clk_enable(clk) do { } while (0)
111 #define clk_disable(clk) do { } while (0)
112 #define clk_put(clk) do { } while (0)
113
114 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
115 #endif
116
117 #include "pxa2xx_udc.h"
118
119
120 #ifdef CONFIG_USB_PXA2XX_SMALL
121 #define SIZE_STR " (small)"
122 #else
123 #define SIZE_STR ""
124 #endif
125
126 /* ---------------------------------------------------------------------------
127 * endpoint related parts of the api to the usb controller hardware,
128 * used by gadget driver; and the inner talker-to-hardware core.
129 * ---------------------------------------------------------------------------
130 */
131
132 static void pxa2xx_ep_fifo_flush (struct usb_ep *ep);
133 static void nuke (struct pxa2xx_ep *, int status);
134
135 /* one GPIO should be used to detect VBUS from the host */
136 static int is_vbus_present(void)
137 {
138 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
139
140 if (mach->gpio_vbus) {
141 int value = gpio_get_value(mach->gpio_vbus);
142 return mach->gpio_vbus_inverted ? !value : value;
143 }
144 if (mach->udc_is_connected)
145 return mach->udc_is_connected();
146 return 1;
147 }
148
149 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
150 static void pullup_off(void)
151 {
152 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
153
154 if (mach->gpio_pullup)
155 gpio_set_value(mach->gpio_pullup, 0);
156 else if (mach->udc_command)
157 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
158 }
159
160 static void pullup_on(void)
161 {
162 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
163
164 if (mach->gpio_pullup)
165 gpio_set_value(mach->gpio_pullup, 1);
166 else if (mach->udc_command)
167 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
168 }
169
170 static void pio_irq_enable(int bEndpointAddress)
171 {
172 bEndpointAddress &= 0xf;
173 if (bEndpointAddress < 8)
174 UICR0 &= ~(1 << bEndpointAddress);
175 else {
176 bEndpointAddress -= 8;
177 UICR1 &= ~(1 << bEndpointAddress);
178 }
179 }
180
181 static void pio_irq_disable(int bEndpointAddress)
182 {
183 bEndpointAddress &= 0xf;
184 if (bEndpointAddress < 8)
185 UICR0 |= 1 << bEndpointAddress;
186 else {
187 bEndpointAddress -= 8;
188 UICR1 |= 1 << bEndpointAddress;
189 }
190 }
191
192 /* The UDCCR reg contains mask and interrupt status bits,
193 * so using '|=' isn't safe as it may ack an interrupt.
194 */
195 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
196
197 static inline void udc_set_mask_UDCCR(int mask)
198 {
199 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
200 }
201
202 static inline void udc_clear_mask_UDCCR(int mask)
203 {
204 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
205 }
206
207 static inline void udc_ack_int_UDCCR(int mask)
208 {
209 /* udccr contains the bits we dont want to change */
210 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
211
212 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
213 }
214
215 /*
216 * endpoint enable/disable
217 *
218 * we need to verify the descriptors used to enable endpoints. since pxa2xx
219 * endpoint configurations are fixed, and are pretty much always enabled,
220 * there's not a lot to manage here.
221 *
222 * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
223 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
224 * for a single interface (with only the default altsetting) and for gadget
225 * drivers that don't halt endpoints (not reset by set_interface). that also
226 * means that if you use ISO, you must violate the USB spec rule that all
227 * iso endpoints must be in non-default altsettings.
228 */
229 static int pxa2xx_ep_enable (struct usb_ep *_ep,
230 const struct usb_endpoint_descriptor *desc)
231 {
232 struct pxa2xx_ep *ep;
233 struct pxa2xx_udc *dev;
234
235 ep = container_of (_ep, struct pxa2xx_ep, ep);
236 if (!_ep || !desc || ep->desc || _ep->name == ep0name
237 || desc->bDescriptorType != USB_DT_ENDPOINT
238 || ep->bEndpointAddress != desc->bEndpointAddress
239 || ep->fifo_size < le16_to_cpu
240 (desc->wMaxPacketSize)) {
241 DMSG("%s, bad ep or descriptor\n", __FUNCTION__);
242 return -EINVAL;
243 }
244
245 /* xfer types must match, except that interrupt ~= bulk */
246 if (ep->bmAttributes != desc->bmAttributes
247 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
248 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
249 DMSG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
250 return -EINVAL;
251 }
252
253 /* hardware _could_ do smaller, but driver doesn't */
254 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
255 && le16_to_cpu (desc->wMaxPacketSize)
256 != BULK_FIFO_SIZE)
257 || !desc->wMaxPacketSize) {
258 DMSG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
259 return -ERANGE;
260 }
261
262 dev = ep->dev;
263 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
264 DMSG("%s, bogus device state\n", __FUNCTION__);
265 return -ESHUTDOWN;
266 }
267
268 ep->desc = desc;
269 ep->stopped = 0;
270 ep->pio_irqs = 0;
271 ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
272
273 /* flush fifo (mostly for OUT buffers) */
274 pxa2xx_ep_fifo_flush (_ep);
275
276 /* ... reset halt state too, if we could ... */
277
278 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
279 return 0;
280 }
281
282 static int pxa2xx_ep_disable (struct usb_ep *_ep)
283 {
284 struct pxa2xx_ep *ep;
285 unsigned long flags;
286
287 ep = container_of (_ep, struct pxa2xx_ep, ep);
288 if (!_ep || !ep->desc) {
289 DMSG("%s, %s not enabled\n", __FUNCTION__,
290 _ep ? ep->ep.name : NULL);
291 return -EINVAL;
292 }
293 local_irq_save(flags);
294
295 nuke (ep, -ESHUTDOWN);
296
297 /* flush fifo (mostly for IN buffers) */
298 pxa2xx_ep_fifo_flush (_ep);
299
300 ep->desc = NULL;
301 ep->stopped = 1;
302
303 local_irq_restore(flags);
304 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
305 return 0;
306 }
307
308 /*-------------------------------------------------------------------------*/
309
310 /* for the pxa2xx, these can just wrap kmalloc/kfree. gadget drivers
311 * must still pass correctly initialized endpoints, since other controller
312 * drivers may care about how it's currently set up (dma issues etc).
313 */
314
315 /*
316 * pxa2xx_ep_alloc_request - allocate a request data structure
317 */
318 static struct usb_request *
319 pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
320 {
321 struct pxa2xx_request *req;
322
323 req = kzalloc(sizeof(*req), gfp_flags);
324 if (!req)
325 return NULL;
326
327 INIT_LIST_HEAD (&req->queue);
328 return &req->req;
329 }
330
331
332 /*
333 * pxa2xx_ep_free_request - deallocate a request data structure
334 */
335 static void
336 pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
337 {
338 struct pxa2xx_request *req;
339
340 req = container_of (_req, struct pxa2xx_request, req);
341 WARN_ON (!list_empty (&req->queue));
342 kfree(req);
343 }
344
345 /*-------------------------------------------------------------------------*/
346
347 /*
348 * done - retire a request; caller blocked irqs
349 */
350 static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
351 {
352 unsigned stopped = ep->stopped;
353
354 list_del_init(&req->queue);
355
356 if (likely (req->req.status == -EINPROGRESS))
357 req->req.status = status;
358 else
359 status = req->req.status;
360
361 if (status && status != -ESHUTDOWN)
362 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
363 ep->ep.name, &req->req, status,
364 req->req.actual, req->req.length);
365
366 /* don't modify queue heads during completion callback */
367 ep->stopped = 1;
368 req->req.complete(&ep->ep, &req->req);
369 ep->stopped = stopped;
370 }
371
372
373 static inline void ep0_idle (struct pxa2xx_udc *dev)
374 {
375 dev->ep0state = EP0_IDLE;
376 }
377
378 static int
379 write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
380 {
381 u8 *buf;
382 unsigned length, count;
383
384 buf = req->req.buf + req->req.actual;
385 prefetch(buf);
386
387 /* how big will this packet be? */
388 length = min(req->req.length - req->req.actual, max);
389 req->req.actual += length;
390
391 count = length;
392 while (likely(count--))
393 *uddr = *buf++;
394
395 return length;
396 }
397
398 /*
399 * write to an IN endpoint fifo, as many packets as possible.
400 * irqs will use this to write the rest later.
401 * caller guarantees at least one packet buffer is ready (or a zlp).
402 */
403 static int
404 write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
405 {
406 unsigned max;
407
408 max = le16_to_cpu(ep->desc->wMaxPacketSize);
409 do {
410 unsigned count;
411 int is_last, is_short;
412
413 count = write_packet(ep->reg_uddr, req, max);
414
415 /* last packet is usually short (or a zlp) */
416 if (unlikely (count != max))
417 is_last = is_short = 1;
418 else {
419 if (likely(req->req.length != req->req.actual)
420 || req->req.zero)
421 is_last = 0;
422 else
423 is_last = 1;
424 /* interrupt/iso maxpacket may not fill the fifo */
425 is_short = unlikely (max < ep->fifo_size);
426 }
427
428 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
429 ep->ep.name, count,
430 is_last ? "/L" : "", is_short ? "/S" : "",
431 req->req.length - req->req.actual, req);
432
433 /* let loose that packet. maybe try writing another one,
434 * double buffering might work. TSP, TPC, and TFS
435 * bit values are the same for all normal IN endpoints.
436 */
437 *ep->reg_udccs = UDCCS_BI_TPC;
438 if (is_short)
439 *ep->reg_udccs = UDCCS_BI_TSP;
440
441 /* requests complete when all IN data is in the FIFO */
442 if (is_last) {
443 done (ep, req, 0);
444 if (list_empty(&ep->queue))
445 pio_irq_disable (ep->bEndpointAddress);
446 return 1;
447 }
448
449 // TODO experiment: how robust can fifo mode tweaking be?
450 // double buffering is off in the default fifo mode, which
451 // prevents TFS from being set here.
452
453 } while (*ep->reg_udccs & UDCCS_BI_TFS);
454 return 0;
455 }
456
457 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
458 * ep0 data stage. these chips want very simple state transitions.
459 */
460 static inline
461 void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
462 {
463 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
464 USIR0 = USIR0_IR0;
465 dev->req_pending = 0;
466 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
467 __FUNCTION__, tag, UDCCS0, flags);
468 }
469
470 static int
471 write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
472 {
473 unsigned count;
474 int is_short;
475
476 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
477 ep->dev->stats.write.bytes += count;
478
479 /* last packet "must be" short (or a zlp) */
480 is_short = (count != EP0_FIFO_SIZE);
481
482 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
483 req->req.length - req->req.actual, req);
484
485 if (unlikely (is_short)) {
486 if (ep->dev->req_pending)
487 ep0start(ep->dev, UDCCS0_IPR, "short IN");
488 else
489 UDCCS0 = UDCCS0_IPR;
490
491 count = req->req.length;
492 done (ep, req, 0);
493 ep0_idle(ep->dev);
494 #ifndef CONFIG_ARCH_IXP4XX
495 #if 1
496 /* This seems to get rid of lost status irqs in some cases:
497 * host responds quickly, or next request involves config
498 * change automagic, or should have been hidden, or ...
499 *
500 * FIXME get rid of all udelays possible...
501 */
502 if (count >= EP0_FIFO_SIZE) {
503 count = 100;
504 do {
505 if ((UDCCS0 & UDCCS0_OPR) != 0) {
506 /* clear OPR, generate ack */
507 UDCCS0 = UDCCS0_OPR;
508 break;
509 }
510 count--;
511 udelay(1);
512 } while (count);
513 }
514 #endif
515 #endif
516 } else if (ep->dev->req_pending)
517 ep0start(ep->dev, 0, "IN");
518 return is_short;
519 }
520
521
522 /*
523 * read_fifo - unload packet(s) from the fifo we use for usb OUT
524 * transfers and put them into the request. caller should have made
525 * sure there's at least one packet ready.
526 *
527 * returns true if the request completed because of short packet or the
528 * request buffer having filled (and maybe overran till end-of-packet).
529 */
530 static int
531 read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
532 {
533 for (;;) {
534 u32 udccs;
535 u8 *buf;
536 unsigned bufferspace, count, is_short;
537
538 /* make sure there's a packet in the FIFO.
539 * UDCCS_{BO,IO}_RPC are all the same bit value.
540 * UDCCS_{BO,IO}_RNE are all the same bit value.
541 */
542 udccs = *ep->reg_udccs;
543 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
544 break;
545 buf = req->req.buf + req->req.actual;
546 prefetchw(buf);
547 bufferspace = req->req.length - req->req.actual;
548
549 /* read all bytes from this packet */
550 if (likely (udccs & UDCCS_BO_RNE)) {
551 count = 1 + (0x0ff & *ep->reg_ubcr);
552 req->req.actual += min (count, bufferspace);
553 } else /* zlp */
554 count = 0;
555 is_short = (count < ep->ep.maxpacket);
556 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
557 ep->ep.name, udccs, count,
558 is_short ? "/S" : "",
559 req, req->req.actual, req->req.length);
560 while (likely (count-- != 0)) {
561 u8 byte = (u8) *ep->reg_uddr;
562
563 if (unlikely (bufferspace == 0)) {
564 /* this happens when the driver's buffer
565 * is smaller than what the host sent.
566 * discard the extra data.
567 */
568 if (req->req.status != -EOVERFLOW)
569 DMSG("%s overflow %d\n",
570 ep->ep.name, count);
571 req->req.status = -EOVERFLOW;
572 } else {
573 *buf++ = byte;
574 bufferspace--;
575 }
576 }
577 *ep->reg_udccs = UDCCS_BO_RPC;
578 /* RPC/RSP/RNE could now reflect the other packet buffer */
579
580 /* iso is one request per packet */
581 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
582 if (udccs & UDCCS_IO_ROF)
583 req->req.status = -EHOSTUNREACH;
584 /* more like "is_done" */
585 is_short = 1;
586 }
587
588 /* completion */
589 if (is_short || req->req.actual == req->req.length) {
590 done (ep, req, 0);
591 if (list_empty(&ep->queue))
592 pio_irq_disable (ep->bEndpointAddress);
593 return 1;
594 }
595
596 /* finished that packet. the next one may be waiting... */
597 }
598 return 0;
599 }
600
601 /*
602 * special ep0 version of the above. no UBCR0 or double buffering; status
603 * handshaking is magic. most device protocols don't need control-OUT.
604 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
605 * protocols do use them.
606 */
607 static int
608 read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
609 {
610 u8 *buf, byte;
611 unsigned bufferspace;
612
613 buf = req->req.buf + req->req.actual;
614 bufferspace = req->req.length - req->req.actual;
615
616 while (UDCCS0 & UDCCS0_RNE) {
617 byte = (u8) UDDR0;
618
619 if (unlikely (bufferspace == 0)) {
620 /* this happens when the driver's buffer
621 * is smaller than what the host sent.
622 * discard the extra data.
623 */
624 if (req->req.status != -EOVERFLOW)
625 DMSG("%s overflow\n", ep->ep.name);
626 req->req.status = -EOVERFLOW;
627 } else {
628 *buf++ = byte;
629 req->req.actual++;
630 bufferspace--;
631 }
632 }
633
634 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
635
636 /* completion */
637 if (req->req.actual >= req->req.length)
638 return 1;
639
640 /* finished that packet. the next one may be waiting... */
641 return 0;
642 }
643
644 /*-------------------------------------------------------------------------*/
645
646 static int
647 pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
648 {
649 struct pxa2xx_request *req;
650 struct pxa2xx_ep *ep;
651 struct pxa2xx_udc *dev;
652 unsigned long flags;
653
654 req = container_of(_req, struct pxa2xx_request, req);
655 if (unlikely (!_req || !_req->complete || !_req->buf
656 || !list_empty(&req->queue))) {
657 DMSG("%s, bad params\n", __FUNCTION__);
658 return -EINVAL;
659 }
660
661 ep = container_of(_ep, struct pxa2xx_ep, ep);
662 if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
663 DMSG("%s, bad ep\n", __FUNCTION__);
664 return -EINVAL;
665 }
666
667 dev = ep->dev;
668 if (unlikely (!dev->driver
669 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
670 DMSG("%s, bogus device state\n", __FUNCTION__);
671 return -ESHUTDOWN;
672 }
673
674 /* iso is always one packet per request, that's the only way
675 * we can report per-packet status. that also helps with dma.
676 */
677 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
678 && req->req.length > le16_to_cpu
679 (ep->desc->wMaxPacketSize)))
680 return -EMSGSIZE;
681
682 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
683 _ep->name, _req, _req->length, _req->buf);
684
685 local_irq_save(flags);
686
687 _req->status = -EINPROGRESS;
688 _req->actual = 0;
689
690 /* kickstart this i/o queue? */
691 if (list_empty(&ep->queue) && !ep->stopped) {
692 if (ep->desc == NULL/* ep0 */) {
693 unsigned length = _req->length;
694
695 switch (dev->ep0state) {
696 case EP0_IN_DATA_PHASE:
697 dev->stats.write.ops++;
698 if (write_ep0_fifo(ep, req))
699 req = NULL;
700 break;
701
702 case EP0_OUT_DATA_PHASE:
703 dev->stats.read.ops++;
704 /* messy ... */
705 if (dev->req_config) {
706 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
707 dev->has_cfr ? "" : " raced");
708 if (dev->has_cfr)
709 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
710 |UDCCFR_MB1;
711 done(ep, req, 0);
712 dev->ep0state = EP0_END_XFER;
713 local_irq_restore (flags);
714 return 0;
715 }
716 if (dev->req_pending)
717 ep0start(dev, UDCCS0_IPR, "OUT");
718 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
719 && read_ep0_fifo(ep, req))) {
720 ep0_idle(dev);
721 done(ep, req, 0);
722 req = NULL;
723 }
724 break;
725
726 default:
727 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
728 local_irq_restore (flags);
729 return -EL2HLT;
730 }
731 /* can the FIFO can satisfy the request immediately? */
732 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
733 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
734 && write_fifo(ep, req))
735 req = NULL;
736 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
737 && read_fifo(ep, req)) {
738 req = NULL;
739 }
740
741 if (likely (req && ep->desc))
742 pio_irq_enable(ep->bEndpointAddress);
743 }
744
745 /* pio or dma irq handler advances the queue. */
746 if (likely(req != NULL))
747 list_add_tail(&req->queue, &ep->queue);
748 local_irq_restore(flags);
749
750 return 0;
751 }
752
753
754 /*
755 * nuke - dequeue ALL requests
756 */
757 static void nuke(struct pxa2xx_ep *ep, int status)
758 {
759 struct pxa2xx_request *req;
760
761 /* called with irqs blocked */
762 while (!list_empty(&ep->queue)) {
763 req = list_entry(ep->queue.next,
764 struct pxa2xx_request,
765 queue);
766 done(ep, req, status);
767 }
768 if (ep->desc)
769 pio_irq_disable (ep->bEndpointAddress);
770 }
771
772
773 /* dequeue JUST ONE request */
774 static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
775 {
776 struct pxa2xx_ep *ep;
777 struct pxa2xx_request *req;
778 unsigned long flags;
779
780 ep = container_of(_ep, struct pxa2xx_ep, ep);
781 if (!_ep || ep->ep.name == ep0name)
782 return -EINVAL;
783
784 local_irq_save(flags);
785
786 /* make sure it's actually queued on this endpoint */
787 list_for_each_entry (req, &ep->queue, queue) {
788 if (&req->req == _req)
789 break;
790 }
791 if (&req->req != _req) {
792 local_irq_restore(flags);
793 return -EINVAL;
794 }
795
796 done(ep, req, -ECONNRESET);
797
798 local_irq_restore(flags);
799 return 0;
800 }
801
802 /*-------------------------------------------------------------------------*/
803
804 static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
805 {
806 struct pxa2xx_ep *ep;
807 unsigned long flags;
808
809 ep = container_of(_ep, struct pxa2xx_ep, ep);
810 if (unlikely (!_ep
811 || (!ep->desc && ep->ep.name != ep0name))
812 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
813 DMSG("%s, bad ep\n", __FUNCTION__);
814 return -EINVAL;
815 }
816 if (value == 0) {
817 /* this path (reset toggle+halt) is needed to implement
818 * SET_INTERFACE on normal hardware. but it can't be
819 * done from software on the PXA UDC, and the hardware
820 * forgets to do it as part of SET_INTERFACE automagic.
821 */
822 DMSG("only host can clear %s halt\n", _ep->name);
823 return -EROFS;
824 }
825
826 local_irq_save(flags);
827
828 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
829 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
830 || !list_empty(&ep->queue))) {
831 local_irq_restore(flags);
832 return -EAGAIN;
833 }
834
835 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
836 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
837
838 /* ep0 needs special care */
839 if (!ep->desc) {
840 start_watchdog(ep->dev);
841 ep->dev->req_pending = 0;
842 ep->dev->ep0state = EP0_STALL;
843
844 /* and bulk/intr endpoints like dropping stalls too */
845 } else {
846 unsigned i;
847 for (i = 0; i < 1000; i += 20) {
848 if (*ep->reg_udccs & UDCCS_BI_SST)
849 break;
850 udelay(20);
851 }
852 }
853 local_irq_restore(flags);
854
855 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
856 return 0;
857 }
858
859 static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
860 {
861 struct pxa2xx_ep *ep;
862
863 ep = container_of(_ep, struct pxa2xx_ep, ep);
864 if (!_ep) {
865 DMSG("%s, bad ep\n", __FUNCTION__);
866 return -ENODEV;
867 }
868 /* pxa can't report unclaimed bytes from IN fifos */
869 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
870 return -EOPNOTSUPP;
871 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
872 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
873 return 0;
874 else
875 return (*ep->reg_ubcr & 0xfff) + 1;
876 }
877
878 static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
879 {
880 struct pxa2xx_ep *ep;
881
882 ep = container_of(_ep, struct pxa2xx_ep, ep);
883 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
884 DMSG("%s, bad ep\n", __FUNCTION__);
885 return;
886 }
887
888 /* toggle and halt bits stay unchanged */
889
890 /* for OUT, just read and discard the FIFO contents. */
891 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
892 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
893 (void) *ep->reg_uddr;
894 return;
895 }
896
897 /* most IN status is the same, but ISO can't stall */
898 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
899 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
900 ? 0 : UDCCS_BI_SST;
901 }
902
903
904 static struct usb_ep_ops pxa2xx_ep_ops = {
905 .enable = pxa2xx_ep_enable,
906 .disable = pxa2xx_ep_disable,
907
908 .alloc_request = pxa2xx_ep_alloc_request,
909 .free_request = pxa2xx_ep_free_request,
910
911 .queue = pxa2xx_ep_queue,
912 .dequeue = pxa2xx_ep_dequeue,
913
914 .set_halt = pxa2xx_ep_set_halt,
915 .fifo_status = pxa2xx_ep_fifo_status,
916 .fifo_flush = pxa2xx_ep_fifo_flush,
917 };
918
919
920 /* ---------------------------------------------------------------------------
921 * device-scoped parts of the api to the usb controller hardware
922 * ---------------------------------------------------------------------------
923 */
924
925 static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget)
926 {
927 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
928 }
929
930 static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
931 {
932 /* host may not have enabled remote wakeup */
933 if ((UDCCS0 & UDCCS0_DRWF) == 0)
934 return -EHOSTUNREACH;
935 udc_set_mask_UDCCR(UDCCR_RSM);
936 return 0;
937 }
938
939 static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *);
940 static void udc_enable (struct pxa2xx_udc *);
941 static void udc_disable(struct pxa2xx_udc *);
942
943 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
944 * in active use.
945 */
946 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
947 static int pullup(struct pxa2xx_udc *udc, int is_active)
948 =======
949 static int pullup(struct pxa2xx_udc *udc)
950 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
951 {
952 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
953 is_active = is_active && udc->vbus && udc->pullup;
954 =======
955 int is_active = udc->vbus && udc->pullup && !udc->suspended;
956 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
957 DMSG("%s\n", is_active ? "active" : "inactive");
958 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
959 if (is_active)
960 udc_enable(udc);
961 else {
962 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
963 DMSG("disconnect %s\n", udc->driver
964 ? udc->driver->driver.name
965 : "(no driver)");
966 stop_activity(udc, udc->driver);
967 =======
968 if (is_active) {
969 if (!udc->active) {
970 udc->active = 1;
971 /* Enable clock for USB device */
972 clk_enable(udc->clk);
973 udc_enable(udc);
974 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
975 }
976 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
977 udc_disable(udc);
978 =======
979 } else {
980 if (udc->active) {
981 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
982 DMSG("disconnect %s\n", udc->driver
983 ? udc->driver->driver.name
984 : "(no driver)");
985 stop_activity(udc, udc->driver);
986 }
987 udc_disable(udc);
988 /* Disable clock for USB device */
989 clk_disable(udc->clk);
990 udc->active = 0;
991 }
992
993 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
994 }
995 return 0;
996 }
997
998 /* VBUS reporting logically comes from a transceiver */
999 static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1000 {
1001 struct pxa2xx_udc *udc;
1002
1003 udc = container_of(_gadget, struct pxa2xx_udc, gadget);
1004 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1005 udc->vbus = is_active = (is_active != 0);
1006 =======
1007 udc->vbus = (is_active != 0);
1008 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1009 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
1010 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1011 pullup(udc, is_active);
1012 =======
1013 pullup(udc);
1014 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1015 return 0;
1016 }
1017
1018 /* drivers may have software control over D+ pullup */
1019 static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
1020 {
1021 struct pxa2xx_udc *udc;
1022
1023 udc = container_of(_gadget, struct pxa2xx_udc, gadget);
1024
1025 /* not all boards support pullup control */
1026 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
1027 return -EOPNOTSUPP;
1028
1029 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1030 is_active = (is_active != 0);
1031 udc->pullup = is_active;
1032 pullup(udc, is_active);
1033 =======
1034 udc->pullup = (is_active != 0);
1035 pullup(udc);
1036 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1037 return 0;
1038 }
1039
1040 static const struct usb_gadget_ops pxa2xx_udc_ops = {
1041 .get_frame = pxa2xx_udc_get_frame,
1042 .wakeup = pxa2xx_udc_wakeup,
1043 .vbus_session = pxa2xx_udc_vbus_session,
1044 .pullup = pxa2xx_udc_pullup,
1045
1046 // .vbus_draw ... boards may consume current from VBUS, up to
1047 // 100-500mA based on config. the 500uA suspend ceiling means
1048 // that exclusively vbus-powered PXA designs violate USB specs.
1049 };
1050
1051 /*-------------------------------------------------------------------------*/
1052
1053 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1054
1055 static int
1056 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1057 udc_seq_show(struct seq_file *m, void *d)
1058 =======
1059 udc_seq_show(struct seq_file *m, void *_d)
1060 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1061 {
1062 struct pxa2xx_udc *dev = m->private;
1063 unsigned long flags;
1064 int i;
1065 u32 tmp;
1066
1067 local_irq_save(flags);
1068
1069 /* basic device status */
1070 seq_printf(m, DRIVER_DESC "\n"
1071 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1072 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1073 dev->driver ? dev->driver->driver.name : "(none)",
1074 is_vbus_present() ? "full speed" : "disconnected");
1075
1076 /* registers for device and ep0 */
1077 seq_printf(m,
1078 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1079 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1080
1081 tmp = UDCCR;
1082 seq_printf(m,
1083 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1084 (tmp & UDCCR_REM) ? " rem" : "",
1085 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1086 (tmp & UDCCR_SRM) ? " srm" : "",
1087 (tmp & UDCCR_SUSIR) ? " susir" : "",
1088 (tmp & UDCCR_RESIR) ? " resir" : "",
1089 (tmp & UDCCR_RSM) ? " rsm" : "",
1090 (tmp & UDCCR_UDA) ? " uda" : "",
1091 (tmp & UDCCR_UDE) ? " ude" : "");
1092
1093 tmp = UDCCS0;
1094 seq_printf(m,
1095 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1096 (tmp & UDCCS0_SA) ? " sa" : "",
1097 (tmp & UDCCS0_RNE) ? " rne" : "",
1098 (tmp & UDCCS0_FST) ? " fst" : "",
1099 (tmp & UDCCS0_SST) ? " sst" : "",
1100 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1101 (tmp & UDCCS0_FTF) ? " ftf" : "",
1102 (tmp & UDCCS0_IPR) ? " ipr" : "",
1103 (tmp & UDCCS0_OPR) ? " opr" : "");
1104
1105 if (dev->has_cfr) {
1106 tmp = UDCCFR;
1107 seq_printf(m,
1108 "udccfr %02X =%s%s\n", tmp,
1109 (tmp & UDCCFR_AREN) ? " aren" : "",
1110 (tmp & UDCCFR_ACM) ? " acm" : "");
1111 }
1112
1113 if (!is_vbus_present() || !dev->driver)
1114 goto done;
1115
1116 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1117 dev->stats.write.bytes, dev->stats.write.ops,
1118 dev->stats.read.bytes, dev->stats.read.ops,
1119 dev->stats.irqs);
1120
1121 /* dump endpoint queues */
1122 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1123 struct pxa2xx_ep *ep = &dev->ep [i];
1124 struct pxa2xx_request *req;
1125
1126 if (i != 0) {
1127 const struct usb_endpoint_descriptor *desc;
1128
1129 desc = ep->desc;
1130 if (!desc)
1131 continue;
1132 tmp = *dev->ep [i].reg_udccs;
1133 seq_printf(m,
1134 "%s max %d %s udccs %02x irqs %lu\n",
1135 ep->ep.name, le16_to_cpu(desc->wMaxPacketSize),
1136 "pio", tmp, ep->pio_irqs);
1137 /* TODO translate all five groups of udccs bits! */
1138
1139 } else /* ep0 should only have one transfer queued */
1140 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1141 ep->pio_irqs);
1142
1143 if (list_empty(&ep->queue)) {
1144 seq_printf(m, "\t(nothing queued)\n");
1145 continue;
1146 }
1147 list_for_each_entry(req, &ep->queue, queue) {
1148 seq_printf(m,
1149 "\treq %p len %d/%d buf %p\n",
1150 &req->req, req->req.actual,
1151 req->req.length, req->req.buf);
1152 }
1153 }
1154
1155 done:
1156 local_irq_restore(flags);
1157 return 0;
1158 }
1159
1160 static int
1161 udc_debugfs_open(struct inode *inode, struct file *file)
1162 {
1163 return single_open(file, udc_seq_show, inode->i_private);
1164 }
1165
1166 static const struct file_operations debug_fops = {
1167 .open = udc_debugfs_open,
1168 .read = seq_read,
1169 .llseek = seq_lseek,
1170 .release = single_release,
1171 .owner = THIS_MODULE,
1172 };
1173
1174 #define create_debug_files(dev) \
1175 do { \
1176 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1177 S_IRUGO, NULL, dev, &debug_fops); \
1178 } while (0)
1179 #define remove_debug_files(dev) \
1180 do { \
1181 if (dev->debugfs_udc) \
1182 debugfs_remove(dev->debugfs_udc); \
1183 } while (0)
1184
1185 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1186
1187 #define create_debug_files(dev) do {} while (0)
1188 #define remove_debug_files(dev) do {} while (0)
1189
1190 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1191
1192 /*-------------------------------------------------------------------------*/
1193
1194 /*
1195 * udc_disable - disable USB device controller
1196 */
1197 static void udc_disable(struct pxa2xx_udc *dev)
1198 {
1199 /* block all irqs */
1200 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1201 UICR0 = UICR1 = 0xff;
1202 UFNRH = UFNRH_SIM;
1203
1204 /* if hardware supports it, disconnect from usb */
1205 pullup_off();
1206
1207 udc_clear_mask_UDCCR(UDCCR_UDE);
1208
1209 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1210 #ifdef CONFIG_ARCH_PXA
1211 /* Disable clock for USB device */
1212 clk_disable(dev->clk);
1213 #endif
1214
1215 =======
1216 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1217 ep0_idle (dev);
1218 dev->gadget.speed = USB_SPEED_UNKNOWN;
1219 }
1220
1221
1222 /*
1223 * udc_reinit - initialize software state
1224 */
1225 static void udc_reinit(struct pxa2xx_udc *dev)
1226 {
1227 u32 i;
1228
1229 /* device/ep0 records init */
1230 INIT_LIST_HEAD (&dev->gadget.ep_list);
1231 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1232 dev->ep0state = EP0_IDLE;
1233
1234 /* basic endpoint records init */
1235 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1236 struct pxa2xx_ep *ep = &dev->ep[i];
1237
1238 if (i != 0)
1239 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1240
1241 ep->desc = NULL;
1242 ep->stopped = 0;
1243 INIT_LIST_HEAD (&ep->queue);
1244 ep->pio_irqs = 0;
1245 }
1246
1247 /* the rest was statically initialized, and is read-only */
1248 }
1249
1250 /* until it's enabled, this UDC should be completely invisible
1251 * to any USB host.
1252 */
1253 static void udc_enable (struct pxa2xx_udc *dev)
1254 {
1255 udc_clear_mask_UDCCR(UDCCR_UDE);
1256
1257 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1258 #ifdef CONFIG_ARCH_PXA
1259 /* Enable clock for USB device */
1260 clk_enable(dev->clk);
1261 #endif
1262
1263 =======
1264 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1265 /* try to clear these bits before we enable the udc */
1266 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1267
1268 ep0_idle(dev);
1269 dev->gadget.speed = USB_SPEED_UNKNOWN;
1270 dev->stats.irqs = 0;
1271
1272 /*
1273 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1274 * - enable UDC
1275 * - if RESET is already in progress, ack interrupt
1276 * - unmask reset interrupt
1277 */
1278 udc_set_mask_UDCCR(UDCCR_UDE);
1279 if (!(UDCCR & UDCCR_UDA))
1280 udc_ack_int_UDCCR(UDCCR_RSTIR);
1281
1282 if (dev->has_cfr /* UDC_RES2 is defined */) {
1283 /* pxa255 (a0+) can avoid a set_config race that could
1284 * prevent gadget drivers from configuring correctly
1285 */
1286 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1287 } else {
1288 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1289 * which could result in missing packets and interrupts.
1290 * supposedly one bit per endpoint, controlling whether it
1291 * double buffers or not; ACM/AREN bits fit into the holes.
1292 * zero bits (like USIR0_IRx) disable double buffering.
1293 */
1294 UDC_RES1 = 0x00;
1295 UDC_RES2 = 0x00;
1296 }
1297
1298 /* enable suspend/resume and reset irqs */
1299 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1300
1301 /* enable ep0 irqs */
1302 UICR0 &= ~UICR0_IM0;
1303
1304 /* if hardware supports it, pullup D+ and wait for reset */
1305 pullup_on();
1306 }
1307
1308
1309 /* when a driver is successfully registered, it will receive
1310 * control requests including set_configuration(), which enables
1311 * non-control requests. then usb traffic follows until a
1312 * disconnect is reported. then a host may connect again, or
1313 * the driver might get unbound.
1314 */
1315 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1316 {
1317 struct pxa2xx_udc *dev = the_controller;
1318 int retval;
1319
1320 if (!driver
1321 || driver->speed < USB_SPEED_FULL
1322 || !driver->bind
1323 || !driver->disconnect
1324 || !driver->setup)
1325 return -EINVAL;
1326 if (!dev)
1327 return -ENODEV;
1328 if (dev->driver)
1329 return -EBUSY;
1330
1331 /* first hook up the driver ... */
1332 dev->driver = driver;
1333 dev->gadget.dev.driver = &driver->driver;
1334 dev->pullup = 1;
1335
1336 retval = device_add (&dev->gadget.dev);
1337 if (retval) {
1338 fail:
1339 dev->driver = NULL;
1340 dev->gadget.dev.driver = NULL;
1341 return retval;
1342 }
1343 retval = driver->bind(&dev->gadget);
1344 if (retval) {
1345 DMSG("bind to driver %s --> error %d\n",
1346 driver->driver.name, retval);
1347 device_del (&dev->gadget.dev);
1348 goto fail;
1349 }
1350
1351 /* ... then enable host detection and ep0; and we're ready
1352 * for set_configuration as well as eventual disconnect.
1353 */
1354 DMSG("registered gadget driver '%s'\n", driver->driver.name);
1355 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1356 pullup(dev, 1);
1357 =======
1358 pullup(dev);
1359 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1360 dump_state(dev);
1361 return 0;
1362 }
1363 EXPORT_SYMBOL(usb_gadget_register_driver);
1364
1365 static void
1366 stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1367 {
1368 int i;
1369
1370 /* don't disconnect drivers more than once */
1371 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1372 driver = NULL;
1373 dev->gadget.speed = USB_SPEED_UNKNOWN;
1374
1375 /* prevent new request submissions, kill any outstanding requests */
1376 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1377 struct pxa2xx_ep *ep = &dev->ep[i];
1378
1379 ep->stopped = 1;
1380 nuke(ep, -ESHUTDOWN);
1381 }
1382 del_timer_sync(&dev->timer);
1383
1384 /* report disconnect; the driver is already quiesced */
1385 if (driver)
1386 driver->disconnect(&dev->gadget);
1387
1388 /* re-init driver-visible data structures */
1389 udc_reinit(dev);
1390 }
1391
1392 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1393 {
1394 struct pxa2xx_udc *dev = the_controller;
1395
1396 if (!dev)
1397 return -ENODEV;
1398 if (!driver || driver != dev->driver || !driver->unbind)
1399 return -EINVAL;
1400
1401 local_irq_disable();
1402 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
1403 pullup(dev, 0);
1404 =======
1405 dev->pullup = 0;
1406 pullup(dev);
1407 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
1408 stop_activity(dev, driver);
1409 local_irq_enable();
1410
1411 driver->unbind(&dev->gadget);
1412 dev->gadget.dev.driver = NULL;
1413 dev->driver = NULL;
1414
1415 device_del (&dev->gadget.dev);
1416
1417 DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1418 dump_state(dev);
1419 return 0;
1420 }
1421 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1422
1423
1424 /*-------------------------------------------------------------------------*/
1425
1426 #ifdef CONFIG_ARCH_LUBBOCK
1427
1428 /* Lubbock has separate connect and disconnect irqs. More typical designs
1429 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1430 */
1431
1432 static irqreturn_t
1433 lubbock_vbus_irq(int irq, void *_dev)
1434 {
1435 struct pxa2xx_udc *dev = _dev;
1436 int vbus;
1437
1438 dev->stats.irqs++;
1439 switch (irq) {
1440 case LUBBOCK_USB_IRQ:
1441 vbus = 1;
1442 disable_irq(LUBBOCK_USB_IRQ);
1443 enable_irq(LUBBOCK_USB_DISC_IRQ);
1444 break;
1445 case LUBBOCK_USB_DISC_IRQ:
1446 vbus = 0;
1447 disable_irq(LUBBOCK_USB_DISC_IRQ);
1448 enable_irq(LUBBOCK_USB_IRQ);
1449 break;
1450 default:
1451 return IRQ_NONE;
1452 }
1453
1454 pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1455 return IRQ_HANDLED;
1456 }
1457
1458 #endif
1459
1460 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1461 {
1462 struct pxa2xx_udc *dev = _dev;
1463 int vbus = gpio_get_value(dev->mach->gpio_vbus);
1464
1465 if (dev->mach->gpio_vbus_inverted)
1466 vbus = !vbus;
1467
1468 pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1469 return IRQ_HANDLED;
1470 }
1471
1472
1473 /*-------------------------------------------------------------------------*/
1474
1475 static inline void clear_ep_state (struct pxa2xx_udc *dev)
1476 {
1477 unsigned i;
1478
1479 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1480 * fifos, and pending transactions mustn't be continued in any case.
1481 */
1482 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1483 nuke(&dev->ep[i], -ECONNABORTED);
1484 }
1485
1486 static void udc_watchdog(unsigned long _dev)
1487 {
1488 struct pxa2xx_udc *dev = (void *)_dev;
1489
1490 local_irq_disable();
1491 if (dev->ep0state == EP0_STALL
1492 && (UDCCS0 & UDCCS0_FST) == 0
1493 && (UDCCS0 & UDCCS0_SST) == 0) {
1494 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1495 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1496 start_watchdog(dev);
1497 }
1498 local_irq_enable();
1499 }
1500
1501 static void handle_ep0 (struct pxa2xx_udc *dev)
1502 {
1503 u32 udccs0 = UDCCS0;
1504 struct pxa2xx_ep *ep = &dev->ep [0];
1505 struct pxa2xx_request *req;
1506 union {
1507 struct usb_ctrlrequest r;
1508 u8 raw [8];
1509 u32 word [2];
1510 } u;
1511
1512 if (list_empty(&ep->queue))
1513 req = NULL;
1514 else
1515 req = list_entry(ep->queue.next, struct pxa2xx_request, queue);
1516
1517 /* clear stall status */
1518 if (udccs0 & UDCCS0_SST) {
1519 nuke(ep, -EPIPE);
1520 UDCCS0 = UDCCS0_SST;
1521 del_timer(&dev->timer);
1522 ep0_idle(dev);
1523 }
1524
1525 /* previous request unfinished? non-error iff back-to-back ... */
1526 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1527 nuke(ep, 0);
1528 del_timer(&dev->timer);
1529 ep0_idle(dev);
1530 }
1531
1532 switch (dev->ep0state) {
1533 case EP0_IDLE:
1534 /* late-breaking status? */
1535 udccs0 = UDCCS0;
1536
1537 /* start control request? */
1538 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1539 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1540 int i;
1541
1542 nuke (ep, -EPROTO);
1543
1544 /* read SETUP packet */
1545 for (i = 0; i < 8; i++) {
1546 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1547 bad_setup:
1548 DMSG("SETUP %d!\n", i);
1549 goto stall;
1550 }
1551 u.raw [i] = (u8) UDDR0;
1552 }
1553 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1554 goto bad_setup;
1555
1556 got_setup:
1557 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1558 u.r.bRequestType, u.r.bRequest,
1559 le16_to_cpu(u.r.wValue),
1560 le16_to_cpu(u.r.wIndex),
1561 le16_to_cpu(u.r.wLength));
1562
1563 /* cope with automagic for some standard requests. */
1564 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1565 == USB_TYPE_STANDARD;
1566 dev->req_config = 0;
1567 dev->req_pending = 1;
1568 switch (u.r.bRequest) {
1569 /* hardware restricts gadget drivers here! */
1570 case USB_REQ_SET_CONFIGURATION:
1571 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1572 /* reflect hardware's automagic
1573 * up to the gadget driver.
1574 */
1575 config_change:
1576 dev->req_config = 1;
1577 clear_ep_state(dev);
1578 /* if !has_cfr, there's no synch
1579 * else use AREN (later) not SA|OPR
1580 * USIR0_IR0 acts edge sensitive
1581 */
1582 }
1583 break;
1584 /* ... and here, even more ... */
1585 case USB_REQ_SET_INTERFACE:
1586 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1587 /* udc hardware is broken by design:
1588 * - altsetting may only be zero;
1589 * - hw resets all interfaces' eps;
1590 * - ep reset doesn't include halt(?).
1591 */
1592 DMSG("broken set_interface (%d/%d)\n",
1593 le16_to_cpu(u.r.wIndex),
1594 le16_to_cpu(u.r.wValue));
1595 goto config_change;
1596 }
1597 break;
1598 /* hardware was supposed to hide this */
1599 case USB_REQ_SET_ADDRESS:
1600 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1601 ep0start(dev, 0, "address");
1602 return;
1603 }
1604 break;
1605 }
1606
1607 if (u.r.bRequestType & USB_DIR_IN)
1608 dev->ep0state = EP0_IN_DATA_PHASE;
1609 else
1610 dev->ep0state = EP0_OUT_DATA_PHASE;
1611
1612 i = dev->driver->setup(&dev->gadget, &u.r);
1613 if (i < 0) {
1614 /* hardware automagic preventing STALL... */
1615 if (dev->req_config) {
1616 /* hardware sometimes neglects to tell
1617 * tell us about config change events,
1618 * so later ones may fail...
1619 */
1620 WARN("config change %02x fail %d?\n",
1621 u.r.bRequest, i);
1622 return;
1623 /* TODO experiment: if has_cfr,
1624 * hardware didn't ACK; maybe we
1625 * could actually STALL!
1626 */
1627 }
1628 DBG(DBG_VERBOSE, "protocol STALL, "
1629 "%02x err %d\n", UDCCS0, i);
1630 stall:
1631 /* the watchdog timer helps deal with cases
1632 * where udc seems to clear FST wrongly, and
1633 * then NAKs instead of STALLing.
1634 */
1635 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1636 start_watchdog(dev);
1637 dev->ep0state = EP0_STALL;
1638
1639 /* deferred i/o == no response yet */
1640 } else if (dev->req_pending) {
1641 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1642 || dev->req_std || u.r.wLength))
1643 ep0start(dev, 0, "defer");
1644 else
1645 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1646 }
1647
1648 /* expect at least one data or status stage irq */
1649 return;
1650
1651 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1652 == (UDCCS0_OPR|UDCCS0_SA))) {
1653 unsigned i;
1654
1655 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1656 * still observed on a pxa255 a0.
1657 */
1658 DBG(DBG_VERBOSE, "e131\n");
1659 nuke(ep, -EPROTO);
1660
1661 /* read SETUP data, but don't trust it too much */
1662 for (i = 0; i < 8; i++)
1663 u.raw [i] = (u8) UDDR0;
1664 if ((u.r.bRequestType & USB_RECIP_MASK)
1665 > USB_RECIP_OTHER)
1666 goto stall;
1667 if (u.word [0] == 0 && u.word [1] == 0)
1668 goto stall;
1669 goto got_setup;
1670 } else {
1671 /* some random early IRQ:
1672 * - we acked FST
1673 * - IPR cleared
1674 * - OPR got set, without SA (likely status stage)
1675 */
1676 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1677 }
1678 break;
1679 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1680 if (udccs0 & UDCCS0_OPR) {
1681 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1682 DBG(DBG_VERBOSE, "ep0in premature status\n");
1683 if (req)
1684 done(ep, req, 0);
1685 ep0_idle(dev);
1686 } else /* irq was IPR clearing */ {
1687 if (req) {
1688 /* this IN packet might finish the request */
1689 (void) write_ep0_fifo(ep, req);
1690 } /* else IN token before response was written */
1691 }
1692 break;
1693 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1694 if (udccs0 & UDCCS0_OPR) {
1695 if (req) {
1696 /* this OUT packet might finish the request */
1697 if (read_ep0_fifo(ep, req))
1698 done(ep, req, 0);
1699 /* else more OUT packets expected */
1700 } /* else OUT token before read was issued */
1701 } else /* irq was IPR clearing */ {
1702 DBG(DBG_VERBOSE, "ep0out premature status\n");
1703 if (req)
1704 done(ep, req, 0);
1705 ep0_idle(dev);
1706 }
1707 break;
1708 case EP0_END_XFER:
1709 if (req)
1710 done(ep, req, 0);
1711 /* ack control-IN status (maybe in-zlp was skipped)
1712 * also appears after some config change events.
1713 */
1714 if (udccs0 & UDCCS0_OPR)
1715 UDCCS0 = UDCCS0_OPR;
1716 ep0_idle(dev);
1717 break;
1718 case EP0_STALL:
1719 UDCCS0 = UDCCS0_FST;
1720 break;
1721 }
1722 USIR0 = USIR0_IR0;
1723 }
1724
1725 static void handle_ep(struct pxa2xx_ep *ep)
1726 {
1727 struct pxa2xx_request *req;
1728 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1729 int completed;
1730 u32 udccs, tmp;
1731
1732 do {
1733 completed = 0;
1734 if (likely (!list_empty(&ep->queue)))
1735 req = list_entry(ep->queue.next,
1736 struct pxa2xx_request, queue);
1737 else
1738 req = NULL;
1739
1740 // TODO check FST handling
1741
1742 udccs = *ep->reg_udccs;
1743 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1744 tmp = UDCCS_BI_TUR;
1745 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1746 tmp |= UDCCS_BI_SST;
1747 tmp &= udccs;
1748 if (likely (tmp))
1749 *ep->reg_udccs = tmp;
1750 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1751 completed = write_fifo(ep, req);
1752
1753 } else { /* irq from RPC (or for ISO, ROF) */
1754 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1755 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1756 else
1757 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1758 tmp &= udccs;
1759 if (likely(tmp))
1760 *ep->reg_udccs = tmp;
1761
1762 /* fifos can hold packets, ready for reading... */
1763 if (likely(req)) {
1764 completed = read_fifo(ep, req);
1765 } else
1766 pio_irq_disable (ep->bEndpointAddress);
1767 }
1768 ep->pio_irqs++;
1769 } while (completed);
1770 }
1771
1772 /*
1773 * pxa2xx_udc_irq - interrupt handler
1774 *
1775 * avoid delays in ep0 processing. the control handshaking isn't always
1776 * under software control (pxa250c0 and the pxa255 are better), and delays
1777 * could cause usb protocol errors.
1778 */
1779 static irqreturn_t
1780 pxa2xx_udc_irq(int irq, void *_dev)
1781 {
1782 struct pxa2xx_udc *dev = _dev;
1783 int handled;
1784
1785 dev->stats.irqs++;
1786 do {
1787 u32 udccr = UDCCR;
1788
1789 handled = 0;
1790
1791 /* SUSpend Interrupt Request */
1792 if (unlikely(udccr & UDCCR_SUSIR)) {
1793 udc_ack_int_UDCCR(UDCCR_SUSIR);
1794 handled = 1;
1795 DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1796 ? "" : "+disconnect");
1797
1798 if (!is_vbus_present())
1799 stop_activity(dev, dev->driver);
1800 else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1801 && dev->driver
1802 && dev->driver->suspend)
1803 dev->driver->suspend(&dev->gadget);
1804 ep0_idle (dev);
1805 }
1806
1807 /* RESume Interrupt Request */
1808 if (unlikely(udccr & UDCCR_RESIR)) {
1809 udc_ack_int_UDCCR(UDCCR_RESIR);
1810 handled = 1;
1811 DBG(DBG_VERBOSE, "USB resume\n");
1812
1813 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1814 && dev->driver
1815 && dev->driver->resume
1816 && is_vbus_present())
1817 dev->driver->resume(&dev->gadget);
1818 }
1819
1820 /* ReSeT Interrupt Request - USB reset */
1821 if (unlikely(udccr & UDCCR_RSTIR)) {
1822 udc_ack_int_UDCCR(UDCCR_RSTIR);
1823 handled = 1;
1824
1825 if ((UDCCR & UDCCR_UDA) == 0) {
1826 DBG(DBG_VERBOSE, "USB reset start\n");
1827
1828 /* reset driver and endpoints,
1829 * in case that's not yet done
1830 */
1831 stop_activity (dev, dev->driver);
1832
1833 } else {
1834 DBG(DBG_VERBOSE, "USB reset end\n");
1835 dev->gadget.speed = USB_SPEED_FULL;
1836 memset(&dev->stats, 0, sizeof dev->stats);
1837 /* driver and endpoints are still reset */
1838 }
1839
1840 } else {
1841 u32 usir0 = USIR0 & ~UICR0;
1842 u32 usir1 = USIR1 & ~UICR1;
1843 int i;
1844
1845 if (unlikely (!usir0 && !usir1))
1846 continue;
1847
1848 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1849
1850 /* control traffic */
1851 if (usir0 & USIR0_IR0) {
1852 dev->ep[0].pio_irqs++;
1853 handle_ep0(dev);
1854 handled = 1;
1855 }
1856
1857 /* endpoint data transfers */
1858 for (i = 0; i < 8; i++) {
1859 u32 tmp = 1 << i;
1860
1861 if (i && (usir0 & tmp)) {
1862 handle_ep(&dev->ep[i]);
1863 USIR0 |= tmp;
1864 handled = 1;
1865 }
1866 if (usir1 & tmp) {
1867 handle_ep(&dev->ep[i+8]);
1868 USIR1 |= tmp;
1869 handled = 1;
1870 }
1871 }
1872 }
1873
1874 /* we could also ask for 1 msec SOF (SIR) interrupts */
1875
1876 } while (handled);
1877 return IRQ_HANDLED;
1878 }
1879
1880 /*-------------------------------------------------------------------------*/
1881
1882 static void nop_release (struct device *dev)
1883 {
1884 DMSG("%s %s\n", __FUNCTION__, dev->bus_id);
1885 }
1886
1887 /* this uses load-time allocation and initialization (instead of
1888 * doing it at run-time) to save code, eliminate fault paths, and
1889 * be more obviously correct.
1890 */
1891 static struct pxa2xx_udc memory = {
1892 .gadget = {
1893 .ops = &pxa2xx_udc_ops,
1894 .ep0 = &memory.ep[0].ep,
1895 .name = driver_name,
1896 .dev = {
1897 .bus_id = "gadget",
1898 .release = nop_release,
1899 },
1900 },
1901
1902 /* control endpoint */
1903 .ep[0] = {
1904 .ep = {
1905 .name = ep0name,
1906 .ops = &pxa2xx_ep_ops,
1907 .maxpacket = EP0_FIFO_SIZE,
1908 },
1909 .dev = &memory,
1910 .reg_udccs = &UDCCS0,
1911 .reg_uddr = &UDDR0,
1912 },
1913
1914 /* first group of endpoints */
1915 .ep[1] = {
1916 .ep = {
1917 .name = "ep1in-bulk",
1918 .ops = &pxa2xx_ep_ops,
1919 .maxpacket = BULK_FIFO_SIZE,
1920 },
1921 .dev = &memory,
1922 .fifo_size = BULK_FIFO_SIZE,
1923 .bEndpointAddress = USB_DIR_IN | 1,
1924 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1925 .reg_udccs = &UDCCS1,
1926 .reg_uddr = &UDDR1,
1927 },
1928 .ep[2] = {
1929 .ep = {
1930 .name = "ep2out-bulk",
1931 .ops = &pxa2xx_ep_ops,
1932 .maxpacket = BULK_FIFO_SIZE,
1933 },
1934 .dev = &memory,
1935 .fifo_size = BULK_FIFO_SIZE,
1936 .bEndpointAddress = 2,
1937 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1938 .reg_udccs = &UDCCS2,
1939 .reg_ubcr = &UBCR2,
1940 .reg_uddr = &UDDR2,
1941 },
1942 #ifndef CONFIG_USB_PXA2XX_SMALL
1943 .ep[3] = {
1944 .ep = {
1945 .name = "ep3in-iso",
1946 .ops = &pxa2xx_ep_ops,
1947 .maxpacket = ISO_FIFO_SIZE,
1948 },
1949 .dev = &memory,
1950 .fifo_size = ISO_FIFO_SIZE,
1951 .bEndpointAddress = USB_DIR_IN | 3,
1952 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1953 .reg_udccs = &UDCCS3,
1954 .reg_uddr = &UDDR3,
1955 },
1956 .ep[4] = {
1957 .ep = {
1958 .name = "ep4out-iso",
1959 .ops = &pxa2xx_ep_ops,
1960 .maxpacket = ISO_FIFO_SIZE,
1961 },
1962 .dev = &memory,
1963 .fifo_size = ISO_FIFO_SIZE,
1964 .bEndpointAddress = 4,
1965 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1966 .reg_udccs = &UDCCS4,
1967 .reg_ubcr = &UBCR4,
1968 .reg_uddr = &UDDR4,
1969 },
1970 .ep[5] = {
1971 .ep = {
1972 .name = "ep5in-int",
1973 .ops = &pxa2xx_ep_ops,
1974 .maxpacket = INT_FIFO_SIZE,
1975 },
1976 .dev = &memory,
1977 .fifo_size = INT_FIFO_SIZE,
1978 .bEndpointAddress = USB_DIR_IN | 5,
1979 .bmAttributes = USB_ENDPOINT_XFER_INT,
1980 .reg_udccs = &UDCCS5,
1981 .reg_uddr = &UDDR5,
1982 },
1983
1984 /* second group of endpoints */
1985 .ep[6] = {
1986 .ep = {
1987 .name = "ep6in-bulk",
1988 .ops = &pxa2xx_ep_ops,
1989 .maxpacket = BULK_FIFO_SIZE,
1990 },
1991 .dev = &memory,
1992 .fifo_size = BULK_FIFO_SIZE,
1993 .bEndpointAddress = USB_DIR_IN | 6,
1994 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1995 .reg_udccs = &UDCCS6,
1996 .reg_uddr = &UDDR6,
1997 },
1998 .ep[7] = {
1999 .ep = {
2000 .name = "ep7out-bulk",
2001 .ops = &pxa2xx_ep_ops,
2002 .maxpacket = BULK_FIFO_SIZE,
2003 },
2004 .dev = &memory,
2005 .fifo_size = BULK_FIFO_SIZE,
2006 .bEndpointAddress = 7,
2007 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2008 .reg_udccs = &UDCCS7,
2009 .reg_ubcr = &UBCR7,
2010 .reg_uddr = &UDDR7,
2011 },
2012 .ep[8] = {
2013 .ep = {
2014 .name = "ep8in-iso",
2015 .ops = &pxa2xx_ep_ops,
2016 .maxpacket = ISO_FIFO_SIZE,
2017 },
2018 .dev = &memory,
2019 .fifo_size = ISO_FIFO_SIZE,
2020 .bEndpointAddress = USB_DIR_IN | 8,
2021 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2022 .reg_udccs = &UDCCS8,
2023 .reg_uddr = &UDDR8,
2024 },
2025 .ep[9] = {
2026 .ep = {
2027 .name = "ep9out-iso",
2028 .ops = &pxa2xx_ep_ops,
2029 .maxpacket = ISO_FIFO_SIZE,
2030 },
2031 .dev = &memory,
2032 .fifo_size = ISO_FIFO_SIZE,
2033 .bEndpointAddress = 9,
2034 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2035 .reg_udccs = &UDCCS9,
2036 .reg_ubcr = &UBCR9,
2037 .reg_uddr = &UDDR9,
2038 },
2039 .ep[10] = {
2040 .ep = {
2041 .name = "ep10in-int",
2042 .ops = &pxa2xx_ep_ops,
2043 .maxpacket = INT_FIFO_SIZE,
2044 },
2045 .dev = &memory,
2046 .fifo_size = INT_FIFO_SIZE,
2047 .bEndpointAddress = USB_DIR_IN | 10,
2048 .bmAttributes = USB_ENDPOINT_XFER_INT,
2049 .reg_udccs = &UDCCS10,
2050 .reg_uddr = &UDDR10,
2051 },
2052
2053 /* third group of endpoints */
2054 .ep[11] = {
2055 .ep = {
2056 .name = "ep11in-bulk",
2057 .ops = &pxa2xx_ep_ops,
2058 .maxpacket = BULK_FIFO_SIZE,
2059 },
2060 .dev = &memory,
2061 .fifo_size = BULK_FIFO_SIZE,
2062 .bEndpointAddress = USB_DIR_IN | 11,
2063 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2064 .reg_udccs = &UDCCS11,
2065 .reg_uddr = &UDDR11,
2066 },
2067 .ep[12] = {
2068 .ep = {
2069 .name = "ep12out-bulk",
2070 .ops = &pxa2xx_ep_ops,
2071 .maxpacket = BULK_FIFO_SIZE,
2072 },
2073 .dev = &memory,
2074 .fifo_size = BULK_FIFO_SIZE,
2075 .bEndpointAddress = 12,
2076 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2077 .reg_udccs = &UDCCS12,
2078 .reg_ubcr = &UBCR12,
2079 .reg_uddr = &UDDR12,
2080 },
2081 .ep[13] = {
2082 .ep = {
2083 .name = "ep13in-iso",
2084 .ops = &pxa2xx_ep_ops,
2085 .maxpacket = ISO_FIFO_SIZE,
2086 },
2087 .dev = &memory,
2088 .fifo_size = ISO_FIFO_SIZE,
2089 .bEndpointAddress = USB_DIR_IN | 13,
2090 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2091 .reg_udccs = &UDCCS13,
2092 .reg_uddr = &UDDR13,
2093 },
2094 .ep[14] = {
2095 .ep = {
2096 .name = "ep14out-iso",
2097 .ops = &pxa2xx_ep_ops,
2098 .maxpacket = ISO_FIFO_SIZE,
2099 },
2100 .dev = &memory,
2101 .fifo_size = ISO_FIFO_SIZE,
2102 .bEndpointAddress = 14,
2103 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2104 .reg_udccs = &UDCCS14,
2105 .reg_ubcr = &UBCR14,
2106 .reg_uddr = &UDDR14,
2107 },
2108 .ep[15] = {
2109 .ep = {
2110 .name = "ep15in-int",
2111 .ops = &pxa2xx_ep_ops,
2112 .maxpacket = INT_FIFO_SIZE,
2113 },
2114 .dev = &memory,
2115 .fifo_size = INT_FIFO_SIZE,
2116 .bEndpointAddress = USB_DIR_IN | 15,
2117 .bmAttributes = USB_ENDPOINT_XFER_INT,
2118 .reg_udccs = &UDCCS15,
2119 .reg_uddr = &UDDR15,
2120 },
2121 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2122 };
2123
2124 #define CP15R0_VENDOR_MASK 0xffffe000
2125
2126 #if defined(CONFIG_ARCH_PXA)
2127 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2128
2129 #elif defined(CONFIG_ARCH_IXP4XX)
2130 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2131
2132 #endif
2133
2134 #define CP15R0_PROD_MASK 0x000003f0
2135 #define PXA25x 0x00000100 /* and PXA26x */
2136 #define PXA210 0x00000120
2137
2138 #define CP15R0_REV_MASK 0x0000000f
2139
2140 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2141
2142 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2143 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2144 #define PXA250_B2 0x00000104
2145 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2146 #define PXA250_B0 0x00000102
2147 #define PXA250_A1 0x00000101
2148 #define PXA250_A0 0x00000100
2149
2150 #define PXA210_C0 0x00000125
2151 #define PXA210_B2 0x00000124
2152 #define PXA210_B1 0x00000123
2153 #define PXA210_B0 0x00000122
2154 #define IXP425_A0 0x000001c1
2155 #define IXP425_B0 0x000001f1
2156 #define IXP465_AD 0x00000200
2157
2158 /*
2159 * probe - binds to the platform device
2160 */
2161 static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2162 {
2163 struct pxa2xx_udc *dev = &memory;
2164 int retval, vbus_irq, irq;
2165 u32 chiprev;
2166
2167 /* insist on Intel/ARM/XScale */
2168 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2169 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2170 pr_err("%s: not XScale!\n", driver_name);
2171 return -ENODEV;
2172 }
2173
2174 /* trigger chiprev-specific logic */
2175 switch (chiprev & CP15R0_PRODREV_MASK) {
2176 #if defined(CONFIG_ARCH_PXA)
2177 case PXA255_A0:
2178 dev->has_cfr = 1;
2179 break;
2180 case PXA250_A0:
2181 case PXA250_A1:
2182 /* A0/A1 "not released"; ep 13, 15 unusable */
2183 /* fall through */
2184 case PXA250_B2: case PXA210_B2:
2185 case PXA250_B1: case PXA210_B1:
2186 case PXA250_B0: case PXA210_B0:
2187 /* OUT-DMA is broken ... */
2188 /* fall through */
2189 case PXA250_C0: case PXA210_C0:
2190 break;
2191 #elif defined(CONFIG_ARCH_IXP4XX)
2192 case IXP425_A0:
2193 case IXP425_B0:
2194 case IXP465_AD:
2195 dev->has_cfr = 1;
2196 break;
2197 #endif
2198 default:
2199 pr_err("%s: unrecognized processor: %08x\n",
2200 driver_name, chiprev);
2201 /* iop3xx, ixp4xx, ... */
2202 return -ENODEV;
2203 }
2204
2205 irq = platform_get_irq(pdev, 0);
2206 if (irq < 0)
2207 return -ENODEV;
2208
2209 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2210 #ifdef CONFIG_ARCH_PXA
2211 =======
2212 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2213 dev->clk = clk_get(&pdev->dev, "UDCCLK");
2214 if (IS_ERR(dev->clk)) {
2215 retval = PTR_ERR(dev->clk);
2216 goto err_clk;
2217 }
2218 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2219 #endif
2220 =======
2221 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2222
2223 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2224 dev->has_cfr ? "" : " (!cfr)",
2225 SIZE_STR "(pio)"
2226 );
2227
2228 /* other non-static parts of init */
2229 dev->dev = &pdev->dev;
2230 dev->mach = pdev->dev.platform_data;
2231
2232 if (dev->mach->gpio_vbus) {
2233 if ((retval = gpio_request(dev->mach->gpio_vbus,
2234 "pxa2xx_udc GPIO VBUS"))) {
2235 dev_dbg(&pdev->dev,
2236 "can't get vbus gpio %d, err: %d\n",
2237 dev->mach->gpio_vbus, retval);
2238 goto err_gpio_vbus;
2239 }
2240 gpio_direction_input(dev->mach->gpio_vbus);
2241 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2242 } else
2243 vbus_irq = 0;
2244
2245 if (dev->mach->gpio_pullup) {
2246 if ((retval = gpio_request(dev->mach->gpio_pullup,
2247 "pca2xx_udc GPIO PULLUP"))) {
2248 dev_dbg(&pdev->dev,
2249 "can't get pullup gpio %d, err: %d\n",
2250 dev->mach->gpio_pullup, retval);
2251 goto err_gpio_pullup;
2252 }
2253 gpio_direction_output(dev->mach->gpio_pullup, 0);
2254 }
2255
2256 init_timer(&dev->timer);
2257 dev->timer.function = udc_watchdog;
2258 dev->timer.data = (unsigned long) dev;
2259
2260 device_initialize(&dev->gadget.dev);
2261 dev->gadget.dev.parent = &pdev->dev;
2262 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2263
2264 the_controller = dev;
2265 platform_set_drvdata(pdev, dev);
2266
2267 udc_disable(dev);
2268 udc_reinit(dev);
2269
2270 dev->vbus = is_vbus_present();
2271
2272 /* irq setup after old hardware state is cleaned up */
2273 retval = request_irq(irq, pxa2xx_udc_irq,
2274 IRQF_DISABLED, driver_name, dev);
2275 if (retval != 0) {
2276 pr_err("%s: can't get irq %d, err %d\n",
2277 driver_name, irq, retval);
2278 goto err_irq1;
2279 }
2280 dev->got_irq = 1;
2281
2282 #ifdef CONFIG_ARCH_LUBBOCK
2283 if (machine_is_lubbock()) {
2284 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2285 lubbock_vbus_irq,
2286 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2287 driver_name, dev);
2288 if (retval != 0) {
2289 pr_err("%s: can't get irq %i, err %d\n",
2290 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2291 lubbock_fail0:
2292 goto err_irq_lub;
2293 }
2294 retval = request_irq(LUBBOCK_USB_IRQ,
2295 lubbock_vbus_irq,
2296 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2297 driver_name, dev);
2298 if (retval != 0) {
2299 pr_err("%s: can't get irq %i, err %d\n",
2300 driver_name, LUBBOCK_USB_IRQ, retval);
2301 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2302 goto lubbock_fail0;
2303 }
2304 } else
2305 #endif
2306 if (vbus_irq) {
2307 retval = request_irq(vbus_irq, udc_vbus_irq,
2308 IRQF_DISABLED | IRQF_SAMPLE_RANDOM |
2309 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
2310 driver_name, dev);
2311 if (retval != 0) {
2312 pr_err("%s: can't get irq %i, err %d\n",
2313 driver_name, vbus_irq, retval);
2314 goto err_vbus_irq;
2315 }
2316 }
2317 create_debug_files(dev);
2318
2319 return 0;
2320
2321 err_vbus_irq:
2322 #ifdef CONFIG_ARCH_LUBBOCK
2323 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2324 err_irq_lub:
2325 #endif
2326 free_irq(irq, dev);
2327 err_irq1:
2328 if (dev->mach->gpio_pullup)
2329 gpio_free(dev->mach->gpio_pullup);
2330 err_gpio_pullup:
2331 if (dev->mach->gpio_vbus)
2332 gpio_free(dev->mach->gpio_vbus);
2333 err_gpio_vbus:
2334 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2335 #ifdef CONFIG_ARCH_PXA
2336 =======
2337 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2338 clk_put(dev->clk);
2339 err_clk:
2340 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2341 #endif
2342 =======
2343 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2344 return retval;
2345 }
2346
2347 static void pxa2xx_udc_shutdown(struct platform_device *_dev)
2348 {
2349 pullup_off();
2350 }
2351
2352 static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
2353 {
2354 struct pxa2xx_udc *dev = platform_get_drvdata(pdev);
2355
2356 if (dev->driver)
2357 return -EBUSY;
2358
2359 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2360 udc_disable(dev);
2361 =======
2362 dev->pullup = 0;
2363 pullup(dev);
2364
2365 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2366 remove_debug_files(dev);
2367
2368 if (dev->got_irq) {
2369 free_irq(platform_get_irq(pdev, 0), dev);
2370 dev->got_irq = 0;
2371 }
2372 #ifdef CONFIG_ARCH_LUBBOCK
2373 if (machine_is_lubbock()) {
2374 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2375 free_irq(LUBBOCK_USB_IRQ, dev);
2376 }
2377 #endif
2378 if (dev->mach->gpio_vbus) {
2379 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2380 gpio_free(dev->mach->gpio_vbus);
2381 }
2382 if (dev->mach->gpio_pullup)
2383 gpio_free(dev->mach->gpio_pullup);
2384
2385 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2386 #ifdef CONFIG_ARCH_PXA
2387 =======
2388 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2389 clk_put(dev->clk);
2390 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2391 #endif
2392 =======
2393 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2394
2395 platform_set_drvdata(pdev, NULL);
2396 the_controller = NULL;
2397 return 0;
2398 }
2399
2400 /*-------------------------------------------------------------------------*/
2401
2402 #ifdef CONFIG_PM
2403
2404 /* USB suspend (controlled by the host) and system suspend (controlled
2405 * by the PXA) don't necessarily work well together. If USB is active,
2406 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2407 * mode, or any deeper PM saving state.
2408 *
2409 * For now, we punt and forcibly disconnect from the USB host when PXA
2410 * enters any suspend state. While we're disconnected, we always disable
2411 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2412 * Boards without software pullup control shouldn't use those states.
2413 * VBUS IRQs should probably be ignored so that the PXA device just acts
2414 * "dead" to USB hosts until system resume.
2415 */
2416 static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
2417 {
2418 struct pxa2xx_udc *udc = platform_get_drvdata(dev);
2419 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2420 =======
2421 unsigned long flags;
2422 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2423
2424 if (!udc->mach->gpio_pullup && !udc->mach->udc_command)
2425 WARN("USB host won't detect disconnect!\n");
2426 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2427 pullup(udc, 0);
2428 =======
2429 udc->suspended = 1;
2430
2431 local_irq_save(flags);
2432 pullup(udc);
2433 local_irq_restore(flags);
2434 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2435
2436 return 0;
2437 }
2438
2439 static int pxa2xx_udc_resume(struct platform_device *dev)
2440 {
2441 struct pxa2xx_udc *udc = platform_get_drvdata(dev);
2442 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2443 =======
2444 unsigned long flags;
2445 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2446
2447 <<<<<<< HEAD:drivers/usb/gadget/pxa2xx_udc.c
2448 pullup(udc, 1);
2449 =======
2450 udc->suspended = 0;
2451 local_irq_save(flags);
2452 pullup(udc);
2453 local_irq_restore(flags);
2454 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/gadget/pxa2xx_udc.c
2455
2456 return 0;
2457 }
2458
2459 #else
2460 #define pxa2xx_udc_suspend NULL
2461 #define pxa2xx_udc_resume NULL
2462 #endif
2463
2464 /*-------------------------------------------------------------------------*/
2465
2466 static struct platform_driver udc_driver = {
2467 .shutdown = pxa2xx_udc_shutdown,
2468 .remove = __exit_p(pxa2xx_udc_remove),
2469 .suspend = pxa2xx_udc_suspend,
2470 .resume = pxa2xx_udc_resume,
2471 .driver = {
2472 .owner = THIS_MODULE,
2473 .name = "pxa2xx-udc",
2474 },
2475 };
2476
2477 static int __init udc_init(void)
2478 {
2479 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2480 return platform_driver_probe(&udc_driver, pxa2xx_udc_probe);
2481 }
2482 module_init(udc_init);
2483
2484 static void __exit udc_exit(void)
2485 {
2486 platform_driver_unregister(&udc_driver);
2487 }
2488 module_exit(udc_exit);
2489
2490 MODULE_DESCRIPTION(DRIVER_DESC);
2491 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2492 MODULE_LICENSE("GPL");
2493
WRT350N Kernel Patches