Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
[wrt350n-kernel.git] / drivers / usb / host / ehci-q.c
blob5533e9881779e57f20aefc3d9dee0602ebc8e7f7
1 /*
2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
45 static int
46 qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
47 size_t len, int token, int maxpacket)
49 int i, count;
50 u64 addr = buf;
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
54 qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
57 count = len;
58 else {
59 buf += 0x1000;
60 buf &= ~0x0fff;
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
64 addr = buf;
65 qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
66 qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
67 (u32)(addr >> 32));
68 buf += 0x1000;
69 if ((count + 0x1000) < len)
70 count += 0x1000;
71 else
72 count = len;
75 /* short packets may only terminate transfers */
76 if (count != len)
77 count -= (count % maxpacket);
79 qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
80 qtd->length = count;
82 return count;
85 /*-------------------------------------------------------------------------*/
87 static inline void
88 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
90 /* writes to an active overlay are unsafe */
91 BUG_ON(qh->qh_state != QH_STATE_IDLE);
93 qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
94 qh->hw_alt_next = EHCI_LIST_END(ehci);
96 /* Except for control endpoints, we make hardware maintain data
97 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
98 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
99 * ever clear it.
101 if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
102 unsigned is_out, epnum;
104 is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
105 epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
106 if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
107 qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
108 usb_settoggle (qh->dev, epnum, is_out, 1);
112 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
113 wmb ();
114 qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
121 static void
122 qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
124 struct ehci_qtd *qtd;
126 if (list_empty (&qh->qtd_list))
127 qtd = qh->dummy;
128 else {
129 qtd = list_entry (qh->qtd_list.next,
130 struct ehci_qtd, qtd_list);
131 /* first qtd may already be partially processed */
132 if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
133 qtd = NULL;
136 if (qtd)
137 qh_update (ehci, qh, qtd);
140 /*-------------------------------------------------------------------------*/
142 static int qtd_copy_status (
143 struct ehci_hcd *ehci,
144 struct urb *urb,
145 size_t length,
146 u32 token
149 int status = -EINPROGRESS;
151 /* count IN/OUT bytes, not SETUP (even short packets) */
152 if (likely (QTD_PID (token) != 2))
153 urb->actual_length += length - QTD_LENGTH (token);
155 /* don't modify error codes */
156 if (unlikely(urb->unlinked))
157 return status;
159 /* force cleanup after short read; not always an error */
160 if (unlikely (IS_SHORT_READ (token)))
161 status = -EREMOTEIO;
163 /* serious "can't proceed" faults reported by the hardware */
164 if (token & QTD_STS_HALT) {
165 if (token & QTD_STS_BABBLE) {
166 /* FIXME "must" disable babbling device's port too */
167 status = -EOVERFLOW;
168 } else if (token & QTD_STS_MMF) {
169 /* fs/ls interrupt xfer missed the complete-split */
170 status = -EPROTO;
171 } else if (token & QTD_STS_DBE) {
172 status = (QTD_PID (token) == 1) /* IN ? */
173 ? -ENOSR /* hc couldn't read data */
174 : -ECOMM; /* hc couldn't write data */
175 } else if (token & QTD_STS_XACT) {
176 /* timeout, bad crc, wrong PID, etc; retried */
177 if (QTD_CERR (token))
178 status = -EPIPE;
179 else {
180 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
181 urb->dev->devpath,
182 usb_pipeendpoint (urb->pipe),
183 usb_pipein (urb->pipe) ? "in" : "out");
184 status = -EPROTO;
186 /* CERR nonzero + no errors + halt --> stall */
187 } else if (QTD_CERR (token))
188 status = -EPIPE;
189 else /* unknown */
190 status = -EPROTO;
192 ehci_vdbg (ehci,
193 "dev%d ep%d%s qtd token %08x --> status %d\n",
194 usb_pipedevice (urb->pipe),
195 usb_pipeendpoint (urb->pipe),
196 usb_pipein (urb->pipe) ? "in" : "out",
197 token, status);
199 /* if async CSPLIT failed, try cleaning out the TT buffer */
200 if (status != -EPIPE
201 && urb->dev->tt
202 && !usb_pipeint(urb->pipe)
203 && ((token & QTD_STS_MMF) != 0
204 || QTD_CERR(token) == 0)
205 && (!ehci_is_TDI(ehci)
206 || urb->dev->tt->hub !=
207 ehci_to_hcd(ehci)->self.root_hub)) {
208 #ifdef DEBUG
209 struct usb_device *tt = urb->dev->tt->hub;
210 dev_dbg (&tt->dev,
211 "clear tt buffer port %d, a%d ep%d t%08x\n",
212 urb->dev->ttport, urb->dev->devnum,
213 usb_pipeendpoint (urb->pipe), token);
214 #endif /* DEBUG */
215 /* REVISIT ARC-derived cores don't clear the root
216 * hub TT buffer in this way...
218 usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
222 return status;
225 static void
226 ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
227 __releases(ehci->lock)
228 __acquires(ehci->lock)
230 if (likely (urb->hcpriv != NULL)) {
231 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
233 /* S-mask in a QH means it's an interrupt urb */
234 if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
236 /* ... update hc-wide periodic stats (for usbfs) */
237 ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
239 qh_put (qh);
242 if (unlikely(urb->unlinked)) {
243 COUNT(ehci->stats.unlink);
244 } else {
245 if (likely(status == -EINPROGRESS))
246 status = 0;
247 COUNT(ehci->stats.complete);
250 #ifdef EHCI_URB_TRACE
251 ehci_dbg (ehci,
252 "%s %s urb %p ep%d%s status %d len %d/%d\n",
253 __FUNCTION__, urb->dev->devpath, urb,
254 usb_pipeendpoint (urb->pipe),
255 usb_pipein (urb->pipe) ? "in" : "out",
256 status,
257 urb->actual_length, urb->transfer_buffer_length);
258 #endif
260 /* complete() can reenter this HCD */
261 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
262 spin_unlock (&ehci->lock);
263 usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
264 spin_lock (&ehci->lock);
267 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
268 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
270 static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
271 static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
274 * Process and free completed qtds for a qh, returning URBs to drivers.
275 * Chases up to qh->hw_current. Returns number of completions called,
276 * indicating how much "real" work we did.
278 static unsigned
279 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
281 struct ehci_qtd *last = NULL, *end = qh->dummy;
282 struct list_head *entry, *tmp;
283 int last_status = -EINPROGRESS;
284 int stopped;
285 unsigned count = 0;
286 int do_status = 0;
287 u8 state;
288 u32 halt = HALT_BIT(ehci);
290 if (unlikely (list_empty (&qh->qtd_list)))
291 return count;
293 /* completions (or tasks on other cpus) must never clobber HALT
294 * till we've gone through and cleaned everything up, even when
295 * they add urbs to this qh's queue or mark them for unlinking.
297 * NOTE: unlinking expects to be done in queue order.
299 state = qh->qh_state;
300 qh->qh_state = QH_STATE_COMPLETING;
301 stopped = (state == QH_STATE_IDLE);
303 /* remove de-activated QTDs from front of queue.
304 * after faults (including short reads), cleanup this urb
305 * then let the queue advance.
306 * if queue is stopped, handles unlinks.
308 list_for_each_safe (entry, tmp, &qh->qtd_list) {
309 struct ehci_qtd *qtd;
310 struct urb *urb;
311 u32 token = 0;
312 int qtd_status;
314 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
315 urb = qtd->urb;
317 /* clean up any state from previous QTD ...*/
318 if (last) {
319 if (likely (last->urb != urb)) {
320 ehci_urb_done(ehci, last->urb, last_status);
321 count++;
322 <<<<<<< HEAD:drivers/usb/host/ehci-q.c
323 =======
324 last_status = -EINPROGRESS;
325 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/host/ehci-q.c
327 ehci_qtd_free (ehci, last);
328 last = NULL;
329 <<<<<<< HEAD:drivers/usb/host/ehci-q.c
330 last_status = -EINPROGRESS;
331 =======
332 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:drivers/usb/host/ehci-q.c
335 /* ignore urbs submitted during completions we reported */
336 if (qtd == end)
337 break;
339 /* hardware copies qtd out of qh overlay */
340 rmb ();
341 token = hc32_to_cpu(ehci, qtd->hw_token);
343 /* always clean up qtds the hc de-activated */
344 if ((token & QTD_STS_ACTIVE) == 0) {
346 if ((token & QTD_STS_HALT) != 0) {
347 stopped = 1;
349 /* magic dummy for some short reads; qh won't advance.
350 * that silicon quirk can kick in with this dummy too.
352 } else if (IS_SHORT_READ (token)
353 && !(qtd->hw_alt_next
354 & EHCI_LIST_END(ehci))) {
355 stopped = 1;
356 goto halt;
359 /* stop scanning when we reach qtds the hc is using */
360 } else if (likely (!stopped
361 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
362 break;
364 } else {
365 stopped = 1;
367 if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state)))
368 last_status = -ESHUTDOWN;
370 /* ignore active urbs unless some previous qtd
371 * for the urb faulted (including short read) or
372 * its urb was canceled. we may patch qh or qtds.
374 if (likely(last_status == -EINPROGRESS &&
375 !urb->unlinked))
376 continue;
378 /* issue status after short control reads */
379 if (unlikely (do_status != 0)
380 && QTD_PID (token) == 0 /* OUT */) {
381 do_status = 0;
382 continue;
385 /* token in overlay may be most current */
386 if (state == QH_STATE_IDLE
387 && cpu_to_hc32(ehci, qtd->qtd_dma)
388 == qh->hw_current)
389 token = hc32_to_cpu(ehci, qh->hw_token);
391 /* force halt for unlinked or blocked qh, so we'll
392 * patch the qh later and so that completions can't
393 * activate it while we "know" it's stopped.
395 if ((halt & qh->hw_token) == 0) {
396 halt:
397 qh->hw_token |= halt;
398 wmb ();
402 /* remove it from the queue */
403 qtd_status = qtd_copy_status(ehci, urb, qtd->length, token);
404 if (unlikely(qtd_status == -EREMOTEIO)) {
405 do_status = (!urb->unlinked &&
406 usb_pipecontrol(urb->pipe));
407 qtd_status = 0;
409 if (likely(last_status == -EINPROGRESS))
410 last_status = qtd_status;
412 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
413 last = list_entry (qtd->qtd_list.prev,
414 struct ehci_qtd, qtd_list);
415 last->hw_next = qtd->hw_next;
417 list_del (&qtd->qtd_list);
418 last = qtd;
421 /* last urb's completion might still need calling */
422 if (likely (last != NULL)) {
423 ehci_urb_done(ehci, last->urb, last_status);
424 count++;
425 ehci_qtd_free (ehci, last);
428 /* restore original state; caller must unlink or relink */
429 qh->qh_state = state;
431 /* be sure the hardware's done with the qh before refreshing
432 * it after fault cleanup, or recovering from silicon wrongly
433 * overlaying the dummy qtd (which reduces DMA chatter).
435 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
436 switch (state) {
437 case QH_STATE_IDLE:
438 qh_refresh(ehci, qh);
439 break;
440 case QH_STATE_LINKED:
441 /* should be rare for periodic transfers,
442 * except maybe high bandwidth ...
444 if ((cpu_to_hc32(ehci, QH_SMASK)
445 & qh->hw_info2) != 0) {
446 intr_deschedule (ehci, qh);
447 (void) qh_schedule (ehci, qh);
448 } else
449 unlink_async (ehci, qh);
450 break;
451 /* otherwise, unlink already started */
455 return count;
458 /*-------------------------------------------------------------------------*/
460 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
461 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
462 // ... and packet size, for any kind of endpoint descriptor
463 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
466 * reverse of qh_urb_transaction: free a list of TDs.
467 * used for cleanup after errors, before HC sees an URB's TDs.
469 static void qtd_list_free (
470 struct ehci_hcd *ehci,
471 struct urb *urb,
472 struct list_head *qtd_list
474 struct list_head *entry, *temp;
476 list_for_each_safe (entry, temp, qtd_list) {
477 struct ehci_qtd *qtd;
479 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
480 list_del (&qtd->qtd_list);
481 ehci_qtd_free (ehci, qtd);
486 * create a list of filled qtds for this URB; won't link into qh.
488 static struct list_head *
489 qh_urb_transaction (
490 struct ehci_hcd *ehci,
491 struct urb *urb,
492 struct list_head *head,
493 gfp_t flags
495 struct ehci_qtd *qtd, *qtd_prev;
496 dma_addr_t buf;
497 int len, maxpacket;
498 int is_input;
499 u32 token;
502 * URBs map to sequences of QTDs: one logical transaction
504 qtd = ehci_qtd_alloc (ehci, flags);
505 if (unlikely (!qtd))
506 return NULL;
507 list_add_tail (&qtd->qtd_list, head);
508 qtd->urb = urb;
510 token = QTD_STS_ACTIVE;
511 token |= (EHCI_TUNE_CERR << 10);
512 /* for split transactions, SplitXState initialized to zero */
514 len = urb->transfer_buffer_length;
515 is_input = usb_pipein (urb->pipe);
516 if (usb_pipecontrol (urb->pipe)) {
517 /* SETUP pid */
518 qtd_fill(ehci, qtd, urb->setup_dma,
519 sizeof (struct usb_ctrlrequest),
520 token | (2 /* "setup" */ << 8), 8);
522 /* ... and always at least one more pid */
523 token ^= QTD_TOGGLE;
524 qtd_prev = qtd;
525 qtd = ehci_qtd_alloc (ehci, flags);
526 if (unlikely (!qtd))
527 goto cleanup;
528 qtd->urb = urb;
529 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
530 list_add_tail (&qtd->qtd_list, head);
532 /* for zero length DATA stages, STATUS is always IN */
533 if (len == 0)
534 token |= (1 /* "in" */ << 8);
538 * data transfer stage: buffer setup
540 buf = urb->transfer_dma;
542 if (is_input)
543 token |= (1 /* "in" */ << 8);
544 /* else it's already initted to "out" pid (0 << 8) */
546 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
549 * buffer gets wrapped in one or more qtds;
550 * last one may be "short" (including zero len)
551 * and may serve as a control status ack
553 for (;;) {
554 int this_qtd_len;
556 this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
557 len -= this_qtd_len;
558 buf += this_qtd_len;
559 if (is_input)
560 qtd->hw_alt_next = ehci->async->hw_alt_next;
562 /* qh makes control packets use qtd toggle; maybe switch it */
563 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
564 token ^= QTD_TOGGLE;
566 if (likely (len <= 0))
567 break;
569 qtd_prev = qtd;
570 qtd = ehci_qtd_alloc (ehci, flags);
571 if (unlikely (!qtd))
572 goto cleanup;
573 qtd->urb = urb;
574 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
575 list_add_tail (&qtd->qtd_list, head);
578 /* unless the bulk/interrupt caller wants a chance to clean
579 * up after short reads, hc should advance qh past this urb
581 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
582 || usb_pipecontrol (urb->pipe)))
583 qtd->hw_alt_next = EHCI_LIST_END(ehci);
586 * control requests may need a terminating data "status" ack;
587 * bulk ones may need a terminating short packet (zero length).
589 if (likely (urb->transfer_buffer_length != 0)) {
590 int one_more = 0;
592 if (usb_pipecontrol (urb->pipe)) {
593 one_more = 1;
594 token ^= 0x0100; /* "in" <--> "out" */
595 token |= QTD_TOGGLE; /* force DATA1 */
596 } else if (usb_pipebulk (urb->pipe)
597 && (urb->transfer_flags & URB_ZERO_PACKET)
598 && !(urb->transfer_buffer_length % maxpacket)) {
599 one_more = 1;
601 if (one_more) {
602 qtd_prev = qtd;
603 qtd = ehci_qtd_alloc (ehci, flags);
604 if (unlikely (!qtd))
605 goto cleanup;
606 qtd->urb = urb;
607 qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
608 list_add_tail (&qtd->qtd_list, head);
610 /* never any data in such packets */
611 qtd_fill(ehci, qtd, 0, 0, token, 0);
615 /* by default, enable interrupt on urb completion */
616 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
617 qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
618 return head;
620 cleanup:
621 qtd_list_free (ehci, urb, head);
622 return NULL;
625 /*-------------------------------------------------------------------------*/
627 // Would be best to create all qh's from config descriptors,
628 // when each interface/altsetting is established. Unlink
629 // any previous qh and cancel its urbs first; endpoints are
630 // implicitly reset then (data toggle too).
631 // That'd mean updating how usbcore talks to HCDs. (2.7?)
635 * Each QH holds a qtd list; a QH is used for everything except iso.
637 * For interrupt urbs, the scheduler must set the microframe scheduling
638 * mask(s) each time the QH gets scheduled. For highspeed, that's
639 * just one microframe in the s-mask. For split interrupt transactions
640 * there are additional complications: c-mask, maybe FSTNs.
642 static struct ehci_qh *
643 qh_make (
644 struct ehci_hcd *ehci,
645 struct urb *urb,
646 gfp_t flags
648 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
649 u32 info1 = 0, info2 = 0;
650 int is_input, type;
651 int maxp = 0;
652 struct usb_tt *tt = urb->dev->tt;
654 if (!qh)
655 return qh;
658 * init endpoint/device data for this QH
660 info1 |= usb_pipeendpoint (urb->pipe) << 8;
661 info1 |= usb_pipedevice (urb->pipe) << 0;
663 is_input = usb_pipein (urb->pipe);
664 type = usb_pipetype (urb->pipe);
665 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
667 /* Compute interrupt scheduling parameters just once, and save.
668 * - allowing for high bandwidth, how many nsec/uframe are used?
669 * - split transactions need a second CSPLIT uframe; same question
670 * - splits also need a schedule gap (for full/low speed I/O)
671 * - qh has a polling interval
673 * For control/bulk requests, the HC or TT handles these.
675 if (type == PIPE_INTERRUPT) {
676 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
677 is_input, 0,
678 hb_mult(maxp) * max_packet(maxp)));
679 qh->start = NO_FRAME;
681 if (urb->dev->speed == USB_SPEED_HIGH) {
682 qh->c_usecs = 0;
683 qh->gap_uf = 0;
685 qh->period = urb->interval >> 3;
686 if (qh->period == 0 && urb->interval != 1) {
687 /* NOTE interval 2 or 4 uframes could work.
688 * But interval 1 scheduling is simpler, and
689 * includes high bandwidth.
691 dbg ("intr period %d uframes, NYET!",
692 urb->interval);
693 goto done;
695 } else {
696 int think_time;
698 /* gap is f(FS/LS transfer times) */
699 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
700 is_input, 0, maxp) / (125 * 1000);
702 /* FIXME this just approximates SPLIT/CSPLIT times */
703 if (is_input) { // SPLIT, gap, CSPLIT+DATA
704 qh->c_usecs = qh->usecs + HS_USECS (0);
705 qh->usecs = HS_USECS (1);
706 } else { // SPLIT+DATA, gap, CSPLIT
707 qh->usecs += HS_USECS (1);
708 qh->c_usecs = HS_USECS (0);
711 think_time = tt ? tt->think_time : 0;
712 qh->tt_usecs = NS_TO_US (think_time +
713 usb_calc_bus_time (urb->dev->speed,
714 is_input, 0, max_packet (maxp)));
715 qh->period = urb->interval;
719 /* support for tt scheduling, and access to toggles */
720 qh->dev = urb->dev;
722 /* using TT? */
723 switch (urb->dev->speed) {
724 case USB_SPEED_LOW:
725 info1 |= (1 << 12); /* EPS "low" */
726 /* FALL THROUGH */
728 case USB_SPEED_FULL:
729 /* EPS 0 means "full" */
730 if (type != PIPE_INTERRUPT)
731 info1 |= (EHCI_TUNE_RL_TT << 28);
732 if (type == PIPE_CONTROL) {
733 info1 |= (1 << 27); /* for TT */
734 info1 |= 1 << 14; /* toggle from qtd */
736 info1 |= maxp << 16;
738 info2 |= (EHCI_TUNE_MULT_TT << 30);
740 /* Some Freescale processors have an erratum in which the
741 * port number in the queue head was 0..N-1 instead of 1..N.
743 if (ehci_has_fsl_portno_bug(ehci))
744 info2 |= (urb->dev->ttport-1) << 23;
745 else
746 info2 |= urb->dev->ttport << 23;
748 /* set the address of the TT; for TDI's integrated
749 * root hub tt, leave it zeroed.
751 if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
752 info2 |= tt->hub->devnum << 16;
754 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
756 break;
758 case USB_SPEED_HIGH: /* no TT involved */
759 info1 |= (2 << 12); /* EPS "high" */
760 if (type == PIPE_CONTROL) {
761 info1 |= (EHCI_TUNE_RL_HS << 28);
762 info1 |= 64 << 16; /* usb2 fixed maxpacket */
763 info1 |= 1 << 14; /* toggle from qtd */
764 info2 |= (EHCI_TUNE_MULT_HS << 30);
765 } else if (type == PIPE_BULK) {
766 info1 |= (EHCI_TUNE_RL_HS << 28);
767 info1 |= 512 << 16; /* usb2 fixed maxpacket */
768 info2 |= (EHCI_TUNE_MULT_HS << 30);
769 } else { /* PIPE_INTERRUPT */
770 info1 |= max_packet (maxp) << 16;
771 info2 |= hb_mult (maxp) << 30;
773 break;
774 default:
775 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
776 done:
777 qh_put (qh);
778 return NULL;
781 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
783 /* init as live, toggle clear, advance to dummy */
784 qh->qh_state = QH_STATE_IDLE;
785 qh->hw_info1 = cpu_to_hc32(ehci, info1);
786 qh->hw_info2 = cpu_to_hc32(ehci, info2);
787 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
788 qh_refresh (ehci, qh);
789 return qh;
792 /*-------------------------------------------------------------------------*/
794 /* move qh (and its qtds) onto async queue; maybe enable queue. */
796 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
798 __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
799 struct ehci_qh *head;
801 /* (re)start the async schedule? */
802 head = ehci->async;
803 timer_action_done (ehci, TIMER_ASYNC_OFF);
804 if (!head->qh_next.qh) {
805 u32 cmd = ehci_readl(ehci, &ehci->regs->command);
807 if (!(cmd & CMD_ASE)) {
808 /* in case a clear of CMD_ASE didn't take yet */
809 (void)handshake(ehci, &ehci->regs->status,
810 STS_ASS, 0, 150);
811 cmd |= CMD_ASE | CMD_RUN;
812 ehci_writel(ehci, cmd, &ehci->regs->command);
813 ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
814 /* posted write need not be known to HC yet ... */
818 /* clear halt and/or toggle; and maybe recover from silicon quirk */
819 if (qh->qh_state == QH_STATE_IDLE)
820 qh_refresh (ehci, qh);
822 /* splice right after start */
823 qh->qh_next = head->qh_next;
824 qh->hw_next = head->hw_next;
825 wmb ();
827 head->qh_next.qh = qh;
828 head->hw_next = dma;
830 qh->qh_state = QH_STATE_LINKED;
831 /* qtd completions reported later by interrupt */
834 /*-------------------------------------------------------------------------*/
837 * For control/bulk/interrupt, return QH with these TDs appended.
838 * Allocates and initializes the QH if necessary.
839 * Returns null if it can't allocate a QH it needs to.
840 * If the QH has TDs (urbs) already, that's great.
842 static struct ehci_qh *qh_append_tds (
843 struct ehci_hcd *ehci,
844 struct urb *urb,
845 struct list_head *qtd_list,
846 int epnum,
847 void **ptr
850 struct ehci_qh *qh = NULL;
851 u32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
853 qh = (struct ehci_qh *) *ptr;
854 if (unlikely (qh == NULL)) {
855 /* can't sleep here, we have ehci->lock... */
856 qh = qh_make (ehci, urb, GFP_ATOMIC);
857 *ptr = qh;
859 if (likely (qh != NULL)) {
860 struct ehci_qtd *qtd;
862 if (unlikely (list_empty (qtd_list)))
863 qtd = NULL;
864 else
865 qtd = list_entry (qtd_list->next, struct ehci_qtd,
866 qtd_list);
868 /* control qh may need patching ... */
869 if (unlikely (epnum == 0)) {
871 /* usb_reset_device() briefly reverts to address 0 */
872 if (usb_pipedevice (urb->pipe) == 0)
873 qh->hw_info1 &= ~qh_addr_mask;
876 /* just one way to queue requests: swap with the dummy qtd.
877 * only hc or qh_refresh() ever modify the overlay.
879 if (likely (qtd != NULL)) {
880 struct ehci_qtd *dummy;
881 dma_addr_t dma;
882 __hc32 token;
884 /* to avoid racing the HC, use the dummy td instead of
885 * the first td of our list (becomes new dummy). both
886 * tds stay deactivated until we're done, when the
887 * HC is allowed to fetch the old dummy (4.10.2).
889 token = qtd->hw_token;
890 qtd->hw_token = HALT_BIT(ehci);
891 wmb ();
892 dummy = qh->dummy;
894 dma = dummy->qtd_dma;
895 *dummy = *qtd;
896 dummy->qtd_dma = dma;
898 list_del (&qtd->qtd_list);
899 list_add (&dummy->qtd_list, qtd_list);
900 __list_splice (qtd_list, qh->qtd_list.prev);
902 ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
903 qh->dummy = qtd;
905 /* hc must see the new dummy at list end */
906 dma = qtd->qtd_dma;
907 qtd = list_entry (qh->qtd_list.prev,
908 struct ehci_qtd, qtd_list);
909 qtd->hw_next = QTD_NEXT(ehci, dma);
911 /* let the hc process these next qtds */
912 wmb ();
913 dummy->hw_token = token;
915 urb->hcpriv = qh_get (qh);
918 return qh;
921 /*-------------------------------------------------------------------------*/
923 static int
924 submit_async (
925 struct ehci_hcd *ehci,
926 struct urb *urb,
927 struct list_head *qtd_list,
928 gfp_t mem_flags
930 struct ehci_qtd *qtd;
931 int epnum;
932 unsigned long flags;
933 struct ehci_qh *qh = NULL;
934 int rc;
936 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
937 epnum = urb->ep->desc.bEndpointAddress;
939 #ifdef EHCI_URB_TRACE
940 ehci_dbg (ehci,
941 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
942 __FUNCTION__, urb->dev->devpath, urb,
943 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
944 urb->transfer_buffer_length,
945 qtd, urb->ep->hcpriv);
946 #endif
948 spin_lock_irqsave (&ehci->lock, flags);
949 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
950 &ehci_to_hcd(ehci)->flags))) {
951 rc = -ESHUTDOWN;
952 goto done;
954 rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
955 if (unlikely(rc))
956 goto done;
958 qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
959 if (unlikely(qh == NULL)) {
960 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
961 rc = -ENOMEM;
962 goto done;
965 /* Control/bulk operations through TTs don't need scheduling,
966 * the HC and TT handle it when the TT has a buffer ready.
968 if (likely (qh->qh_state == QH_STATE_IDLE))
969 qh_link_async (ehci, qh_get (qh));
970 done:
971 spin_unlock_irqrestore (&ehci->lock, flags);
972 if (unlikely (qh == NULL))
973 qtd_list_free (ehci, urb, qtd_list);
974 return rc;
977 /*-------------------------------------------------------------------------*/
979 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
981 static void end_unlink_async (struct ehci_hcd *ehci)
983 struct ehci_qh *qh = ehci->reclaim;
984 struct ehci_qh *next;
986 iaa_watchdog_done(ehci);
988 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
989 qh->qh_state = QH_STATE_IDLE;
990 qh->qh_next.qh = NULL;
991 qh_put (qh); // refcount from reclaim
993 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
994 next = qh->reclaim;
995 ehci->reclaim = next;
996 qh->reclaim = NULL;
998 qh_completions (ehci, qh);
1000 if (!list_empty (&qh->qtd_list)
1001 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1002 qh_link_async (ehci, qh);
1003 else {
1004 qh_put (qh); // refcount from async list
1006 /* it's not free to turn the async schedule on/off; leave it
1007 * active but idle for a while once it empties.
1009 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
1010 && ehci->async->qh_next.qh == NULL)
1011 timer_action (ehci, TIMER_ASYNC_OFF);
1014 if (next) {
1015 ehci->reclaim = NULL;
1016 start_unlink_async (ehci, next);
1020 /* makes sure the async qh will become idle */
1021 /* caller must own ehci->lock */
1023 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
1025 int cmd = ehci_readl(ehci, &ehci->regs->command);
1026 struct ehci_qh *prev;
1028 #ifdef DEBUG
1029 assert_spin_locked(&ehci->lock);
1030 if (ehci->reclaim
1031 || (qh->qh_state != QH_STATE_LINKED
1032 && qh->qh_state != QH_STATE_UNLINK_WAIT)
1034 BUG ();
1035 #endif
1037 /* stop async schedule right now? */
1038 if (unlikely (qh == ehci->async)) {
1039 /* can't get here without STS_ASS set */
1040 if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
1041 && !ehci->reclaim) {
1042 /* ... and CMD_IAAD clear */
1043 ehci_writel(ehci, cmd & ~CMD_ASE,
1044 &ehci->regs->command);
1045 wmb ();
1046 // handshake later, if we need to
1047 timer_action_done (ehci, TIMER_ASYNC_OFF);
1049 return;
1052 qh->qh_state = QH_STATE_UNLINK;
1053 ehci->reclaim = qh = qh_get (qh);
1055 prev = ehci->async;
1056 while (prev->qh_next.qh != qh)
1057 prev = prev->qh_next.qh;
1059 prev->hw_next = qh->hw_next;
1060 prev->qh_next = qh->qh_next;
1061 wmb ();
1063 if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
1064 /* if (unlikely (qh->reclaim != 0))
1065 * this will recurse, probably not much
1067 end_unlink_async (ehci);
1068 return;
1071 cmd |= CMD_IAAD;
1072 ehci_writel(ehci, cmd, &ehci->regs->command);
1073 (void)ehci_readl(ehci, &ehci->regs->command);
1074 iaa_watchdog_start(ehci);
1077 /*-------------------------------------------------------------------------*/
1079 static void scan_async (struct ehci_hcd *ehci)
1081 struct ehci_qh *qh;
1082 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1084 if (!++(ehci->stamp))
1085 ehci->stamp++;
1086 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1087 rescan:
1088 qh = ehci->async->qh_next.qh;
1089 if (likely (qh != NULL)) {
1090 do {
1091 /* clean any finished work for this qh */
1092 if (!list_empty (&qh->qtd_list)
1093 && qh->stamp != ehci->stamp) {
1094 int temp;
1096 /* unlinks could happen here; completion
1097 * reporting drops the lock. rescan using
1098 * the latest schedule, but don't rescan
1099 * qhs we already finished (no looping).
1101 qh = qh_get (qh);
1102 qh->stamp = ehci->stamp;
1103 temp = qh_completions (ehci, qh);
1104 qh_put (qh);
1105 if (temp != 0) {
1106 goto rescan;
1110 /* unlink idle entries, reducing HC PCI usage as well
1111 * as HCD schedule-scanning costs. delay for any qh
1112 * we just scanned, there's a not-unusual case that it
1113 * doesn't stay idle for long.
1114 * (plus, avoids some kind of re-activation race.)
1116 if (list_empty (&qh->qtd_list)) {
1117 if (qh->stamp == ehci->stamp)
1118 action = TIMER_ASYNC_SHRINK;
1119 else if (!ehci->reclaim
1120 && qh->qh_state == QH_STATE_LINKED)
1121 start_unlink_async (ehci, qh);
1124 qh = qh->qh_next.qh;
1125 } while (qh);
1127 if (action == TIMER_ASYNC_SHRINK)
1128 timer_action (ehci, TIMER_ASYNC_SHRINK);