2 * sma cpu5 watchdog driver
4 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/miscdevice.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/timer.h>
31 #include <linux/completion.h>
32 #include <linux/jiffies.h>
34 #include <asm/uaccess.h>
36 #include <linux/watchdog.h>
38 /* adjustable parameters */
40 static int verbose
= 0;
41 static int port
= 0x91;
42 static int ticks
= 10000;
44 #define PFX "cpu5wdt: "
46 #define CPU5WDT_EXTENT 0x0A
48 #define CPU5WDT_STATUS_REG 0x00
49 #define CPU5WDT_TIME_A_REG 0x02
50 #define CPU5WDT_TIME_B_REG 0x03
51 #define CPU5WDT_MODE_REG 0x04
52 #define CPU5WDT_TRIGGER_REG 0x07
53 #define CPU5WDT_ENABLE_REG 0x08
54 #define CPU5WDT_RESET_REG 0x09
56 #define CPU5WDT_INTERVAL (HZ/10+1)
58 /* some device data */
61 struct completion stop
;
62 <<<<<<< HEAD
:drivers
/watchdog
/cpu5wdt
.c
66 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/watchdog
/cpu5wdt
.c
67 struct timer_list timer
;
68 <<<<<<< HEAD
:drivers
/watchdog
/cpu5wdt
.c
72 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a
:drivers
/watchdog
/cpu5wdt
.c
77 /* generic helper functions */
79 static void cpu5wdt_trigger(unsigned long unused
)
82 printk(KERN_DEBUG PFX
"trigger at %i ticks\n", ticks
);
84 if( cpu5wdt_device
.running
)
87 /* keep watchdog alive */
88 outb(1, port
+ CPU5WDT_TRIGGER_REG
);
91 if (cpu5wdt_device
.queue
&& ticks
)
92 mod_timer(&cpu5wdt_device
.timer
, jiffies
+ CPU5WDT_INTERVAL
);
94 /* ticks doesn't matter anyway */
95 complete(&cpu5wdt_device
.stop
);
100 static void cpu5wdt_reset(void)
102 ticks
= cpu5wdt_device
.default_ticks
;
105 printk(KERN_DEBUG PFX
"reset (%i ticks)\n", (int) ticks
);
109 static void cpu5wdt_start(void)
111 if ( !cpu5wdt_device
.queue
) {
112 cpu5wdt_device
.queue
= 1;
113 outb(0, port
+ CPU5WDT_TIME_A_REG
);
114 outb(0, port
+ CPU5WDT_TIME_B_REG
);
115 outb(1, port
+ CPU5WDT_MODE_REG
);
116 outb(0, port
+ CPU5WDT_RESET_REG
);
117 outb(0, port
+ CPU5WDT_ENABLE_REG
);
118 mod_timer(&cpu5wdt_device
.timer
, jiffies
+ CPU5WDT_INTERVAL
);
120 /* if process dies, counter is not decremented */
121 cpu5wdt_device
.running
++;
124 static int cpu5wdt_stop(void)
126 if ( cpu5wdt_device
.running
)
127 cpu5wdt_device
.running
= 0;
129 ticks
= cpu5wdt_device
.default_ticks
;
132 printk(KERN_CRIT PFX
"stop not possible\n");
137 /* filesystem operations */
139 static int cpu5wdt_open(struct inode
*inode
, struct file
*file
)
141 if ( test_and_set_bit(0, &cpu5wdt_device
.inuse
) )
144 return nonseekable_open(inode
, file
);
147 static int cpu5wdt_release(struct inode
*inode
, struct file
*file
)
149 clear_bit(0, &cpu5wdt_device
.inuse
);
153 static int cpu5wdt_ioctl(struct inode
*inode
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
155 void __user
*argp
= (void __user
*)arg
;
157 static struct watchdog_info ident
=
159 .options
= WDIOF_CARDRESET
,
160 .identity
= "CPU5 WDT",
164 case WDIOC_KEEPALIVE
:
167 case WDIOC_GETSTATUS
:
168 value
= inb(port
+ CPU5WDT_STATUS_REG
);
169 value
= (value
>> 2) & 1;
170 if ( copy_to_user(argp
, &value
, sizeof(int)) )
173 case WDIOC_GETBOOTSTATUS
:
174 if ( copy_to_user(argp
, &value
, sizeof(int)) )
177 case WDIOC_GETSUPPORT
:
178 if ( copy_to_user(argp
, &ident
, sizeof(ident
)) )
181 case WDIOC_SETOPTIONS
:
182 if ( copy_from_user(&value
, argp
, sizeof(int)) )
185 case WDIOS_ENABLECARD
:
188 case WDIOS_DISABLECARD
:
189 return cpu5wdt_stop();
200 static ssize_t
cpu5wdt_write(struct file
*file
, const char __user
*buf
, size_t count
, loff_t
*ppos
)
210 static const struct file_operations cpu5wdt_fops
= {
211 .owner
= THIS_MODULE
,
213 .ioctl
= cpu5wdt_ioctl
,
214 .open
= cpu5wdt_open
,
215 .write
= cpu5wdt_write
,
216 .release
= cpu5wdt_release
,
219 static struct miscdevice cpu5wdt_misc
= {
220 .minor
= WATCHDOG_MINOR
,
222 .fops
= &cpu5wdt_fops
,
225 /* init/exit function */
227 static int __devinit
cpu5wdt_init(void)
233 printk(KERN_DEBUG PFX
"port=0x%x, verbose=%i\n", port
, verbose
);
235 if ( !request_region(port
, CPU5WDT_EXTENT
, PFX
) ) {
236 printk(KERN_ERR PFX
"request_region failed\n");
241 if ( (err
= misc_register(&cpu5wdt_misc
)) < 0 ) {
242 printk(KERN_ERR PFX
"misc_register failed\n");
246 /* watchdog reboot? */
247 val
= inb(port
+ CPU5WDT_STATUS_REG
);
248 val
= (val
>> 2) & 1;
250 printk(KERN_INFO PFX
"sorry, was my fault\n");
252 init_completion(&cpu5wdt_device
.stop
);
253 cpu5wdt_device
.queue
= 0;
255 clear_bit(0, &cpu5wdt_device
.inuse
);
257 setup_timer(&cpu5wdt_device
.timer
, cpu5wdt_trigger
, 0);
259 cpu5wdt_device
.default_ticks
= ticks
;
261 printk(KERN_INFO PFX
"init success\n");
266 release_region(port
, CPU5WDT_EXTENT
);
271 static int __devinit
cpu5wdt_init_module(void)
273 return cpu5wdt_init();
276 static void __devexit
cpu5wdt_exit(void)
278 if ( cpu5wdt_device
.queue
) {
279 cpu5wdt_device
.queue
= 0;
280 wait_for_completion(&cpu5wdt_device
.stop
);
283 misc_deregister(&cpu5wdt_misc
);
285 release_region(port
, CPU5WDT_EXTENT
);
289 static void __devexit
cpu5wdt_exit_module(void)
294 /* module entry points */
296 module_init(cpu5wdt_init_module
);
297 module_exit(cpu5wdt_exit_module
);
299 MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
300 MODULE_DESCRIPTION("sma cpu5 watchdog driver");
301 MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
302 MODULE_LICENSE("GPL");
303 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
305 module_param(port
, int, 0);
306 MODULE_PARM_DESC(port
, "base address of watchdog card, default is 0x91");
308 module_param(verbose
, int, 0);
309 MODULE_PARM_DESC(verbose
, "be verbose, default is 0 (no)");
311 module_param(ticks
, int, 0);
312 MODULE_PARM_DESC(ticks
, "count down ticks, default is 10000");