include/asm-x86/pgtable_32.h

   1 #ifndef _I386_PGTABLE_H
   2 #define _I386_PGTABLE_H
   3
   4
   5 /*
   6  * The Linux memory management assumes a three-level page table setup. On
   7  * the i386, we use that, but "fold" the mid level into the top-level page
   8  * table, so that we physically have the same two-level page table as the
   9  * i386 mmu expects.
  10  *
  11  * This file contains the functions and defines necessary to modify and use
  12  * the i386 page table tree.
  13  */
  14 #ifndef __ASSEMBLY__
  15 #include <asm/processor.h>
  16 #include <asm/fixmap.h>
  17 #include <linux/threads.h>
  18 #include <asm/paravirt.h>
  19
  20 #include <linux/bitops.h>
  21 #include <linux/slab.h>
  22 #include <linux/list.h>
  23 #include <linux/spinlock.h>
  24
  25 struct mm_struct;
  26 struct vm_area_struct;
  27
  28 extern pgd_t swapper_pg_dir[1024];
  29 <<<<<<< HEAD:include/asm-x86/pgtable_32.h
  30 extern struct kmem_cache *pmd_cache;
  31 void check_pgt_cache(void);
  32 =======
  33 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-x86/pgtable_32.h
  34
  35 <<<<<<< HEAD:include/asm-x86/pgtable_32.h
  36 static inline void pgtable_cache_init(void) {}
  37 =======
  38 static inline void pgtable_cache_init(void) { }
  39 static inline void check_pgt_cache(void) { }
  40 >>>>>>> 264e3e889d86e552b4191d69bb60f4f3b383135a:include/asm-x86/pgtable_32.h
  41 void paging_init(void);
  42
  43
  44 /*
  45  * The Linux x86 paging architecture is 'compile-time dual-mode', it
  46  * implements both the traditional 2-level x86 page tables and the
  47  * newer 3-level PAE-mode page tables.
  48  */
  49 #ifdef CONFIG_X86_PAE
  50 # include <asm/pgtable-3level-defs.h>
  51 # define PMD_SIZE       (1UL << PMD_SHIFT)
  52 # define PMD_MASK       (~(PMD_SIZE-1))
  53 #else
  54 # include <asm/pgtable-2level-defs.h>
  55 #endif
  56
  57 #define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  58 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  59
  60 #define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
  61 #define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
  62
  63 /* Just any arbitrary offset to the start of the vmalloc VM area: the
  64  * current 8MB value just means that there will be a 8MB "hole" after the
  65  * physical memory until the kernel virtual memory starts.  That means that
  66  * any out-of-bounds memory accesses will hopefully be caught.
  67  * The vmalloc() routines leaves a hole of 4kB between each vmalloced
  68  * area for the same reason. ;)
  69  */
  70 #define VMALLOC_OFFSET  (8*1024*1024)
  71 #define VMALLOC_START   (((unsigned long) high_memory + \
  72                         2*VMALLOC_OFFSET-1) & ~(VMALLOC_OFFSET-1))
  73 #ifdef CONFIG_X86_PAE
  74 #define LAST_PKMAP 512
  75 #else
  76 #define LAST_PKMAP 1024
  77 #endif
  78
  79 #define PKMAP_BASE ((FIXADDR_BOOT_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK)
  80
  81 #ifdef CONFIG_HIGHMEM
  82 # define VMALLOC_END    (PKMAP_BASE-2*PAGE_SIZE)
  83 #else
  84 # define VMALLOC_END    (FIXADDR_START-2*PAGE_SIZE)
  85 #endif
  86
  87 /*
  88  * Define this if things work differently on an i386 and an i486:
  89  * it will (on an i486) warn about kernel memory accesses that are
  90  * done without a 'access_ok(VERIFY_WRITE,..)'
  91  */
  92 #undef TEST_ACCESS_OK
  93
  94 /* The boot page tables (all created as a single array) */
  95 extern unsigned long pg0[];
  96
  97 #define pte_present(x)  ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
  98
  99 /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */
 100 #define pmd_none(x)     (!(unsigned long)pmd_val(x))
 101 #define pmd_present(x)  (pmd_val(x) & _PAGE_PRESENT)
 102 #define pmd_bad(x)      ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
 103
 104
 105 #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
 106
 107 #ifdef CONFIG_X86_PAE
 108 # include <asm/pgtable-3level.h>
 109 #else
 110 # include <asm/pgtable-2level.h>
 111 #endif
 112
 113 /*
 114  * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
 115  *
 116  *  dst - pointer to pgd range anwhere on a pgd page
 117  *  src - ""
 118  *  count - the number of pgds to copy.
 119  *
 120  * dst and src can be on the same page, but the range must not overlap,
 121  * and must not cross a page boundary.
 122  */
 123 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
 124 {
 125        memcpy(dst, src, count * sizeof(pgd_t));
 126 }
 127
 128 /*
 129  * Macro to mark a page protection value as "uncacheable".  On processors which do not support
 130  * it, this is a no-op.
 131  */
 132 #define pgprot_noncached(prot)  ((boot_cpu_data.x86 > 3)                                          \
 133                                  ? (__pgprot(pgprot_val(prot) | _PAGE_PCD | _PAGE_PWT)) : (prot))
 134
 135 /*
 136  * Conversion functions: convert a page and protection to a page entry,
 137  * and a page entry and page directory to the page they refer to.
 138  */
 139
 140 #define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 141
 142 /*
 143  * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
 144  *
 145  * this macro returns the index of the entry in the pgd page which would
 146  * control the given virtual address
 147  */
 148 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 149 #define pgd_index_k(addr) pgd_index(addr)
 150
 151 /*
 152  * pgd_offset() returns a (pgd_t *)
 153  * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
 154  */
 155 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
 156
 157 /*
 158  * a shortcut which implies the use of the kernel's pgd, instead
 159  * of a process's
 160  */
 161 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
 162
 163 static inline int pud_large(pud_t pud) { return 0; }
 164
 165 /*
 166  * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
 167  *
 168  * this macro returns the index of the entry in the pmd page which would
 169  * control the given virtual address
 170  */
 171 #define pmd_index(address) \
 172                 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 173
 174 /*
 175  * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
 176  *
 177  * this macro returns the index of the entry in the pte page which would
 178  * control the given virtual address
 179  */
 180 #define pte_index(address) \
 181                 (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 182 #define pte_offset_kernel(dir, address) \
 183         ((pte_t *) pmd_page_vaddr(*(dir)) +  pte_index(address))
 184
 185 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
 186
 187 #define pmd_page_vaddr(pmd) \
 188                 ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
 189
 190 #if defined(CONFIG_HIGHPTE)
 191 #define pte_offset_map(dir, address) \
 192         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE0) + pte_index(address))
 193 #define pte_offset_map_nested(dir, address) \
 194         ((pte_t *)kmap_atomic_pte(pmd_page(*(dir)),KM_PTE1) + pte_index(address))
 195 #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
 196 #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
 197 #else
 198 #define pte_offset_map(dir, address) \
 199         ((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
 200 #define pte_offset_map_nested(dir, address) pte_offset_map(dir, address)
 201 #define pte_unmap(pte) do { } while (0)
 202 #define pte_unmap_nested(pte) do { } while (0)
 203 #endif
 204
 205 /* Clear a kernel PTE and flush it from the TLB */
 206 #define kpte_clear_flush(ptep, vaddr)                                   \
 207 do {                                                                    \
 208         pte_clear(&init_mm, vaddr, ptep);                               \
 209         __flush_tlb_one(vaddr);                                         \
 210 } while (0)
 211
 212 /*
 213  * The i386 doesn't have any external MMU info: the kernel page
 214  * tables contain all the necessary information.
 215  */
 216 #define update_mmu_cache(vma,address,pte) do { } while (0)
 217
 218 void native_pagetable_setup_start(pgd_t *base);
 219 void native_pagetable_setup_done(pgd_t *base);
 220
 221 #ifndef CONFIG_PARAVIRT
 222 static inline void paravirt_pagetable_setup_start(pgd_t *base)
 223 {
 224         native_pagetable_setup_start(base);
 225 }
 226
 227 static inline void paravirt_pagetable_setup_done(pgd_t *base)
 228 {
 229         native_pagetable_setup_done(base);
 230 }
 231 #endif  /* !CONFIG_PARAVIRT */
 232
 233 #endif /* !__ASSEMBLY__ */
 234
 235 /*
 236  * kern_addr_valid() is (1) for FLATMEM and (0) for
 237  * SPARSEMEM and DISCONTIGMEM
 238  */
 239 #ifdef CONFIG_FLATMEM
 240 #define kern_addr_valid(addr)   (1)
 241 #else
 242 #define kern_addr_valid(kaddr)  (0)
 243 #endif
 244
 245 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot)         \
 246                 remap_pfn_range(vma, vaddr, pfn, size, prot)
 247
 248 #endif /* _I386_PGTABLE_H */