sound/pci/echoaudio/darla24_dsp.c

   1 /***************************************************************************
   2
   3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
   4    All rights reserved
   5    www.echoaudio.com
   6
   7    This file is part of Echo Digital Audio's generic driver library.
   8
   9    Echo Digital Audio's generic driver library is free software;
  10    you can redistribute it and/or modify it under the terms of
  11    the GNU General Public License as published by the Free Software
  12    Foundation.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  22    MA  02111-1307, USA.
  23
  24    *************************************************************************
  25
  26  Translation from C++ and adaptation for use in ALSA-Driver
  27  were made by Giuliano Pochini <pochini@shiny.it>
  28
  29 ****************************************************************************/
  30
  31
  32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
  33 {
  34         int err;
  35
  36         DE_INIT(("init_hw() - Darla24\n"));
  37         snd_assert((subdevice_id & 0xfff0) == DARLA24, return -ENODEV);
  38
  39         if ((err = init_dsp_comm_page(chip))) {
  40                 DE_INIT(("init_hw - could not initialize DSP comm page\n"));
  41                 return err;
  42         }
  43
  44         chip->device_id = device_id;
  45         chip->subdevice_id = subdevice_id;
  46         chip->bad_board = TRUE;
  47         chip->dsp_code_to_load = &card_fw[FW_DARLA24_DSP];
  48         /* Since this card has no ASIC, mark it as loaded so everything
  49            works OK */
  50         chip->asic_loaded = TRUE;
  51         chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
  52                 ECHO_CLOCK_BIT_ESYNC;
  53
  54         if ((err = load_firmware(chip)) < 0)
  55                 return err;
  56         chip->bad_board = FALSE;
  57
  58         if ((err = init_line_levels(chip)) < 0)
  59                 return err;
  60
  61         DE_INIT(("init_hw done\n"));
  62         return err;
  63 }
  64
  65
  66
  67 static u32 detect_input_clocks(const struct echoaudio *chip)
  68 {
  69         u32 clocks_from_dsp, clock_bits;
  70
  71         /* Map the DSP clock detect bits to the generic driver clock
  72            detect bits */
  73         clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
  74
  75         clock_bits = ECHO_CLOCK_BIT_INTERNAL;
  76
  77         if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
  78                 clock_bits |= ECHO_CLOCK_BIT_ESYNC;
  79
  80         return clock_bits;
  81 }
  82
  83
  84
  85 /* The Darla24 has no ASIC. Just do nothing */
  86 static int load_asic(struct echoaudio *chip)
  87 {
  88         return 0;
  89 }
  90
  91
  92
  93 static int set_sample_rate(struct echoaudio *chip, u32 rate)
  94 {
  95         u8 clock;
  96
  97         switch (rate) {
  98         case 96000:
  99                 clock = GD24_96000;
 100                 break;
 101         case 88200:
 102                 clock = GD24_88200;
 103                 break;
 104         case 48000:
 105                 clock = GD24_48000;
 106                 break;
 107         case 44100:
 108                 clock = GD24_44100;
 109                 break;
 110         case 32000:
 111                 clock = GD24_32000;
 112                 break;
 113         case 22050:
 114                 clock = GD24_22050;
 115                 break;
 116         case 16000:
 117                 clock = GD24_16000;
 118                 break;
 119         case 11025:
 120                 clock = GD24_11025;
 121                 break;
 122         case 8000:
 123                 clock = GD24_8000;
 124                 break;
 125         default:
 126                 DE_ACT(("set_sample_rate: Error, invalid sample rate %d\n",
 127                         rate));
 128                 return -EINVAL;
 129         }
 130
 131         if (wait_handshake(chip))
 132                 return -EIO;
 133
 134         DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock));
 135         chip->sample_rate = rate;
 136
 137         /* Override the sample rate if this card is set to Echo sync. */
 138         if (chip->input_clock == ECHO_CLOCK_ESYNC)
 139                 clock = GD24_EXT_SYNC;
 140
 141         chip->comm_page->sample_rate = cpu_to_le32(rate);       /* ignored by the DSP ? */
 142         chip->comm_page->gd_clock_state = clock;
 143         clear_handshake(chip);
 144         return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
 145 }
 146
 147
 148
 149 static int set_input_clock(struct echoaudio *chip, u16 clock)
 150 {
 151         snd_assert(clock == ECHO_CLOCK_INTERNAL ||
 152                    clock == ECHO_CLOCK_ESYNC, return -EINVAL);
 153         chip->input_clock = clock;
 154         return set_sample_rate(chip, chip->sample_rate);
 155 }
 156