x86: fix bootup crash in native_read_tsc()
[wrt350n-kernel.git] / drivers / ide / pci / cmd640.c
blob7240c20b9593f80b1d9e8154035729976db107b2
1 /*
2 * Copyright (C) 1995-1996 Linus Torvalds & authors (see below)
3 */
5 /*
6 * Original authors: abramov@cecmow.enet.dec.com (Igor Abramov)
7 * mlord@pobox.com (Mark Lord)
9 * See linux/MAINTAINERS for address of current maintainer.
11 * This file provides support for the advanced features and bugs
12 * of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
14 * These chips are basically fucked by design, and getting this driver
15 * to work on every motherboard design that uses this screwed chip seems
16 * bloody well impossible. However, we're still trying.
18 * Version 0.97 worked for everybody.
20 * User feedback is essential. Many thanks to the beta test team:
22 * A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
23 * bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
24 * chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
25 * derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
26 * flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
27 * j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
28 * kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
29 * peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
30 * s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
31 * steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
32 * liug@mama.indstate.edu, and others.
34 * Version 0.01 Initial version, hacked out of ide.c,
35 * and #include'd rather than compiled separately.
36 * This will get cleaned up in a subsequent release.
38 * Version 0.02 Fixes for vlb initialization code, enable prefetch
39 * for versions 'B' and 'C' of chip by default,
40 * some code cleanup.
42 * Version 0.03 Added reset of secondary interface,
43 * and black list for devices which are not compatible
44 * with prefetch mode. Separate function for setting
45 * prefetch is added, possibly it will be called some
46 * day from ioctl processing code.
48 * Version 0.04 Now configs/compiles separate from ide.c
50 * Version 0.05 Major rewrite of interface timing code.
51 * Added new function cmd640_set_mode to set PIO mode
52 * from ioctl call. New drives added to black list.
54 * Version 0.06 More code cleanup. Prefetch is enabled only for
55 * detected hard drives, not included in prefetch
56 * black list.
58 * Version 0.07 Changed to more conservative drive tuning policy.
59 * Unknown drives, which report PIO < 4 are set to
60 * (reported_PIO - 1) if it is supported, or to PIO0.
61 * List of known drives extended by info provided by
62 * CMD at their ftp site.
64 * Version 0.08 Added autotune/noautotune support.
66 * Version 0.09 Try to be smarter about 2nd port enabling.
67 * Version 0.10 Be nice and don't reset 2nd port.
68 * Version 0.11 Try to handle more weird situations.
70 * Version 0.12 Lots of bug fixes from Laszlo Peter
71 * irq unmasking disabled for reliability.
72 * try to be even smarter about the second port.
73 * tidy up source code formatting.
74 * Version 0.13 permit irq unmasking again.
75 * Version 0.90 massive code cleanup, some bugs fixed.
76 * defaults all drives to PIO mode0, prefetch off.
77 * autotune is OFF by default, with compile time flag.
78 * prefetch can be turned OFF/ON using "hdparm -p8/-p9"
79 * (requires hdparm-3.1 or newer)
80 * Version 0.91 first release to linux-kernel list.
81 * Version 0.92 move initial reg dump to separate callable function
82 * change "readahead" to "prefetch" to avoid confusion
83 * Version 0.95 respect original BIOS timings unless autotuning.
84 * tons of code cleanup and rearrangement.
85 * added CONFIG_BLK_DEV_CMD640_ENHANCED option
86 * prevent use of unmask when prefetch is on
87 * Version 0.96 prevent use of io_32bit when prefetch is off
88 * Version 0.97 fix VLB secondary interface for sjd@slip.net
89 * other minor tune-ups: 0.96 was very good.
90 * Version 0.98 ignore PCI version when disabled by BIOS
91 * Version 0.99 display setup/active/recovery clocks with PIO mode
92 * Version 1.00 Mmm.. cannot depend on PCMD_ENA in all systems
93 * Version 1.01 slow/fast devsel can be selected with "hdparm -p6/-p7"
94 * ("fast" is necessary for 32bit I/O in some systems)
95 * Version 1.02 fix bug that resulted in slow "setup times"
96 * (patch courtesy of Zoltan Hidvegi)
99 #define CMD640_PREFETCH_MASKS 1
101 //#define CMD640_DUMP_REGS
103 #include <linux/types.h>
104 #include <linux/kernel.h>
105 #include <linux/delay.h>
106 #include <linux/timer.h>
107 #include <linux/mm.h>
108 #include <linux/ioport.h>
109 #include <linux/blkdev.h>
110 #include <linux/hdreg.h>
111 #include <linux/ide.h>
112 #include <linux/init.h>
114 #include <asm/io.h>
117 * This flag is set in ide.c by the parameter: ide0=cmd640_vlb
119 int cmd640_vlb = 0;
122 * CMD640 specific registers definition.
125 #define VID 0x00
126 #define DID 0x02
127 #define PCMD 0x04
128 #define PCMD_ENA 0x01
129 #define PSTTS 0x06
130 #define REVID 0x08
131 #define PROGIF 0x09
132 #define SUBCL 0x0a
133 #define BASCL 0x0b
134 #define BaseA0 0x10
135 #define BaseA1 0x14
136 #define BaseA2 0x18
137 #define BaseA3 0x1c
138 #define INTLINE 0x3c
139 #define INPINE 0x3d
141 #define CFR 0x50
142 #define CFR_DEVREV 0x03
143 #define CFR_IDE01INTR 0x04
144 #define CFR_DEVID 0x18
145 #define CFR_AT_VESA_078h 0x20
146 #define CFR_DSA1 0x40
147 #define CFR_DSA0 0x80
149 #define CNTRL 0x51
150 #define CNTRL_DIS_RA0 0x40
151 #define CNTRL_DIS_RA1 0x80
152 #define CNTRL_ENA_2ND 0x08
154 #define CMDTIM 0x52
155 #define ARTTIM0 0x53
156 #define DRWTIM0 0x54
157 #define ARTTIM1 0x55
158 #define DRWTIM1 0x56
159 #define ARTTIM23 0x57
160 #define ARTTIM23_DIS_RA2 0x04
161 #define ARTTIM23_DIS_RA3 0x08
162 #define DRWTIM23 0x58
163 #define BRST 0x59
166 * Registers and masks for easy access by drive index:
168 static u8 prefetch_regs[4] = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
169 static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
171 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
173 static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
174 static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
177 * Current cmd640 timing values for each drive.
178 * The defaults for each are the slowest possible timings.
180 static u8 setup_counts[4] = {4, 4, 4, 4}; /* Address setup count (in clocks) */
181 static u8 active_counts[4] = {16, 16, 16, 16}; /* Active count (encoded) */
182 static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
184 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
186 static DEFINE_SPINLOCK(cmd640_lock);
189 * These are initialized to point at the devices we control
191 static ide_hwif_t *cmd_hwif0, *cmd_hwif1;
192 static ide_drive_t *cmd_drives[4];
195 * Interface to access cmd640x registers
197 static unsigned int cmd640_key;
198 static void (*__put_cmd640_reg)(u16 reg, u8 val);
199 static u8 (*__get_cmd640_reg)(u16 reg);
202 * This is read from the CFR reg, and is used in several places.
204 static unsigned int cmd640_chip_version;
207 * The CMD640x chip does not support DWORD config write cycles, but some
208 * of the BIOSes use them to implement the config services.
209 * Therefore, we must use direct IO instead.
212 /* PCI method 1 access */
214 static void put_cmd640_reg_pci1 (u16 reg, u8 val)
216 outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
217 outb_p(val, (reg & 3) | 0xcfc);
220 static u8 get_cmd640_reg_pci1 (u16 reg)
222 outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
223 return inb_p((reg & 3) | 0xcfc);
226 /* PCI method 2 access (from CMD datasheet) */
228 static void put_cmd640_reg_pci2 (u16 reg, u8 val)
230 outb_p(0x10, 0xcf8);
231 outb_p(val, cmd640_key + reg);
232 outb_p(0, 0xcf8);
235 static u8 get_cmd640_reg_pci2 (u16 reg)
237 u8 b;
239 outb_p(0x10, 0xcf8);
240 b = inb_p(cmd640_key + reg);
241 outb_p(0, 0xcf8);
242 return b;
245 /* VLB access */
247 static void put_cmd640_reg_vlb (u16 reg, u8 val)
249 outb_p(reg, cmd640_key);
250 outb_p(val, cmd640_key + 4);
253 static u8 get_cmd640_reg_vlb (u16 reg)
255 outb_p(reg, cmd640_key);
256 return inb_p(cmd640_key + 4);
259 static u8 get_cmd640_reg(u16 reg)
261 unsigned long flags;
262 u8 b;
264 spin_lock_irqsave(&cmd640_lock, flags);
265 b = __get_cmd640_reg(reg);
266 spin_unlock_irqrestore(&cmd640_lock, flags);
267 return b;
270 static void put_cmd640_reg(u16 reg, u8 val)
272 unsigned long flags;
274 spin_lock_irqsave(&cmd640_lock, flags);
275 __put_cmd640_reg(reg,val);
276 spin_unlock_irqrestore(&cmd640_lock, flags);
279 static int __init match_pci_cmd640_device (void)
281 const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
282 unsigned int i;
283 for (i = 0; i < 4; i++) {
284 if (get_cmd640_reg(i) != ven_dev[i])
285 return 0;
287 #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
288 if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
289 printk("ide: cmd640 on PCI disabled by BIOS\n");
290 return 0;
292 #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
293 return 1; /* success */
297 * Probe for CMD640x -- pci method 1
299 static int __init probe_for_cmd640_pci1 (void)
301 __get_cmd640_reg = get_cmd640_reg_pci1;
302 __put_cmd640_reg = put_cmd640_reg_pci1;
303 for (cmd640_key = 0x80000000;
304 cmd640_key <= 0x8000f800;
305 cmd640_key += 0x800) {
306 if (match_pci_cmd640_device())
307 return 1; /* success */
309 return 0;
313 * Probe for CMD640x -- pci method 2
315 static int __init probe_for_cmd640_pci2 (void)
317 __get_cmd640_reg = get_cmd640_reg_pci2;
318 __put_cmd640_reg = put_cmd640_reg_pci2;
319 for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
320 if (match_pci_cmd640_device())
321 return 1; /* success */
323 return 0;
327 * Probe for CMD640x -- vlb
329 static int __init probe_for_cmd640_vlb (void)
331 u8 b;
333 __get_cmd640_reg = get_cmd640_reg_vlb;
334 __put_cmd640_reg = put_cmd640_reg_vlb;
335 cmd640_key = 0x178;
336 b = get_cmd640_reg(CFR);
337 if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
338 cmd640_key = 0x78;
339 b = get_cmd640_reg(CFR);
340 if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
341 return 0;
343 return 1; /* success */
347 * Returns 1 if an IDE interface/drive exists at 0x170,
348 * Returns 0 otherwise.
350 static int __init secondary_port_responding (void)
352 unsigned long flags;
354 spin_lock_irqsave(&cmd640_lock, flags);
356 outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET); /* select drive0 */
357 udelay(100);
358 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
359 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
360 udelay(100);
361 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
362 spin_unlock_irqrestore(&cmd640_lock, flags);
363 return 0; /* nothing responded */
366 spin_unlock_irqrestore(&cmd640_lock, flags);
367 return 1; /* success */
370 #ifdef CMD640_DUMP_REGS
372 * Dump out all cmd640 registers. May be called from ide.c
374 static void cmd640_dump_regs (void)
376 unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
378 /* Dump current state of chip registers */
379 printk("ide: cmd640 internal register dump:");
380 for (; reg <= 0x59; reg++) {
381 if (!(reg & 0x0f))
382 printk("\n%04x:", reg);
383 printk(" %02x", get_cmd640_reg(reg));
385 printk("\n");
387 #endif
390 * Check whether prefetch is on for a drive,
391 * and initialize the unmask flags for safe operation.
393 static void __init check_prefetch (unsigned int index)
395 ide_drive_t *drive = cmd_drives[index];
396 u8 b = get_cmd640_reg(prefetch_regs[index]);
398 if (b & prefetch_masks[index]) { /* is prefetch off? */
399 drive->no_unmask = 0;
400 drive->no_io_32bit = 1;
401 drive->io_32bit = 0;
402 } else {
403 #if CMD640_PREFETCH_MASKS
404 drive->no_unmask = 1;
405 drive->unmask = 0;
406 #endif
407 drive->no_io_32bit = 0;
412 * Figure out which devices we control
414 static void __init setup_device_ptrs (void)
416 unsigned int i;
418 cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */
419 cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */
420 for (i = 0; i < MAX_HWIFS; i++) {
421 ide_hwif_t *hwif = &ide_hwifs[i];
422 if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) {
423 if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0)
424 cmd_hwif0 = hwif;
425 else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170)
426 cmd_hwif1 = hwif;
429 cmd_drives[0] = &cmd_hwif0->drives[0];
430 cmd_drives[1] = &cmd_hwif0->drives[1];
431 cmd_drives[2] = &cmd_hwif1->drives[0];
432 cmd_drives[3] = &cmd_hwif1->drives[1];
435 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
438 * Sets prefetch mode for a drive.
440 static void set_prefetch_mode (unsigned int index, int mode)
442 ide_drive_t *drive = cmd_drives[index];
443 unsigned long flags;
444 int reg = prefetch_regs[index];
445 u8 b;
447 spin_lock_irqsave(&cmd640_lock, flags);
448 b = __get_cmd640_reg(reg);
449 if (mode) { /* want prefetch on? */
450 #if CMD640_PREFETCH_MASKS
451 drive->no_unmask = 1;
452 drive->unmask = 0;
453 #endif
454 drive->no_io_32bit = 0;
455 b &= ~prefetch_masks[index]; /* enable prefetch */
456 } else {
457 drive->no_unmask = 0;
458 drive->no_io_32bit = 1;
459 drive->io_32bit = 0;
460 b |= prefetch_masks[index]; /* disable prefetch */
462 __put_cmd640_reg(reg, b);
463 spin_unlock_irqrestore(&cmd640_lock, flags);
467 * Dump out current drive clocks settings
469 static void display_clocks (unsigned int index)
471 u8 active_count, recovery_count;
473 active_count = active_counts[index];
474 if (active_count == 1)
475 ++active_count;
476 recovery_count = recovery_counts[index];
477 if (active_count > 3 && recovery_count == 1)
478 ++recovery_count;
479 if (cmd640_chip_version > 1)
480 recovery_count += 1; /* cmd640b uses (count + 1)*/
481 printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
485 * Pack active and recovery counts into single byte representation
486 * used by controller
488 static inline u8 pack_nibbles (u8 upper, u8 lower)
490 return ((upper & 0x0f) << 4) | (lower & 0x0f);
494 * This routine retrieves the initial drive timings from the chipset.
496 static void __init retrieve_drive_counts (unsigned int index)
498 u8 b;
501 * Get the internal setup timing, and convert to clock count
503 b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
504 switch (b) {
505 case 0x00: b = 4; break;
506 case 0x80: b = 3; break;
507 case 0x40: b = 2; break;
508 default: b = 5; break;
510 setup_counts[index] = b;
513 * Get the active/recovery counts
515 b = get_cmd640_reg(drwtim_regs[index]);
516 active_counts[index] = (b >> 4) ? (b >> 4) : 0x10;
517 recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
522 * This routine writes the prepared setup/active/recovery counts
523 * for a drive into the cmd640 chipset registers to active them.
525 static void program_drive_counts (unsigned int index)
527 unsigned long flags;
528 u8 setup_count = setup_counts[index];
529 u8 active_count = active_counts[index];
530 u8 recovery_count = recovery_counts[index];
533 * Set up address setup count and drive read/write timing registers.
534 * Primary interface has individual count/timing registers for
535 * each drive. Secondary interface has one common set of registers,
536 * so we merge the timings, using the slowest value for each timing.
538 if (index > 1) {
539 unsigned int mate;
540 if (cmd_drives[mate = index ^ 1]->present) {
541 if (setup_count < setup_counts[mate])
542 setup_count = setup_counts[mate];
543 if (active_count < active_counts[mate])
544 active_count = active_counts[mate];
545 if (recovery_count < recovery_counts[mate])
546 recovery_count = recovery_counts[mate];
551 * Convert setup_count to internal chipset representation
553 switch (setup_count) {
554 case 4: setup_count = 0x00; break;
555 case 3: setup_count = 0x80; break;
556 case 1:
557 case 2: setup_count = 0x40; break;
558 default: setup_count = 0xc0; /* case 5 */
562 * Now that everything is ready, program the new timings
564 spin_lock_irqsave(&cmd640_lock, flags);
566 * Program the address_setup clocks into ARTTIM reg,
567 * and then the active/recovery counts into the DRWTIM reg
568 * (this converts counts of 16 into counts of zero -- okay).
570 setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
571 __put_cmd640_reg(arttim_regs[index], setup_count);
572 __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
573 spin_unlock_irqrestore(&cmd640_lock, flags);
577 * Set a specific pio_mode for a drive
579 static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle_time)
581 int setup_time, active_time, recovery_time, clock_time;
582 u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
583 int bus_speed = system_bus_clock();
585 if (pio_mode > 5)
586 pio_mode = 5;
587 setup_time = ide_pio_timings[pio_mode].setup_time;
588 active_time = ide_pio_timings[pio_mode].active_time;
589 recovery_time = cycle_time - (setup_time + active_time);
590 clock_time = 1000 / bus_speed;
591 cycle_count = (cycle_time + clock_time - 1) / clock_time;
593 setup_count = (setup_time + clock_time - 1) / clock_time;
595 active_count = (active_time + clock_time - 1) / clock_time;
596 if (active_count < 2)
597 active_count = 2; /* minimum allowed by cmd640 */
599 recovery_count = (recovery_time + clock_time - 1) / clock_time;
600 recovery_count2 = cycle_count - (setup_count + active_count);
601 if (recovery_count2 > recovery_count)
602 recovery_count = recovery_count2;
603 if (recovery_count < 2)
604 recovery_count = 2; /* minimum allowed by cmd640 */
605 if (recovery_count > 17) {
606 active_count += recovery_count - 17;
607 recovery_count = 17;
609 if (active_count > 16)
610 active_count = 16; /* maximum allowed by cmd640 */
611 if (cmd640_chip_version > 1)
612 recovery_count -= 1; /* cmd640b uses (count + 1)*/
613 if (recovery_count > 16)
614 recovery_count = 16; /* maximum allowed by cmd640 */
616 setup_counts[index] = setup_count;
617 active_counts[index] = active_count;
618 recovery_counts[index] = recovery_count;
621 * In a perfect world, we might set the drive pio mode here
622 * (using WIN_SETFEATURE) before continuing.
624 * But we do not, because:
625 * 1) this is the wrong place to do it (proper is do_special() in ide.c)
626 * 2) in practice this is rarely, if ever, necessary
628 program_drive_counts (index);
631 static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
633 unsigned int index = 0, cycle_time;
634 u8 b;
636 while (drive != cmd_drives[index]) {
637 if (++index > 3) {
638 printk(KERN_ERR "%s: bad news in %s\n",
639 drive->name, __FUNCTION__);
640 return;
643 switch (pio) {
644 case 6: /* set fast-devsel off */
645 case 7: /* set fast-devsel on */
646 b = get_cmd640_reg(CNTRL) & ~0x27;
647 if (pio & 1)
648 b |= 0x27;
649 put_cmd640_reg(CNTRL, b);
650 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis");
651 return;
653 case 8: /* set prefetch off */
654 case 9: /* set prefetch on */
655 set_prefetch_mode(index, pio & 1);
656 printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis");
657 return;
660 cycle_time = ide_pio_cycle_time(drive, pio);
661 cmd640_set_mode(index, pio, cycle_time);
663 printk("%s: selected cmd640 PIO mode%d (%dns)",
664 drive->name, pio, cycle_time);
666 display_clocks(index);
669 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
671 static int pci_conf1(void)
673 unsigned long flags;
674 u32 tmp;
676 spin_lock_irqsave(&cmd640_lock, flags);
677 outb(0x01, 0xCFB);
678 tmp = inl(0xCF8);
679 outl(0x80000000, 0xCF8);
680 if (inl(0xCF8) == 0x80000000) {
681 outl(tmp, 0xCF8);
682 spin_unlock_irqrestore(&cmd640_lock, flags);
683 return 1;
685 outl(tmp, 0xCF8);
686 spin_unlock_irqrestore(&cmd640_lock, flags);
687 return 0;
690 static int pci_conf2(void)
692 unsigned long flags;
694 spin_lock_irqsave(&cmd640_lock, flags);
695 outb(0x00, 0xCFB);
696 outb(0x00, 0xCF8);
697 outb(0x00, 0xCFA);
698 if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
699 spin_unlock_irqrestore(&cmd640_lock, flags);
700 return 1;
702 spin_unlock_irqrestore(&cmd640_lock, flags);
703 return 0;
707 * Probe for a cmd640 chipset, and initialize it if found.
709 static int __init cmd640x_init(void)
711 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
712 int second_port_toggled = 0;
713 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
714 int second_port_cmd640 = 0;
715 const char *bus_type, *port2;
716 unsigned int index;
717 u8 b, cfr;
718 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
720 if (cmd640_vlb && probe_for_cmd640_vlb()) {
721 bus_type = "VLB";
722 } else {
723 cmd640_vlb = 0;
724 /* Find out what kind of PCI probing is supported otherwise
725 Justin Gibbs will sulk.. */
726 if (pci_conf1() && probe_for_cmd640_pci1())
727 bus_type = "PCI (type1)";
728 else if (pci_conf2() && probe_for_cmd640_pci2())
729 bus_type = "PCI (type2)";
730 else
731 return 0;
734 * Undocumented magic (there is no 0x5b reg in specs)
736 put_cmd640_reg(0x5b, 0xbd);
737 if (get_cmd640_reg(0x5b) != 0xbd) {
738 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
739 return 0;
741 put_cmd640_reg(0x5b, 0);
743 #ifdef CMD640_DUMP_REGS
744 cmd640_dump_regs();
745 #endif
748 * Documented magic begins here
750 cfr = get_cmd640_reg(CFR);
751 cmd640_chip_version = cfr & CFR_DEVREV;
752 if (cmd640_chip_version == 0) {
753 printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
754 return 0;
758 * Initialize data for primary port
760 setup_device_ptrs ();
761 printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n",
762 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
763 cmd_hwif0->chipset = ide_cmd640;
764 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
765 cmd_hwif0->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
766 IDE_HFLAG_ABUSE_FAST_DEVSEL;
767 cmd_hwif0->pio_mask = ATA_PIO5;
768 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
769 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
771 idx[0] = cmd_hwif0->index;
774 * Ensure compatibility by always using the slowest timings
775 * for access to the drive's command register block,
776 * and reset the prefetch burstsize to default (512 bytes).
778 * Maybe we need a way to NOT do these on *some* systems?
780 put_cmd640_reg(CMDTIM, 0);
781 put_cmd640_reg(BRST, 0x40);
784 * Try to enable the secondary interface, if not already enabled
786 if (cmd_hwif1->noprobe) {
787 port2 = "not probed";
788 } else {
789 b = get_cmd640_reg(CNTRL);
790 if (secondary_port_responding()) {
791 if ((b & CNTRL_ENA_2ND)) {
792 second_port_cmd640 = 1;
793 port2 = "okay";
794 } else if (cmd640_vlb) {
795 second_port_cmd640 = 1;
796 port2 = "alive";
797 } else
798 port2 = "not cmd640";
799 } else {
800 put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
801 if (secondary_port_responding()) {
802 second_port_cmd640 = 1;
803 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
804 second_port_toggled = 1;
805 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
806 port2 = "enabled";
807 } else {
808 put_cmd640_reg(CNTRL, b); /* restore original setting */
809 port2 = "not responding";
815 * Initialize data for secondary cmd640 port, if enabled
817 if (second_port_cmd640) {
818 cmd_hwif0->serialized = 1;
819 cmd_hwif1->serialized = 1;
820 cmd_hwif1->chipset = ide_cmd640;
821 cmd_hwif0->mate = cmd_hwif1;
822 cmd_hwif1->mate = cmd_hwif0;
823 cmd_hwif1->channel = 1;
824 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
825 cmd_hwif1->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
826 IDE_HFLAG_ABUSE_FAST_DEVSEL;
827 cmd_hwif1->pio_mask = ATA_PIO5;
828 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
829 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
831 idx[1] = cmd_hwif1->index;
833 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
834 cmd_hwif0->serialized ? "" : "not ", port2);
837 * Establish initial timings/prefetch for all drives.
838 * Do not unnecessarily disturb any prior BIOS setup of these.
840 for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
841 ide_drive_t *drive = cmd_drives[index];
842 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
843 if (drive->autotune || ((index > 1) && second_port_toggled)) {
845 * Reset timing to the slowest speed and turn off prefetch.
846 * This way, the drive identify code has a better chance.
848 setup_counts [index] = 4; /* max possible */
849 active_counts [index] = 16; /* max possible */
850 recovery_counts [index] = 16; /* max possible */
851 program_drive_counts (index);
852 set_prefetch_mode (index, 0);
853 printk("cmd640: drive%d timings/prefetch cleared\n", index);
854 } else {
856 * Record timings/prefetch without changing them.
857 * This preserves any prior BIOS setup.
859 retrieve_drive_counts (index);
860 check_prefetch (index);
861 printk("cmd640: drive%d timings/prefetch(%s) preserved",
862 index, drive->no_io_32bit ? "off" : "on");
863 display_clocks(index);
865 #else
867 * Set the drive unmask flags to match the prefetch setting
869 check_prefetch (index);
870 printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
871 index, drive->no_io_32bit ? "off" : "on");
872 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
875 #ifdef CMD640_DUMP_REGS
876 cmd640_dump_regs();
877 #endif
879 ide_device_add(idx);
881 return 1;
884 module_param_named(probe_vlb, cmd640_vlb, bool, 0);
885 MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
887 module_init(cmd640x_init);